1364708 [^^01月06日步正_^ 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係關於一種頻率調整電路，尤指一種根據cpu (1364708 [^^01月06日步正_^ VI. Description of the invention: [Technical field of invention] [0001] The present invention relates to a frequency adjustment circuit, especially a cpu (
Central Processing Unit，中央處理器）負載大小自 動改變CPU工作頻率之頻率調整電路。 【先前技術】 [0002] 目前一般透過超頻或降頻來調整中央處理器之工作頻率 . ，超頻之方式有設置跳線超頻及BIOS (basic input output system ，基本輸入輸出系統）内調節超頻。設 置跳線超頻需要細手祕拔方式將職作更動從 而調整cpu工作頻率。在應用跳線超頻及BI〇s内調節超頻 時’-旦使用者設定了 CPU之工作頻率，電腦系統就會根 據所設定之工作頻率來處理資料，除非使用者再次變纟 工作頻率，而實際上CPU在執行程式時其負載大小在不斷 變化’當負大時需錢高U作鮮，上述超頻方 《無法根據CPU之負載情況來即時調整cpu之卫作頻率。 _爲了減少上述CPU之工作頻率調整方式之諸多不便，目前 很多主機板廠商所推出之具有自己特色之主機板動態超 頻技術如.華碩AI智慧超頻技術，，、微星‘‘D〇T動態 超頻技術”、技嘉“C.IA智慧加速技術”，上述三種超 頻技術是根據CPU溫度變化來調整咖之工作頻率，該等 方法均爲間接性之量測’因爲CPU6周圍晶片之溫度高低以 及主機内風扇之循環氣流皆會影響到CPU之感應溫度。因 此在超頻之準雄性上需要額外考量一些環境因素。此外 ’右CPU之散熱風扇故障所導致之溫度上升，會導致⑽ 09413697#單編號 A0101 第3頁/共10頁 1013008720-0 1364708 ___ 101年.01月06日修正替换頁 誤動作而提高工作頻率，使其增加燒毀之危險性。 【發明内容】 [0004] 有鑒於此，有必要提供一種中央處理器頻率調整電路， 根據中央處理器負載大小自動改變_央處理器之工作頻 率。 [0005] 一種中央處理器頻率調整電路，其包括串聯之一線圈感 應單元、一電壓放大單元及一開關單元，該線圈感應單 元用於將中央處理器之負載電流訊號轉換爲一電壓訊號 ，該電壓放大單元用於將該電壓訊號放大並産生一放大 之電壓訊號，該開關單元根據該放大之電壓訊號産生一 控制訊號，該控制訊號進入一基本輸入輸出系統晶片， 透過該基本輸入輸出系統晶片來控制一時鐘電路達到調 整該中央處理器之工作頻率。 [0006] 相較習知技術，該中央處理器頻率調整電路透過線圈直 接感應中央處理器之負載電流來判斷其負載大小，可即 時調整中央處理器之工作頻率。 【實施方式】 [0007] 請參考第一圖，其爲本發明中央處理器頻率調整電路較 佳實施方式之電路圖。本實施例中央處理器頻率調整電 路包括串聯之一線圈感應單元10、一電壓放大單元2 0及 一開關單元30。《該線圈感應單元10用於將中央處理器之 負載電流訊號轉換爲一電壓訊號，該電壓放大單元20用 於將該電壓訊號放大並産生一放大之電壓訊號，該開關 單元30根據該放大之電壓訊號産生一控制訊號，該控制 訊號進入一基本輸入輸出糸統晶片，透過該基本輸入輸 1013008720-0 第4頁/共10頁 101年.01月06日梭正#^頁 1364708 出系統晶片來控制一時鐘電路達到調整該中央處理器之 工作頻率。 [0008] 該線圈感應單元10包括一第一線圈L1及一第二線圈L2。 該第一線圈L1與該第二線圈L2繞於一鐵粉芯。該第一線 圈L1之一端連接一電源40，該電源40提供一 12V電壓， 該第一線圈L1之另一端連接至一負載50，該第二線圈L2 之一端接地。 [0009] 該電壓放大單元20包括一第一電阻R1、一第二電阻R2及 一運算放大器U。該第二線圈L2之另一端透過該第一電阻 R1連接至該運算放大器U之反向輸入端，該運算放大器U 之反向輸入端透過該第二電阻R2連接至該運算放大器U之 輸出端，該運算放大器U之同向輸入端接地。 [0010] 該開關單元30包括一場效電晶體Q。該運算放大器U之輸 出端連接至該場效電晶體Q之閘極，該場效電晶體Q之源 極接地，汲極輸出一控制訊號至一基本輸入輸出系統晶 片，透過該基本輸入輸出系統晶片來控制一時鐘電路達 到調整該中央處理器之工作頻率。 [0011] 在該線圈感應單元10中，當該負載50變化時，流過該第 一線圈L1中之負載電流il發生變化，該第一線圈L1與第 二線圈L2産生電磁互感現象，此時該第一線圈L1與該第 二線圈L2分別所産生之互感電動勢eMl 、eM2之大小分 別爲 [0012] eMl=MAi2/At (1) [0013] βΜ2 = ΜΔΐ1/Δΐ= V (2) 1013008720-0 09413697#單編號Α〇101 第5頁/共10頁 1364708 __ 101年01月06日接正替換頁 [0014] 式中，12爲該第二線圈L2產生之感應電流，Μ爲該第一線 圈L1與該第二線圈L2之互感，其與該第一線圈L1及該第 二線圈L2間之匝數、尺寸、幾何形狀以及該第一線圈L1 與該第二線圈L2間之相對位置有關，V為該第二線圈L2即 該線圈感應單元10所感應之電壓訊號。 [0015] 該運算放大器11之輪出電壓V〇ut可透過公式計算如下， [0016] Vout = - ( R2/R1 ) *v ( 3 ) [0017] 當該第一電阻Rl與該第二電阻R2之阻值確定時，該公式 (3)表明該電麼放大單元2()將該線圈感應單元1()所感應 之電壓訊號V進行放大產生該輸出電壓v〇ut。 [0018}該中央處理器頻率調整電路在工作時，當該負載5〇增大 時，其所消耗之負载電流^增大，該線翳感應單元1〇所 感應之電壓訊號V增大，該電壓放大單元2〇將該電壓訊號 V進一步放大，然後驅動該開關單元3〇産生該控制訊號， 透過該基本輸入輪出系統晶片控制該時鐘電路産生一較 大之工作頻率。同理當該負載50減小時，該中央處理器 頻率調整電路根據負載50大小由該基本輸入輸出系統晶 片來控制時鐘電路產生一較]、、之工作頻率。 [0019] 綜上所述，本發明符合發明專利要件’爰依法提出專利 申請。惟’以上所述者僅為本發明之較佳實施例，舉凡 熟悉本案技藝之人士，在援依本發明精神所作之等效修 飾或變化’皆應包含於以下之申請專利範圍内。 【圖式簡單說明】 [0020] 第一圖係本發明中央處理器頻率調整電路較佳實施方式 09_#單编號Α〇101 第6頁/共10頁 1013008720-0Central Processing Unit (CPU) The load adjustment circuit that automatically changes the CPU operating frequency. [Prior Art] [0002] At present, the operating frequency of the central processing unit is generally adjusted by overclocking or frequency reduction. The overclocking method includes setting jumper overclocking and adjusting overclocking in a BIOS (basic input output system). Setting the jumper overclocking requires a fine-grained way to change the cpu working frequency. When applying the jumper overclocking and adjusting the overclocking in BI〇s, the user will set the working frequency of the CPU, and the computer system will process the data according to the set working frequency, unless the user changes the working frequency again, but the actual When the CPU executes the program, its load size is constantly changing. 'When the negative CPU is large, it needs to be high. The above overclocking party can't adjust the CPU frequency according to the load of the CPU. _ In order to reduce the inconvenience of the above-mentioned CPU operating frequency adjustment method, many motherboard manufacturers have launched their own features of the motherboard dynamic overclocking technology such as ASUS AI smart overclocking technology, and MSI ''D〇T dynamic overclocking technology) "Gigabyte "C.IA Smart Acceleration Technology", the above three overclocking technologies adjust the working frequency of the coffee according to the CPU temperature change. These methods are indirect measurement 'because the temperature of the chip around the CPU6 and the fan inside the host The circulating airflow will affect the sensing temperature of the CPU. Therefore, some environmental factors need to be considered in the over-fighting of the overclocking. In addition, the temperature rise caused by the failure of the cooling fan of the right CPU will result in (10) 09413697#单号A0101 3 Page / Total 10 pages 1013008720-0 1364708 ___ 101 years. January 06, the replacement page malfunction is corrected to increase the working frequency, so as to increase the risk of burning. [Invention] [0004] In view of this, it is necessary to provide a central The processor frequency adjustment circuit automatically changes the operating frequency of the central processor according to the load of the central processing unit. [0005] A central processor frequency adjustment circuit includes a series coil induction unit, a voltage amplification unit and a switch unit, wherein the coil induction unit is configured to convert a load current signal of the central processing unit into a voltage signal, and the voltage amplification unit For amplifying the voltage signal and generating an amplified voltage signal, the switch unit generates a control signal according to the amplified voltage signal, and the control signal enters a basic input/output system chip, and controls the first through the basic input and output system chip. The clock circuit adjusts the operating frequency of the central processing unit. [0006] Compared with the prior art, the central processing unit frequency adjusting circuit directly senses the load current of the central processing unit through the coil to determine the load size, and can adjust the central processing unit instantaneously. [Embodiment] [0007] Please refer to the first figure, which is a circuit diagram of a preferred embodiment of a frequency adjustment circuit of a central processing unit according to the present invention. The central processor frequency adjustment circuit of the present embodiment includes a coil induction unit connected in series. 10, a voltage amplification unit 2 0 and one open The unit 30. The coil sensing unit 10 is configured to convert the load current signal of the central processing unit into a voltage signal, and the voltage amplifying unit 20 is configured to amplify the voltage signal and generate an amplified voltage signal. The amplified voltage signal generates a control signal, and the control signal enters a basic input/output system chip. Through the basic input, the input is 1013008720-0. The fourth page/total 10 pages 101. 01月06日梭正#^页1364708 The system chip is controlled to control a clock circuit to adjust the operating frequency of the central processor. [0008] The coil sensing unit 10 includes a first coil L1 and a second coil L2. The first coil L1 and the second coil L2 are wound around an iron powder core. One end of the first coil L1 is connected to a power source 40, the power source 40 provides a voltage of 12V, the other end of the first coil L1 is connected to a load 50, and one end of the second coil L2 is grounded. The voltage amplifying unit 20 includes a first resistor R1, a second resistor R2, and an operational amplifier U. The other end of the second coil L2 is connected to the inverting input terminal of the operational amplifier U through the first resistor R1, and the inverting input terminal of the operational amplifier U is connected to the output end of the operational amplifier U through the second resistor R2. The op amp U is grounded to the same input. [0010] The switching unit 30 includes a field effect transistor Q. The output terminal of the operational amplifier U is connected to the gate of the field effect transistor Q, the source of the field effect transistor Q is grounded, and the drain electrode outputs a control signal to a basic input/output system chip through the basic input/output system. The chip controls a clock circuit to adjust the operating frequency of the central processor. [0011] In the coil sensing unit 10, when the load 50 changes, the load current il flowing through the first coil L1 changes, and the first coil L1 and the second coil L2 generate electromagnetic mutual inductance. The magnitudes of the mutual electromotive force eM1, eM2 generated by the first coil L1 and the second coil L2 are respectively [0012] eMl=MAi2/At (1) [0013] βΜ2 = ΜΔΐ1/Δΐ= V (2) 1013008720- 0 09413697#单号Α〇101 Page 5/Total 10 Page 1364708 __ 101年01月06日正正换页 [0014] where 12 is the induced current generated by the second coil L2, which is the first The mutual inductance between the coil L1 and the second coil L2 is related to the number of turns, the size, the geometry between the first coil L1 and the second coil L2, and the relative position between the first coil L1 and the second coil L2. V is the voltage signal sensed by the second coil L2, that is, the coil sensing unit 10. [0015] The turn-off voltage V〇ut of the operational amplifier 11 can be calculated by the formula as follows: [0016] Vout = - ( R2 / R1 ) * v ( 3 ) [0017] When the first resistor R1 and the second resistor When the resistance value of R2 is determined, the formula (3) indicates that the power amplifier unit 2() amplifies the voltage signal V induced by the coil sensing unit 1() to generate the output voltage v〇ut. [0018] When the CPU frequency adjustment circuit is in operation, when the load 5〇 increases, the load current consumed by the CPU increases, and the voltage signal V sensed by the line sensing unit 1 increases. The voltage amplifying unit 2 further amplifies the voltage signal V, and then drives the switching unit 3 to generate the control signal, and controls the clock circuit to generate a large operating frequency through the basic input wheeling system chip. Similarly, when the load 50 is reduced, the central processor frequency adjustment circuit controls the clock circuit to generate a working frequency according to the load 50 by the basic input/output system chip. [0019] In summary, the present invention complies with the invention patent requirements 爰 提出 patent application. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0020] The first figure is a preferred embodiment of the central processor frequency adjustment circuit of the present invention. 09_#单号Α〇101 Page 6 of 10 1013008720-0
1364708 101年01.月06日修正替換頁 之電路圖。 [0021] 【主要元件符號說明】 線圈感應單元：10 [0022] 電壓放大單元：20 [0023] 開關單元：30 . [0024] 電源：4 0 Λ [0025] 負載：50 [0026] 第一線圈：L1 [0027] 第二線圈：L2 [0028] 第一電阻：R1 [0029] 第二電阻：R2 [0030] 運算放大器：U [0031] 場效電晶體.Q 09413697# 單編號 A〇101 第7頁/共10頁 1013008720-01364708 101. 01. 06. The circuit diagram of the replacement page. [0021] Description of main component symbols: Coil sensing unit: 10 [0022] Voltage amplifying unit: 20 [0023] Switching unit: 30. [0024] Power supply: 4 0 Λ [0025] Load: 50 [0026] First coil :L1 [0027] Second coil: L2 [0028] First resistor: R1 [0029] Second resistor: R2 [0030] Operational amplifier: U [0031] Field effect transistor. Q 09413697# Single number A〇101 7 pages / total 10 pages 1013008720-0