TWI354209B - Device for detecting redundant array of independen - Google Patents

Device for detecting redundant array of independen Download PDF

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TWI354209B
TWI354209B TW96141571A TW96141571A TWI354209B TW I354209 B TWI354209 B TW I354209B TW 96141571 A TW96141571 A TW 96141571A TW 96141571 A TW96141571 A TW 96141571A TW I354209 B TWI354209 B TW I354209B
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signal
output
circuit
hardware
level
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TW200921392A (en
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Zhe Wang
Th Liu
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Inventec Corp
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1354209 070478.TW 25450twf.doc/p 九、發明說明: 【發明所屬之技術領域】 本發明是關於一種偵測獨立磁碟備援陣列設定之裝 置’且特別是’-種餘_特定獨立磁碟備援陣列控 制模組的設定狀態之裝置。 【先前技術】 在伺服器的系統架構中採用串列連接SCSI (Serial1354209 070478.TW 25450twf.doc/p IX. Description of the Invention: [Technical Field] The present invention relates to a device for detecting an independent disk backup array setting, and in particular, a type-specific disk A device that supports the setting state of the array control module. [Prior Art] Serial connection SCSI (Serial) in the server system architecture

Attached SCSI,SAS )的高速儲存硬碟介面標準。請參照圖 1所繪不的祠服器之硬碟架構圖。主機板傳送信號給硬碟 105的方式.南橋/北橋1〇3透過週邊組件互連(peHpheraiAttached SCSI, SAS) high-speed storage hard disk interface standard. Please refer to the hard disk architecture diagram of the server shown in FIG. The way the motherboard transmits signals to the hard disk 105. The South Bridge/North Bridge 1〇3 is interconnected through peripheral components (peHpherai)

Component Interconnect,PCI)電腦匯流排1〇7將信號傳送 給SAS控制器1〇1,SAS控制器1〇1再傳送SAS 1〇9 給硬碟105。由於國内的伺服器製造廠商對於SAS控制器 是向國外購得,因此伺服器製造廠商對於SAS控制器的需 求非常依賴國外零組件供應商,而目前提供SAS方案的主 要供應商有:一是美商巨積(LSI)公司,另一是新加坡商博 通(Broadcom)公司。 圖1所示硬碟1〇5是採用獨立磁碟備援陣列 (Redundant Array of Independent Disks,RAID),將多台硬碟 透過SAS控制器結合成虛擬單台大容量的硬碟使用。請參 照圖2,圖2繪示了 一種使用外商公司所生產的SAS控制 器之電路圖,這種連接方式會有諸多設計不便之處:由於 受限於外商所提供的SAS控制器不允許伺服器的通用型 之輸入輸出(General Purpose Input/Output,GPIO)管理電路 5 1354209 070478.TW 25450twf.doc/p ^01讀取SAS控制器i〇i的rajd設定模式,因此Gpi〇 管理電路201不能直接地得知是硬體RAID模式或是軟體 模式,在設計上需要花費相當勞力來解讀設 定模式;另外,當伺服器設定硬體^①模式時,Gpi〇管 理電路2G1的輸㈣TG_丨還必需送出—咖〇信號給sas 控制器101的硬體致能端Ts_2,並且SAS控制器1〇1的 軟硬體設定端TS-1必須耦接至控制器專屬插座2〇3Component Interconnect, PCI) The computer bus 1〇7 transmits the signal to the SAS controller 1〇1, and the SAS controller 1〇1 transmits the SAS 1〇9 to the hard disk 105. Since domestic server manufacturers purchase SAS controllers from abroad, server manufacturers rely heavily on foreign component suppliers for SAS controllers. The main suppliers that currently offer SAS solutions are: One is the American company (LSI), and the other is Singapore's Broadcom. The hard disk 1〇5 shown in Figure 1 uses a Redundant Array of Independent Disks (RAID) to combine multiple hard disks into a single large-capacity hard disk through a SAS controller. Please refer to FIG. 2. FIG. 2 is a circuit diagram of a SAS controller manufactured by a foreign company. This connection method has many design inconveniences: the SAS controller is not allowed to be supported by the foreign company. The general purpose input/output (GPIO) management circuit 5 1354209 070478.TW 25450twf.doc/p ^01 reads the rajd setting mode of the SAS controller i〇i, so the Gpi〇 management circuit 201 cannot directly It is known that it is a hardware RAID mode or a software mode, and it takes a lot of effort to interpret the setting mode in design. In addition, when the server sets the hardware ^1 mode, the Gpi〇 management circuit 2G1's input (four) TG_丨 is also required. Sending the -Curry signal to the hardware enable terminal Ts_2 of the sas controller 101, and the hardware and software set terminal TS-1 of the SAS controller 101 must be coupled to the controller dedicated socket 2〇3

之第二端PIN-2,此插座203還必需配合—插座專屬的 RAID鑰(未繪示)來選擇串列連接SCSI 設定或是硬體設定。藝論插入(或壓入)插座〇= 會使插座的第一端與第三端PIN_3具有相連特性。 對於使用國外的SAS控制器,技術方面一直滯留於國 外零組件供應商所提供的電路設計,先前技術的作法無法 讓主機板知道疋否有RAID鑰插上,並且從BI〇s或基板 管理控制器難以得知是硬體RAJD還是軟體的設定 狀態,並且GPIO官理電路201還必需額外送出一個信號 來控制SAS控制器1〇1。 【發明内容】 本發明的目的是提供一種可偵測獨立磁碟備援陣列 (Redundant Array of independent Disks,RAID)設定之裝 置,當R^UD鑰插上時,此裝置運用準位偵測電路所響應 的,號位準變化來得知RAID鑰是否有插,從而知道使用 者是硬體RAID還是軟體raid的設定狀態。 本發明提出一種可偵測獨立磁碟備援陣列(RAID)設 6 1354209 070478.TW 25450twf.doc/p 定之裝置,此装置適用於一串列連接SCSI(Serial Attached SCSI,SAS)控制模組。此SAS控制模組包括一 SAS控制The second end of the PIN-2, the socket 203 must also cooperate with the socket-specific RAID key (not shown) to select the serial connection SCSI setting or the hardware setting. Insertion (or press-in) of the socket 艺 = will make the first end of the socket and the third end PIN_3 have a connection characteristic. For the use of foreign SAS controllers, the technical aspects have been stranded in the circuit design provided by foreign component suppliers. The prior art approach does not allow the motherboard to know if there is a RAID key plugged in, and from the BI〇s or substrate. It is difficult for the management controller to know whether it is the setting state of the hardware RAJD or the software, and the GPIO official circuit 201 must additionally send a signal to control the SAS controller 1〇1. SUMMARY OF THE INVENTION An object of the present invention is to provide a device capable of detecting a Redundant Array of Independent Disks (RAID) setting. When the R^UD key is plugged in, the device uses a level detecting circuit. In response to the change in the number level, it is known whether the RAID key is plugged in, thereby knowing whether the user is in the setting state of the hardware RAID or the software raid. The present invention provides a device capable of detecting an independent disk backup array (RAID) device, which is suitable for a serial attached SCSI (SAS) control module. The SAS control module includes a SAS control

器、一獨立磁碟備援陣列之錄以及一獨立磁碟備援陣列之 插座。SAS控制器具有一軟硬體設定端與一硬體致能端。 插座具有一第一端、一第二端與一第三端,此第二端耦接 至SAS控制器之軟硬體設定端,此第三端耦接至一接地電 位,其中RAID插座與RAID鑰用以選擇串列連接SCSI 控,器之軟體/硬體設定,當此RAID鑰插入rah)插座時 則弟一端與第三端具有接地電位的電性。此裝置包括一第 一電阻、一準位偵測電路以及一通用型之輸入輸出 (General Purpose Input/Output,GPIO)管理電路。第一電阻 之厂端耦接至一工作電壓,其另一端耦接至第一端。準位 偵測電路具有—輸人端減至第—端,並且具有-輸出端 耦接至SAS控制器之硬體致能端。此Gpi〇管理電路耦接A separate disk backup array and an independent disk backup array socket. The SAS controller has a soft hardware set end and a hard body enable end. The socket has a first end, a second end and a third end, the second end is coupled to the soft and hardware setting end of the SAS controller, the third end is coupled to a ground potential, wherein the RAID socket and the RAID The key is used to select the serial connection SCSI controller, the software/hardware setting, and when the RAID key is inserted into the rah) socket, the one end and the third end have the electrical potential of the ground potential. The device includes a first resistor, a level detecting circuit, and a general purpose input/output (GPIO) management circuit. The factory end of the first resistor is coupled to an operating voltage, and the other end is coupled to the first end. The level detecting circuit has a receiving end reduced to the first end and an output end coupled to the hardware enabling end of the SAS controller. This Gpi〇 management circuit is coupled

一上述之裝置,在一實施例中,準位偵測電路包括一 ^電阻以及-電晶體。第二電阻之接至 2體广嶋接至該第一端,其一第一源/顯 =電阻之另-端,其—第二源/汲極輕接至接地電位, 中準位侧電路之輸人端為閘極與第―端之祕處 位偵測電路之輸出端為第一源/汲極與第二電 之耦接處。 ^ 準位偵測電路為一緩衝 上述之裝置,在一實施例中 器。 7 1354209In one embodiment, the level detecting circuit includes a resistor and a transistor. The second resistor is connected to the second body to the first end, and the first source/display=the other end of the resistor, the second source/drain is lightly connected to the ground potential, and the medium-level side circuit The output end of the input terminal is the first source/drain and the second electric coupling. The level detecting circuit is a device for buffering the above, in an embodiment. 7 1354209

070478.TW 25450twf.d〇c/p w上述之裝置,在一實施例中,準位偵測電路為一反相 器。 士上述之裝置,在一實施例中,若RAID鑰未插入插座 時=輸出端輸出一第一信號,若鑰插入插座時則輸 出端輪出一第二信號,其中第一信號使SAS控制器開啟獨 立磁碟備援陣列功能。070478.TW 25450twf.d〇c/p w The above device, in one embodiment, the level detecting circuit is an inverter. In the above embodiment, if the RAID key is not inserted into the socket, the output terminal outputs a first signal, and if the key is inserted into the socket, the output terminal rotates a second signal, wherein the first signal causes the SAS controller Turn on the independent disk backup array function.

^ 上述之裝置,在一實施例中,第一信號為邏輯1位準, 第二信號為邏輯0位準。 上述之裝置,在一實施例中,GPIO管理電路通過接 收第一信號或第二信號來得知RAID的設定為下列其中之 一:一硬體RAU)模式與一軟體rah)模式。^ In the above embodiment, in an embodiment, the first signal is a logic 1 level and the second signal is a logic 0 level. In the above apparatus, in an embodiment, the GPIO management circuit knows that the RAID setting is one of the following by receiving the first signal or the second signal: a hardware RAU mode and a software rah mode.

本發明因採用準位偵測電路所響應的信號位準變化 來得知RAID鑰是否有插,因此裝置從而知道處於硬體 RAID還是軟體RAID的設定狀態,並且GPIO管理電路節 省使用一 GPIO輸出端的使用’不用再額外送出一個信號 來控制SAS控制器。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂’下文特舉本發明之實施例,並配合所附圖式,作詳 細說明如下。 【實施方式】 本發明的示範性實施例現將以詳細的實施方式來 作為參考,在附圖中說明所述示範性實施例的實例。在 可能的情況下’將在圖式中始終使用相同參考圖示符號 來指代相同或相似的部分。 8 1354209 070478.TW 25450twf.doc/p 圖3是繪示根據本發明示範性實施例的可偵測獨立 磁碟備挺陣列(Redundant Array of Independent Disks, RAID)設定之裝置之電路圖。圖3的實施例繪示了可偵測 RAID設定之裝置300與串列連接SCSI ( Serial Attached SCSI, SAS)控制模組 303。 可偵測RA ID設定之裝置3 〇 〇所要偵測的信號是來自The invention uses the signal level change reflected by the level detecting circuit to know whether the RAID key is inserted, so the device knows whether it is in the setting state of the hardware RAID or the software RAID, and the GPIO management circuit saves the use of the GPIO output. 'No need to send another signal to control the SAS controller. The above and other objects, features and advantages of the present invention will become more <RTIgt; <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; [Embodiment] Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or. 8 1354209 070478.TW 25450twf.doc/p FIG. 3 is a circuit diagram of an apparatus for detecting a Redundant Array of Independent Disks (RAID) setting according to an exemplary embodiment of the present invention. The embodiment of FIG. 3 illustrates a device 300 capable of detecting RAID settings and a Serial Attached SCSI (SAS) control module 303. The device that can detect the RA ID setting 3 〇 The signal to be detected is from

SAS控制模紕303,因此先介紹此SAS控制模組303,SASSAS control module 303, so first introduce this SAS control module 303, SAS

控制模組303包括SAS控制器ιοί、獨立磁碟備援陣列 (RAID)之鑰(未繪示)以及獨立磁碟備援陣列 之插座203。SAS控制器101具有軟硬體設定端TS1與硬 體致能端TS_2。插座203具有第一端pin-1、第二端pin-2 與第二端PIN-3,此第二端PIN-2耦接至SAS控制器1〇1The control module 303 includes a SAS controller ιοί, a separate disk backup array (RAID) key (not shown), and a socket 203 of the independent disk backup array. The SAS controller 101 has a hardware and software set terminal TS1 and a hardware enable terminal TS_2. The socket 203 has a first end pin-1, a second end pin-2 and a second end PIN-3, and the second end PIN-2 is coupled to the SAS controller 1〇1

之軟硬體設定端TS-1,此第三端PIN_3耦接至接地電位 GND ’其中RAID插座203與鑰用以選擇sas控制 器1〇1之軟體/硬體設定’當RAID鑰插入其專屬的插座2〇3 時會使第一端PIN-1與第三端PIN_3相連,因此第一端 PIN-1與第二端pin-3具有與接地電位相同的電性。 裝置300包括第一電阻iu、準位偵測電路3(n以及 通用型之輸入輸出(General purp0se Input/〇utput, Gpi〇)管 理電路302。裝置300的各組件的電路耦接方式如下:第 -電阻R1之-端祕至工作電壓vcc,其另 插座203之第-端屢!;準位偵測電路3〇1具有一I ^接至第-端PIN·卜並且具有—輪出端_至_控 制器1〇1之硬體致能端TS-2 ; GPI0管理電路3〇2耦接至 9 1354209 070478.TW 25450twf.doc/p 準位偵測電路301之輸出端。The hardware and software setting terminal TS-1, the third terminal PIN_3 is coupled to the ground potential GND 'where the RAID socket 203 and the key are used to select the software/hardware setting of the sas controller 1〇1 when the RAID key is inserted into its exclusive The socket 2〇3 connects the first terminal PIN-1 with the third terminal PIN_3, so the first terminal PIN-1 and the second terminal pin-3 have the same electrical potential as the ground potential. The device 300 includes a first resistor iu, a level detecting circuit 3 (n and a general-purpose input/output (Gpi) management circuit 302. The circuit coupling manner of each component of the device 300 is as follows: - the end of the resistor R1 is secret to the operating voltage vcc, and the other end of the socket 203 is repeated! The level detecting circuit 3〇1 has an I^ connection to the first end PIN·b and has a wheel end _ The hardware enable terminal TS-2 of the controller 1〇1; the GPI0 management circuit 3〇2 is coupled to the output of the 9 1354209 070478.TW 25450twf.doc/p level detecting circuit 301.

舉例來說’當RAID鑰插入插座203,表示使用者設 定硬體RAID模式;當raid鑰沒有插入插座203,表示 使用者設定軟體RAID模式。若RAID鑰未插入插座203 時,準位偵測電路3〇1的輸入端接收一偵測信號ΚΕγ_ρ, 此偵測信號ΚΕΥ-Ρ為邏輯1位準的信號,相應的,準位偵 測電路301的輸出端輸出一信號DET,此信號DET為邏 輯1位準的信號。 另外,若RAID鑰插入插座203時,由於RAID鑰插 入其專屬的插座203時會使第一端PIN-1與第三端pIN_3 相連,因此第一端PIN-1與第三端PIN-3的電性與接地電 位相同。準位偵測電路3〇1的輸入端接收偵測信號 KEY-P,此時的偵測信號ΚΕγ_ρ為邏輯〇位準的信號,相 應的,準位偵測電路301的輸出端輸出一信號DET,此信 號DET為邏輯〇位準的信號。For example, when the RAID key is inserted into the socket 203, the user sets the hardware RAID mode; when the raid key is not inserted into the socket 203, the user sets the software RAID mode. If the RAID key is not inserted into the socket 203, the input end of the level detecting circuit 3〇1 receives a detecting signal ΚΕγ_ρ, and the detecting signal ΚΕΥ-Ρ is a logic 1 level signal, and correspondingly, the level detecting circuit The output of 301 outputs a signal DET, which is a logic 1 level signal. In addition, if the RAID key is inserted into the socket 203, since the first key PIN-1 is connected to the third end pIN_3 when the RAID key is inserted into its exclusive socket 203, the first end PIN-1 and the third end PIN-3 are The electrical and ground potentials are the same. The input end of the level detecting circuit 3〇1 receives the detecting signal KEY-P, and the detecting signal ΚΕγ_ρ is a logical level signal. Correspondingly, the output of the level detecting circuit 301 outputs a signal DET. , this signal DET is a logical 〇 level signal.

本領域具有通常知識者應當瞭解’準位偵測電路3〇1 的輸出信號方式可以是相應其輸入端所接收的偵測信號相 同邏輯位準,也可以相應為相反的邏輯位準。當採用相同 的邏輯位準時’準位偵測電路301可以以一缓衝器來實 施。當採用相反的邏輯位準時,準位彳貞測電路3〇1可以以 一反相器來實施。 在接下來的實施例中,準位偵測電路301的輸入/輸出 關係是採用相同的邏輯位準。 由於GPIO管理電路302是耦接至準位偵測電路3〇1 1354209 070478.TW 25450twf.doc/p 之輸出端,因此GPIO管理電路302的輸入端TG-2接收到 信號DET,GPIO管理電路302根據信號DET的邏輯位準 來得知RAID鑰是否有插,其中若信號DET為邏輯〇位 準的信號則表示RAID鑰已經插入,若信號DET為邏輯1 位準的信號則表示RAID鑰沒有插入。另外,信號DET 也會被傳送至SAS控制器1〇1之硬體致能端TS-2,若使 用者是設定硬體RAID模式,則信號DET會致能SAS控Those skilled in the art should understand that the output signal of the level detecting circuit 3〇1 may be the same logic level of the detecting signal received by the corresponding input end, or may be the opposite logic level. The level detection circuit 301 can be implemented with a buffer when the same logic level is employed. When the opposite logic level is employed, the level detection circuit 3〇1 can be implemented with an inverter. In the following embodiments, the input/output relationship of the level detecting circuit 301 is the same logic level. Since the GPIO management circuit 302 is coupled to the output of the level detecting circuit 3〇1 1354209 070478.TW 25450twf.doc/p, the input terminal TG-2 of the GPIO management circuit 302 receives the signal DET, and the GPIO management circuit 302 According to the logic level of the signal DET, it is known whether the RAID key is inserted. If the signal DET is a logical level signal, the RAID key has been inserted. If the signal DET is a logic 1 level signal, the RAID key is not inserted. In addition, the signal DET is also transmitted to the hardware enable terminal TS-2 of the SAS controller 1〇1. If the user sets the hardware RAID mode, the signal DET will enable the SAS control.

制器101 ’以開啟RAID功能。故,裝置300可以告知主 機板是處於硬體RAID還是軟體RAID的設定狀態,並且 GPIO管理電路302可以節省一 GpI0輸出端的使用,不用 再額外送出一個信號來控制SAS控制器101。The controller 101' turns on the RAID function. Therefore, the device 300 can inform the host board whether it is in the hardware RAID or software RAID setting state, and the GPIO management circuit 302 can save the use of a GpI0 output without additionally sending a signal to control the SAS controller 101.

請參看圖4描述根據本發明另一實施例的可偵測 RAID設定之裝置之電路圖。圖4與圖3的整體電路架構 相同,在此實施例的裝置4〇()中更詳細說明準位偵測電路 301。準位偵測電路3〇1包括第二電阻R2以及電晶體 MOS。第二電阻及2之一端耦接至工作電壓VC(&gt;電晶體 MOS之閘極〇#接至第一端應巧,冑晶體之第一 源/及極D輕接至第二電阻R2^另一端,電晶體以〇3之 第二源/汲極s耦接至接地電位GND,其中準位偵測電路 301之輸人端為閘極G與第—端削]之爐處,準位偵 路301之輸出端為第一源/沒極D與第二電阻之另 接處。因此,當準位偵測電路3G1的輸入端接收 偵測&quot;is ί虎KJEγ·ρ兔溫紹_ /办准 馮邏輯位準1或0時,則準位偵測電路 的輸出端可以相應地響應而輸出-邏輯位準1或〇的 11 1354209 070478.TW 25450twf.doc/p k號DET。接著信號DET會被傳送至Gpi〇管理電路so? 與SAS控制器1(n,故裝置彻可以讓主機板知道是處於 硬體RAID较軟體副^的奴㈣,並且測〇管理 電路302可以節省—GPI〇輸出端的使用,不用再額外送 出一個信號來控制SAS控制器1〇1。4 is a circuit diagram of an apparatus for detecting a RAID setting according to another embodiment of the present invention. 4 is the same as the overall circuit architecture of FIG. 3, and the level detecting circuit 301 is explained in more detail in the apparatus 4() of this embodiment. The level detecting circuit 310 includes a second resistor R2 and a transistor MOS. The second resistor and one end of the second resistor are coupled to the operating voltage VC (&gt; the gate of the transistor MOS is connected to the first terminal, and the first source/pole D of the germanium crystal is connected to the second resistor R2^ At the other end, the transistor is coupled to the ground potential GND with the second source/drain s of the 〇3, wherein the input end of the level detecting circuit 301 is the gate of the gate G and the first end, and the level is The output end of the detective path 301 is the other end of the first source/no-pole D and the second resistor. Therefore, when the input of the level detecting circuit 3G1 receives the detection &quot;is ί虎KJEγ·ρ兔温绍_ / When the von logic level is 1 or 0, the output of the level detection circuit can respond accordingly and output - logic level 1 or 11 11 1354209 070478.TW 25450twf.doc / pk number DET. Then signal The DET will be transmitted to the Gpi〇 management circuit so? and the SAS controller 1 (n, so the device can let the motherboard know that it is in the hardware RAID softer slave (4), and the test management circuit 302 can save - GPI The use of the 〇 output does not require an additional signal to control the SAS controller 1〇1.

雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫離 本發明之精神和範圍内,當可作些許之更動與潤飾,因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 準。 【圖式簡單說明】 圖1為伺服器之硬碟架構圖。 圖2為一種常規的sAS控制器之電路圖。 圖3是繪示根據本發明示範性實施例的可偵測獨立磁 碟備援陣列(RAID)設定之裝置之電路圖。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. [Simple description of the diagram] Figure 1 is a hard disk architecture diagram of the server. 2 is a circuit diagram of a conventional sAS controller. 3 is a circuit diagram of an apparatus for detecting a stand-alone disk backup array (RAID) setting, in accordance with an exemplary embodiment of the present invention.

圖4是根據本發明另一實施例的可偵測^11:)設定之 裝置之電路圖。 【主要元件符號說明】 101 : SAS控制器 103 :南橋/北橋 105 :硬碟 107 : PCI電腦匯流排 109 : SAS 信號 201、302 : GPIO管理電路 12 1354209 070478.TW 25450twf.doc/p 203 : RAID 插座 300、400 :可偵測RAID設定之裝置 301 :準位偵測電路 D :電晶體之第一源/汲極 DET :信號 G:電晶體之閘極 GND :接地電位4 is a circuit diagram of a device capable of detecting a ^:: setting according to another embodiment of the present invention. [Main component symbol description] 101: SAS controller 103: Southbridge/Northbridge 105: Hard disk 107: PCI computer busbar 109: SAS signal 201, 302: GPIO management circuit 12 1354209 070478.TW 25450twf.doc/p 203 : RAID Sockets 300, 400: device 301 capable of detecting RAID setting: level detecting circuit D: first source/drain of the transistor DET: signal G: gate GND of the transistor: ground potential

KEY-P :偵測信號 MOS :電晶體 PIN-1 :插座之第一端 PIN-2 :插座之第二端 PIN-3 :插座之第三端KEY-P: Detection signal MOS: Transistor PIN-1: First end of the socket PIN-2: Second end of the socket PIN-3: Third end of the socket

Rl、R2 :電阻 S :電晶體之第二源/汲極 TG-1 : GPIO管理電路之輸出端 TG-2 : GPIO管理電路之輸入端Rl, R2: Resistor S: second source/drain of transistor TG-1: output of GPIO management circuit TG-2: input of GPIO management circuit

TS-1 : SAS控制器之軟硬體設定端 TS-2 : SAS控制器之硬體致能端 VCC :工作電壓 13TS-1: Software and hardware setting terminal of SAS controller TS-2: Hardware-enabled terminal of SAS controller VCC: Operating voltage 13

Claims (1)

100-6-15 十、申請專利範圍: 1.種可彳貞測獨立磁碟備援陣列設定之農置,該裝置 適用於串列連接SCSI控制模組,該串列連接SCSI控制 模組包括: 串列連接SCSI控制器’其具有—軟硬體設定端與 —硬體致能端; 一獨立磁碟備援陣列之鑰;以及 _ 一獨A立磁碟備援陣列之插座,其具有一第一端、一第 i端第三端,該第二端減至該*列連接scsi控制 益之錄硬體設定端,該第三端_至-接地電位,1中 =與=Γ選擇該争列連接SCSI控制器硬 i=f 該_ _該第—端與該第三端具有 3亥接地電位的電性; 該裝置包括: 壓;ΐ一ί阻,該第一電阻之一端耦接至與-工作電 壓,该第-電阻之另一端搞接至該第一端; 电 且且::二貞:路,具有一輸入端耦接至該第-端,並 致能_連接咖_之該硬體 信號,賴鑰插人雜座時舰輸丨端輸出一 其中該第-信號使該串列連接scs _二 備援陣列功能; k制杰開啟獨立磁碟 輸出管理電路,其輕接至該輸出端,· 該插座時則該輸出端輸出-第- 14 1354209 I㈣月丨呢正替換買;100-6-15 其亥通用型之輸入輸出管理電路通過接收該第一 ^,或A第—彳5旒來得知獨立磁碟備援陣列的^定為下列 碟備獨立磁碟備援陣聰式與-軟體獨立磁 測電請專利範圍第1項所述之裝置,其中該準位偵 —第一電阻,其一端耦接至該工作電壓;以及 及_:=二—r驅至該第一端’其一第一源/ 該接地電位乂電之另—端,其一第二源/沒極輕接至 該第一端之耗接:==貞測電路之該輸人端為該間極與 阻之另_端=處輪出端為該第-瓣與該第二電 3.如申請專利範圍第丨 置,复 測電路為—緩衝器。貞所述之裝1 /、中4準位侦 4·如中請專利範圍第 冽電路為一反相器。 ^旱位偵 於為t申請專鄕圍第1項所述之裝置,其巾該第寸 虎為邏輯1位準,該第二信號為邏輯〇位準。 '5 15100-6-15 X. Application Patent Range: 1. A farmable device that can be used to test the independent disk backup array. The device is suitable for serially connected SCSI control modules. The serial connection SCSI control module includes : a serial-connected SCSI controller having a software-hardware set-end and a hardware-enabled end; a separate disk backup array key; and a _ A-A disk backup array socket having a first end, an ith end, a third end, the second end is reduced to the * column connection scsi control benefits of the recording hardware set end, the third end _ to - ground potential, 1 medium = and = Γ selection The contention is connected to the SCSI controller. Hard i=f. The __ the first end and the third end have an electrical potential of 3 hp. The device comprises: a voltage; a 阻 resistance, one end coupling of the first resistor Connected to the - working voltage, the other end of the first-resistance is connected to the first end; the electric and:: two-way: an input having an input coupled to the first end, and enabling _ The hardware signal, when the key is inserted into the seat, the ship's output terminal outputs a first-signal to connect the serial port to the scs_second backup array function. kJiejie opens the independent disk output management circuit, which is lightly connected to the output terminal. · When the socket is output, the output is output - the first 14 1354209 I (four) month is replaced by the purchase; 100-6-15 The input/output management circuit receives the first ^, or A - -5彳 to know that the independent disk backup array is set to the following disk independent disk backup array and the software-independent magnetic test The device of claim 1, wherein the level-resistance-first resistor has one end coupled to the operating voltage; and _:= two-r drives to the first end 'a first source/ The ground potential is the other end of the power, and a second source/no pole is lightly connected to the first end of the consumption: == the input end of the circuit is the other end of the interpole and the resistance = The wheel end is the first valve and the second battery. 3. As described in the patent application, the retest circuit is a buffer.贞The installation of 1 /, 4 4 position detection 4 · If the scope of the patent is the first circuit is an inverter. ^ The dry position detection is for the application of the device mentioned in Item 1. The towel is the logical one level and the second signal is the logical level. '5 15
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Publication number Priority date Publication date Assignee Title
CN113821262A (en) * 2020-06-19 2021-12-21 纬创资通股份有限公司 Mainboard and method for switching signal sources

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113821262A (en) * 2020-06-19 2021-12-21 纬创资通股份有限公司 Mainboard and method for switching signal sources
TWI768378B (en) * 2020-06-19 2022-06-21 緯創資通股份有限公司 Motherboard and switching signal source method

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