TWI352312B - Transactional memory using buffered writes and enf - Google Patents

Transactional memory using buffered writes and enf Download PDF

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Publication number
TWI352312B
TWI352312B TW097108326A TW97108326A TWI352312B TW I352312 B TWI352312 B TW I352312B TW 097108326 A TW097108326 A TW 097108326A TW 97108326 A TW97108326 A TW 97108326A TW I352312 B TWI352312 B TW I352312B
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Taiwan
Prior art keywords
exchange
shadow copy
exchanges
write
submission
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TW097108326A
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English (en)
Chinese (zh)
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TW200849097A (en
Inventor
David Detlefs
John Joseph Duffy
Michael M Magruder
Goetz Graefe
Vinod K Grover
Timothy Lawrence Harris
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Microsoft Corp
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Application filed by Microsoft Corp filed Critical Microsoft Corp
Publication of TW200849097A publication Critical patent/TW200849097A/zh
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Publication of TWI352312B publication Critical patent/TWI352312B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G06F9/528—Mutual exclusion algorithms by using speculative mechanisms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G06F9/467—Transactional memory

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Advance Control (AREA)
TW097108326A 2007-04-11 2008-03-10 Transactional memory using buffered writes and enf TWI352312B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/786,174 US7908255B2 (en) 2007-04-11 2007-04-11 Transactional memory using buffered writes and enforced serialization order

Publications (2)

Publication Number Publication Date
TW200849097A TW200849097A (en) 2008-12-16
TWI352312B true TWI352312B (en) 2011-11-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW097108326A TWI352312B (en) 2007-04-11 2008-03-10 Transactional memory using buffered writes and enf

Country Status (7)

Country Link
US (1) US7908255B2 (enExample)
EP (1) EP2150900B1 (enExample)
JP (1) JP2010524133A (enExample)
CN (1) CN101652761B (enExample)
BR (1) BRPI0809078A2 (enExample)
TW (1) TWI352312B (enExample)
WO (1) WO2008127821A1 (enExample)

Cited By (2)

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TWI506429B (zh) * 2013-01-30 2015-11-01 Hewlett Packard Development Co 用於非依電性容錯寫入作業之方法、運算系統及相關電腦程式產品
US10482008B2 (en) 2015-01-23 2019-11-19 Hewlett Packard Enterprise Development Lp Aligned variable reclamation

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US8396937B1 (en) * 2007-04-30 2013-03-12 Oracle America, Inc. Efficient hardware scheme to support cross-cluster transactional memory
US7945741B2 (en) * 2007-07-09 2011-05-17 International Business Machines Corporation Reservation required transactions
US8230409B2 (en) * 2007-09-28 2012-07-24 International Business Machines Corporation Code optimization when using multiple reader locks and a non-reader lock
US8065490B2 (en) * 2007-09-28 2011-11-22 Intel Corporation Hardware acceleration of strongly atomic software transactional memory
US8140497B2 (en) * 2007-12-31 2012-03-20 Oracle America, Inc. System and method for implementing nonblocking zero-indirection transactional memory
US8769514B2 (en) * 2008-06-27 2014-07-01 Microsoft Corporation Detecting race conditions with a software transactional memory system
US8073778B2 (en) 2008-09-11 2011-12-06 Linden Research, Inc. Scalable distributed transaction manager for multi-host transactions
US10210018B2 (en) * 2008-12-24 2019-02-19 Intel Corporation Optimizing quiescence in a software transactional memory (STM) system
US9274855B2 (en) 2008-12-24 2016-03-01 Intel Corporation Optimization for safe elimination of weak atomicity overhead
US20100228929A1 (en) * 2009-03-09 2010-09-09 Microsoft Corporation Expedited completion of a transaction in stm
US8595446B2 (en) * 2009-11-25 2013-11-26 Oracle America, Inc. System and method for performing dynamic mixed mode read validation in a software transactional memory
US8095824B2 (en) 2009-12-15 2012-01-10 Intel Corporation Performing mode switching in an unbounded transactional memory (UTM) system
US8521995B2 (en) * 2009-12-15 2013-08-27 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US8316194B2 (en) * 2009-12-15 2012-11-20 Intel Corporation Mechanisms to accelerate transactions using buffered stores
US9477515B2 (en) 2009-12-15 2016-10-25 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US8996845B2 (en) * 2009-12-22 2015-03-31 Intel Corporation Vector compare-and-exchange operation
US8443155B2 (en) * 2009-12-31 2013-05-14 Facebook, Inc. Lock-free concurrent object dictionary
JP5691246B2 (ja) * 2010-05-27 2015-04-01 富士通株式会社 データベース二重化システム、情報処理装置及びデータベース二重化方法
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
US8407195B2 (en) * 2011-03-07 2013-03-26 Microsoft Corporation Efficient multi-version locking for main memory databases
US9158596B2 (en) 2011-03-18 2015-10-13 Oracle International Corporation Partitioned ticket locks with semi-local spinning
US9396329B2 (en) * 2011-10-17 2016-07-19 Intel Corporation Methods and apparatus for a safe and secure software update solution against attacks from malicious or unauthorized programs to update protected secondary storage
US10193927B2 (en) 2012-02-27 2019-01-29 University Of Virginia Patent Foundation Method of instruction location randomization (ILR) and related system
US9396227B2 (en) * 2012-03-29 2016-07-19 Hewlett Packard Enterprise Development Lp Controlled lock violation for data transactions
US9122873B2 (en) 2012-09-14 2015-09-01 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
JP5971713B2 (ja) * 2012-09-20 2016-08-17 株式会社東芝 Ｉｃカード
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
US9201609B2 (en) 2013-05-23 2015-12-01 Netapp, Inc. Efficient replication of changes to a byte-addressable persistent memory over a network
US9411533B2 (en) 2013-05-23 2016-08-09 Netapp, Inc. Snapshots and versioning of transactional storage class memory
CN104572506B (zh) * 2013-10-18 2019-03-26 阿里巴巴集团控股有限公司 一种并发访问内存的方法及装置
CA2830605A1 (en) * 2013-10-22 2015-04-22 Ibm Canada Limited - Ibm Canada Limitee Code versioning for enabling transactional memory region promotion
CN107918620B (zh) * 2016-10-10 2022-04-19 阿里巴巴集团控股有限公司 一种数据库的写入方法及装置、电子设备
US12020242B2 (en) * 2018-08-07 2024-06-25 International Business Machines Corporation Fair transaction ordering in blockchains
US11921691B2 (en) * 2022-06-20 2024-03-05 Google Llc Low latency demultiplexer for propagating ordered data to multiple sinks

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US7542986B2 (en) * 2002-03-26 2009-06-02 Hewlett-Packard Development Company, L.P. System and method for maintaining order for a replicated multi-unit I/O stream
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US7856537B2 (en) 2004-09-30 2010-12-21 Intel Corporation Hybrid hardware and software implementation of transactional memory access
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI506429B (zh) * 2013-01-30 2015-11-01 Hewlett Packard Development Co 用於非依電性容錯寫入作業之方法、運算系統及相關電腦程式產品
US9665496B2 (en) 2013-01-30 2017-05-30 Hewlett Packard Enterprise Development Lp Non-volatile memory write mechanism
US10482008B2 (en) 2015-01-23 2019-11-19 Hewlett Packard Enterprise Development Lp Aligned variable reclamation

Also Published As

Publication number Publication date
EP2150900A4 (en) 2011-11-02
WO2008127821A1 (en) 2008-10-23
JP2010524133A (ja) 2010-07-15
BRPI0809078A2 (pt) 2014-09-09
US7908255B2 (en) 2011-03-15
CN101652761A (zh) 2010-02-17
CN101652761B (zh) 2012-12-12
EP2150900B1 (en) 2019-05-01
EP2150900A1 (en) 2010-02-10
TW200849097A (en) 2008-12-16
US20080256073A1 (en) 2008-10-16

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