1345277 (1) 玖、發明說明 【發明所屬之技術領域】 本發明係有關一種積體電路封裝，更明確地說，本發 明係有關一種使用晶片型封裝土地柵格陣列或導線架，以 將晶粒向下導向積體電路黏著於晶粒向上導向封裝組件中 之配置。 【先前技術】 積體電路經由具有金屬連接器之印刷電路板而被連接 至其他的積體電路或其他的電氣裝置，積體電路使用眾所 周知之製造技術而被形成於部分的半導體晶圓或晶粒上。 晶粒之積體電路被黏著於一基板，而該基板被設計來提供 結構支撐、熱保護、及使從電路到印刷電路板之金屬連接 器或線路扇出的機構。積體電路及其基板/金屬連接器之 組合被稱爲積體電路封裝組件，此封裝組件基本上係一外 殼，此外殼被用來將裝置插進電路板的插座中，或是將裝 置焊接於電路板的表面接點上。 已經被使用之最普遍類型的半導體封裝爲例如圖1中 所示之小型外形輪廓封裝組件，該封裝組件包含一支撐於 且黏著在一密封於密封材料 1 2中之晶粒黏著墊塊 (DAP ) 11上的半導體晶片10，此晶片10包含由連接至 接合線15及16之墊塊13及14所表示之接合墊塊，而接 合線15及16被連接至導線架的個別導線架17及18。導 線架使晶片1 0連接至印刷電路板的線路，晶片1 0的接合 -5- (2) (2)1345277 塾塊係位在晶片1 0的頂面上，晶片1 〇到印刷電路板之所 想要的連接具有墊塊13及14，而墊塊13及14被連接至 封裝組件之同一側上的導線架1 7及1 8。 圖2例舉另一封裝組件設計，該封裝組件包含d A Ρ 21上之晶粒或晶片2 0的安裝，晶片2 0之接點2 2及2 3 經由到導線架引線26及27之接合線24及25而被連接至 導線架之底側。用以製造圖2之封裝組件的構造程序實際 上係和被用來製造圖1之封裝組件的程序一樣，圖2之封 裝組件一般被稱爲晶粒向下封裝組件，而圖1之封裝組件 則係晶粒向上封裝組件。 所述之封裝組件類型的設計必須要留意一般的連接器 協定，也就是說，對於電子裝置被互相連接的方式有協 約’要求晶片製造商以一特別的方位來製造晶片，更明確 地說，他們的接點。圖1到圖3中所示之封裝組件的接點 墊塊必須被定位以符合印刷電路板上所建立之安裝組態， 舉例來說，一即將被連接至高電位電軌、低電位電軌、二 輸入及二輸出之晶片必須被組構，使得晶片之接點和與那 些元件的每一個相關之線路相符合。對於例如圖2所示之 封·裝組件的晶粒向下封裝組件來說，晶片被製造而使得其 接點係在變成爲結構之底部的地方上。因此，有兩種類型 的晶片方位，其必須被製造做爲所使用之特別的封裝類 型’那些是“晶粒向下”的晶片，而那些是“晶粒向上”的晶 片°在製造兩種類型之晶片方位係通常的做法的同時，能 多旬僅製造其中一種類型的晶片方位，而此類型的晶片方位 -6- (3) 1345277 能夠被使用於任何類型之封裝組件組態中，將會是更有成 本效益的。 用來使積體電路晶粒連接至安裝於印刷電路板上之封 裝組件的打線接合技術在技術上係屬已知技術，這種技術 通常包含形成球體於金線的末端上，此球體黏著於晶粒上 的接合墊塊，並且導線向上及向外形成圈環而朝向導線架 接點，末端係楔形接合或針腳式接合於導線架。和這種技 術的一個結果爲導線圈環向上升起，藉以提出較高、較大 的成品封裝組件，參見圖1。 因此，所需要的是一種封裝配置，其能夠允許晶粒向 上之組態中晶粒向下晶片的連接。 【發明內容】 本發明之目的在於提供一種封裝配置，其能夠允許晶 粒向上之組態中晶粒向下晶片的連接。 本發明藉由提供一連接基板，其具有伸展於晶粒之下 的線路或連接線，此晶粒係被製造做爲晶粒向下之晶粒的 晶粒，其係位在基板上，連帶接點在相反於基板之側的一 側上，使得此晶粒係在晶粒向上的位置中。平常，具有其 接點位於晶粒之露出側上的晶粒向下之晶粒在晶粒向上的 封裝組件中將會是不可連接的，因爲晶粒之接點將會相鄰 於基板的錯誤線路或接腳。但是，本發明之基板包含那些 做爲從晶粒的一側通到另一側的線路或接腳，使得正確的 連接可以被建立。明確地說，連接器的路由被排成於晶粒 (5) (5)1345277 對於圖形中所示之封裝配置來說，晶粒〗〇,8爲晶粒向下類 型之晶粒’使得當晶粒】08被黏著於基板】〇〗之底部時， 其導電性接點1 09-1 1 4通常會被定位以提供適當的接腳輸 出’也就是說’雖然以晶粒向下方位來製造晶粒〗08，但 是本發明之晶粒封裝組件1 〇〇致能晶粒向上配置中晶粒 1 0 8的方位’接點丨〇 9 1 4經由連接器配線1 1 5 - 1 2 0而被 連接至線路1 02- 1 07，配線115-120及線路1 02- 1 07之配 置有效地“倒裝”接點1 〇 9 -1 1 4的方位，使得適當連接至通 孔1 2 1 -1 2 6被建立，而通孔丨2 1 -1 2 6被連接至底層的印刷 電路板。 基板101可以被製造做爲陶瓷基板或有機基板，其包 含一第一側1 0 1 a及一第二側1 0 1 b，晶粒1 0 8實際上使用 非導電性材料（舉例來說，例如熱導電性環氧樹脂）而被 連接至基板1 0 1，晶粒1 0 8包含一第一側1 0 8 a及一第二 側1 0 8 b ’使得第一側1 0 8 a和基板1 0 1之第一側1 0 1 a相 對，晶粒1 0 8之第二側1 0 8 b和基板1 0 1之第二側1 0 1 b也 有相同的相對關係。晶粒1 0 8不和基板1 0 1直接接觸係重 要的，以便防止短路。在那方面，需要確保黏著材料使晶 粒1 08和基板1 〇 1間隔分開，而同時維持適當的實際支 撐。封裝組件1 00另包含密封劑1 27，以便密封晶粒1 08 及連接器來保護基板1 〇 1及打線接合穩定性，在基板形成 之後或者做爲基板製造程序的一部分，線路102-107可以 被施加於基板1 0 1。' 如圖5所例舉，當晶粒I 08被黏著於基板1 01時，基 9 - (6) 1345277 板101上之線路102-107被配置而通過晶粒1〇8的下面， 線路1 02- 1 07以組織的方式而被編排路由，@得第—側 1 0 8 a上之晶粒1 0 8的接點被電連接至具有通孔在基板1 〇】 之第二側1 0 1 b上的線路，並且第二側]〇 8 b上的接點被電 連接至具有通孔在基板101之第一側101a上的線路。如 所指示，線路102- 1 07及通孔121-126可以用任何眾所周 知之方式而被建立於基板101上。圖形中所示之本發明的 目標在於使晶粒1 〇 8之一側上的接點連接至基板1 〇 1之相 反側上的通孔，通常，本發明係有關配置線路及配線接 點’使得晶粒向下之晶粒可以用晶粒向上之方位來予以封 裝。 雖然本發明已經被敘述做爲_封裝組件系統1 00，其 被設計來使晶粒1 0 8連接至包含線路1 〇 2 · I 0 7之基板 ]〇 1，他可以替代地被組構成一配置，以使晶粒1 0 8連接 至導線架I 2 8，如圖6所示。圖6之封裝組件2 0 0包含多 個引線129-] 34，其提供從晶粒108到印刷電路板（未顯 示出）之連接。雖然已經顯示有六條導線，但是了解到更 多或更少的引線可以被施加，做爲和晶粒1 0 8之主動元件 相關聯之特別接點需求的函數。對於圖形中所示之封裝配 置來說，晶粒]〇 8爲晶粒向下類型之晶粒，使得當晶粒 108被黏著於基板10]之底部時，其導電性接點]09.1]4 通常會被定位，用以使晶粒1〇8安裝於引線I 2 9- 1 3 4的底 部，也就是說，雖然以晶粒向下方位來製造晶粒1 0 8，但 是本發明之晶粒封裝組件200致能晶粒向上配置中晶粒 -10- (9) (9)1345277 圖7係晶粒上之經平坦’化球體及到基板之打線接合的 側視圖。 符號說明】 10,20 晶片 11 晶粒黏著墊塊 12 密封材料 13,14 墊塊 1 5, 1 6, 24,2 5 打線接合 17, 18，1 28 導線架 2 1 晶粒黏著墊塊 22，23 接點 26, 27 導線架引線 100， 200 晶粒封裝組件 10], 2 1 4 基板 102-107 線路 108 晶粒 109-114 導電性接點 115-120 連接器配線 121-126 通孔 129-134 引線 10 1a, 108a, 12 8a 第一側 101b， 108b， 12 8b 第二側 2 10 金線 -13- (10)1345277 2 12 晶粒表面 2 16 接合墊塊 2 18 經平坦化之球體 220 短截線 222 球體 224 接點 226 自由端 -14 -1345277 (1) Field of the Invention The present invention relates to an integrated circuit package, and more particularly to a wafer-type package land grid array or lead frame for crystallizing The grain down-directed integrated circuit is adhered to the configuration in which the die is directed upward into the package assembly. [Prior Art] An integrated circuit is connected to another integrated circuit or other electrical device via a printed circuit board having a metal connector, and the integrated circuit is formed on a portion of the semiconductor wafer or crystal using well-known manufacturing techniques. On the grain. The integrated circuit of the die is bonded to a substrate that is designed to provide structural support, thermal protection, and mechanisms for fanning out metal connectors or wires from the circuit to the printed circuit board. The combination of an integrated circuit and its substrate/metal connector is referred to as an integrated circuit package assembly. The package assembly is basically a housing that is used to insert the device into a socket of the circuit board or to solder the device. On the surface contacts of the board. The most common type of semiconductor package that has been used is, for example, the small outline package assembly shown in Figure 1, which includes a die attach pad (DAP) that is supported and adhered to a sealing material 12 a semiconductor wafer 10 on the wafer 10, the wafer 10 comprising bond pads represented by pads 13 and 14 connected to bond wires 15 and 16, and bond wires 15 and 16 being connected to individual lead frames 17 of the lead frame and 18. The lead frame connects the wafer 10 to the printed circuit board, and the bonding of the wafer 10 is -5- (2) (2) 1345277. The germanium is tied to the top surface of the wafer 10, and the wafer 1 is transferred to the printed circuit board. The desired connection has pads 13 and 14 which are connected to lead frames 17 and 18 on the same side of the package assembly. 2 illustrates another package assembly design including die or wafer 20 mounting on d A Ρ 21, bonding of contacts 2 2 and 2 of wafer 20 via bonding to leadframe leads 26 and 27 Lines 24 and 25 are connected to the bottom side of the lead frame. The construction procedure used to fabricate the package assembly of FIG. 2 is in fact the same as the procedure used to fabricate the package assembly of FIG. 1. The package assembly of FIG. 2 is generally referred to as a die down package assembly, and the package assembly of FIG. Then the die is packaged upwards. The design of the package component type must be aware of the general connector protocol, that is, the agreement for the way in which the electronic devices are interconnected requires the wafer manufacturer to manufacture the wafer in a particular orientation, more specifically, Their joints. The contact pads of the package assembly shown in Figures 1 through 3 must be positioned to conform to the setup configuration established on the printed circuit board, for example, to be connected to a high potential rail, a low potential rail, The two-input and two-output wafers must be organized such that the contacts of the wafer coincide with the lines associated with each of those components. For a die down package assembly such as the package assembly shown in Figure 2, the wafer is fabricated such that its contacts are where they become the bottom of the structure. Therefore, there are two types of wafer orientations that must be fabricated as the particular package type used - those that are "die down" wafers, and those that are "die up" wafers. The wafer orientation is the usual practice, and only one of the types of wafer orientations can be manufactured in multiple days, and this type of wafer orientation -6-(3) 1345277 can be used in any type of package component configuration, It will be more cost effective. Wire bonding techniques for attaching integrated circuit die to package components mounted on a printed circuit board are technically known in the art, which typically involve forming a sphere on the end of a gold wire that is adhered to Bonding pads on the die, and the wires form loops upward and outward toward the leadframe contacts, the ends being wedge-bonded or stitched to the leadframe. One result of this technique is that the lead coil loops up, thereby proposing a higher, larger finished package assembly, see Figure 1. What is needed, therefore, is a package configuration that allows for the die-to-wafer connection of the die in the upward configuration. SUMMARY OF THE INVENTION It is an object of the present invention to provide a package configuration that is capable of allowing the die to be bonded to the wafer in the upward configuration of the wafer. The present invention provides a connection substrate having a line or a connection line extending below the die, the die being fabricated as a die of grain-down grains, which is tied to the substrate, associated with The junction is on the side opposite the side of the substrate such that the die is in the upward position of the die. Normally, the die-down grains with their contacts on the exposed side of the die will be unconnectable in the die-up package because the die contacts will be adjacent to the wrong line of the substrate. Or pin. However, the substrate of the present invention includes those lines or pins that pass from one side of the die to the other so that the correct connection can be established. Specifically, the routing of the connectors is arranged in the die (5). (5) 1345277 For the package configuration shown in the figure, the grain is 〇, 8 is the grain of the die down type. When the grain is bonded to the bottom of the substrate, the conductive contact 1 09-1 1 4 is usually positioned to provide the proper pin output 'that is,' although the die is oriented downward. Manufacture of the die 08, but the die package assembly 1 of the present invention enables the orientation of the die 1 8 in the upper die arrangement 接 9 1 4 via the connector wiring 1 1 5 - 1 2 0 While being connected to line 102-1 07, the configuration of wiring 115-120 and line 102-1 07 effectively "flips" the orientation of the contacts 1 〇 9 -1 1 4 so that it is properly connected to the via 1 2 1 -1 2 6 is established, and vias 2 1 -1 2 6 are connected to the underlying printed circuit board. The substrate 101 can be fabricated as a ceramic substrate or an organic substrate comprising a first side 1 0 1 a and a second side 1 0 1 b, and the crystal grains 1 0 8 actually use a non-conductive material (for example, For example, a thermally conductive epoxy resin is connected to the substrate 110, and the die 110 includes a first side 1 0 8 a and a second side 1 0 8 b ' such that the first side 1 0 8 a and The first side 1 0 1 a of the substrate 1 0 1 is opposite to the second side 1 0 8 b of the substrate 1 0 8 and the second side 1 0 1 b of the substrate 1 0 1 have the same relative relationship. It is important that the die 1 0 8 is not in direct contact with the substrate 101 to prevent short circuits. In that regard, it is necessary to ensure that the adhesive material separates the crystal grains 108 from the substrate 1 〇 1 while maintaining proper physical support. The package assembly 100 further includes a sealant 127 for sealing the die 108 and the connector to protect the substrate 1 〇1 and wire bonding stability, after the substrate is formed or as part of the substrate fabrication process, the lines 102-107 can It is applied to the substrate 1 0 1 . As illustrated in Fig. 5, when the die I 08 is adhered to the substrate 101, the lines 102-107 on the substrate 9 - (6) 1345277 are arranged to pass under the die 1 〇 8 , line 1 02- 1 07 is organized in an organized manner, and the contact of the die 1 0 8 on the side 1 0 8 a is electrically connected to the second side 1 0 having the through hole on the substrate 1 The line on 1b, and the contact on the second side 〇8b is electrically connected to the line having the through hole on the first side 101a of the substrate 101. As indicated, lines 102-107 and vias 121-126 can be built on substrate 101 in any manner well known. The object of the invention shown in the figures is to connect the contacts on one side of the die 1 〇 8 to the vias on the opposite side of the substrate 1 , 1 . Typically, the present invention relates to the configuration of the wiring and wiring contacts. The grains that make the grains down can be encapsulated with the upward orientation of the grains. Although the present invention has been described as a package assembly system 100 designed to connect a die 1 0 8 to a substrate comprising a line 1 〇 2 · I 0 7 , which may alternatively be grouped into a The configuration is such that the die 110 is connected to the leadframe I 2 8, as shown in FIG. The package assembly 200 of Figure 6 includes a plurality of leads 129-] 34 that provide connections from the die 108 to a printed circuit board (not shown). Although six wires have been shown, it is understood that more or fewer leads can be applied as a function of the particular contact requirements associated with the active components of the die 108. For the package configuration shown in the figure, the die 〇8 is a die-down type of die such that when the die 108 is adhered to the bottom of the substrate 10], its conductive contact]09.1]4 Typically, it is positioned to mount the die 1 8 at the bottom of the leads I 2 9- 1 3 4, that is, although the die 10 8 is fabricated in a downward orientation of the die, the crystal of the present invention The granule package assembly 200 enables the die to be placed in the upper die-10-(9) (9) 1345277. Figure 7 is a side view of the flattened sphere on the die and the wire bond to the substrate. DESCRIPTION OF SYMBOLS 10,20 Wafer 11 die attach pad 12 sealing material 13,14 pad 1 5, 1 6, 24, 2 5 wire bonding 17, 18, 1 28 lead frame 2 1 die pad 22, 23 Contact 26, 27 Leadframe lead 100, 200 die package assembly 10], 2 1 4 Substrate 102-107 Line 108 Die 109-114 Conductive contact 115-120 Connector wiring 121-126 Through hole 129- 134 Leads 10 1a, 108a, 12 8a First side 101b, 108b, 12 8b Second side 2 10 Gold wire-13- (10) 1345277 2 12 Grain surface 2 16 Bonding pad 2 18 Flattened sphere 220 Short line 222 sphere 224 joint 226 free end-14 -