TWI340449B - Packaging substrate surface structure and method for fabricating the same - Google Patents

Packaging substrate surface structure and method for fabricating the same

Info

Publication number
TWI340449B
TWI340449B TW096123113A TW96123113A TWI340449B TW I340449 B TWI340449 B TW I340449B TW 096123113 A TW096123113 A TW 096123113A TW 96123113 A TW96123113 A TW 96123113A TW I340449 B TWI340449 B TW I340449B
Authority
TW
Taiwan
Prior art keywords
fabricating
same
substrate surface
surface structure
packaging substrate
Prior art date
Application number
TW096123113A
Other languages
Chinese (zh)
Other versions
TW200901419A (en
Inventor
Chao Wen Shih
Ying Chih Chan
Original Assignee
Unimicron Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unimicron Technology Corp filed Critical Unimicron Technology Corp
Priority to TW096123113A priority Critical patent/TWI340449B/en
Publication of TW200901419A publication Critical patent/TW200901419A/en
Application granted granted Critical
Publication of TWI340449B publication Critical patent/TWI340449B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
TW096123113A 2007-06-26 2007-06-26 Packaging substrate surface structure and method for fabricating the same TWI340449B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW096123113A TWI340449B (en) 2007-06-26 2007-06-26 Packaging substrate surface structure and method for fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096123113A TWI340449B (en) 2007-06-26 2007-06-26 Packaging substrate surface structure and method for fabricating the same

Publications (2)

Publication Number Publication Date
TW200901419A TW200901419A (en) 2009-01-01
TWI340449B true TWI340449B (en) 2011-04-11

Family

ID=44721656

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096123113A TWI340449B (en) 2007-06-26 2007-06-26 Packaging substrate surface structure and method for fabricating the same

Country Status (1)

Country Link
TW (1) TWI340449B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI404182B (en) * 2009-04-24 2013-08-01 Unimicron Technology Corp Package substrate and fabrication method and package structure thereof
CN117374041A (en) * 2023-12-08 2024-01-09 英诺赛科(苏州)半导体有限公司 Packaging substrate, manufacturing method, packaging assembly, microelectronic assembly and electronic device
CN117594553B (en) * 2024-01-19 2024-04-09 苏州科阳半导体有限公司 Wafer level packaging structure and wafer level packaging method

Also Published As

Publication number Publication date
TW200901419A (en) 2009-01-01

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