TWI334502B - Va lcd device and a pixel circuit thereof - Google Patents

Va lcd device and a pixel circuit thereof Download PDF

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TWI334502B
TWI334502B TW95112339A TW95112339A TWI334502B TW I334502 B TWI334502 B TW I334502B TW 95112339 A TW95112339 A TW 95112339A TW 95112339 A TW95112339 A TW 95112339A TW I334502 B TWI334502 B TW I334502B
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sub
voltage
liquid crystal
pixel unit
pixel
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TW95112339A
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TW200739173A (en
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Seok Lyul Lee
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Au Optronics Corp
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Description

1334502 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種液晶顯示裝置,尤指一種垂直配向 型液晶顯示裝置及其畫素單元電路。 【先前技術】 目前常見的兩種液晶驅動方式包括扭轉向列(Twisted Nematic,TN )模式以及—直配向(Vertically-aligned,VA )1334502 IX. Description of the Invention: The present invention relates to a liquid crystal display device, and more particularly to a vertical alignment type liquid crystal display device and a pixel unit circuit thereof. [Prior Art] Two common liquid crystal driving methods include Twisted Nematic (TN) mode and Vertically-aligned (VA).

10 1510 15

20 模式。 當採用TN模式來驅動液晶時,液晶顯示器之液晶在不 加任何電場的情況下,液晶不會旋轉,使得背光模組的光 源會穿過液晶及偏光板,進而造成顯示器呈現全白的晝 面,一般稱之為’’Normally White”。 僅管TN液晶顯示器的相關技術在近年來已經有顯著 地進步,且TN液晶顯示器所提供的對比與色彩飽和度亦優 於傳統顯示器(例如:CRT顯示器)。然而,TN液晶顯示 器具有一關鍵性的缺點,即TN液晶顯示器的視角範圍比較 窄,使得其應用受到限制。 當採用VA模式來驅動液晶時,液晶顯示器之液晶在不 加任何電場的情況下,液晶不會旋轉,背光模組的光源會 被液晶阻擋而不會穿過液晶及偏光板,顯示器會呈現全黑 的晝面,一般稱之為”NormallyBlack’’。當預設電壓被提供 時,則液晶分子被排列成水平方向,且顯示器會呈現全白 晝面。 5 領干二由以液晶顯示器所提供之對比度比™液晶 比度高、此外,VA液晶顯示器的反應 曰亦較快’且對於白畫面及黑晝面具有較佳的廣視 曰顯所t,VA液晶顯示器為目前受曝目之_種新型式的液 日日具示益。然而,Va液θ瓶;獎4 m社 M ” ·,員不益會因其各個液晶的不同雙 斤射特性,造成在各種顯示視角度的亮度不均。 圖1顯示習知多區域垂直配向(MUhi-D〇main Vertical20 mode. When the TN mode is used to drive the liquid crystal, the liquid crystal of the liquid crystal display does not rotate without any electric field, so that the light source of the backlight module passes through the liquid crystal and the polarizing plate, thereby causing the display to display an all-white surface. Generally referred to as ''Normally White'.) The related art of TN liquid crystal displays has been significantly improved in recent years, and the contrast and color saturation provided by TN liquid crystal displays are superior to those of conventional displays (for example, CRT displays). However, the TN liquid crystal display has a key disadvantage, that is, the viewing angle range of the TN liquid crystal display is relatively narrow, which limits its application. When the VA mode is used to drive the liquid crystal, the liquid crystal of the liquid crystal display does not add any electric field. Under the LCD, the liquid crystal will not rotate, and the light source of the backlight module will be blocked by the liquid crystal without passing through the liquid crystal and the polarizing plate. The display will show a black surface, which is generally called "NormallyBlack". When a preset voltage is supplied, the liquid crystal molecules are arranged in a horizontal direction, and the display will appear in an all white plane. 5 The backbone 2 is made of a liquid crystal display with a higher contrast ratio than the TM liquid crystal. In addition, the response of the VA liquid crystal display is also faster, and the white screen and the black enamel surface have better wide-spectrum display. The VA liquid crystal display is a new type of liquid day and day benefit that is currently being exposed. However, the Va liquid θ bottle; the award 4 m society M ′ ·, the staff will not be able to cause uneven brightness in various viewing angles due to the different double-pulse characteristics of each liquid crystal. Figure 1 shows the conventional multi-region vertical alignment ( MUhi-D〇main Vertical

Ahgnment,MVA)液晶顯示裝置之色調曲線示意圖,其中 D1為習知多區域垂直配向(MVA)液晶顯示裝置之色調曲 10線^1為理想的色調曲線。比對色調曲線m與色調曲線n ’ 可得^習知多區域垂直配向液晶顯示裝置在各種顯示視角 度破實有免度不均的問題,尤其是在許多顯示角度(例如: 120度)時,習知多區域垂直配向液晶顯示裝置所呈現的色 調特性與理想的色調特性相差非常大。 15 圖2顯示習知多區域垂直配向液-晶顯示裝置之結構示 思圖,其係顯示一個晝素單元【之結構示意圖。於圖2中, 係包括第一基板11與第二基板12。在第一基板丨丨與第二基 板12之間具有複數個液晶分子141,142, 143, 144。在第一基 板u之表面上鍍有共同電極11;1,且在共同電極^"的表面 20 上有複數個凸起物(Protrusion ) 13。在第二基板12之表面 上鑛有晝素電極121 ’且在晝素電極121之間具有複數個狹 縫(Slit) 15。 由於習知MVA液晶顯示裝置的所有晝素單元在同一 灰階狀態時,次畫素單元的液晶分子之傾斜角度會相同。 6 1334502 例如:圖2中的液晶分子丨41,142的傾斜角度與液晶分子143: 144的傾斜角度相同。如此,將會使得面板的亮度不均,並 使得顯示品質降低。 為了解決上述問題,日本專利申請案公開號 斤2004-258139與仆2004-62146已揭露一種液晶顯示裝置, 其母一個晝素被兩個晝素電極及兩個辅助電容分成兩個次 畫素單元,且每一個晝素被提供第一操作電壓(vl(gk)) 10 15 20 與第二操作電壓(V2(gk)),其中第一操作電壓與第二操 作電壓不同,且第一操作電壓與第二操作電壓之差值係藉 由電容耦合驅動方法來形成。因此,上述曰本專利申請案 便利用分割的兩個次畫素單元與不同電壓之操作電壓來改 善部份灰階中的角度伽瑪偏移。如圖3〜圖5所示,係顯示上 述曰本專利中請案之伽瑪曲線示意圖,其中該等圖示之縱 坐仏為電壓與穿透率’橫坐標為灰階穿透率。如圖3所示, 其係顯示改善低灰階的角度伽瑪偏移,其中畫素切割率 為:第-次晝素單^為〇.3,第二次晝素單元為〇7。如圖4 ::’其係顯示改善高灰階的角度伽瑪偏移,纟中晝素切 ^率為:第-次晝素單元狀7,第二次畫素料為〇3。如 其係顯示改善中灰階的角度伽瑪偏移,其中晝素 =率為:第-次晝素單元為〇_5,第二次晝素單元為〇5。 伽$ 曱考仍無法有效改善所有灰階角度 伽瑪偏移,是故上述日本專利 ΛΜ - ^ 个号力曱5月案所提供之液晶顯示器 在顯不時仍會存在亮度不均的問題。 7 【發明内容】 本發明之主要目的係在提供一種垂直配向型液晶顯示 裝置及並查各 八里京早元電路’俾能改善垂直配向型液晶顯示 ’置之視角問題。 、 發月之另一目的係在提供一種垂直配向型液晶顯示 、置及其畫素單元電路,俾能改善在不同視角而產生 不均的問題。 度 _依據本發明之—特色,係提出一種垂直配向型液晶顯 10 丁f置之晝素單元電路。該晝素單元電路包括第-個次晝 素早兀、第二個次畫素單元、及第三個次畫素單元。上述 第個-人晝素單元更包括第一辅助電容,且第一輔助電容 '端與·提供第—耦合電極訊號之第一耦合訊號線電性 連接。上述第二個次畫素單元更包括第二輔助電容,且第 15 一辅助電谷之一端與一提供共同電壓之共同電壓線電性連 接上述第三個次畫素單元更包括第三輔助電容,且第三 輔助電容之-端與—提供第二搞合電極訊號之第二耗合訊 號線電性連接。此外,第_個次晝素單元包括有第一個次 畫素電壓’第二個次晝素單元包括有第二個次晝素電壓, 第三個次晝素單元包括有第三個次晝素電壓,且第一個次 20 旦素電壓輕合第-竊合電極訊號,第三個次晝素電壓輕合 第一叙合電極訊號。 依據本發明之另if寺色,係提出一種垂直配向型液晶 顯示裝置。該垂直配向型液晶顯示裝置包括第一基板與第 -基板。上述第-基板包括有共同導電層、及複數個凸起 8 1334502 物,共同導電層位於第一基板上,該等凸起物位於共同導 電層之部伤表面。上述第二基板包括有複數個晝素電極、 複數個第-耦合電極、複數個第^合電極、複數個共同 電極、及一閘極絕緣層,該等第一耦合電極 '該等第二耦 合電極、及該等共同電極位於第二基板之部份表面,閉極 絕緣層位於該等第一耦合電極'該等第二耦合電極、及該 等共同電極之表面騎於第:基板之其他部份表面,該等/ 畫素電極位於閘極絕緣層之部份表面。此外,第一基板與 第二基板形成有複數畫素單元,每一畫素單元更包:第二 個次畫素單元、第二個次晝素單元、及第三個次晝素單元。 述第單兀更包括第一輔助電容,且 電容與該等第一麵合電極之其中一個:助 個次晝素單元更包括第二辅助雷六0^ 上乩第— 15 20 笙丘稍助電谷,且第二辅助電容與該 2同電極之其中一個電性連接。上述 =三辅助電容,且第三輔助電容與該等第 ΤΙ:個電性連接,其中每-第-耦合電極用= 合電極訊號,每-第二耗合電極用以提供一第: 元:::r:提供-共同電壓,-個次晝素單元之晝素電壓弟二合電極訊號,第三 上述第-個次畫素電壓訊號。 個次畫素電壓❹別不同。第—個次畫素電壓、及第三 上述第一個次晝素單元 -液晶電容,第一薄膜電曰二匕括第—薄膜電晶體、及第 、電日日體之源極與資料線電性連接, 9 其係位於第一基板 上述第一基板更包括彩色濾光片 與共同導電層之間。 上述第二基板更包括保護層與垂直配向層,保護層位 於閘極絕緣層之上,且該等晝素電極位於保護層之部份表 面’垂直配向層位㈣等晝素電極之表面與保護層之其他 部份表面。 【實施方式】 有關本發明較佳實施例,敬請參照圖6顯示之晝素電路 10示意圖。於圖6中’單-畫素單元6包括複數個次晝素單元 61’62,63、資料線64、掃瞄線(Vg) “、第一耦合訊號線 (Vcsl )66、共同電壓線(Vcs )67、及第二輕合訊號線(Vcs2 ) 68 ’其中次畫素單元61更包括薄膜電晶體6ιι、液晶電容 6U、及輔助電容613,次畫素單元62更包括薄膜電晶體 15 、液晶電容622、及輔助電容623,次畫素單元63更包括 薄膜電晶體631、液晶電容632、及輔助電容633。 上述資料線64分別與薄膜電晶體611,621,631之源極 電性連接,掃瞄線65分別與薄膜電晶體6U,621,631之閘極 電性連接,薄膜電晶體611之汲極並與液晶電容612之一端 20及辅助電容613之-端電性連帛,薄膜電晶體62ι之沒極並 與液晶電容622之一端及辅助電容623之一端電性連接,薄 膜電晶體631之汲極並與液晶電容632之一端及輔助電容 633之一端電性連接;辅助電容613之另一端與第一耦合訊 號線66電性連接,輔助電容623之另一端與共同電壓線⑺電 11 1334502 性連接,輔助電容633之另一端與第二耦合訊號線68電性連 接。 於本實施例中,第一耦合訊號線66、共同電壓線67、 及第二耦合訊號線68之材質與掃瞄線65相同。於本實施例 5 中,第一耦合訊號線66用以提供第一耦合電極訊號,第二 耦合訊號線66用以提供第二耦合電極訊號。此外,第一耦 合電極訊號與第二耦合電極訊號皆為交流訊號,第一耦合 電極訊號與第二耦合電極訊號係反相180度,且第一耦合電 極訊號與第二耦合電極訊號之訊號寬度為資料線64所提供 10之貧料訊號的1〜6倍。上述共同電壓線67所提供之電壓訊號 為直流電壓訊號。 上述第一耦合電極訊號與第二耦合電極訊號並具有第 一電壓準位與第二電壓準位。例如:於本實施例中,第一 電壓準位為低電壓準位·,第二電壓準位為高電壓準位。在 15其他實施例中,第一電壓準位可為高電壓準位,第二電壓 準位可為低電壓準位。由於第一耦合電極訊號與第二耦合 電極訊號反相180度,所以第一耦合電極訊號為高電壓準位 時’第二耦合電極訊號為低電壓準位。 由於第一搞合訊號線66與第一輔助電容613電性連 2〇 接,共同電壓線67與第二辅助電容M3電性連接,第二耦合 訊號線68與第三輔助電容633電性連接,且第一耦合訊號線 66提供至次晝素單元61的電壓、共同電壓線67提供至次晝 素單元62的電壓、及第二耦合訊號線⑽提供至次畫素單2 12 1334502 63的電壓皆不同,所以該等次晝素單元61,62, 63之畫素電 壓將會不同。 上述次畫素單元61,62, 63的畫素電壓可依據下述公式 獲得: 5 Vpl= (Csl/(Csl+Clcl+Cgdl))*Vcsl + VsigAhgnment, MVA) Schematic diagram of the tone curve of a liquid crystal display device, wherein D1 is a tone curve of a conventional multi-region vertical alignment (MVA) liquid crystal display device, which is an ideal tone curve. Comparing the tone curve m and the tone curve n' can be obtained by the conventional multi-region vertical alignment liquid crystal display device, which has a problem of unevenness in various display viewing angles, especially at many display angles (for example, 120 degrees). Conventional multi-zone vertical alignment liquid crystal display devices exhibit very different hue characteristics from ideal hue characteristics. 15 Fig. 2 is a view showing the structure of a conventional multi-region vertical alignment liquid crystal display device, which is a schematic view showing the structure of a halogen unit. In FIG. 2, the first substrate 11 and the second substrate 12 are included. There are a plurality of liquid crystal molecules 141, 142, 143, 144 between the first substrate 丨丨 and the second substrate 12. A common electrode 11; 1 is plated on the surface of the first substrate u, and a plurality of protrusions 13 are formed on the surface 20 of the common electrode. A halogen electrode 121' is mineralized on the surface of the second substrate 12 and has a plurality of slits 15 between the halogen electrodes 121. Since all the pixel units of the conventional MVA liquid crystal display device are in the same gray scale state, the tilt angles of the liquid crystal molecules of the sub-pixel unit will be the same. 6 1334502 For example, the tilt angle of the liquid crystal molecules ,41, 142 in FIG. 2 is the same as the tilt angle of the liquid crystal molecules 143: 144. As such, the brightness of the panel will be uneven and the display quality will be degraded. In order to solve the above problems, a liquid crystal display device has been disclosed in Japanese Patent Application Publication No. 2004-258139 and Ser. No. 2004-62146, wherein a parent element is divided into two sub-pixel units by two halogen electrodes and two auxiliary capacitors. And each of the pixels is supplied with a first operating voltage (vl(gk)) 10 15 20 and a second operating voltage (V2(gk)), wherein the first operating voltage is different from the second operating voltage, and the first operating voltage The difference from the second operating voltage is formed by a capacitive coupling driving method. Thus, the above-identified patent application facilitates the use of split two sub-pixel units with operating voltages of different voltages to improve the angular gamma offset in a portion of the gray scale. As shown in Fig. 3 to Fig. 5, the gamma curve diagram of the above-mentioned patent application is shown, wherein the vertical position of the figures is the voltage and the transmittance 'the abscissa is the gray scale transmittance. As shown in FIG. 3, it shows an angular gamma shift which improves the low gray scale, wherein the pixel cut rate is: the first-order pixel is ^3, and the second pixel unit is 〇7. As shown in Fig. 4:', the system shows an improved angular gamma shift of high gray scale. The rate of sputum cut in the sputum is: the first-order morpheme unit shape 7, and the second picture material is 〇3. For example, the system shows an improved angular gamma shift of the gray scale, where the prime rate is: 第_5 for the first-order unit and 〇5 for the second unit. The gamma $ test still can not effectively improve all gray-scale angle gamma shift, so the above-mentioned Japanese patent ΛΜ - ^ 曱 曱 曱 曱 曱 曱 曱 曱 曱 曱 曱 曱 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶[Explanation] The main object of the present invention is to provide a vertical alignment type liquid crystal display device and to check the viewing angle of each of the Baliki Morning Element Circuits to improve the vertical alignment type liquid crystal display. Another purpose of the Moon is to provide a vertical alignment type liquid crystal display and a pixel unit circuit thereof, which can improve the problem of unevenness in different viewing angles. According to the invention, a vertical alignment type liquid crystal display unit is proposed. The pixel unit circuit includes a first-order second prime unit, a second secondary pixel unit, and a third sub-pixel unit. The first-human pixel unit further includes a first auxiliary capacitor, and the first auxiliary capacitor 'end is electrically connected to the first coupled signal line that provides the first coupled electrode signal. The second sub-pixel unit further includes a second auxiliary capacitor, and one end of the fifteenth auxiliary electric valley is electrically connected to a common voltage line that supplies a common voltage, and the third sub-pixel unit further includes a third auxiliary capacitor. And the terminal of the third auxiliary capacitor is electrically connected to the second consuming signal line of the second engaging electrode signal. In addition, the _th sub-divinity unit includes a first sub-pixel voltage. The second sub-divinity unit includes a second sub-decinal voltage, and the third sub-dimorph unit includes a third sub-element. The voltage is the first time, and the first time the 20-denier voltage is lightly coupled to the first-stealing electrode signal, and the third-order secondary voltage is lightly combined with the first combined electrode signal. According to another color of the present invention, a vertical alignment type liquid crystal display device is proposed. The vertical alignment type liquid crystal display device includes a first substrate and a first substrate. The first substrate includes a common conductive layer and a plurality of bumps 8 1334502. The common conductive layer is located on the first substrate, and the bumps are located on the damaged surface of the common conductive layer. The second substrate includes a plurality of halogen electrodes, a plurality of first-coupling electrodes, a plurality of second electrodes, a plurality of common electrodes, and a gate insulating layer, and the second coupling electrodes The electrode and the common electrode are located on a portion of the surface of the second substrate, and the closed insulating layer is located on the surface of the first coupling electrode, the second coupling electrode, and the surface of the common electrode. The surface of the / pixel electrode is located on a portion of the surface of the gate insulating layer. In addition, the first substrate and the second substrate are formed with a plurality of pixel units, and each of the pixel units further includes: a second sub-pixel unit, a second sub-dimorph unit, and a third sub-dimorph unit. The first 兀 further includes a first auxiliary capacitor, and the capacitor and one of the first surface-closing electrodes: the secondary sub-element unit further includes a second auxiliary ray 6 0 上上 - 15 20 笙丘略助An electric valley, and the second auxiliary capacitor is electrically connected to one of the two same electrodes. The above-mentioned = three auxiliary capacitors, and the third auxiliary capacitor is electrically connected to the first plurality of electrodes, wherein each of the -first coupling electrodes uses a = electrode signal, and each of the second consumable electrodes is used to provide a first: ::r: provides a common voltage, a secondary voltage of the secondary unit, and a third of the first pixel voltage signals. The sub-pixel voltages are different. a first-order pixel voltage, and a third first-order sub-singular element-liquid crystal capacitor, a first thin film electrode, a first-film transistor, and a source and a data line of the first and second solar cells Electrically connected, 9 is located on the first substrate. The first substrate further includes a color filter and a common conductive layer. The second substrate further includes a protective layer and a vertical alignment layer, the protective layer is located on the gate insulating layer, and the surface of the halogen electrode is located on a surface of the protective layer, such as a vertical alignment layer (four) The other part of the surface of the layer. [Embodiment] Referring to a preferred embodiment of the present invention, please refer to the schematic diagram of the pixel circuit 10 shown in FIG. In FIG. 6, the 'single-pixel unit 6 includes a plurality of sub-cell units 61'62, 63, a data line 64, a scan line (Vg), a first coupled signal line (Vcsl) 66, and a common voltage line ( Vcs) 67, and a second light signal line (Vcs2) 68', wherein the sub-pixel unit 61 further includes a thin film transistor 6 ι, a liquid crystal capacitor 6U, and an auxiliary capacitor 613, and the sub-pixel unit 62 further includes a thin film transistor 15 The liquid crystal capacitor 622 and the auxiliary capacitor 623 further include a thin film transistor 631, a liquid crystal capacitor 632, and an auxiliary capacitor 633. The data line 64 is electrically connected to the source of the thin film transistors 611, 621, and 631, respectively. The scan line 65 is electrically connected to the gate of the thin film transistor 6U, 621, 631, and the drain of the thin film transistor 611 is electrically connected to the end of the liquid crystal capacitor 612 and the end of the auxiliary capacitor 613. The transistor 62 is electrically connected to one end of the liquid crystal capacitor 622 and one end of the auxiliary capacitor 623. The drain of the thin film transistor 631 is electrically connected to one end of the liquid crystal capacitor 632 and one end of the auxiliary capacitor 633; the auxiliary capacitor 613 The other end is electrically connected to the first coupled signal line 66 The other end of the auxiliary capacitor 623 is electrically connected to the common voltage line (7), and the other end of the auxiliary capacitor 633 is electrically connected to the second coupled signal line 68. In this embodiment, the first coupled signal line 66 and the common voltage are connected. The material of the line 67 and the second coupled signal line 68 is the same as that of the scan line 65. In the fifth embodiment, the first coupled signal line 66 is used to provide a first coupled electrode signal, and the second coupled signal line 66 is used to provide The first coupling electrode signal and the second coupling electrode signal are both AC signals, and the first coupling electrode signal and the second coupling electrode signal are 180 degrees out of phase, and the first coupling electrode signal and the second coupling signal The signal width of the coupled electrode signal is 1 to 6 times that of the lean signal provided by the data line 64. The voltage signal provided by the common voltage line 67 is a DC voltage signal. The first coupled electrode signal and the second coupled electrode signal And having a first voltage level and a second voltage level. For example, in this embodiment, the first voltage level is a low voltage level, and the second voltage level is a high voltage level. In other embodiments, the first voltage level may be a high voltage level, and the second voltage level may be a low voltage level. Since the first coupling electrode signal is 180 degrees out of phase with the second coupling electrode signal, the first When the coupled electrode signal is at a high voltage level, the second coupled electrode signal is at a low voltage level. Since the first signal line 66 is electrically connected to the first auxiliary capacitor 613, the common voltage line 67 and the second auxiliary The capacitor M3 is electrically connected, the second coupling signal line 68 is electrically connected to the third auxiliary capacitor 633, and the first coupling signal line 66 provides the voltage to the secondary unit 61, and the common voltage line 67 is provided to the secondary unit 62. The voltage and the voltage of the second coupled signal line (10) provided to the sub-pixels 2 12 1334502 63 are different, so the pixel voltages of the sub-cell units 61, 62, 63 will be different. The pixel voltage of the above-described sub-pixel units 61, 62, 63 can be obtained according to the following formula: 5 Vpl = (Csl / (Csl + Clcl + Cgdl)) * Vcsl + Vsig

Vp2=VsigVp2=Vsig

Vp3= (Cs3/(Cs3+Clc3+Cgd3))*Vcs3 - Vsig ,其中Vpl為次畫素單元61的晝素電壓,Vp2為次晝素單元 62的晝素電壓,Vp3為次畫去單元63的晝素電壓,Vsig為資 10 料線64所提供之操作電壓’ Vcsl為第一耦合訊號線66所提 供之第一耦合電極訊號的電壓位準,Vcs3為第二耦合訊號 線68所提供之第二耦合電極訊號的電壓位準,Csl為輔助電 谷613,Clc 1為液晶電容612,Cgd 1為薄膜電晶體ό 11之閘汲 極間的電容’Cs3為輔助電容633,Clc3為液晶電容632, Cgd3 15 為薄膜電晶體6;3 1之閘汲極間的電容。 由於本實施例對於不同的次晝素單元61,62, 63提供不 同的畫素電壓(Vpl、Vp2、Vp3 ),所以該等次晝素單元 61,62,63中所屬的液晶分子的傾斜角度會彼此不同,例 如:次晝素單元61所屬之液晶分子的傾斜角度與次晝素單 20 元62所屬之液晶分子的傾斜角度不同,次畫素單元62所屬 之液晶分子的傾斜角度與次畫素單元63所屬之液晶分子的 傾斜角度不同。因此,該等次晝素單元61,62, 63中的其中 一個次畫素單元所產生之相位延遲(PhaseRetardati〇n)便 可由該等次晝素單元61,62, 63中的其他次晝素單元所產生 25之相位延遲來補償,俾能改善所有灰階視角,並改善顯示 13 1334502 * 電極訊號,使得次晝素單元63之畫素電壓再降低,如(^所 示。次畫素單元63之畫素電壓、次晝素單元62之畫素電壓、 及次畫素單元61之畫素電壓皆不同。 * 而透過耦合第一耦合訊號線66所提供之第一耦合電極 5訊號,使得次畫素單元61之畫素電壓上升且接近原本資料 線64所提供之資料訊號的電壓位準,如A1所示。 接下來,下述將說明如何形成前面所討論之晝素電路。 圖8顯示本發明較佳實施例垂直配向型液晶顯示裝置 的剖視圖’其係包括玻璃基板811與玻璃基板gw,且在玻 10璃基板811與玻璃基板812之間包括有負向液晶層82,其中 該負向液晶層82包括複數個具有負介電常數之異相位的液 晶分子 821,822, 823, 824, 825, 826。 在玻璃基板811上有一層彩色濾光片83,在彩色渡光片 83上則有一共同導電層84,且在共同導電層上增設有複 15 數個凸起物851,852,853,其中該等凸起物851,852, 853位 於該共同導電層84之部份表面上。 # 在玻璃基板812上有閘極絕緣層86,在閘極絕緣層86上 則佈有保§蒦層87’其中在玻璃基板812上增設有第一搞合電 極881、共同電極882、及第二耦合電極883,其中第一耦合 20電極881、共同電極882、及第二耦合電極883位於玻璃基板 812之部伤表面上,且第一耗合電極881與輔助電容613電性 • 連接,共同電極882與輔助電容623電性連接,第二搞合電 極883與輔助電容633電性連接,其中第一耦合電極881用以 提供第一耦合電極訊號’共同電極8 82用以提供共同電壓, 15 1334502 第一耦合電極883用以提供第二耦合電極訊號,亦即,第一 耦合電極881可形成於圖6中的第一耦合訊號線66,共同電 極882可形成於圖6中的共同電壓線67,第二耦合電極^^可 形成於圖6中的第二耦合訊號線68。 5 由於圖8僅顯示單一個畫素之剖視圖,所以圖8只有顯 示單個第一耦合電極881、單個共同電極882、及單個第二 耦合電極883 ’在實際情況下,玻璃基板812之表面上設有 複數個第一耦合電極、複數個共同電極、及複數個第二耦 合電極。 10 另外,上述保護層87之上佈有複數個畫素電極891,892, 893, 894, 895, 896,其中該等晝素電極 891,892, 893, 894, 895, 896位於保濩層87之部份表面上,垂直配向層位於該 等畫素電極891, 892, 893, 894, 895, 896之表面與保護層87 之其他部份表面。此外,該等畫素電極891,892, 893, 894, 15 895, 896之間,係具有複數個狹缝801, 802, 803。 在單一晝素單元6中’第一個次晝素單元61小於或等於 第三個次晝素單元63之開口率。第一個次畫素單元Μ的辅 助電容613與由第一麵合電極881所形成之第一耗合訊號線 66相連接,第二個次晝素單元62的輔助電容623與由共同電 20極882所形成之共同電壓線67相連接,第三個次畫素單元63 的輔助電容633與由第二耦合電極883所形成之第二耦合訊 號線68相連接。因此,可利用第—耦合訊號線“與第二耦 合訊號線68來提供不同相位之耦合電極訊號至輔助電容 613, 633 ’且保持第二個次晝素單元62之畫素電壓以使得 1334502 第一個次晝素單元61之晝素電壓、第二個次晝素單元62之 畫素電壓、及第三個次畫素單元63之畫素電壓皆不同,以 使得第一個次畫素單元61所屬之液晶分子821,822、第二個 次晝素单元62所屬之液晶分子825,826、第三個次晝素單元 5 63所屬之液晶分子823, 824的傾斜角度皆不同,以改善垂直 配向型液晶顯示裝置亮度不均之問題。 圖9顯示本發明垂直配向型液晶顯示裝置之晝素單元6 的佈線圖,其係包括次晝素單元61,62, 63、薄膜電晶體611, 621,631、第一耦合電極88卜共同電極882、第二耦合電極 10 883、掃瞄線(閘極匯流排接線)65 1,652、及資料線64。 上述次晝素單元61,62, 63、薄膜電晶體611,621, 63 1、 第一耗合電極881、共同電極8 82、第二耦合電極883、掃瞄 線65 1,652、及資料線64皆布局於圖8中的玻璃基板812上, 且第一耦合電極881與掃瞄線651,652平行。 15 圖10〜圖11顯示本發明所提供之垂直配向型液晶顯示 裝置與習知垂直配向型液晶顯示裝置的比較示意圖,其中 圖10為習知垂直配向型液晶顯示裝置的色調曲線示意圖, 圖11為本發明較佳實施例所提供之配向型液晶顯示裝置的 色調曲線示意圖。於圖10、圖丨丨中,該等圖示之縱坐標為 20電壓與穿透率,橫坐標為灰階穿透率。於圖10中,習知垂 直配向型液晶顯示裝置(例如:其每個晝素單元未被分成 其他人晝素單元)之色調曲線P1在60度視角時,係與理想 的色調曲線P2距離非常遠,且習知色調曲線p丨亦不夠圓 滑。於圖11中’本發明所提供之配向型液晶顯示裝置的色 17 1334502 4曲線Q1在6G度視角fl夺,係與理想的色調曲線以距離非常 接近,且在其他視角時轉f接近理想的色調曲線以。 此外’本發明不僅適用於垂直配向(V幻型的面板模 組’亦可使用於扭轉向列(TN)型的面板模組,以提供多 域(Multi-Domain)補償功能。 ίο 15Vp3=(Cs3/(Cs3+Clc3+Cgd3))*Vcs3 - Vsig , where Vpl is the pixel voltage of the subpixel unit 61, Vp2 is the pixel voltage of the sub-prime unit 62, and Vp3 is the sub-picture unit 63. The voltage of Vsig is the voltage level of the first coupled electrode signal provided by the first coupled signal line 66, and Vcs3 is provided by the second coupled signal line 68. The voltage level of the second coupling electrode signal, Csl is the auxiliary electric valley 613, Clc 1 is the liquid crystal capacitor 612, Cgd 1 is the capacitance between the gate and the drain of the thin film transistor ό 11 'Cs3 is the auxiliary capacitor 633, and Clc3 is the liquid crystal capacitor 632, Cgd3 15 is the capacitance between the gate and the drain of the thin film transistor 6; Since the present embodiment provides different pixel voltages (Vpl, Vp2, Vp3) for different sub-halogen units 61, 62, 63, the tilt angle of the liquid crystal molecules to which the sub-halogen units 61, 62, 63 belong. Different from each other, for example, the tilt angle of the liquid crystal molecules to which the secondary halogen unit 61 belongs is different from the tilt angle of the liquid crystal molecules to which the secondary pixel unit 20 belongs, and the tilt angle and the secondary drawing of the liquid crystal molecules to which the sub-pixel unit 62 belongs. The liquid crystal molecules to which the element unit 63 belongs have different inclination angles. Therefore, the phase delay (PhaseRetardati〇n) generated by one of the sub-pixel units 61, 62, 63 can be obtained from the other sub-halogens of the sub-halogen units 61, 62, 63. The phase delay generated by the unit is compensated by 25, which can improve all gray-scale viewing angles and improve the display of the 13 1334502 * electrode signal, so that the pixel voltage of the sub-success unit 63 is further reduced, as shown by (^. sub-pixel unit The pixel voltage of 63, the pixel voltage of the sub-halogen unit 62, and the pixel voltage of the sub-pixel unit 61 are different. * By coupling the first coupling electrode 5 signal provided by the first coupling signal line 66, The pixel voltage of the sub-pixel unit 61 rises and is close to the voltage level of the data signal provided by the original data line 64, as indicated by A1. Next, the following describes how to form the pixel circuit discussed above. A cross-sectional view showing a vertical alignment type liquid crystal display device of the preferred embodiment of the present invention includes a glass substrate 811 and a glass substrate gw, and a negative liquid crystal layer 82 is included between the glass substrate 811 and the glass substrate 812. Negative fluid The crystal layer 82 includes a plurality of liquid crystal molecules 821, 822, 823, 824, 825, and 826 having a negative dielectric constant. A color filter 83 is disposed on the glass substrate 811, and the color filter 83 is disposed on the color plate 86. There is a common conductive layer 84, and a plurality of protrusions 851, 852, 853 are added on the common conductive layer, wherein the protrusions 851, 852, 853 are located on a part of the surface of the common conductive layer 84. # The gate insulating layer 86 is disposed on the glass substrate 812, and the gate insulating layer 86 is disposed on the gate insulating layer 86. The first bonding electrode 881, the common electrode 882, and the first surface are disposed on the glass substrate 812. The second coupling electrode 883, wherein the first coupling electrode 881, the common electrode 882, and the second coupling electrode 883 are located on the damaged surface of the glass substrate 812, and the first consuming electrode 881 and the auxiliary capacitor 613 are electrically connected. The electrode 882 is electrically connected to the auxiliary capacitor 623, and the second electrode 883 is electrically connected to the auxiliary capacitor 633. The first coupling electrode 881 is used to provide the first coupling electrode signal 'the common electrode 8 82 for providing a common voltage. 1334502 first coupling electrode 883 is used For the second coupling electrode signal, that is, the first coupling electrode 881 can be formed in the first coupling signal line 66 in FIG. 6, the common electrode 882 can be formed in the common voltage line 67 in FIG. 6, the second coupling electrode ^^ The second coupled signal line 68 can be formed in FIG. 6. Since FIG. 8 shows only a cross-sectional view of a single pixel, FIG. 8 shows only a single first coupling electrode 881, a single common electrode 882, and a single second coupling electrode. 883 'In the actual case, the surface of the glass substrate 812 is provided with a plurality of first coupling electrodes, a plurality of common electrodes, and a plurality of second coupling electrodes. In addition, a plurality of pixel electrodes 891, 892, 893, 894, 895, 896 are disposed on the protective layer 87, wherein the halogen electrodes 891, 892, 893, 894, 895, 896 are located on the protective layer 87. On a portion of the surface, a vertical alignment layer is located on the surface of the pixel electrodes 891, 892, 893, 894, 895, 896 and other portions of the protective layer 87. In addition, between the pixel electrodes 891, 892, 893, 894, 15 895, 896, there are a plurality of slits 801, 802, 803. In the single halogen unit 6, the first primary halogen unit 61 is smaller than or equal to the aperture ratio of the third secondary unit 63. The auxiliary capacitor 613 of the first sub-pixel unit 连接 is connected to the first consumable signal line 66 formed by the first surface-closing electrode 881, and the auxiliary capacitor 623 of the second sub-decimal unit 62 is connected to the common electric unit 20 The common voltage line 67 formed by the poles 882 is connected, and the auxiliary capacitor 633 of the third sub-pixel unit 63 is connected to the second coupled signal line 68 formed by the second coupling electrode 883. Therefore, the first coupled signal line "and the second coupled signal line 68 can be used to provide different phase coupling electrode signals to the auxiliary capacitors 613, 633 ' and maintain the pixel voltage of the second sub-cell unit 62 to make the 1334502 The pixel voltage of one secondary unit 61, the pixel voltage of the second sub-cell unit 62, and the pixel voltage of the third sub-pixel unit 63 are different, so that the first sub-pixel unit The liquid crystal molecules 821, 822, the liquid crystal molecules 825, 826 of the second sub-halogen unit 62, and the liquid crystal molecules 823, 824 of the third sub-halogen unit 5 63 belong to different angles to improve the vertical direction. The problem of uneven brightness of the alignment type liquid crystal display device. Fig. 9 is a wiring diagram of the pixel unit 6 of the vertical alignment type liquid crystal display device of the present invention, which includes the sub-halogen units 61, 62, 63, and the thin film transistors 611, 621. , a first coupling electrode 88, a common electrode 882, a second coupling electrode 10 883, a scan line (gate bus line) 65 1,652, and a data line 64. The above-described sub-halogen units 61, 62, 63 , thin film transistor 611, 621, 63 1, the first The consuming electrode 881, the common electrode 8 82, the second coupling electrode 883, the scanning line 65 1,652, and the data line 64 are all disposed on the glass substrate 812 of FIG. 8 , and the first coupling electrode 881 and the scanning line 651 are 652 is parallel. 15 FIG. 10 to FIG. 11 are schematic diagrams showing a comparison between a vertical alignment type liquid crystal display device and a conventional vertical alignment type liquid crystal display device according to the present invention, wherein FIG. 10 is a schematic diagram of a tone curve of a conventional vertical alignment type liquid crystal display device. Figure 11 is a schematic diagram showing the tone curve of the alignment type liquid crystal display device according to a preferred embodiment of the present invention. In Fig. 10 and Fig. 10, the ordinates of the icons are 20 voltage and transmittance, and the abscissa is Gray scale transmittance. In Fig. 10, the conventional vertical alignment type liquid crystal display device (for example, each of its pixel units is not divided into other human element units) has a tone curve P1 at a viewing angle of 60 degrees, and is ideal. The tone curve P2 is very far away, and the conventional tone curve p丨 is not round enough. In Fig. 11, the color of the alignment type liquid crystal display device provided by the present invention 17 1334502 4 curve Q1 is captured at a 6G degree angle. Rational The tone curve is very close to the distance, and at other angles of view, f is close to the ideal tone curve. In addition, the present invention is applicable not only to vertical alignment (V-shaped panel module) but also to twisted nematic (TN). Panel module for multi-domain compensation. ίο 15

由以上之說明可知,本發明將每個晝素單元分為三個 次畫素單元,第—個次晝素單元之輔助電容與提供第-輕 合電極訊號之第一耦合訊號線電性連接,第二個次晝素單 :之輔助電容與提供共同電壓之共同電壓線電性連接,第 三個次畫素單元之辅助電容與提供第二麵合電極訊號之第 =合訊號線電性連接,俾供透過控制第1合電極訊號 ”弟-輕合電極訊號之相位及t壓料,以及 ^維持第二個次晝素單元之晝素Μ,來使得料次: 素早凡之旦素電壓皆不同’進而使得該等次 子:傾斜角度彼此不同,以改善不同—視角情= 冗度不均之問題。 1 本發明所 而非僅限 上述實施例僅係為了方便說明而舉例而已 主張之權利範圍自應以申請專利範圍所述為準 於上述實施例。 , 20 【圖式簡單說明】 圖1係習知多區域垂直 圖0 配向液晶顯示裝置 之色調曲線示意 圖2係習知多區域垂直配向液晶顯示裝置的結構示意圖 18 1334502 圖3係%知液晶顯示裝置其中一實施的伽瑪曲線示意圖。 圖4係二知液晶顯示裝置其中另一實施的伽瑪曲線示意圖。 圖5係1知液晶顯示裝置其中又一實施的伽瑪曲線示意圖。 圖6係本發明一較佳實施例之晝素單元的電路示意圖。 5圖7顯不單一晝素單元中所包括之該等次畫素單元的晝素 電壓波形示意圖。 圖8顯不本發明較佳實施例垂直配向型液晶顯示裝置的剖 視圖。 圖9顯示本發明垂直配向型液晶顯示裝置之畫素單元6的佈 10 線圖。 圖10為習知垂直配向型液晶顯示裝置的色調曲線示意圖。 圖11為本發明較佳實施例所提供之配向型液晶顯示裝置的 色調曲線示意圖。 15 【主要元件符號說明】 第—基板 第二基板 畫素電極 凸起物 液晶分子 狹縫As can be seen from the above description, the present invention divides each pixel unit into three sub-pixel units, and the auxiliary capacitor of the first-order sub-unit unit is electrically connected to the first coupling signal line that provides the first-light electrode signal. The second sub-single: the auxiliary capacitor is electrically connected to the common voltage line providing the common voltage, the auxiliary capacitor of the third sub-pixel unit and the second signal line providing the second surface-conducting signal Connection, 透过 for controlling the phase of the first and second electrode signals, the phase of the electrode and the t-press, and the maintenance of the second element of the second element, to make the material: The voltages are all different, and the second angles are different from each other to improve the difference of the angle of view. The scope of the right is subject to the above-mentioned embodiment as described in the scope of the patent application. 20 [Simple description of the drawing] FIG. 1 is a schematic diagram of a multi-region vertical diagram 0 color tone curve of a liquid crystal display device. Schematic diagram of a aligning liquid crystal display device 18 1334502 Fig. 3 is a schematic diagram of a gamma curve of one embodiment of a liquid crystal display device. Fig. 4 is a schematic diagram of a gamma curve of another embodiment of the liquid crystal display device. A schematic diagram of a gamma curve of another embodiment of the display device. Fig. 6 is a circuit diagram of a pixel unit according to a preferred embodiment of the present invention. 5 Figure 7 shows the sub-pixel elements included in a single pixel unit. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 8 is a cross-sectional view showing a vertical alignment type liquid crystal display device of a preferred embodiment of the present invention. Fig. 9 is a plan view showing a wiring of a pixel unit 6 of a vertical alignment type liquid crystal display device of the present invention. Schematic diagram of the tone curve of the conventional vertical alignment type liquid crystal display device. Fig. 11 is a schematic diagram showing the tone curve of the alignment type liquid crystal display device according to a preferred embodiment of the present invention. 15 [Description of main component symbols] - substrate second substrate pixel Electrode protrusion liquid crystal molecular slit

11 共同電極 ill 12 121,891,892,893,894,895,896 13,851,852,853 141,142,143,144,821,822,823,824,825,826 15,801,802,803 畫素單元 1,6 次畫素單元 1,61,62,63 19 133450211 common electrode ill 12 121,891,892,893,894,895,896 13,851,852,853 141,142,143,144,821,822,823,824,825,826 15,801,802,803 pixel unit 1,6 pixel unit 1,61,62,63 19 1334502

薄膜電晶體 211,221,351,352,63 輔助電容 212,222,371,372 資料線 64 掃瞄線 65,651,652 第一耦合訊號線 66 共同電壓線 67 第一輕合訊號線 68 薄膜電晶體 61 1,621,631 液晶電容 612,622,632輔助電容 613,623,633 玻璃基板 811,812 液晶層 82 彩色濾光片 83 共同導電層 84 閘極絕緣層 86 保護層 87 第一耦合電極 881 共同電極 882 第二耦合電極 883 垂直配向層 80Thin film transistor 211,221,351,352,63 auxiliary capacitor 212,222,371,372 data line 64 scan line 65,651,652 first coupled signal line 66 common voltage line 67 first light signal line 68 thin film transistor 61 1,621,631 liquid crystal capacitor 612,622,632 auxiliary capacitor 613,623,633 glass substrate 811,812 liquid crystal layer 82 Color filter 83 common conductive layer 84 gate insulating layer 86 protective layer 87 first coupling electrode 881 common electrode 882 second coupling electrode 883 vertical alignment layer 80

2020

Claims (1)

1334502 ----p 95112339號,99年9月修正頁 #年f月< 日修正本 十、申請專利範圍: 1. 一種垂直配向型液晶顯示裝置之畫素單元電路,包 括: • 一第一個次畫素單元,更包括一第一輔助電容,且該 .5 第一輔助電容之一端與一提供一第一耦合電極訊號之第一 耦合訊號線電性連接; 一第二個次晝素單元,更包括一第二輔助電容,且該 第二輔助電容之一端與一提供一共同電壓之共同電壓線電 ^性連接;以及 10 一第三個次畫素單元,更包括一第三輔助電容,且該 第三輔助電容之一端與一提供一第二耦合電極訊號之第二 耦合訊號線電性連接, 其中該第一個次晝素單元包括有一第一個次畫素電壓,該 第二個次晝素單元包括有一第二個次畫素電壓,該第三個 15 次晝素單元包括有一第三個次晝素電壓,且該第一個次畫 素電壓耦合該第一耦合電極訊號,該第三個次晝素電壓耦 • 合該第二耦合電極訊號,其中該第一個次晝素電壓、該第 二個次畫素電壓、及該第三個次晝素電壓係分別不同。 2. 如申請專利範圍第1項所述之畫素單元電路,其中 20 該第一耦合訊號線 '該第二耗合訊號線、及該共同電壓線 與一掃瞄線之材質相同。 • 3.如申請專利範圍第2項所述之晝素單元電路,其中 該第一個次畫素單元更包括一第一薄膜電晶體、及一第一 液晶電容,該第一薄膜電晶體之源極與一資料線電性連 21 1334502 接,該第一薄膜電晶體之閘極與該掃瞄線電性連接,該第 一薄膜電晶體之汲極與該第一液晶電容之一端及該第一輔 助電容之另一端電性連接。 4. 如申請專利範圍第3項所述之晝素單元電路,其中 5 該資料線提供一資料訊號,且該第一耦合電極訊號及該第 二耦合電極訊號之脈波寬度為該資料訊號的1〜6倍。 5. 如申請專利範圍第2項所述之晝素單元電路,其中 該第二個次晝素單元更包括一第二薄膜電晶體、及一第二 液晶電容,該第二薄膜電晶體之源極與一資料線電性連 10 接,該第二薄膜電晶體之閘極與該掃瞄線電性連接,該第 二薄膜電晶體之汲極與該第二液晶電容之一端及該第二輔 助電容之另一端電性連接。 6. 如申請專利範圍第2項所述之晝素單元電路,其中 該第三個次畫素單元更包括一第三薄膜電晶體、及一第三 15 液晶電容,該第三薄膜電晶體之源極與一資料線電性連 接,該第三薄膜電晶體之閘極與該掃瞄線電性連接,該第 三薄膜電晶體之汲極與該第三液晶電容之一端及該第三輔 助電容之另一端電性連接。 7. 如申請專利範圍第1項所述之晝素單元電路,其中 20 該第一耦合電極訊號及該第二耦合電極訊號之電壓皆為一 交流電壓,該共同電壓為一直流電壓。 8. 如申請專利範圍第1項所述之晝素單元電路,其中 該第一個次晝素電壓、該第二個次晝素電壓、及該第三個 次畫素電壓為0.5〜2伏特。 22 1334502 9.如申請專利範圍第1項所述之畫素單元電路,其中 該第一耗合電極訊號與該第二耦合電極訊號係反相18〇度。 10·如申請專利範圍第1項所述之晝素單元電路,其中 該第一個次畫素單元之開口率與該第三個次畫素單元之開 口率相同。 11.如申明專利範圍第1項所述之畫素單元電路,其中 該第一個次畫素單元之開口率小於該第三個次畫素單元之 開口率。 12· —種垂直配向型液晶顯示裝置,包括: 第基板,包括一共同導電層、及複數個凸起物, ==導電層位於該第一基板上,該等凸起物位於該共同 導電層之部份表面;以及 15 電極IS基Ϊ ’包括複數個畫素電極、複數個第-耦合 Γ、複數個第二叙合電極、複數個共同電極、及一閉極 、.巴緣層,§亥等第一耦合電極、 私u ※寻弟一耦合電極、乃緯耸 共同電極位於該第二基板 +及衫 兮塞览紅人中上 切衣面5玄閘極絕緣層位於 ;= 該等第二輕合電極、及該等共同電極 20 之表面且位於該第二基板之其他部份表面,該等書 位於该閘極絕緣層之部份表 —,、电 形成有複數畫素單元,每基板與㈣二基板 隻, 母旦素早元更包括·· 一第一個次畫素單元,更包括— 第-輔助電容與該等第一耦 :輔助電容’且該 一第二個次書辛單亓φ ^之其中一個電性連接; 似人旦素早兀,更包括— 第二輔助電容與該等共同電弟—輔助電容,且該 /、中一個電性連接;及 23 25 -第三個次晝素單元,更包 第三輔助電容料^ ,、°玄4第一耦合電極之其中一個電性連接, 二:母-第一輕合電極用以提供一第,電極訊號,每 -耗合電極用以提供—第二编合電極訊號,每一共同 :極用以提供—共同電壓,且該第-個次晝素單元之晝素 耦合該第一耦合電極訊號,該第三個次晝素單元之畫 素電壓耦合該第二耦合電極訊號,其中該第一個次畫素電 壓、該第二個次晝素電壓、及該第三個次晝 不同。 1〇 _ 13.如申請專利範圍第12項所述之垂直配向型液晶顯 不=置,其中該第-輕合電極訊號及該第二搞合電極訊號 之電壓皆為一交流電壓,該共同電壓為一直流電壓。 _丨4·如申晴專利範圍第12項所述之垂直配向型液晶顯 丁裝置,更包括一液晶層,係位於該第一基板與該第二基 15 板之間。 15.如申請專利範圍第12項所述之垂直配向型液晶顯 =裝置,其_該第—基板更包括一彩色濾光片,該彩色濾 光片位於該第一基板與該共同導電層之間。 16·如申請專利範圍第12項所述之垂直配向型液晶顯 2〇不裴置,其中該第二基板更包括一保護層,該保護層位於 °亥間極絕緣層之上,且該等晝素電極位於該保護層之部份 表面。 17·如申請專利範圍第16項所述之垂直配向型液晶顯 厂、裝置其中该弟二基板更包括一垂直配向層,該垂直配 24 1334502 向層位於該等晝t電極之表面與該保護層之其他部份表 面。 18. 如申請專利範圍第12項所述之垂直g己向型液晶顯 ^ 不裝置,其中該第一個次晝素單元、該第二個次畫素單元、 5及該第三個次晝素單元之晝素電壓為0.5〜2伏特。 19. 如申請專利範圍第12項所述之垂直配向型液晶顯 不裝置’其中該第一耦合電極訊號與該第二耦合電極訊銳 係反相180度。 Φ 2〇·如申請專利範圍第12項所述之垂直配向型液晶顯 10不裝置’其中該第一個次畫素單元之開口率與該第三個二欠 畫素單元之開口率相同。 21.如申請專利範圍第12項所述之垂直配向型液晶顯 不裝置’其中該第—個次晝素單元之開口率小於該第三匈 次畫素單元之開口率。 15 251334502 ----p 95112339, September 1999 revision page #年月月<日修正本10, patent application scope: 1. A pixel unit of a vertical alignment type liquid crystal display device, including: a second pixel unit further includes a first auxiliary capacitor, and one end of the .5 first auxiliary capacitor is electrically connected to a first coupled signal line that provides a first coupling electrode signal; The element unit further includes a second auxiliary capacitor, and one end of the second auxiliary capacitor is electrically connected to a common voltage line that provides a common voltage; and 10 to a third sub-pixel unit, and further includes a third An auxiliary capacitor, wherein one end of the third auxiliary capacitor is electrically connected to a second coupled signal line that provides a second coupling electrode signal, wherein the first sub-dielectric unit includes a first sub-pixel voltage, The second sub-decinal unit includes a second sub-pixel voltage, the third fifteen-dimensional unit includes a third sub-decinal voltage, and the first sub-pixel voltage is coupled to the first coupling Electrode signal, the first The third sub-decimal voltage is coupled to the second coupled electrode signal, wherein the first sub-single voltage, the second sub-pixel voltage, and the third sub-dimorph voltage are different. 2. The pixel unit circuit of claim 1, wherein the first coupled signal line 'the second consumed signal line, and the common voltage line and the same one of the scan lines are the same. 3. The pixel unit circuit of claim 2, wherein the first sub-pixel unit further comprises a first thin film transistor and a first liquid crystal capacitor, the first thin film transistor The source is electrically connected to a data line 21 1334502, and the gate of the first thin film transistor is electrically connected to the scan line, the drain of the first thin film transistor and one end of the first liquid crystal capacitor The other end of the first auxiliary capacitor is electrically connected. 4. The pixel unit circuit of claim 3, wherein the data line provides a data signal, and the pulse width of the first coupling electrode signal and the second coupling electrode signal is the data signal 1 to 6 times. 5. The pixel unit circuit of claim 2, wherein the second sub-dielectric unit further comprises a second thin film transistor and a second liquid crystal capacitor, the source of the second thin film transistor The pole is electrically connected to a data line, and the gate of the second thin film transistor is electrically connected to the scan line, the drain of the second thin film transistor and one end of the second liquid crystal capacitor and the second The other end of the auxiliary capacitor is electrically connected. 6. The pixel unit circuit of claim 2, wherein the third sub-pixel unit further comprises a third thin film transistor and a third 15 liquid crystal capacitor, the third thin film transistor The source is electrically connected to a data line, the gate of the third thin film transistor is electrically connected to the scan line, the drain of the third thin film transistor and one end of the third liquid crystal capacitor and the third auxiliary The other end of the capacitor is electrically connected. 7. The pixel unit circuit of claim 1, wherein the voltages of the first coupling electrode signal and the second coupling electrode signal are each an alternating voltage, and the common voltage is a direct current voltage. 8. The pixel unit circuit of claim 1, wherein the first secondary voltage, the second secondary voltage, and the third sub-pixel voltage are 0.5 to 2 volts . The pixel unit circuit of claim 1, wherein the first consuming electrode signal is inverted by 18 degrees from the second coupling electrode signal. 10. The pixel unit circuit of claim 1, wherein the aperture ratio of the first sub-pixel unit is the same as the opening rate of the third sub-pixel unit. 11. The pixel unit circuit of claim 1, wherein an aperture ratio of the first sub-pixel unit is smaller than an aperture ratio of the third sub-pixel unit. 12· a vertical alignment type liquid crystal display device, comprising: a first substrate comprising a common conductive layer and a plurality of protrusions, wherein the == conductive layer is located on the first substrate, and the protrusions are located on the common conductive layer a portion of the surface; and a 15 electrode IS base Ϊ 'comprising a plurality of pixel electrodes, a plurality of first-coupling ridges, a plurality of second merging electrodes, a plurality of common electrodes, and a closed-pole, rib layer, § The first coupling electrode such as Hai, and the private u ※ 寻 一 耦合 耦合 、 、 乃 乃 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同 共同a second light-bonding electrode, and a surface of the common electrode 20 and located on a surface of the other portion of the second substrate, wherein the books are located on a portion of the gate insulating layer, and are electrically formed with a plurality of pixel units. Each of the substrates and the (four) two substrates only include the first sub-pixel unit, and further includes a first auxiliary capacitor and the first coupling: an auxiliary capacitor 'and the second second book One of the electrical connections of Xin Danyu φ ^; The first auxiliary capacitor further includes a second auxiliary capacitor and the same electric brother-auxiliary capacitor, and the /, one of the electrical connections; and 23 25 - the third sub-dielectric unit, and the third auxiliary capacitor material ^ , one of the first coupling electrodes of the mystery 4 is electrically connected, and two: the mother-first light-bonding electrode is used to provide a first, electrode signal, and each of the electrodes is used to provide a second combined electrode signal. Each of the common: the pole is used to provide a common voltage, and the element of the first sub-decibation unit is coupled to the first coupling electrode signal, and the pixel voltage of the third sub-tenox unit is coupled to the second coupling electrode a signal, wherein the first sub-pixel voltage, the second sub-single voltage, and the third sub-negative are different. 1〇_ 13. The vertical alignment type liquid crystal display according to claim 12, wherein the voltage of the first-light electrode signal and the second electrode signal is an alternating voltage, the common The voltage is a DC voltage. The vertical alignment type liquid crystal display device of claim 12, further comprising a liquid crystal layer between the first substrate and the second substrate 15 . 15. The vertical alignment type liquid crystal display device of claim 12, wherein the first substrate further comprises a color filter, the color filter being located on the first substrate and the common conductive layer between. The vertical alignment type liquid crystal display according to claim 12, wherein the second substrate further comprises a protective layer, the protective layer is located above the insulating layer, and the The halogen electrode is located on a portion of the surface of the protective layer. 17. The vertical alignment type liquid crystal display device of claim 16, wherein the two substrates further comprise a vertical alignment layer, and the vertical alignment 24 1334502 is located on the surface of the electrodes and the protection The other part of the surface of the layer. 18. The vertical g-oriented liquid crystal display device of claim 12, wherein the first sub-singular element, the second sub-pixel unit, 5, and the third minor The elemental voltage of the prime unit is 0.5 to 2 volts. 19. The vertical alignment type liquid crystal display device of claim 12, wherein the first coupling electrode signal is inverted by 180 degrees from the second coupling electrode signal. Φ 2〇· The vertical alignment type liquid crystal display device of claim 12, wherein the aperture ratio of the first sub-pixel unit is the same as the aperture ratio of the third two-dimensional pixel unit. 21. The vertical alignment type liquid crystal display device of claim 12, wherein an aperture ratio of the first sub-halogen unit is smaller than an aperture ratio of the third Hungarian pixel unit. 15 25
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US10529291B2 (en) 2015-10-26 2020-01-07 Au Optronics Corporation Dual gamma display panel

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10529291B2 (en) 2015-10-26 2020-01-07 Au Optronics Corporation Dual gamma display panel

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