九、發明說明： 【發明所屬之技術領域】 本發明涉及一種自動調整電壓之方法與電路，尤其是 一種依據運算頻率自動調整電壓之方法與電路。 【先前技術】 在電腦系統中，顯示卡負責將顯示晝面的形成與輸 出，其具有一圖形處理單元（graphic processing unit; GPU)，能夠讓顯示晝面顯示於螢幕上。 在顯示過程中，顯示卡的運算量隨時在改變，例如有 時需要進行大量的三維空間運算、陰影處理等等，而有時 在電腦長時間沒有任何操作時，顯示晝面處於靜止的低運 算量狀態。 由於不同的運算置需要不同的電力消耗*為了能讓電 力消耗達到比較理想的狀態，顯示卡的圖形處理單元通常 會結合一個電源管理晶片來管理顯示卡的電力消耗。 以往的顯示卡設計都是採用動態調整運算頻率來控 制電力消耗，驅動程式會根據系統的繁忙程度決定採用多 快的時脈頻率。對於運算量大的任務，驅動程式會調高運 算頻率；當電腦長時間沒有任何操作時，會降低顯示卡的 頻率，如此便能夠降低顯示卡在不繁忙時的電力消耗，屬 於一種運算頻率的調適性管理。 0608-A41553TWF1 5 1333135 為了能夠在較高的運算頻率下正常地運作，顯示卡需 要提供圖形處理單元足夠的工作電壓，因此需要一個電源 管理晶片來提供圖形處理單元穩定的電壓。參考第一圖， 圖示中舉例了一個電源控制晶片12與圖形處理單元14的 電路示意圖。電源控制晶片12負責提供供應電壓11給圖 形處理單元14，並藉由一迴路13來取得一反饋訊號FB。 迴路13之一端連接於電源控制晶片12之反饋訊號接腳， 並且迴路13連接於一接地電路15，其中接地電路15與 迴路13分別具有電阻R1與電阻R2。 電源控制晶片12會依據反饋訊號FB來調整供應電 壓，而反饋訊號可以藉由改變電阻R1來調整。因此如果 要讓相同的電源控制晶片12與圖形處理單元14適用於不 同的電路設計，便需要調整電阻R1的電阻值，使得供應 電壓能維持在指定的範圍。 然而通過動態調整顯示卡工作頻率的做法只能部份 地降低顯示卡的動態功率損耗，對靜態功率損耗的降低毫 無用處。尤其是針對目前最新技術的顯示晶片，動態功率 損耗已經不再是顯示卡功率損耗的主要部份。隨著顯示晶 片技術的提升，晶片漏電流造成的功率損耗在晶片總功率 損耗中所占的比率越來越大，甚至可能會超過晶片總功率 損耗的50%。因為靜態功率損耗與供應電壓的平方成正 0608-A41553TWF1 6 比，所以，如果能降低靜態功率損耗，將會遠大於上述動 態調整運算頻率所能達到的功率節省。 【發明内容】 鑒於上述之發明背景中，為了符合產業上某些利益之 需求，本發明提供一種調整電壓之方法與電路可用以解決 上述傳統之調整電壓之方法與電路未能達成之標的。 本發明之一目的係提供一種自動調整電壓之方法與 電路，使得電壓可隨著運算頻率自動調整。 本發明之另一目的係讓電源控制晶片在處理單元進 入低功率消耗的待機狀態時，可以把供應電壓降到僅維持 處理單元資料不丟失的程度，從而大幅度地降低功率消 耗。 本發明提出一種自動調整電壓之方法與電路及其中 之數位電位計。本發明採用·—電源控制晶片’電源控制晶 片係依據迴路之反饋訊號調整供應給處理單元的電壓，藉 由一數位電位計依據處理單元之運算頻率來控制一接地 電路之電阻值，此接地電路連接於電源控制晶片之迴路， 使得反饋訊號能夠隨著電阻值的改變而調整。因此，隨著 運算頻率的改變，供應電壓也會跟著調整。 【實施方式】 本發明在此所探討的方向為一種調整電壓之方法與 0608-A41553TWF1 7 1333135 電路。為了能徹底地瞭解本發明， 腭在下列的描述中 詳盡的步麟其线。顏地，轉_施行並^出 自動調整電壓之方法與電路之技藝者所熟習:於 節。另-方面，祕周知的組成或步驟並未描述於广 中，以避免造成本發明不必要之限制。本發明二郎 例會詳細描述如下’然而除了這些詳細描述之外1施IX. INSTRUCTIONS: TECHNICAL FIELD The present invention relates to a method and circuit for automatically adjusting a voltage, and more particularly to a method and circuit for automatically adjusting a voltage according to an operating frequency. [Prior Art] In the computer system, the display card is responsible for the formation and output of the display face, and has a graphic processing unit (GPU) that allows the display face to be displayed on the screen. During the display process, the amount of calculation of the display card is changed at any time. For example, a large amount of three-dimensional space calculation, shadow processing, and the like are sometimes required, and sometimes the low operation of the display surface is static when the computer does not operate for a long time. Quantity status. Since different computing needs require different power consumption* In order to achieve a better power consumption, the graphics processing unit of the graphics card usually combines a power management chip to manage the power consumption of the graphics card. In the past, the design of the display card used dynamic adjustment of the operating frequency to control the power consumption. The driver decided how fast the clock frequency should be based on the busyness of the system. For tasks with large computational load, the driver will increase the operating frequency; when the computer does not operate for a long time, it will reduce the frequency of the display card, thus reducing the power consumption of the display card when it is not busy, which is a kind of operation frequency. Adaptive management. 0608-A41553TWF1 5 1333135 In order to operate normally at higher operating frequencies, the graphics card needs to provide sufficient operating voltage for the graphics processing unit, so a power management chip is required to provide a stable voltage to the graphics processing unit. Referring to the first figure, a circuit diagram of a power control chip 12 and a graphics processing unit 14 is illustrated. The power control chip 12 is responsible for providing the supply voltage 11 to the graphics processing unit 14, and obtaining a feedback signal FB by a loop 13. One end of the circuit 13 is connected to the feedback signal pin of the power control chip 12, and the circuit 13 is connected to a ground circuit 15, wherein the ground circuit 15 and the circuit 13 have a resistor R1 and a resistor R2, respectively. The power control chip 12 adjusts the supply voltage according to the feedback signal FB, and the feedback signal can be adjusted by changing the resistance R1. Therefore, if the same power control chip 12 and the graphics processing unit 14 are to be applied to different circuit designs, the resistance value of the resistor R1 needs to be adjusted so that the supply voltage can be maintained within a specified range. However, by dynamically adjusting the operating frequency of the display card, the dynamic power loss of the display card can only be partially reduced, and the reduction of static power loss is useless. Especially for the current state of the art display chips, dynamic power loss is no longer a major part of the display card power loss. With the advancement of display wafer technology, the power loss due to wafer leakage current is increasing in the total power loss of the wafer, and may even exceed 50% of the total power loss of the wafer. Since the static power loss is proportional to the square of the supply voltage to 0608-A41553TWF1, if the static power loss can be reduced, it will be much larger than the power savings achieved by the above dynamic adjustment operating frequency. SUMMARY OF THE INVENTION In view of the above-described background of the invention, in order to meet the needs of certain industrial interests, the present invention provides a method and circuit for adjusting voltage that can be used to solve the above-mentioned conventional methods and circuits for adjusting voltage that are not achieved. It is an object of the present invention to provide a method and circuit for automatically adjusting a voltage such that the voltage can be automatically adjusted with the operating frequency. Another object of the present invention is to allow the power control chip to reduce the supply voltage to a level that maintains only the processing unit data without loss when the processing unit enters a low power consumption standby state, thereby greatly reducing power consumption. The present invention provides a method and circuit for automatically adjusting a voltage and a digital potentiometer therein. The invention adopts a power control chip. The power control chip adjusts the voltage supplied to the processing unit according to the feedback signal of the loop, and controls the resistance value of a ground circuit according to the operation frequency of the processing unit by a digital potentiometer. A loop connected to the power control chip allows the feedback signal to be adjusted as the resistance value changes. Therefore, as the operating frequency changes, the supply voltage is also adjusted. [Embodiment] The direction of the present invention discussed herein is a method of adjusting voltage and a circuit of 0608-A41553TWF1 7 1333135. In order to fully understand the present invention, 详尽 is described in detail in the following description. Yan Di, turn _ implementation and ^ out Automatic method of adjusting the voltage and the skilled person familiar with the circuit: in the section. In other instances, well-known components or steps are not described in the broad sense to avoid unnecessarily limiting the invention. The Erlang of the present invention will be described in detail below, however, except for these detailed descriptions,
，可=廣泛地施行在其_實_中’且本發明的範= 受限疋，其以之後的專利範圍為準。 目前，CMGS晶片在工作時產生的功率損耗 功率損耗與動態功率損耗。靜態功率損耗是由晶:本:態 漏電流所產生，而動態功率損耗是由於⑽$ 的 輯°和邏輯1之間切換時產生的。不論是哪一種功t邏 耗，都希望能將晶片在工作時所產生的功率損耗降得越: 越好。 _, can be widely implemented in its _ real _ and the scope of the present invention is limited, which is subject to the scope of the patents that follow. At present, the power loss and dynamic power loss generated by the CMGS wafer during operation. The static power loss is caused by the crystal: present: state leakage current, and the dynamic power loss is due to the switching between (10)$ and logic1. Regardless of the type of power, it is desirable to reduce the power loss generated by the wafer during operation: the better. _
晶片的功率損耗是和它的供應電壓的平方成正比，所 以通過降低晶片的電源電壓’可以顯著地降低晶片的功率 損耗。但是將晶片的電源電壓降低時，晶片的工作頻率會 隨著降低。所以最好的方法就是根據目前對晶片頻率的^ 求以及晶片的X作頻率與電壓對應_，提供晶片所需要 的最小電壓，使每-瓦的功率都能夠獲得最佳的效能。 據此本發月之具體實施例係一種自動調整電壓之 0608-A41553TWF1 8 數位電位計26,該數位電位計亦可為帶有非易失性存儲 器的數位電路器，該帶有非易失性存儲器的數位電路器在 無電源供應時仍保持設定的電阻值。如第二圖所示，包含 一電源控制晶片12、一圖形處理單元14與一數位電位計 26。電源控制晶片12提供一供應電壓11給圖形處理單元 14,反饋訊號FB係由一連接於電源控制晶片12之迴路 13所提供，迴路13連接於一接地電路25,其中接地電路 25與迴路13分別具有電阻R1與電阻R2。相對於第一圖， 接地電路25增加了一個並聯於電阻R1之數位電位計26, 數位電位計26與所並聯之電阻R1可整合於一調整電路。 本發明並不限制迴路13與圖形處理單元14之關係，例如 迴路13可以是與圖形處理單元14並聯，也有可能圖形處 理單元14為迴路13之一部份。 圖形處理單元14之運算頻率與圖形處理單元14所需 之最小供應電壓具有一相應關係，數位電位計26係依據 該相應關係調整電阻值，使得反饋訊號FB改變，進而調 整供應電壓11為相應於運算頻率之最小供應電壓。由此 可知，數位電位計26之電阻值與運算頻率27具有一相應 關係，數位電位計26依據與運算頻率27相應之關係所調 整之電阻值會調整反饋訊號FB，使得電源控制晶片12之 供應電壓成為相應於運算頻率之最小供應電壓。此外，圖 0608-A41553TWF1 9 形處理單元14亦可以替換成任何電路，本發明並不加以 限制。 當電阻R1與數位電位計26兩者的總電阻升高時，供 應電壓11便會降低；反之，當電阻R1與數位電位計26 兩者的總電阻降低時，供應電壓11便會升高。因此，當 運算頻率27升高時，可以藉由降低電阻R1與數位電位計 26兩者的總電阻來調高供應電壓11，以符合圖形處理單 元14的需求。當運算頻率27降低時，例如處於待機狀態 中，可以藉由提高電阻R1與數位電位計26兩者的總電阻 來降低供應電壓11，以節省大量的功率消耗。此外，藉 由控制電阻R1與數位電位計26兩者的總電阻，可以使供 應電壓11成為圖形處理單元14相應於運算頻率27所需 之最小供應電壓時，所能節省之功率消耗便可達到最大。 據此，本發明之另一具體實施例係一種自動調整電 壓之電路，如第三圖所示，包含一電源控制晶片12、一 處理單元34與一調整電路36。電源控制晶片12依據相 應於圖形處理單元34之一反饋訊號FB提供一供應電壓 11給處理單元34,反饋訊號FB係由一連接於電源控制晶 片12之迴路13所提供，並且迴路13連接於一接地電路 35。 調整電路36可以是一個依據處理單元34之運算頻 0608-A41553TWF1 10 率調整電阻值之電路、數位電位計或任何形式之可變電 阻，例如上述之數位電位計26與所並聯之電阻R1。調整 電路36之電阻值與運算頻率37具有一相應關係，調整電 路36依據與運算頻率37相應之關係所調整之電阻值會調 整反饋訊號FB，使得電源控制晶片12之供應電壓11成 為相應於運算頻率37之最小供應電壓。 此外，調整電路36可以是一個依據處理單元34之 運算頻率37產生一輸出電流之電流源。此輸出電流與運 算頻率37具有一相應關係，調整電路36依據與運算頻率 相應之關係所產生之電流值會調整反饋訊號FB，使得電 源控制晶片12之供應電壓11成為相應於運算頻率之最小 供應電壓。 上述之電阻值與運算頻率27、37之相應關係、電流 值與運算頻率27、37之相應關係可以是由一查表來達 成，該查表可以是一查表電路或儲存該相應關係之儲存單 元，依據運算頻率37檢索查表可以得到相應之電阻值或 電流值。其中運算頻率37可以是從上述圖形處理單元14 或處理單元34所取得之一控制訊號，以控制訊號做為檢 索查表之索引值，其中控制訊號可以由複數個位元所組 成。 另外，上述之處理單元34可以是中央處理單元、圖 0608-A41553TWF1 11 形處理單元、或是任何可以接受不同輸入電壓之電路，本 發明並不加以限制。此外，上述之接地電路係習知技術中 連接於接地電位（GROUND)之電路。 本發明之再一具體實施例係一種自動調整顯示卡電 壓之方法，參照第三圖與第四圖。如步驟420所示，首先 取得一處理單元34之一運算頻率37，然後如步驟430所 示，依據運算頻率37調整一調整電路36之電阻值，調整 電路36係依據與運算頻率37相應之關係調整電阻值，所 調整之電阻值會調整相應於處理單元34之一反饋訊號 FB。接下來如步驟440所示，由連接於電源控制晶片12 之一迴路13取得反饋訊號FB，其中迴路13連接一包含 調整電路36之一接地電路。最後如步驟450所示，依據 反饋訊號FB調整電源控制晶片12供應給處理單元34之 供應電壓11，該供應電壓11為處理單元34相應於運算 頻率37所需之最小供應電壓。本具體實施例更可以包含 變更處理單元34之運算頻率37，如步驟410所示。本具 體實施例之其他細節已揭示於前述第二圖與第三圖之相 關實施例中，在此不再贅述。 顯然地，依照上面實施例中的描述，本發明可能有 許多的修正與差異。因此需要在其附加的權利要求項之範 圍内加以理解，除了上述詳細的描述外，本發明還可以廣 0608-A41553TWF1 12 1333135 泛地在其他的實施例中施行。上述僅為本發明之較佳實施 例而已，並非用以限定本發明之申請專利範圍；凡其他未 脫離本發明所揭示之精神下所完成的等效改變或修飾，均 應包含在下述申請專利範圍内。 【圖式簡單說明】 第一圖係為一先前技述之電路示意圖； 第二圖係為本發明之一具體實施例之電路示意圖； 第三圖係為本發明之另一具體實施例之電路示意 圖；以及 第四圖係為本發明之一具體實施例之流程示意圖。 【主要元件符號說明】 11供應電壓 12電源控制晶片 13迴路 14圖形處理單元 15接地電路 25接地電路 26數位電位計 27運算頻率 34處理單元 35接地電路 0608-A41553TWF1 13 1333135The power loss of the wafer is proportional to the square of its supply voltage, so the power loss of the wafer can be significantly reduced by lowering the supply voltage of the wafer. However, when the power supply voltage of the wafer is lowered, the operating frequency of the wafer is lowered. Therefore, the best method is to provide the minimum voltage required for the wafer according to the current frequency of the wafer and the frequency and voltage of the X of the wafer, so that the power per watt can obtain the best performance. Accordingly, the specific embodiment of the present month is a 0608-A41553TWF1 8-digit potentiometer 26 that automatically adjusts the voltage, and the digit potentiometer can also be a digital circuit device with a non-volatile memory, which is non-volatile. The digital circuit of the memory maintains the set resistance value when no power is supplied. As shown in the second figure, a power control chip 12, a graphics processing unit 14 and a digital potentiometer 26 are included. The power control chip 12 provides a supply voltage 11 to the graphics processing unit 14. The feedback signal FB is provided by a circuit 13 connected to the power control chip 12, and the circuit 13 is connected to a ground circuit 25, wherein the ground circuit 25 and the circuit 13 respectively It has a resistor R1 and a resistor R2. Relative to the first figure, the ground circuit 25 adds a digital potentiometer 26 connected in parallel with the resistor R1. The digital potentiometer 26 and the parallel resistor R1 can be integrated in an adjustment circuit. The present invention does not limit the relationship of the loop 13 to the graphics processing unit 14, for example, the loop 13 may be in parallel with the graphics processing unit 14, or it may be that the graphics processing unit 14 is part of the loop 13. The operation frequency of the graphics processing unit 14 has a corresponding relationship with the minimum supply voltage required by the graphics processing unit 14. The digital potentiometer 26 adjusts the resistance value according to the corresponding relationship, so that the feedback signal FB changes, thereby adjusting the supply voltage 11 to correspond to The minimum supply voltage for the operating frequency. It can be seen that the resistance value of the digital potentiometer 26 has a corresponding relationship with the operation frequency 27, and the resistance value adjusted by the digital potentiometer 26 according to the relationship corresponding to the operation frequency 27 adjusts the feedback signal FB, so that the power supply control chip 12 is supplied. The voltage becomes the minimum supply voltage corresponding to the operating frequency. In addition, the figure 0608-A41553TWF1 9-shaped processing unit 14 can also be replaced with any circuit, and the invention is not limited thereto. When the total resistance of both the resistor R1 and the digital potentiometer 26 rises, the supply voltage 11 decreases; conversely, when the total resistance of both the resistor R1 and the digit potentiometer 26 decreases, the supply voltage 11 rises. Therefore, when the operating frequency 27 rises, the supply voltage 11 can be increased by reducing the total resistance of both the resistor R1 and the digital potentiometer 26 to meet the requirements of the graphics processing unit 14. When the operation frequency 27 is lowered, for example, in the standby state, the supply voltage 11 can be lowered by increasing the total resistance of both the resistor R1 and the digital potentiometer 26 to save a large amount of power consumption. In addition, by controlling the total resistance of both the resistor R1 and the digital potentiometer 26, the supply voltage 11 can be made to be the minimum supply voltage required by the graphics processing unit 14 corresponding to the operating frequency 27, and the power consumption can be saved. maximum. Accordingly, another embodiment of the present invention is a circuit for automatically adjusting the voltage, as shown in the third figure, comprising a power control wafer 12, a processing unit 34 and an adjustment circuit 36. The power control chip 12 provides a supply voltage 11 to the processing unit 34 according to a feedback signal FB corresponding to the graphics processing unit 34. The feedback signal FB is provided by a circuit 13 connected to the power control chip 12, and the circuit 13 is connected to the circuit 13. Ground circuit 35. The adjustment circuit 36 can be a circuit that adjusts the resistance value according to the operating frequency of the processing unit 34, a digital potentiometer or any form of variable resistance, such as the above-described digital potentiometer 26 and the paralleled resistor R1. The resistance value of the adjustment circuit 36 has a corresponding relationship with the operation frequency 37. The adjustment value of the adjustment circuit 36 adjusted according to the relationship corresponding to the operation frequency 37 adjusts the feedback signal FB, so that the supply voltage 11 of the power control wafer 12 becomes corresponding to the operation. The minimum supply voltage of frequency 37. Additionally, adjustment circuit 36 can be a current source that produces an output current in accordance with operating frequency 37 of processing unit 34. The output current has a corresponding relationship with the operation frequency 37. The adjustment circuit 36 adjusts the feedback signal FB according to the current value generated according to the relationship with the operation frequency, so that the supply voltage 11 of the power control chip 12 becomes the minimum supply corresponding to the operation frequency. Voltage. The corresponding relationship between the resistance value and the operation frequency 27, 37, and the corresponding relationship between the current value and the operation frequency 27, 37 may be achieved by a look-up table, which may be a look-up table circuit or store the corresponding relationship. The unit can retrieve the corresponding resistance value or current value by searching the table according to the operation frequency 37. The operation frequency 37 may be a control signal obtained from the graphic processing unit 14 or the processing unit 34 to control the signal as an index value of the search table, wherein the control signal may be composed of a plurality of bits. In addition, the processing unit 34 may be a central processing unit, a 0608-A41553TWF1 11-shaped processing unit, or any circuit that can accept different input voltages, which is not limited by the present invention. Further, the above grounding circuit is a circuit connected to a ground potential (GROUND) in the prior art. Still another embodiment of the present invention is a method of automatically adjusting the voltage of a display card, with reference to the third and fourth figures. As shown in step 420, an operation frequency 37 of one processing unit 34 is first obtained, and then, as shown in step 430, the resistance value of an adjustment circuit 36 is adjusted according to the operation frequency 37, and the adjustment circuit 36 is based on the relationship with the operation frequency 37. The resistance value is adjusted, and the adjusted resistance value is adjusted corresponding to one of the feedback signals FB of the processing unit 34. Next, as shown in step 440, a feedback signal FB is obtained by a circuit 13 connected to the power control chip 12, wherein the circuit 13 is coupled to a ground circuit including one of the adjustment circuits 36. Finally, as shown in step 450, the supply voltage 11 supplied by the power control chip 12 to the processing unit 34 is adjusted in accordance with the feedback signal FB, which is the minimum supply voltage required by the processing unit 34 to correspond to the operating frequency 37. This embodiment may further include the operational frequency 37 of the change processing unit 34, as shown in step 410. Other details of the specific embodiments have been disclosed in the related embodiments of the foregoing second and third figures, and are not described herein again. Obviously, many modifications and differences are possible in the present invention in light of the above description of the embodiments. Therefore, it is to be understood that within the scope of the appended claims, in addition to the above detailed description, the invention may be practiced in other embodiments as broadly 0608-A41553TWF1 12 1333135. The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the claims of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the following patents. Within the scope. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a circuit diagram of a prior art; the second figure is a circuit diagram of one embodiment of the present invention; the third figure is a circuit of another embodiment of the present invention. The schematic diagram; and the fourth diagram are schematic diagrams of a specific embodiment of the present invention. [Main component symbol description] 11 Supply voltage 12 Power control chip 13 circuit 14 Graphics processing unit 15 Ground circuit 25 Ground circuit 26 Digital potentiometer 27 Operation frequency 34 Processing unit 35 Ground circuit 0608-A41553TWF1 13 1333135
36調整電路 37運算頻率 FB反饋訊號 Rl、R2電阻 0608-A41553TWF1 1436 adjustment circuit 37 operation frequency FB feedback signal Rl, R2 resistance 0608-A41553TWF1 14