TWI330467B - A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver - Google Patents

A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver Download PDF

Info

Publication number
TWI330467B
TWI330467B TW95137037A TW95137037A TWI330467B TW I330467 B TWI330467 B TW I330467B TW 95137037 A TW95137037 A TW 95137037A TW 95137037 A TW95137037 A TW 95137037A TW I330467 B TWI330467 B TW I330467B
Authority
TW
Taiwan
Prior art keywords
bit
sdm
ofdm
analog
signal
Prior art date
Application number
TW95137037A
Other languages
Chinese (zh)
Other versions
TW200818715A (en
Inventor
Jeich Mar
Yu Jung Lin
Original Assignee
Jeich Mar
Yu Jung Lin
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeich Mar, Yu Jung Lin filed Critical Jeich Mar
Priority to TW95137037A priority Critical patent/TWI330467B/en
Publication of TW200818715A publication Critical patent/TW200818715A/en
Application granted granted Critical
Publication of TWI330467B publication Critical patent/TWI330467B/en

Links

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Description

1330467 九、發明說明: 【發明所屬之技術領域】 本發明係有關一種應用於正交分頻多工超寬頻傳接機 之五位元1 28音-SDM數位轉類比與類比轉數位之方 法及裝置’尤指一種超寬頻通訊系統具備高速率、低功 率、超大頻寬的傳輸特性,非常適用於數位家庭與車 用防撞雷達。 自從美國FCC在2002年2月14日立法通過,設定超 寬頻通訊系統頻段為3.1 GHz-10.6GHz,並將其開放商 業化用途後’立即成為無線通訊業者關心的焦點。UWB 技術分成Texas [nstruments之正交分頻多工超寬頻 (UWB-OFDM)與Motorola之直接序列展頻超寬頻 (DS-UWB)兩大類’而本發明適用於UWB-OFDM。 UWB-OFDM具有高頻譜效率、抗多路徑衰減及可適性 之優點,已獲得許多國際大廠與國内業者的支持。 UWB-OFDM傳接機與窄頻帶(Narrowband) NB-OFDM 傳接機不同之處,為UWB-OFDM傳接機的D/A與A/D 轉換器必須同時具備高取樣率且低消耗功率,因此D/A 與A/D轉換器位元解析度不能太高。換言之, UWB-OFDM通訊系統必須使用較低位元解析度的D/A 與A/D轉換器傳送/接收高峰均值比的OFDM信號。既有 UWB-OFDM傳接機使用528MHz取樣率-五位元之D/A 與A/D轉換器傳送/接收128個QPSK調變的子載波,這 是因為OFDM信號的子載波使用16-QAM、64-QAM高 階調變時’ OFDM信號的峰均值太高,而影響系統性 能。如何減少UWB-OFDM傳接機D/A與A/D轉換器之低 9 1330467 位元解析度的量化雜訊,產生傳送/接收高階調變 OFDM信號所需之SQNR,滿足UWB通訊系統對BER之 要求,為UWB-OFDM傳接機必須解決的重要問題。 為了避免干擾現有的通信系統,FFC對發射的超寬 頻信號的功率頻譜密度有嚴格的規定。FFC許可發射的 超寬頻信號最大的功率頻譜密度為41.3dBm/MHz對應 全部的操作頻帶,則超寬頻信號最大平均功率約為 0.5m W,因此UWB通訊系統被限制在短距離應用。 UWB-OFDM 是 IEEE 802.15.3a (TG3a)標準的最新解決 方案[註1 ]。TG3a標準具備低複雜度、便宜、低功率消 耗與高資料率的無線超寬頻傳輸特性。為了滿足消費 者對尺寸、價格和功率消耗的應用需求,單晶片超寬 頻傳接機必須使用很少的外部元件。對於發射端的D/A 與接收端的A/D轉換器而言,高PAPR之UWB-OFDM信 號若要獲得更高的SQNR,則需要使用更多位元量化 器,因而提高D/A與A/D轉換器硬體複雜度與功率消 耗,因此降低OFDM信號的PAPR成為UWB-OFDM傳接 機必須要解決的問題。因為以愈低的操作電壓製作大 動態範圍電路,實現會愈困難,因此UWB-OFDM傳接 機必須以更複雜的數位信號處理潛在的低成本與低功 率消耗架構,來減輕實現類比電路的困難。本發明提 出以W-SDM調變器架構設計D/A與A/D轉換器的量化 器方法,大輻改善PAPR效應,並在D/A與A/D轉換器的 量化器動態範圍、量化訊雜比、電路體積與電路工作 速度等參數間取捨,針對各種應用需求進行彈性設計。 [註 1] A. Batra et al.,“Multi-band OFDM physical 1330467 layer proposal f〇r IEEE 802.15.3a ^ » Sept. 2004, available at http://www.nlultibandofdm.org. • 【先前技術】 • 如圖一⑷所示’基本的D/A轉換器包含⑴.办位元 量化器(ii). ό位元電壓級解碼器(⑴)取樣/保持 (sample/hold > S/Η)電路(iv).平滑之低通濾波器。為 了提高IFFT的精確度,可以使用高於^位元的定點數值 • (flXetl number)或浮點數值之乘法與加法運算進行IFFT 處理,貝ijIFFT輸出OFDM符元信號為高於△位元表示的 浮點,值或定點數值。0FDM符元信號輸入&位元d/a 轉換器前,必須先經過办位元量化器量化為位元定點 數值以符合D/A轉換的位元數。&位元電壓級解碼器會 將輸入的6位元數位信號所表示的數值轉換為對應的 類比電壓信號,經過S/Η電路取樣並维持住一段固^時 間,此段時間即為D/A轉換器的取樣區間令為,,DM 轉換器輸出類比信號最大頻寬為〇.5/;叫/2^sm :隔’、,時間取樣量化器的量化值做為輸出值,並维持, 時間,所以理想的S/H的系統脈衝響應可表示為 ' 11330467 IX. Description of the invention: [Technical field of the invention] The present invention relates to a five-bit 1 28-SDM digital-to-analog ratio analogy and analog-to-digital number method for an orthogonal frequency division multiplexing ultra-wideband transmission machine and The device 'especially an ultra-wideband communication system with high speed, low power and large bandwidth transmission characteristics is very suitable for digital home and vehicle collision avoidance radar. Since the FCC of the United States passed legislation on February 14, 2002, setting the frequency band of the ultra-wideband communication system to 3.1 GHz to 10.6 GHz and opening it to commercial use has immediately become the focus of wireless communication operators. The UWB technology is divided into two categories: Texas [nstruments of orthogonal frequency division multiplexing ultra wideband (UWB-OFDM) and Motorola's direct sequence spread spectrum ultra wideband (DS-UWB)] and the present invention is applicable to UWB-OFDM. UWB-OFDM has the advantages of high spectral efficiency, multipath attenuation and adaptability, and has been supported by many international manufacturers and domestic players. The UWB-OFDM transceiver differs from the Narrowband NB-OFDM transceiver in that the D/A and A/D converters of the UWB-OFDM transceiver must have both high sampling rate and low power consumption. Therefore, the D/A and A/D converter bit resolution cannot be too high. In other words, the UWB-OFDM communication system must use a lower bit resolution D/A and A/D converter to transmit/receive a peak-to-average ratio OFDM signal. Existing UWB-OFDM transceivers use 528MHz sampling rate - five-bit D/A and A/D converter to transmit/receive 128 QPSK modulated subcarriers because the subcarriers of the OFDM signal use 16-QAM. In the 64-QAM high-order modulation, the peak value of the OFDM signal is too high, which affects system performance. How to reduce the quantization noise of 9 1330467 bit resolution of UWB-OFDM transceiver D/A and A/D converter, and generate the SQNR needed to transmit/receive high-order modulated OFDM signals, satisfying the BER of UWB communication system The requirement is an important issue that must be solved for UWB-OFDM transceivers. In order to avoid interference with existing communication systems, the FFC has strict regulations on the power spectral density of the transmitted ultra-wideband signals. The maximum power spectral density of the ultra-wideband signal transmitted by the FFC is 41.3dBm/MHz. For the entire operating frequency band, the maximum average power of the ultra-wideband signal is about 0.5m W, so the UWB communication system is limited to short-distance applications. UWB-OFDM is the latest solution to the IEEE 802.15.3a (TG3a) standard [Note 1]. The TG3a standard features wireless ultra-wideband transmission with low complexity, low cost, low power consumption and high data rate. To meet consumer demand for size, price and power consumption, single-chip ultra-wideband transmitters must use very few external components. For the D/A and receiver A/D converters at the transmitting end, if the UWB-OFDM signal with high PAPR needs to obtain a higher SQNR, more bit quantizers are needed, thus improving D/A and A/. D converter hardware complexity and power consumption, so reducing the PAPR of OFDM signals has become a problem that UWB-OFDM transceivers must solve. Because it is more difficult to implement large dynamic range circuits with lower operating voltages, UWB-OFDM transceivers must handle the potential low cost and low power consumption architecture with more complex digital signals to alleviate the difficulty of implementing analog circuits. . The present invention proposes a quantizer method for designing D/A and A/D converters with a W-SDM modulator architecture, which greatly improves the PAPR effect, and quantizes the dynamic range and quantizes of the D/A and A/D converters. The parameters such as signal-to-noise ratio, circuit volume and circuit operating speed are trade-offs, and flexible design is required for various application requirements. [Note 1] A. Batra et al., "Multi-band OFDM physical 1330467 layer proposal f〇r IEEE 802.15.3a ^ » Sept. 2004, available at http://www.nlultibandofdm.org. • As shown in Figure 1 (4) 'Basic D/A converter contains (1). Bit quantizer (ii). ό Bit voltage stage decoder ((1)) sample/hold (sample/hold > S/Η) Circuit (iv). Smooth low-pass filter. In order to improve the accuracy of IFFT, you can use the fixed-point value higher than ^ bit • (flXetl number) or the multiplication and addition of floating-point values for IFFT processing, ijIFFT The output OFDM symbol signal is higher than the floating point, value or fixed point value represented by the Δ bit. Before the 0FDM symbol input & the d/a converter, it must be quantized to the bit by the bit quantizer. The value is in accordance with the number of bits of the D/A conversion. The & bit voltage stage decoder converts the value represented by the input 6-bit digit signal into a corresponding analog voltage signal, which is sampled and maintained by the S/Η circuit. A period of time, this is the sampling interval of the D/A converter, DM The maximum output bandwidth of the converter output analog signal is 〇.5/; called /2^sm: interval ', the quantized value of the time sampling quantizer is used as the output value, and the time is maintained, so the ideal S/H system pulse The response can be expressed as ' 1

可得S/H 0 , otherwise 對理想的S/H的系統脈衝響應做傅立葉轉換 的糸統頻率響應 1^30467 〜⑺:Wne(A),(-M)=^lexp㈠成)(2) t 可头S/H的輸出信號並不是-個嚴格頻帶限制 白· 。因此S/Η的輸出信號必須通過低通濟 平滑濾波器或補償遽波器)以壓抑超出:頻。寬2 以理想的補償濾波器為 人、兔所 ❿S/H 0 can be obtained, otherwise the system response of the ideal S/H system is the Fourier transform frequency response 1^30467 ~ (7): Wne (A), (-M) = ^ lexp (a) into) (2) t The output signal of the head S/H is not - a strict band limit white. Therefore, the S/Η output signal must pass through a low-pass smoothing filter or a compensation chopper) to suppress the excess: frequency. Width 2 with ideal compensation filter for people, rabbits

(/) ,|/| < 0.5/^ ,|/|>〇-5乂 (3) 如圖一(b)所示’基本的A/D轉換器包含⑴(/) , | / | < 0.5 / ^ , | / | > 〇 - 5 乂 (3) As shown in Figure 1 (b) 'Basic A / D converter contains (1)

㈣編碼取樣/保持陶電路㈣.純元量化J =j比t唬會先經過反混疊低通濾波器將超過+0 電路每隔。時間取樣反混疊低通濾波器(4) Coded sample/hold pot circuit (4). Pure element quantization J = j ratio t唬 will pass the anti-aliasing low pass filter first will exceed +0 circuit every second. Time sampling anti-aliasing low pass filter

電路二 值並維持,身間,立71量化器將S/H 電路的輸出值量化為〇,±Δ, ,±^-2δ — 2/> ,The circuit is binary and maintained. In the body, the 71 quantizer quantizes the output value of the S/H circuit to 〇, ±Δ, , ±^-2δ — 2/>

==電壓信號’ g元電II編碼器會根據A 輪出電壓表示為對應的6位元定點數值信號。 以般¥見的線性Midread之二位开旦各u。.. 函數為例,如圖-所千…t 裔之轉移 號之叙处一闲 置器〇 = 3)的輪入信 二動悲卿 W+lM/2’(,,+ ^唬振幅依照最接近的量化階層〇,±δ/2,, :Π —(2、1)Λ/2。當被量化的輸入信號在量化 -的動恶範圍内,則A/D轉換器輸出信號的量化雜訊為 均勻分佈在[+0.5Δ’ _05 是輪入信號振幅超過量化哭、句句量化雜汛,若 只能輸出最大值2M ^ :乾圍,貝彳Μ立元量化器 換器輸出對應的6位元定點數值2:…位元A/D轉 值,使得A/D轉換器輪出信虎曰之最大值與最小 土〇.5Δ,稱為過載(Overload)^雜則匕雜訊會超出 對有限位元的D/A與A/D轉換二°==Voltage signal ' g Yuan II encoder will be represented as the corresponding 6-bit fixed-point value signal according to the A-round voltage. The two of the linear Midreads seen in the general price are open. .. function as an example, as shown in the figure - the thousand... t-significant of the transfer number of a vacant device 〇 = 3) the round letter of the second movement sorrow W+lM/2' (,, + ^ 唬 amplitude according to the closest The quantization level 〇, ±δ/2,, :Π—(2,1)Λ/2. When the quantized input signal is within the range of the quantized-to-noise, the quantization noise of the A/D converter output signal For even distribution in [+0.5Δ' _05 is the round-in signal amplitude exceeds the quantitative crying, sentence quantification, if only the maximum output 2M ^ : dry circumference, the Bezier finite element quantizer output corresponds to 6 The bit fixed value 2: ... bit A / D value, so that the A / D converter rounds the maximum value of the letter and the minimum bandit .5 Δ, called overload (overload) ^ noise will be beyond the Finite bit D/A and A/D conversion ω

輸入範圍,均句量化雜訊愈大換:而言’重化愈大的 與A/D轉換器量化單位解 為了滿足系統對D/A ,換器輸入範圍為=二之要求 的D/A與A/D轉換器之量化5^生^免有限動悲辄圍 轉換器動態範圍的裁,超出D/A與A/D 贿輸出〇_符元上皮削減。因為Input range, average sentence quantization noise is changed: In fact, the larger the re-weighting and the A/D converter quantization unit solution, in order to meet the system D/A, the converter input range is = two requirements D/A Quantification with the A/D converter 5^ 生^ 有限 有限 动 辄 转换器 转换器 转换器 转换器 转换器 转换器 动态 动态 , , , , , , , , , , 动态 动态 动态 动态 动态 动态 动态 动态 动态 动态 动态 动态 动态because

小,所以適當地使用較小動:範幅值的機率較 ^ ^ 切心槐圍置化器來削減OFDM 付Μ號過大的振幅值’則所產生過載量化雜訊會遠 低於直接採用較大動態範圍量化器所產生的均勻量化 ^訊二本=明揭示以#音-SDM電路取代d/a與a/d轉換 器之里化益,並根據已知的W-IFfT輸出〇FD]y^f號方差 (σ2)與D/A與A/D轉換器的位元解析度6決定量化單位 △,使得量化OFDM信號產生的量化雜訊方差為最小, 所以W音-SDM電路量化〇FDM信號’可以獲得最高的 SQNR。 既有UWB-OFDM傳收機之A/D舆D/A轉換器: 基本的ϋ WB-OFDM發射機與接收機(傳接機)架構 如圖三所示,二位元資料經過星雲編碼器轉換為複數 1330467 子載波信號,二位元資料依照星雲圖編碼方式可選擇 QPSK、16-QAM或64-QAM。每Μ點複數子載波信號經 過串列轉並列後輸入AMFFT調變為OFDM信號,二倍時 間展頻(重覆傳送前一個OFDM信號一次),經過高速的 办位元D/A轉換為類比的UWB-OFDM信號。UWB-OFDM 信號經過可加性白色高斯雜訊(Additional white Gaussian noise ’ AWGN)通道,在時間同步的條件下, 理想的接收機為將接收的UWB-OFDM信號經過高速的 ό位元A/D轉換為數位OFDM信號,經過兩倍時間解展 頻處理後,輸出OFDM信號的訊雜比 (Signa-to-noise-ratio, SNR)可以增加 3dB,解展頻的 OFDM信號輸入AA-FFT解調為Μ點複數子載波信號,最 後經由星雲解碼器解回二位元資料。既有OFDM發射機 之D/A轉換器為低取樣率與高位元解析度,可以有效率 地使用與D/A轉換器位元數相符的定點數值運算完成 IFFT轉換’ IFFT輸出值可以直接輸入d/A轉換器。 UWB-OFDM發射機之D/A轉換器為高取樣率(528MHz) 與低位元解析度(5-bit),使用五位元定點數值運算 128-IFFT輸出OFDM符元信號之量化雜訊過大,而嚴重 影響接收機性能。既有U WB-OFDM傳接機使用兩倍時 間展頻增加UWB-OFDM的接收信號之訊雜比(SNR), 然而UWB-OFDM信號之量化雜訊並無法隨著時間展頻 而降低。 AMFFT輸出OFDM符元信號經過办位元d/A轉換為 類比的OFDM信號波形,目前OFDM發射機有兩種方式 設計AMFFT,第一種方式為AMFFT的輸入信號為△位元Small, so the appropriate use of smaller movements: the probability of the amplitude of the amplitude is better than the ^ ^ centroid 槐 置 来 削减 削减 削减 OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM OFDM 量化 量化Uniform Quantization Generated by the Large Dynamic Range Quantizer = Ming revealed that the #音-SDM circuit replaces the d/a and the a/d converter, and according to the known W-IFfT output 〇FD] The y^f variance (σ2) and the D/A and A/D converter bit resolution 6 determine the quantization unit Δ, so that the quantized variance of the quantized OFDM signal is minimized, so the W-SDM circuit quantizes 〇 The FDM signal 'can get the highest SQNR. A/D舆D/A converters with both UWB-OFDM transceivers: Basic ϋ WB-OFDM transmitter and receiver (transfer) architecture is shown in Figure 3. The binary data passes through the nebula encoder. Converted to a complex 1330467 subcarrier signal, the binary data can be selected according to the nebula coding method, QPSK, 16-QAM or 64-QAM. Each sub-multiple subcarrier signal is converted into an OFDM signal by serial-to-column conversion, and the AMFFT is converted into an OFDM signal, twice time spread (repeating the previous OFDM signal once), and converted to analogy by a high-speed office D/A. UWB-OFDM signal. The UWB-OFDM signal passes through the Additional White Gaussian Noise 'AWGN' channel. Under the condition of time synchronization, the ideal receiver is to receive the received UWB-OFDM signal through the high-speed unit A/D. Converted to a digital OFDM signal, after two times of despreading processing, the signal-to-noise-ratio (SNR) of the output OFDM signal can be increased by 3 dB, and the despread OFDM signal is input into AA-FFT demodulation. To solve the complex subcarrier signal, the binary data is finally solved via the nebula decoder. The D/A converter of the existing OFDM transmitter has low sampling rate and high bit resolution, and can efficiently perform IFFT conversion using fixed-point numerical operations consistent with the number of D/A converter bits. The IFFT output value can be directly input. d/A converter. The D/A converter of the UWB-OFDM transmitter has a high sampling rate (528 MHz) and a low bit resolution (5-bit). The quantization noise of the 128-IFFT output OFDM symbol is too large using a five-bit fixed-point numerical operation. It seriously affects receiver performance. Both U WB-OFDM transceivers use twice the time spread to increase the signal-to-noise ratio (SNR) of the received signal of UWB-OFDM. However, the quantization noise of UWB-OFDM signal cannot be reduced over time. The AMFFT output OFDM symbol signal is converted into analog OFDM signal waveform by the d/A of the device. Currently, the OFDM transmitter has two ways to design the AMFFT. The first method is that the AMFFT input signal is the Δ bit.

14 1330467 之 疋點數值’使用6位元定點數值的加法與乘法運笞〜 AMFFT電路,則輸出〇FDM信號為办位元定點數值了 ς 過Μ立tcd/a轉換為類比的uwb-〇FDM信號。使用與 D/A轉換器相同位元長度的定點數值運算a/_IFf丁電 路,OFDM發射機的D/A轉換器位元解析度愈高且處理 的IFFT點數(yv)愈小,則定點數值運算^吓丁電^之 SQNR會愈趨近於浮點數值AMFFT電路之SQNR,並且 輸出值不需要再經過量化為定點數值,但是固定位元 的定,力〇法與定點乘法運算過程產生的量化雜訊方差 會隨著AMFFT點數W變大而增加。因此定點數值運算 電路相較於浮點數值運算//-IFFT電路會更為簡 單且有致率,所以適合在具備低速、高位元解析度d/a 與A/D轉換器而且子載波個數較少的〇FDM傳接機。第 一種方式為使用浮點數值的加法與乘法運算"_1{?1:丁電 輸出OFDM符元信號為高PAPR的浮點數值,〇FD二 ,元信號先經過限制器削減過大的振幅後,輸入ό位元 里化器量化為位元定點值,輸入6位元D/A轉換為類比 的OFDM信號。AMFFT輸出OFDM符元信號產生大振幅 值的機率會較小,這是因為OFDM信號在#足夠大時會 ,於常態分佈’ 〇{7〇]^符元信號的方差愈大則pApR愈 向’代表OFDM符元信號振幅的動態範圍愈大。對固定 位疋的D/A與A/D轉換器,量化愈大的輸入範圍則量化 ,訊會愈大,為了降低0FDM信號的動態範圍,可以適 田的削減過大的OFDM波形振幅,獲得更高的SQNR。 此方法的缺點為使用較複雜的浮點數值運算電 路,而且AMFFT電路輪出浮點數值的〇FDM符元信號必 須先經過適當的削減與量化處理後,輸入D/A或a/d轉 換器才能獲得更高的SQNR。本發明揭示以建構於時 等效頻率插補/縮減之#音-SDM電路量化,[卯丁電路 輸出的浮點數值OFDM符元信號之方法,根據已知 AMFFT輸出OFDM信號方差(Y)與D/A與A/D轉換器的 位元解析度(W決定量化單位△,使得量化OFDM信號產 生的量化雜訊方差為最小,而獲得最高的SqNr。 既有UWB-OFDM接收機之五位元A/D轉換器必須 用大里電阻與比較器無法有效降低A/D轉換器功率 耗,6位元A/D轉換器必須使用/〜】個比較器,進行y 電阻產生的分壓與S/Η取樣的電壓比較,妒—】比較器 輸出可以表不- 1種電壓階層,經過後級編碼器將 電路取樣的電壓量化為6位元定點數值,如圖四所示。 分壓的電阻數量與比較器數會隨著A/D轉換器位元數 指數增加,比較器的工作電流是固定的,所以分壓的带 阻數量愈大’則分壓消耗的功率需要愈大,才能維持: 同的工作電流。 如圖五所不,既有UWB_〇FDM傳接機使用 128-IFFT/FFT調變/解調〇FDM信號,經過528mHz取樣 率-五位兀之D/A與A/D轉換器,傳送/接收pApR較小的 QPSK UWB-OFDM信號’使得SQNR足夠大,能趨近使 用理想D/A與A/D轉換器(轉換的1[〜8_〇17]〇1^信號沒有 ϊ化雜訊或SQNR無限大)之UWB_〇FDM傳接機之位元 錯誤率(Bit err〇r rate ’ BER)。若使用五位元D/A與a/d 轉換器傳送/接收PAPR較大的丨6_qAM或64_qAM UWB-OFDM信號之BER相對於uwB-OFDM傳接機使用 1330467 - 理想D/A與A/D轉換器之BER會愈大。 【發明内容】 基於解決以上所述習知技藝的缺失,本發明為應用於正六 • 分頻多工超寬頻傳接機之五位元128音-SDM數位轉广 比與類比轉數位之方法及裝置,本發明之主要目的在於高= 均值比的OFDM信號經過建構於時域等效頻率插彳^广 減32倍之128音,SDM電路調變為〇, +△, , , 1 ^ 一 ··· ±16Λρ 皆 • 層的量化信號,則量化信號可以直接由五位元d/a轉換 為類比信號’並由五位元A/D轉換為數位信號,而避免 削減波形振幅產生截波雜訊。128音-SDM電路的量化單 位△根據已知的AMFFT輸出OFDM信號方差(y)與D/A與 A/D轉換器的位元解析度(l〇g232 = 5),使得D/A轉換器 ' 輸出的類比信號可以獲得最高的SQNR。增加的建構^ 時域等效頻率插補/縮減32倍之128音-SDM電路,只需要 額外增加3/VL次複數加法運算’完全不需複數乘法。 本發明之另一目的在於以建構於時域等效頻率插補 /細減32倍丨28音- SDM電路取代D/A與A/D轉換器之五位 元量化器,簡稱五位元128-SDM D/A與A/D轉換器,並 根據已知的AMFFT輸出OFDM信號方差與D/A轉換器的 位元解析度決定量化單位△,使得量化OFDM信號產生的 量化雜訊方差為最小,所以使用五位元128-SDM D/A與 A/D轉換器傳送/接收UWB-OFDM信號可以獲得最高的 SQNR。 本發明之第三目的在於五位元128-SDM D/A ϋ WB-OFDM發射機採用建構於時域等效頻率插補二倍 1330467 - 的方法,而使五位元128-SDM D/A轉換器輸出信號達到 產生兩倍時間展頻UWB-OFDM信號的效果,而 U WB-OFDM接收機使用建構於時域等效頻率縮減二倍 - 的方法可同時達到降低量化雜訊之效果,其SQNR可以 • 較既有兩倍時間展頻方法增加5dB。既有UWB-OFDM接 收機之五位元A/D轉換器必須使用大量電阻與比較器無 法有效降低A/D轉換器功率消耗,本發明揭示之五位元 128-SDM A/D轉換器採用平行處理之類比SDM電路架 | 構取代五位元A/D轉換器量化器,在電路工作速度與體 積之間取得最佳取捨,可以依電路製程方式選擇合適的 超取樣倍率,藉著提高電路的工作速度減少電路體積, 進而改善UWB-OFDM接收機五位元A/D轉換器之功率 消耗。 為進一步對本發明有更深入的說明,乃藉由以下圖示、圖 號說明及發明詳細說明,冀能對貴審查委員於審查工作有所 助益。 【實施方式】 茲配合下列之圖式說明本發明之詳細結構,及其連結關係, 以利於貴審委做一瞭解。14 1330467 疋 point value 'Using the addition and multiplication of the 6-bit fixed-point value~ AMFFT circuit, the output 〇FDM signal is the fixed-point value of the ς ς Μ t t t t t t t t t t t t t t t t t signal. Using a fixed-point value of the same bit length as the D/A converter to operate the a/_IFf circuit, the higher the resolution of the D/A converter bit of the OFDM transmitter and the smaller the number of processed IFFT points (yv), the fixed point The numerical operation ^ scare the SQNR will be closer to the SQNR of the floating-point AMFFT circuit, and the output value does not need to be quantized to the fixed-point value, but the fixed bit, the force method and the fixed-point multiplication process The resulting quantization noise variance increases as the number of AMFFT points W increases. Therefore, the fixed-point numerical operation circuit is simpler and more efficient than the floating-point numerical operation//-IFFT circuit, so it is suitable for low-speed, high-bit resolution d/a and A/D converters and the number of subcarriers. Fewer 〇FDM transceivers. The first way is to use the addition and multiplication of floating-point values "_1{?1: the output of the OFDM symbol is a high PAPR floating point value, 〇 FD 2, the meta signal is first cut too much by the limiter After the amplitude, the input 里 bit chemizer quantizes to a bit fixed point value, and the input 6 bit D/A is converted into an analog OFDM signal. The probability that the AMFFT output OFDM symbol signal will generate a large amplitude value will be small. This is because the OFDM signal will be large enough when the # is sufficiently large, and the larger the variance of the ''{7〇]^ symbol signal is, the larger the pApR is. The larger the dynamic range representing the amplitude of the OFDM symbol signal. For fixed-bit D/A and A/D converters, the larger the quantization input range is quantized, the larger the information will be. In order to reduce the dynamic range of the 0FDM signal, it is possible to reduce the amplitude of the OFDM waveform by using the field to obtain more High SQNR. The disadvantage of this method is that a more complex floating-point numerical operation circuit is used, and the 〇FDM symbol signal of the AMFFT circuit that has a floating-point value must be subjected to appropriate reduction and quantization processing, and then input D/A or a/d. The converter can get a higher SQNR. The invention discloses a method for constructing a time-frequency equivalent interpolation/reduction of a sound-SDM circuit, [a method of outputting a floating-point value OFDM symbol signal of a chitin circuit, and outputting an OFDM signal variance (Y) according to a known AMFFT. The bit resolution of the D/A and A/D converters (W determines the quantization unit Δ, so that the quantized variance of the quantized OFDM signal is minimized, and the highest SqNr is obtained. There are five UWB-OFDM receivers. The bit A/D converter must be able to effectively reduce the power consumption of the A/D converter with a large resistor and a comparator. The 6-bit A/D converter must use a comparator to perform the voltage division of the y resistor. S / Η sampling voltage comparison, 妒 -] comparator output can not - 1 voltage level, after the latter encoder quantifies the circuit sampled voltage to 6-bit fixed-point value, as shown in Figure 4. The number of resistors and the number of comparators will increase with the number of bits in the A/D converter. The operating current of the comparator is fixed, so the larger the number of band-stop resistors, the greater the power required to divide the voltage. Maintain: Same working current. As shown in Figure 5, there is UWB_ The FDM transceiver uses 128-IFFT/FFT to modulate/demodulate the DMFDM signal, and transmits/receives a small QPSK UWB-OFDM signal with pApR through a 528mHz sampling rate-five-bit D/A and A/D converter. 'Make SQNR large enough to approach the ideal D/A and A/D converter (converted 1[~8_〇17]〇1^ signal without deuterated noise or SQNR infinity) UWB_〇FDM Bit error rate (Bit err〇r rate ' BER) of the transceiver. If the 5-bit D/A and a/d converter are used to transmit/receive the BER of the 丨6_qAM or 64_qAM UWB-OFDM signal with a large PAPR The use of 1330467 in the uwB-OFDM transmission machine - the BER of the ideal D/A and A/D converter will be larger. [Explanation] Based on solving the above-mentioned shortcomings of the prior art, the present invention is applied to the positive six-frequency division. The method and device for the five-bit 128-sound-SDM digital-to-wide ratio and analog-to-digital conversion of the multiplexed ultra-wideband transmission machine, the main purpose of the present invention is that the OFDM signal with high=average ratio is constructed by time-domain equivalent frequency interpolation.彳^广 减 32 times 128 sounds, SDM circuit is changed to 〇, +△, , , 1 ^一··· ±16Λρ are all layers of quantized signals, then the quantized signal can Converted from five-bit d/a to analog signal' and converted from five-bit A/D to digital signal, avoiding the reduction of waveform amplitude to generate chopping noise. The quantization unit of 128-SDM circuit is known according to The AMFFT outputs the OFDM signal variance (y) and the bit resolution of the D/A and A/D converters (l〇g232 = 5), so that the analog signal output by the D/A converter's can obtain the highest SQNR. The added construction ^ time domain equivalent frequency interpolation / reduction of 32 times the 128-sound-SDM circuit, only need to add an additional 3 / VL sub-multiple addition operation - no complex multiplication is required. Another object of the present invention is to replace the D/A and A/D converter five-bit quantizer with a time-domain equivalent frequency interpolation/reduction 32-times 28-tone-SDM circuit, which is referred to as five-bit 128. -SDM D/A and A/D converter, and determine the quantization unit Δ according to the known AMFFT output OFDM signal variance and the bit resolution of the D/A converter, so that the quantized variance of the quantized OFDM signal is minimized. Therefore, the highest SQNR can be obtained by transmitting/receiving UWB-OFDM signals using a five-bit 128-SDM D/A and A/D converter. The third object of the present invention is to use a five-bit 128-SDM D/A ϋ WB-OFDM transmitter with a time domain equivalent frequency interpolation of two times 1330467 -, and a five-bit 128-SDM D/A The converter output signal achieves the effect of generating a double-time spread-spectrum UWB-OFDM signal, and the U WB-OFDM receiver uses a method of reducing the time-domain equivalent frequency by a factor of two to simultaneously reduce the effect of quantization noise. SQNR can • Increase the 5dB by over twice the time spread spectrum method. The five-bit A/D converter of the UWB-OFDM receiver must use a large number of resistors and comparators to effectively reduce the A/D converter power consumption. The five-bit 128-SDM A/D converter disclosed in the present invention adopts Parallel processing analogy SDM circuit frame | Configuration instead of five-bit A / D converter quantizer, the best choice between the circuit operating speed and volume, you can choose the appropriate over-sampling ratio according to the circuit process, by improving the circuit The operating speed reduces the circuit volume, which in turn improves the power consumption of the five-bit A/D converter of the UWB-OFDM receiver. In order to further clarify the present invention, it will be helpful to review the review by the following illustrations, illustrations, and detailed description of the invention. [Embodiment] The detailed structure of the present invention and its connection relationship will be described in conjunction with the following drawings to facilitate an understanding of the audit committee.

本發明之主要架構係為將二位元資料經過星雲編碼器 轉換為複數子載波信號,每#點複數子載波信號經過串 列轉並列後輸入V-快速反傅立葉轉換調變為一正交分 頻多工信號,再與上述構件之五位元數位量化器與五位 元數位/類比轉換器之作動,五位元128-SDM D/A 18 1330467 UWB-OFDM發射機採用建構於時域等效頻率二 倍,而使五位元m-SDMDM輸出信號達到產 " 間展頻UWB_〇FDM信號的交文果,而UWB-OFDM接^ 使用建構於時域等效頻率縮減二倍,sqnr可以' 规,解展頻的正交分頻多工信號輪人 回二位元資料。 取後經由生雲解碼器解 (A) 5-bit 128音-SDM電路 = SDM電路如圖六⑷所示,落音_電路之 月=、.·先方塊圖如圖六(b)所示。定義量化器之量化㈣ β ")» — ♦),則〜音-SDM電路的輪幻 ° 咖)H Λ0切⑷+咖)。由圖六⑻, K dq、n — N、,所以 d祆n、 n v :: n、 ,發咖— (4) (n) ~ e(n) - - A^), V/7 = 0,1,.. #} yv/ _ 1 e 糾定義為料·讀電路之量化軸1音-讓 電路的輸出信號為 ^q(n) - -^(«) + e.(/7)5 V« = 0,1,..., 由(4)的z轉換可知 Μ -1 (5) ⑹ .(2) E(2)~E{z)z^' =(l-z-s)E(z) = Hn(z)E(z) 其中 、 态,令ζ =/.2;γ<7 / Λ/, 了 i'f'雜訊滤波器的離 2 #稱為#音-SDM電路的雜訊濾波 7 = 0,1,·.·,A/- I 代入//"(z) 散頻率響應。 '/2< 2sin(^£)e^Z- ,Vq = 0,1,..., Μ ⑺ 其中 L =从/ yv。i 1 ,λ //Λ、 rThe main architecture of the present invention is to convert two-bit data into a complex sub-carrier signal through a nebula encoder, and the complex sub-carrier signals of each # point are serially converted into parallel and then input into a V-fast inverse Fourier transform to be converted into an orthogonal sub-segment. The frequency multiplexed signal is further activated by the five-bit digital quantizer and the five-digit digital/analog converter of the above components, and the five-bit 128-SDM D/A 18 1330467 UWB-OFDM transmitter is constructed in the time domain and the like. The effective frequency is twice, and the five-element m-SDMDM output signal reaches the intersection of the UWB_〇FDM signal, and the UWB-OFDM connection is constructed to reduce the time-domain equivalent frequency by a factor of two. Sqnr can be used to solve the spread spectrum of the orthogonal frequency division multiplexing signal rounds back to the two-bit data. After the acquisition, the solution is solved by the raw cloud decoder (A) 5-bit 128-sound-SDM circuit = SDM circuit is shown in Figure 6 (4), the moon of the falling-sound circuit =, ··· The first block diagram is shown in Figure 6 (b) . Define the quantization of the quantizer (4) β ")» — ♦), then the ~-sound circuit of the wheel illusion ° coffee) H Λ 0 cut (4) + coffee). From Figure 6 (8), K dq, n — N,, so d祆n, nv :: n, , hair coffee — (4) (n) ~ e(n) - - A^), V/7 = 0, 1,.. #} yv/ _ 1 e Correction is defined as the quantization axis of the read circuit. 1 tone - let the output signal of the circuit be ^q(n) - -^(«) + e.(/7)5 V « = 0,1,..., from the z transformation of (4) Μ -1 (5) (6) .(2) E(2)~E{z)z^' =(lzs)E(z) = Hn(z)E(z) where, state, let ζ =/.2;γ<7 / Λ/, the noise of the i'f' noise filter is called ##-SDM circuit 7 = 0,1,···, A/- I Substitute //"(z) Dispersive frequency response. '/2< 2sin(^£)e^Z- , Vq = 0,1,..., Μ (7) where L = from / yv. i 1 , λ //Λ, r

Hn(2L) ⑻ 由⑺可知//„(0)=仏⑷ //"((/V - 1) ’)= 〇,即 "D = 0,v“〇,i”,.,yv 尸汁以 g = 0, I , 〇 r /xr ··· ’ (W — 1) A稱為"音- SDM電 的雜訊遽波器之零點頻率。若义⑼,尤⑴,.,^(从〜 〗)經過从-IFFT輸出的从點〇FDM符元信號,,Hn(2L) (8) From (7), we know that //(0)=仏(4) //"((/V - 1) ')= 〇, ie "D = 0,v“〇,i”,.,yv The corpse juice is g = 0, I , 〇r /xr ··· ' (W - 1) A is called the "sound-sDM electric noise chopper's zero frequency. If (9), especially (1),., ^ (from ~ 〗) after the output from the -IFFT from the point 〇 FDM symbol signal,

…,Χ(^~丨)經過Y音-SDM電路調變,輸出信號 ,、有正或負兩種準位(±〇.5Λ)之NRZ (N〇n return比 zer〇Ms號,所以"音_8胸電路為一位元量化器,可以 將ΛΖ-IFFT輸出值量化為—位元的NRz信號。由(5)可知 D('iq) = X^ + E:(9)yq = - ] (Q\ 將(6)與⑺代入(9)可得%(从卜X(从),V卜〇, 1 〜—1,則从-IFFT輸出值經過vV音-SDM電路量 化為一位元的NRZ信號在零點頻率〇, L,% ,(" 20 1 △的量化雜訊為零,當Ml即卜卜則〜 1330467 ο V 々=:〇 1,然而實作上#音_SDM電路的輸入信號^幻與輸出 的nrz“號a(w)不可能相同。<(")=尤(…與實際情況不 ,符,這是因為仏(从)= Jr(从)是由(4)的2轉換獲得,並 沒有,慮實作上"音-SDM電路之迴路初始值所造成的 零點里化雜訊。在實作上"音_SDM電路輸出信號在零點 頻率會有殘留的量化雜訊,稱為零點量化雜訊。 在貝作上Λ"音-SDM電路的後端響應必須要由"音 SDM電路之迴路後端迴授至迴路前端,但是當w音 _SD】VI電路開機或重置(reset)時(令此時"=〇),迴路後 端尚未有信號<(—Λ〇,一 yV+1),...,尖(―丨)與 Μ ’ <-yv+ 1),…丨)能迴授到前端,所以實作 上W a -SDM電路必須系統開機或重置時對迴路後端信 ]\P),dq(H,…,(一\、與 d(— N) , dd + 〇,..., d(-】)設定初始值。因為開機或重置後"音 -SDM電路之迴路信號<(〇),尖〇),…與#〇),#1), 會隨著輸入信號x(0),x(l),...而改變’ 一般輸入信號 x(〇) ’ X(l) ’ 為未知的隨機變數,所以Λ^音SDM電 路開機或重置時的量化雜訊e(— Ν)= <(—⑼"), e( ^ + 1) = dq{~ N + \) - d(~ N + \) ^ ... > e(~\)= 尖(-丨)-d(-1)與第一筆音SDM電路輸入信號χ(〇), 41),··.,— 1)產生的量化雜訊6(〇), <丨),…, e(A" — I)不會相等,同樣地,量化雜訊<0),<】),…, - 1)與第二筆"音-SDM電路輸入信號乂(^) , + 1) ’ ·.·,x(2tV- 1)產生的量化雜訊e(^),〆"+丨),…, e(2yv — 1)也不會相等,依此累推可知ez(0) = e(0) - e(〜 21 丄 WU407 V)笑 〇, e7(\) = e(\) - e(\ ~ N) _ 一 ...。因此實作7^ -SDM電路量化雜訊⑽)’训,不會為零。若[咳 /W,則在v音-Sdm電路的則固零點頻率〇,1,u , (〜-1)L之量化雜訊&(0)=仏(〇),五私)=五,〇),’, 〗)/〇 = £,·(#- 1),稱為零點量化雜訊, … (10) _)’ A⑴’…’ £,(yv—!)“(〇),e,⑴,, 轉換值,其中e,(〇),e,⑴,, 1)分別為A/音-SDM電路的最後V點輸出的量化雜訊 e(M- N) - e(M-N + 1) > , e(A/_ 〇^7V^--SDMt 路的初始量化雜訊e(-,<__ Y+n 差,即 ”...’十i)之 (Π) (12) ei{n) = e{M-N + n)-e{n-N\ ^n = 〇,...yN_x 將(10)代入(9)可得..., Χ (^~丨) is modulated by the Y-SDM circuit, and the output signal has NRZ with positive or negative (±〇.5Λ) (N〇n return is better than zer〇Ms, so &quot The sound_8 chest circuit is a one-bit quantizer, which can quantize the ΛΖ-IFFT output value into the NRz signal of the bit. From (5), we know that D('iq) = X^ + E: (9) yq = - ] (Q\ Substituting (6) and (7) into (9) can get % (from Bu X (slave), V divination, 1 to -1, then the -IFFT output value is quantized into one by vV-SDM circuit The NRZ signal of the bit is at the zero frequency 〇, L,%, (" 20 1 △ quantization noise is zero, when Ml is Bub ~ 1330467 ο V 々 =: 〇1, but the implementation is #音_ The input signal of the SDM circuit ^ illusion and the output of the nrz "number a (w) can not be the same. <(") = especially (... and the actual situation is not, the character, this is because 仏 (slave) = Jr (from) It is obtained by the (2) conversion of 2, and it is not considered to be a zero-point noise caused by the initial value of the loop of the sound-SDM circuit. In practice, the output signal of the sound_SDM circuit is at zero. The frequency will have residual quantization noise, called zero-point quantization noise. The back-end response of the [Sound-SDM circuit must be fed back to the loop front by the loop back end of the "sound SDM circuit, but when the w-syn_SD] VI circuit is turned on or reset (reset this time) ;=〇), there is no signal at the back end of the loop <(—Λ〇, a yV+1),..., pointed (―丨) and Μ ' <-yv+ 1),...丨) can be returned The front end, so the implementation of the W a -SDM circuit must be turned on or back to the loop back when the system is turned on /\P), dq (H, ..., (a \, and d (- N), dd + 〇,. .., d(-)) sets the initial value. Because the loop signal <(〇), 〇), ... and #〇), #1) of the "sound-SDM circuit after power-on or reset, will follow Input signal x(0), x(l), ... and change 'General input signal x(〇) ' X(l) ' is an unknown random variable, so the quantization of the SDM circuit when it is turned on or reset Noise e(— Ν)= <(—(9)"), e( ^ + 1) = dq{~ N + \) - d(~ N + \) ^ ... > e(~\)= The sharp noise (6), <丨, generated by the sharp (-丨)-d(-1) and the first input SDM circuit input signal χ(〇), 41),··., — 1), ..., e(A" — I) won't Etc. Similarly, quantizing the noise <0), <]),..., -1) and the second stroke "sound-SDM circuit input signal 乂(^), + 1) ' ·.·, x( 2tV-1) The quantized noise e(^), 〆"+丨),..., e(2yv-1) will not be equal. According to this, ez(0) = e(0) - e (~ 21 丄WU407 V) Jokes, e7(\) = e(\) - e(\ ~ N) _ a... Therefore, the implementation of the 7^-SDM circuit quantization noise (10)) training will not be zero. If [cough/W, then the fixed-zero frequency in the v-sdm circuit is 〇, 1, u, (~-1) L quantization noise & (0) = 仏 (〇), five private) = five ,〇),', 〗 〖)/〇= £,·(#- 1), called zero-point quantization noise, ... (10) _)' A(1)'...' £, (yv-!) "(〇), e, (1),, converted value, where e, (〇), e, (1),, 1) are the quantized noise e(M-N) - e(MN + of the last V point of the A/sound-SDM circuit, respectively 1) > , e(A/_ 〇^7V^--SDMt path initial quantization noise e(-, <__ Y+n difference, ie "...' ten i) (Π) (12 Ei{n) = e{MN + n)-e{nN\ ^n = 〇,...yN_x Substituting (10) into (9)

Dq (^) = X{kL) + E^k^Vk = 〇,],._ι 由02)可知實作上料__電路輸出信號在零點頻 率會有殘留的零點量化雜訊,零點量化雜訊的方差合愈 輸入信號的PAPR成正比。 曰。 因為OFDM信號經過w_SDM電路調變為一 NRZ信號,在零點頻率具有較小的量化雜訊,所以 22 0 1330467 不失一般性令輸入ΛΑ音-SDM電路的Μ點OFDM信號為 无(0), 无(1),…,对M-1)為Z(0),叉⑴,…,Z(M-l)之 M-IFFT輸出值,欲傳送的AM固複數子載波信號在ΛΑ音 -SDM電路的7V個零點頻率上,即 X(kL) = X(k),\/k = 0,\,...,N-\ (13) 所以W音-SDM電路量化雜訊功率比SQNR為零點 頻率之ΛΜ固複數子載波信號功率對零點頻率之量化雜 訊方差,即Dq (^) = X{kL) + E^k^Vk = 〇,],._ι From 02) It can be seen that the actual output __ circuit output signal will have residual zero quantization noise at zero frequency, zero quantization The variance of the signal is proportional to the PAPR of the input signal. Hey. Because the OFDM signal is modulated into an NRZ signal by the w_SDM circuit and has less quantization noise at the zero frequency, 22 0 1330467 does not lose the generality, so that the input OFDM signal of the input voice-SDM circuit is none (0). None (1), ..., for M-1) is the M-IFFT output value of Z(0), fork (1), ..., Z(Ml), and the AM complex complex subcarrier signal to be transmitted is in the Arpeggio-SDM circuit. 7V zero frequency, ie X(kL) = X(k), \/k = 0, \,..., N-\ (13) So the W-SDM circuit quantizes the noise power ratio SQNR to zero frequency The quantized variance of the complex subcarrier signal power to the zero frequency, ie

SQNR E[X\k)] Νσ; E[Ef(k)) Νσ: (14) 其中¥與 < 分別為OFDM信號方差與零點量化雜 訊之方差。 一般假設W音-SDM電路的量化雜訊為均勻分佈的 隨機變數而避開量化器非線性以簡化分析非線性系統 的困難度,若要完全避免量化器非線性所造成過載量 化雜訊(過載量化雜訊不能是均勻分佈)則W音-SDM電 路的輸入信號最大值Xmax要小於或等於W音-SDM電路 量化器的輸出最大值0.5A,即xmax < 0.5A,其中A為W 音-SDM電路的量化單位。當xmax S 0.5A,7V音-SDM電 路的量化雜訊e(/7)會均勻分佈在[-0.5A, + 0.5Δ]。令 W音-SDM電路的初始量化雜訊為零,由(11)可知/V音 -SDM電路的零點量化雜訊e/〇) = e(M- W + w)亦會均 23 1330467 勻分佈在卜〇.5Δ,+〇·5Δ]。則e/(岣的方差為 σ 2 1°·5Δ ο 1 A2 W' Ζ办Ί,υ〇.5Δ (15) 將(1 5)代入(1 4)可得 (16) SQNR =丨 2碧,υ〇.5Δ 由(16)可知若要完全避免過载,並有最+ 量化雜訊方差,則△ = 2Xmax,代入(16)可得 、岣勻 SQNR = 3 σSQNR E[X\k)] Νσ; E[Ef(k)) Νσ: (14) where ¥ and < are the variance of the OFDM signal variance and the zero quantization noise, respectively. It is generally assumed that the quantization noise of the W-SDM circuit is a uniformly distributed random variable and avoids the quantizer nonlinearity to simplify the difficulty of analyzing the nonlinear system. To avoid the overload quantization noise caused by the nonlinearity of the quantizer completely (overload) The quantization noise cannot be uniformly distributed.) The input signal maximum value Xmax of the W-SDM circuit is less than or equal to the output maximum value of the W-SDM circuit quantizer 0.5A, that is, xmax < 0.5A, where A is W sound. - The quantization unit of the SDM circuit. When xmax S 0.5A, the quantized noise e(/7) of the 7V tone-SDM circuit is evenly distributed at [-0.5A, + 0.5Δ]. Let the initial quantization noise of the W-SDM circuit be zero. From (11), the zero-point quantization noise of the V-sound-SDM circuit e/〇) = e(M- W + w) will also be 23 1330467 evenly distributed. In Bu Yi. 5Δ, +〇·5Δ]. Then e/(the variance of 岣 is σ 2 1°·5Δ ο 1 A2 W' Ζ Ί, υ〇.5 Δ (15) Substituting (1 5) into (1 4) can be obtained (16) SQNR = 丨 2 Bi , υ〇.5Δ From (16), if you want to avoid overload completely, and have the most + quantized noise variance, then △ = 2Xmax, substituting (16), squeezing SQNR = 3 σ

<ax PAPR (17) 則 其中PAPR=<x/〜2,因為OFDM信號振幅不是常 σ_ϊ < Xmax ’所以P A P R必大於·—,則 〇8) SQNR < 3 = 4.8 dB, for xmax = 0.5Δ 由(1 8)可知當量化單化△ > 2xmax則量化訊雜 SQNR < 4.8dB。並不能滿足UWB-OFDM通訊系统^比 雜比的要求。因此#音-SDM電路配合使用頻域插補f 路與頻域縮減電路,#音-SDM電路才能獲得高於上: 4.8dB的SQNR。將欲傳送的AA個複數子載波信號χ(〇), 24 1330467 ι(ι) ’ ...,x(yv — 1)之間插補i — 1個零’則輸入 之信號可表示為<ax PAPR (17) where PAPR=<x/~2, since the OFDM signal amplitude is not constant σ_ϊ < Xmax ', so PAPR must be greater than ·—, then )8) SQNR < 3 = 4.8 dB, for xmax = 0.5Δ From (1 8), it can be seen that when quantizing the singularity Δ > 2xmax, the quantization signal SQNR < 4.8 dB is quantized. It does not meet the requirements of the UWB-OFDM communication system. Therefore, the #音-SDM circuit uses a frequency domain interpolation f-channel and a frequency domain reduction circuit, and the #音-SDM circuit can obtain an SQNR higher than the above: 4.8 dB. The signal of the input of the AA complex subcarrier signals χ(〇), 24 1330467 ι(ι) ′ ..., x(yv — 1) to be transmitted is interpolated i - 1 zero ’

X{k\\fq 二 Lk 0 ,\/q Φ Lk yk = 〇x...,N-\ (19) 因為在插補動作在M-IFFT之前,所以稱為頻率插 補。由(19)推導可得M-IFFT輸出信號為 x{m) = χ(η + IN) = —x(n)y〇 <n< N-\,〇<l < L-\ (20) 由(20)可知頻域插補的OFDM信號jf(m)振幅會縮小 • 為原來信號x(A)的1 / L倍。所以後級的〜音_SDM 電路量化單位S = 可以縮小為原來量化單位的丨/ z 倍’則W音-SDM電路之量化雜訊方差會減小為原來的】 φ 7炉倍。因此頻域插補L倍之"音-8〇]^4電路之量化訊雜 比SQNR上限會增加為原來的乙2倍,即 SQNR < ^ = ^ (2〇 1〇g]〇 L + 4 S) dB (21)X{k\\fq II Lk 0 , \/q Φ Lk yk = 〇x...,N-\ (19) Because the interpolation action is before M-IFFT, it is called frequency interpolation. The M-IFFT output signal derived from (19) is x{m) = χ(η + IN) = -x(n)y〇<n<N-\,〇<l< L-\ ( 20) From (20), the amplitude of the OFDM signal jf(m) in the frequency domain interpolation is reduced. • It is 1 / L times the original signal x(A). Therefore, the quantized unit S = of the lower-level _SDM circuit can be reduced to 丨/z times of the original quantized unit. Then the quantization noise variance of the W-SDM circuit is reduced to the original φ 7 times. Therefore, the frequency-domain interpolation L times the "sound-8〇]^4 circuit's quantized signal-to-noise ratio SQNR upper limit will increase to the original B 2 times, that is, SQNR < ^ = ^ (2〇1〇g]〇L + 4 S) dB (21)

L L 由(21)可知頻域插補倍率每增加一倍,SqnR上限 可以增加6dB。頻率插補1倍的ofdm信號經過yy音 -SDM電路調變為μ點NRZ信號 田 25 ⑧ 1330467 (22) dq{m) = x{m) + e:(m), Vw = 0,1,..., A/ _ j 由(10)與09)可知(22)之;v音_SDM電路調變的从點 NRZ信號經過M_FFT解調後,經過縮減以吾可得在"個 零點頻率值之子載波信號L L From (21), the upper limit of the SqnR can be increased by 6 dB for each doubling of the frequency domain interpolation magnification. The frequency-interpolated 1 times ofdm signal is modulated by the yy-SDM circuit to become the μ point NRZ signal field 25 8 1330467 (22) dq{m) = x{m) + e:(m), Vw = 0,1, ..., A/ _ j is known by (10) and 09) (22); the v-sound _SDM circuit is modulated from the point NRZ signal after M_FFT demodulation, after reduction, I can get at "zeros Subcarrier signal with frequency value

Dq(kL) = X(kL) + E:(kL) (23) ~ X{k) + E^k), Vk = 0,1,...jVv_j 因為在縮減動作在从FFT之後,所以稱為頻率縮 減。頻域插補/縮減倍率愈大則; ;;比愈高’但是相對地,必須在相同的時間心;^ 的一位元NRZ信號。因此頻域插補/縮減£倍之一位元々 音-S=變電路可以視為超取似倍的—位 建構於時域等效頻率插補/縮減L = 32倍〗28: :SDM調變電路之ό = 5位元數位類比轉換器^ D/A)如圖七所示,五位元咖麵 =包含之五位元量化器為數位的建構於時域等效頻 2補/縮減32倍128音_SDM電路,頻率插補與頻率缩 ^理分別在觀FFT之後與128撕之前進行,如圖 時:二it稱ί建構於時域等效頻率播補與建構於 牿域專效頻率縮減。由(20)可知W =】 信號經過頻域插補之丨28_iFFT# / 複數子載波信號之―轉: =展開’將128點複數子載波信號之128]fft_ (S) 復輸出32次即可等效為頻率插補如。將⑷與^代 26 (24) 1330467 入(22)可得 dg(n + lxm) = ^- + e(n + lxm)-e(n + (l-\)x\2S) ,V0<«<127,0</<31 將式,(《 + />028)之/ = 0,1,…,31相加可得 • d,q («) = 2] ^, (« + / X 128) /-0 ]31 31 = ^Σχ^) + Σ^ + /χ128)-Κ« + (^-1)χ128) (25) /=0 /=0 =x〇7) + e(rt + 31xl28) —e〇-128) " =x(«) + e,. («), VO < « < 127 因為J〆《)為32個NRZ信號相加’所以j ’〆")為〇, ±A,…,±16Δ階層的量化信號。因此建構於時域等效 頻率插補/縮減32倍之128音-SDM調變電路為五位元之Dq(kL) = X(kL) + E:(kL) (23) ~ X{k) + E^k), Vk = 0,1,...jVv_j Because the reduction action is after the FFT, so weigh Reduced for frequency. The larger the frequency domain interpolation/reduction rate is; the higher the ratio is, but relatively, the one-bit NRZ signal must be at the same time; Therefore, the frequency domain interpolation/reduction of one-bit vowel-S=variable circuit can be regarded as super-multiple-like-position constructed in time-domain equivalent frequency interpolation/reduction L = 32 times〗 28: :SDM Modulation circuit ό = 5-bit digital analog converter ^ D / A) As shown in Figure 7, five-bit coffee surface = containing the five-bit quantizer is constructed in the time domain equivalent frequency 2 / Reduce 32 times 128-tone _SDM circuit, frequency interpolation and frequency reduction are performed before the FFT and 128 tear, respectively, as shown in the figure: two it is called 建 constructed in the time domain equivalent frequency broadcast and constructed in 牿Domain-specific frequency reduction. It can be seen from (20) that the W =] signal is subjected to frequency domain interpolation 丨 28_iFFT# / the complex subcarrier signal is rotated: = expanded '128 bits of the 128-point complex subcarrier signal】fft_ (S) can be output 32 times Equivalent to frequency interpolation such as. (4) and ^ generation 26 (24) 1330467 into (22) can get dg(n + lxm) = ^- + e(n + lxm)-e(n + (l-\)x\2S), V0<« <127,0</<31 Add the formula (( + />028) / = 0,1,...,31 to get • d,q («) = 2] ^, (« + / X 128) /-0 ]31 31 = ^Σχ^) + Σ^ + /χ128)-Κ« + (^-1)χ128) (25) /=0 /=0 =x〇7) + e( Rt + 31xl28) —e〇-128) " =x(«) + e,. («), VO < « < 127 because J〆") adds 32 NRZ signals 'so j '〆&quot ;) is a quantized signal of 〇, ±A,..., ±16Δ hierarchy. Therefore, the 128-sound-SDM modulation circuit constructed by interpolating/reducing the time-domain equivalent frequency by 32 times is a five-bit

鲁 量化器。五位元128-SDM D/A與五位元128-SDM A/D $置採用建構於%•域專效頻率插補/縮減乙=25 = 3 2产 之设計’可以完全等效既有頻率插補/縮減處理,不會 隨頻率插補倍率增加而造成快速反傅立葉轉換 (inverse fast Fourier transform, IFFT)與快速傅立葉轉 換(fast Fourier transform,FFT)之長度增加,而達到 ^ 效消除1 28-SDM電路量化雜訊之目的,降低邏輯閘 量與處理時間之效果。 當128_IFFT輸出信號振幅超過128音-SDM電路的 27 1330467 一半量化單位(0.5Δ),則128音-SDM電路會產生過載量 化雜訊,定義128-IFFT輸出信號振幅超過0.5△的部分為 裁截雜訊 (26) 0, for|x(«)| < 0.5Δ < 0.5Δ - x(n), for x(n) > 0.5Δ -0.5Δ - x(n), for x(«) < -0.5Δ 當128音-SDM電路的輸入信號不大於0.5A則量化 雜訊為均勻分佈,當128音-SDM電路的輸入信號不小 於0.5 △則量化雜訊為裁截雜訊加上前面第12 8th的量化 雜訊。即 e(n)= 〜6^(-0.5厶,0.5/\),V|x⑻| 2 0.5Δ eo/, (”)= (17) + _ 128), V|x(«)| 2 0.5Δ (27) 其中 〜"《(— 〇·5△’ 0.5Δ) ’ 代表 e"yv〇)均勻 分佈在[-0.5△’ 0.5A]。當128音-SDM電路的輸入信號 為頻域插補32倍之OFDM信號’則128音-SDM電路零點 量化雜訊為 e,.⑻= < 卜⑻Ν〇.5Δ 1⑻ μ〇·5Δ (28) 由(28)可知採用頻率插補可以降低128音-SDM電 28 ⑧ 1330467 路的均勾量化雜訊,△愈小則量化雜訊 ㉚的條件機率愈小,量化 雜:二里』雜訊 ,,所以一…愈=== :若已知128音-SDM電路輪入信號之機率: 差丨且唯:化最/圭量化單位a使得零點量化雜訊i 取小’ !化訊雜ttSQNR κ為最: 為取匹配】28音侧電路輸入信號之量化單位。因: 〇画信號在…夠大時會趨於常態 ^為 =顯複數子載波信祕IFFT輸二= 數。為零平均值且方差為〜2的高斯隨機變 方差;被ίίΓ對輸入信號x在頻率插補,倍之條件 1212 6L2Lu quantizer. Five-digit 128-SDM D/A and five-bit 128-SDM A/D $ are constructed using %• domain-specific frequency interpolation/reduction B=25 = 3 2 design's can be completely equivalent With frequency interpolation/reduction processing, the length of the fast inverse Fourier transform (IFFT) and the fast Fourier transform (FFT) is not increased as the frequency interpolation magnification increases, and the effect is eliminated. 1 28-SDM circuit quantifies the purpose of noise, reducing the effect of logic gate and processing time. When the amplitude of the 128_IFFT output signal exceeds the 27 1330467 half-quantity unit (0.5 Δ) of the 128-SDM circuit, the 128-SDM circuit will generate overload quantization noise, and the portion defining the 128-IFFT output signal amplitude exceeding 0.5 Δ is the cut. Noise (26) 0, for|x(«)| < 0.5Δ < 0.5Δ - x(n), for x(n) > 0.5Δ -0.5Δ - x(n), for x(« < -0.5Δ When the input signal of the 128-SDM circuit is not more than 0.5A, the quantization noise is evenly distributed. When the input signal of the 128-SDM circuit is not less than 0.5 △, the quantization noise is the clipping noise. The quantization noise of the previous 12th 8th. That is, e(n)= 〜6^(-0.5厶,0.5/\), V|x(8)| 2 0.5Δ eo/, (")= (17) + _ 128), V|x(«)| 2 0.5 Δ (27) where ~" "(- 〇·5△' 0.5Δ) ' represents e"yv〇) evenly distributed in [-0.5△' 0.5A]. When the input signal of the 128-SDM circuit is in the frequency domain Interpolating 32 times of OFDM signal' then 128-sigma-SDM circuit zero-point quantization noise is e,.(8)= < Bu(8)Ν〇.5Δ 1(8) μ〇·5Δ (28) It can be seen from (28) that frequency interpolation can be used to reduce 128-SDM 28 8 1330467 roads are all denominated to quantify noise. The smaller the △ is, the smaller the conditional probability of quantifying noise 30 is. The quantization is complicated: Erli's noise, so one...?=== Know the probability of the 128-sDM-SDM circuit to enter the signal: Difference and only: The most quantized unit a makes the zero-quantization noise i take small '! The dynasty ttSQNR κ is the most: To match the 28-side circuit The quantized unit of the input signal. Because: The 〇 draw signal tends to be normal when it is large enough ^ is = complex complex subcarrier secret IFFT loses two = number. Gaussian random variation of zero mean and variance is ~2; Is interpolated by the input signal x at the frequency of ίίΓ, times the condition 12 12 6L2

2^)Q 2σν (29) 其中2^)Q 2σν (29) where

Qiu)Qiu)

exp (30) 日^⑽可知,使得零點量化雜訊方M為最小之 置化、早位為△,以A為量化單位之建構於時域等效頻率插 補/縮減32倍之128音-SDM電路(五位元之量化哭、旦 128-IFFT輸出信號,可以獲得最大寧尺。-里 (B)五位疋128-SDIVI D/A轉換哭 29 ㊈ 1330467 如圖五所示,既有UWB-OFDM傳接機使用定點運 算之128-IFFT/128-FFT調變/解調,產生OFDM符元信 號,以五位元D/A與A/D轉換器進行傳送/接收 UWB-OFDM信號轉換,會產生過大之量化雜訊。本發 明揭示五位元128-SDM D/A輸出UWB-OFDM信號之 SQNR不會隨著AMFFT長度W變大而減小,並且可獲得 最高SQNR。建構於時域等效頻率插補/縮減£ = 32倍W =128音-SDM電路之五位元數位類比轉換器(办=i〇g2L =5位元128-SDM D/A轉換器)如圖七所示,五位元 128-SDM D/A轉換器包含五位元量化器,為數位的建 構於時域等效頻率插補/縮減32倍128音-SDM電路。本 發明揭示UWB-OFDM發射機之五位元128音-SDM D/A 轉換器為使用建構於時域等效頻率插補/縮減32倍之 128音-SDM電路,將128-IFFT輸出之高精確浮點數值 量化為0, 士 A,…’ ± 16 A階層的量化信號,可以表示 為五位元定點數值’其中λ為最佳量化單位,五位元定 點值經過五位元電壓級解碼器輸出對應的類比電壓, 經過S/Η電路取樣,輸入平滑之低通濾波器輸出 UWB-OFDM信號。128-IFFT輸出的浮點數值經過使用 建構於時域等效頻率插補/縮減32倍之128音-SDM電路 量化為最大SQNR之五位元定點數值的OFDM信號,只 需要額外增加= 3x128x32 = 12288次複數加法運 算,完全不需複數乘法。 如圖四所示,既有UWB-OFDM發射機之128-IFFT 輸出 128點 OFDM信號χ(0),χ(1),…,x(i27),經過 兩倍時間展頻電路輸出展頻兩倍OFDM信號x(〇), 30 (8) 丄: ⑴ _··· X(127) ’ x(〇) ’ χ(1),…,x(127),經過 ^位元D/A轉換$輪出兩倍時間展頻的UWB-OFDM信 建構於兩倍時間展頻電路之五位元128音-SDM電 路1稱為MS 5.bit 128_謝。兩倍時間展頻的 〇FDM^说為連續兩筆相同的UWB-OFDM信號 =、、=成、..工過A WGN通道同步接收後,經過五位元A/D 才、為五位凡定點數值的兩倍時間展頻OFDM信號χ(〇) 心(〇) + X〇) + e,〇) + «ι ’ …’ x(127) + e,.(〇) + 1.7 χ(〇) + e,(0) + ^128,x(l) + e/(l) + «129> , x(i27) W127) + "255 ’ 其中,,e,·⑴,...,e,.(127)分別 為X(〇)’ ,(1)'..’巾27)的量化雜訊,《…丨,, «255分別為UWB-OFDM信號經過AWGN通道後,在不同 的取樣時間〇 ’卜’ 255接收的AWGN雜訊。兩倍 時間解展頻電路輸出的第㈣解展頻信號為兩倍時間 展頻OFDM信號的第所點數值與第所+ 12 均,所以解展頻信號可㈣ 數值之+ y(m) = b^lig^l±5J+b(w + 128) + g,.(m + 128) + ”„,,,·^ (31) 2 = 4/«) + ^m) + ^±S±i28 5 Vm = 〇5 ?127 令σ„2為接收的AWGN雜訊方差,由(28)可知接收的 A WGN雜訊經過解展頻輸出的方差為 、Exp (30) Day ^(10) knows that the zero-point quantization noise side M is the minimum, the early position is △, and the A is the quantization unit constructed in the time domain equivalent frequency interpolation/reduction 32 times the 128-tone - SDM circuit (5-bit quantitative crying, 128-IFFT output signal, you can get the maximum size. - Li (B) five 疋 128-SDIVI D / A conversion cry 29 9 1330467 as shown in Figure 5, both UWB-OFDM transceiver uses 128-IFFT/128-FFT modulation/demodulation of fixed-point operation to generate OFDM symbol signals, and transmits/receives UWB-OFDM signals with 5-bit D/A and A/D converters. The conversion will generate excessive quantization noise. The present invention discloses that the SQNR of the 5-bit 128-SDM D/A output UWB-OFDM signal does not decrease as the AMFFT length W becomes larger, and the highest SQNR can be obtained. Time domain equivalent frequency interpolation/reduction £ = 32 times W = 128 tone - SDM circuit's five-bit digital analog converter (do = i〇g2L = 5-bit 128-SDM D/A converter) as shown in Figure 7. As shown, the five-bit 128-SDM D/A converter includes a five-bit quantizer that is digitally constructed in a time-domain equivalent frequency interpolation/reduction 32-times 128-sound-SDM circuit. The present invention discloses UWB-OFDM. The five-bit 128-sound-SDM D/A converter of the shooter quantifies the high-precision floating-point value of the 128-IFFT output using a 128-sound-SDM circuit constructed with a time-domain equivalent frequency interpolation/reduction of 32 times. The quantized signal of 0,士A,...'± 16 A level can be expressed as a five-bit fixed-point value' where λ is the optimal quantization unit, and the quintile fixed-point value is outputted by the equivalent of the 5-bit voltage-level decoder output. Voltage, sampled by S/Η circuit, input smoothed low-pass filter output UWB-OFDM signal. 128-IFFT output floating point value is constructed by using time domain equivalent frequency interpolation/reduction 32 times 128-tone The SDM circuit quantizes the OFDM signal of the five-bit fixed-point value of the maximum SQNR, and only needs to add an additional = 3x128x32 = 12288 complex addition operations, without complex multiplication at all. As shown in Figure 4, there are 128 UWB-OFDM transmitters. -IFFT outputs 128-point OFDM signals χ(0), χ(1),...,x(i27), after twice the time spread spectrum circuit output spread-spectrum double OFDM signal x(〇), 30 (8) 丄: (1) _··· X(127) ' x(〇) ' χ(1),...,x(127), twice rounded by ^bit D/A The time spread frequency UWB-OFDM signal is constructed in a five-bit 128-sound-SDM circuit 1 of the double-time spread spectrum circuit. It is called MS 5.bit 128_than. The double-time spread spectrum 〇FDM^ is said to be two consecutive strokes. The same UWB-OFDM signal =, , = into, after the A WGN channel is synchronously received, after five bits A/D, it is twice the time of the five fixed-point value spread spectrum OFDM signal 〇 (〇) Heart (〇) + X〇) + e,〇) + «ι ' ...' x(127) + e,.(〇) + 1.7 χ(〇) + e,(0) + ^128,x(l) + e/(l) + «129> , x(i27) W127) + "255 ' where,,e,·(1),...,e,.(127) are X(〇)' , (1 ) '..' towel 27) The quantization noise, "...丨,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The fourth (fourth) despreading signal output of the double-spreading spread spectrum circuit is the first point value of the double-time spread-spectrum OFDM signal and the first +12, so the despreading signal can be (4) the value of + y(m) = b^lig^l±5J+b(w + 128) + g,.(m + 128) + „,,,··^ (31) 2 = 4/«) + ^m) + ^±S±i28 5 Vm = 〇5 ?127 Let σ„2 be the received AWGN noise variance, and (28) know that the variance of the received A WGN noise after the despread output is

E 5il± em + 128 2 ^k2,1+4E 5il± em + 128 2 ^k2,1+4

Vjml -ση+ση 4 ~~2 (32) 1330467 由(32)可知UWB-OFDM信號經過兩倍時間展 解展頻,接收的AWGN雜訊方差會減少為原來的 之一。所以五位元D/A與A/D傳送/接收兩倍時間一刀 解展頻的OFDM信號之訊雜比可表示為 ,、 SNR. •TSP — 0.5σΙ (33) 其中σ?與 < 分別為傳送的〇FDM符元 〇 F D M符元信號經過五位元D / A與A / D的量化^雜二 差。建構於時域等效頻率插補兩倍之五里位 干咖^^稱為咖^侧電路 二 :率域等效頻率插補電路與建構於時域等效 ,員率縮減电路分別取代圖四之uw :咖與,展頻器。根綱可知 域等"⑴’...,χ(127>經過建構於時 4效颈率插補兩倍電路輸出〇 5 〇.冲27)與。·5χ(。),〇5χ⑴,入)邱27/乂’..., =元定點數值的0職符元信號 = = —.as; 率縮減^經㈣構㈣域等效頻 1330467 31 _ . 31 31 <1(«) = ΣΑ(Λ + 128/) =丄艺 x(«) + £e〇 + 128/)-e〇7 + 128(/ —1)) /=〇 64/=0 /=〇 =0.5x(«) + e{n + 31 x 128) - e(n -128) ξ 〇.5x(n) + et (n), V« = 0,1,... ,127 (34) 第二時間展頻符元會等於後32筆符元經過建構於 時域等效頻率縮減32倍之輸出符元 dq nd («) = Σ ί, (« +128/) = ~ Σ χ(«) + ^ e(« +128/) -e{n + \ 28(/ -1)) /=32 〇4/=32 /=32 =0.5x(«) + e(«+ 63χ 128)-e(«-31x128) ξ 0.5χ(«) + e;. {η +128), V« = 0,1,... ,127 (35) 其中今(《)為丨28音-SDM電路輸出的NRZ信號(數值 只可能為 ±〇_5Δ) ’ 由(34)與(35)可知 2-TFi 5-bit dSDM電路輸出之第一時間展頻符元〇·5χ(〇) + e/(0),〇.5x(l) + e,(l),…,〇,5χ(127) + β/(〇)與第二 時間展頻符元〇.5x(0) + 心〇28),〇 5λ:(1) + 心(129),, 0.k(127) + e/(255)皆為 〇 5χ(〇),〇 5χ⑴,,〇 5叩7) 的五位元量化值(數值只可能為〇,± , ;fFl Μ1 128_SDM輪出之第一時間展頻符元盥 弟二間展頻符元並不完全相同(量化雜訊不一樣厂 時間二"Μ棚輸出之第一時間展頻符元與第二 二經=構於時域等效頻率縮減兩倍輸出 、 X( X(127)經過建構於時域等 (§) 33 效頻率插補/縮 代入(34)與(35)可尸倍之128音-SDM電路輸出,將(25) (36) =¥㈣、+ _ = 而) () + e(n + 63x128)-e(„_128),V^ = 〇5l }127 口^ I/»為128音-SDM電路輸出的nrz信號(數值 ;接:的d’由(36)可知五位元128-SDM A/D轉換 :槿於护祕鼙%間展頻符元與第二時間展頻符元經過 狄J /丸:效頻率縮減兩倍(簡稱為2-TFD)輸出解展 128_IFFT輸出浮點*值的OFDM符元信號之 置化值(數值只可能為〇, ±A,±2△,…,士32Δ), 营媒於解析度可以提高—位元,所以 ;日守知等效頻率插補/縮減兩倍之五位元丨28音 SDM D/A與。A/D轉換器可視為六位元128音_§腫d/a 與A/D轉換器之量化解析度。因此本發明揭示既有之 UWB-OFDM傳接機使用五位元⑶音_sdm d/a與a/d 轉換器格配建構於日$域等效頻率插補/縮減兩倍電路,除 了能取代兩倍時間展頻/解展頻的功能,同時五位元丨28 音-SDM D/A與A/D轉換器傳送/接收UWB_〇FDM信號的 SQNR亦能隨位兀增加。本發明揭示之建構於時域等效 頻率插補/縮減乙倍之6位元w音_SDM D/A與A/D轉換Vjml -ση+ση 4 ~~2 (32) 1330467 From (32), it can be seen that the UWB-OFDM signal exhibits the spread spectrum twice, and the received AWGN noise variance is reduced to one of the original ones. Therefore, the signal-to-noise ratio of the five-bit D/A and A/D transmission/reception twice-time spread-spread OFDM signals can be expressed as, SNR. • TSP — 0.5σΙ (33) where σ? and < respectively The 〇FDM symbol 〇FDM symbol signal for transmission is quantized by the five-dimensional D/A and A/D. Constructed in the time domain equivalent frequency interpolation twice the five-mile dry coffee ^^ is called the coffee side circuit 2: the rate domain equivalent frequency interpolation circuit is constructed in the time domain equivalent, the rate reduction circuit replaces the map Four uw: coffee and spreader. The root can know the domain, etc. "(1)’...,χ(127> is constructed at 4 times the effect rate interpolation twice the circuit output 〇 5 〇. rush 27) and. ·5χ(.),〇5χ(1),入)邱27/乂'..., = 0 fixed-point value of the 0-character signal == —.as; rate reduction ^ by (four) structure (four) domain equivalent frequency 1330467 31 _ 31 31 <1(«) = ΣΑ(Λ + 128/) =丄艺x(«) + £e〇+ 128/)-e〇7 + 128(/ -1)) /=〇64/= 0 /=〇=0.5x(«) + e{n + 31 x 128) - e(n -128) ξ 〇.5x(n) + et (n), V« = 0,1,... , 127 (34) The second time spread symbol will be equal to the last 32 symbols. The output symbol dq nd («) = Σ ί (« +128/) = ~ constructed by reducing the time domain equivalent frequency by 32 times. Σ χ(«) + ^ e(« +128/) -e{n + \ 28(/ -1)) /=32 〇4/=32 /=32 =0.5x(«) + e(«+ 63χ 128)-e(«-31x128) ξ 0.5χ(«) + e;. {η +128), V« = 0,1,... ,127 (35) where today (") is 丨28 sound - The NRZ signal output by the SDM circuit (the value can only be ±〇_5Δ)' From (34) and (35), the first time spread symbol of the 2-TFi 5-bit dSDM circuit output 〇·5χ(〇) + e/(0),〇.5x(l) + e,(l),...,〇,5χ(127) + β/(〇) and the second time spread symbol 〇.5x(0) + palpitations 28), 〇5λ: (1) + heart (129),, 0.k(127) + e/(255) are all 〇 5五(〇),〇5χ(1),,〇5叩7) The five-dimensional quantized value (the value can only be 〇,±, ;fFl Μ1 128_SDM rounds out the first time spread symbol The yuan is not exactly the same (quantization noise is not the same as the factory time two " the first time of the shed output frequency and the second two times = the time domain equivalent frequency is reduced by twice the output, X (X (127) ) After construction in the time domain, etc. (§) 33 effect frequency interpolation / subdivision (34) and (35) can be used to 128-tone-SDM circuit output, (25) (36) = ¥ (four), + _ = And)) () + e(n + 63x128)-e(„_128), V^ = 〇5l }127 mouth ^ I/» is the nrz signal output by the 128-sDM-SDM circuit (value; connect: d' by ( 36) It can be seen that the five-bit 128-SDM A/D conversion: 槿 护 护 鼙 鼙 间 展 展 展 与 与 与 与 与 与 与 与 与 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄 狄The output de-emphasis 128_IFFT output floating-point* value of the OFDM symbol signal set value (value can only be 〇, ± A, ± 2 △, ..., ± 32 Δ), the media can be improved in the resolution - bit, Therefore; the Japanese Shouzhi equivalent frequency interpolation / reduction of twice the five-digit 丨 28 sound SDM D/A and. The A/D converter can be viewed as a six-bit 128-tone § swollen d/a and a quantized resolution of the A/D converter. Therefore, the present invention discloses that the UWB-OFDM transceiver uses the five-bit (3) tone _sdm d/a and the a/d converter to construct a circuit with a daily domain equivalent frequency interpolation/reduction twice, in addition to In place of the double-time spread/de-spread function, the SQNR of the 5-bit 丨28-SDM D/A and A/D converter transmitting/receiving UWB_〇FDM signals can also be increased with the bit 兀. The invention discloses a 6-bit w-sound D/A and A/D conversion constructed in time domain equivalent frequency interpolation/reduction B times

益,亦可以應用於採用1倍時間展頻與#個子載波之 UWB-OFDM通訊系統,而獲得办+ 1〇g/位元#音_SDM 1330467 D/A與A/D轉換器之量化解析度。 (C)五位元128-SDMA/D轉換器Benefits can also be applied to UWB-OFDM communication system with 1 time spread spectrum and # subcarriers, and obtain quantitative analysis of +1〇g/bit#音_SDM 1330467 D/A and A/D converter degree. (C) 5-bit 128-SDMA/D converter

既有五位元A/D轉換器,電阻與比較器數量會隨著 A/D里化态的位元解析度呈二的冪次方增加,所以無法 有效減小A/D轉換器電路體積與降低功率消耗。建構於 時域等效頻率插補/縮減z = 32倍128音_8〇]^電路之五 位兀類比數位轉換器0 = l〇g2/; = 5位元128-SDM A/D 轉換器)如圖九所示,五位元128_SDM A/D包含之五位 几里^匕器為類比的建構於時域等效頻率插補/縮減3 2倍 '_SDM電路。如圖九所示,五位元〗28_SDM A/D 诚=态可分為二部分超取樣32 = 25電路(建構於時 頻率插補電路)。2.類比的SDM電路包含一減法 器,、:積分器一位元A/D轉換器與〜位元D/A轉換 縮、成$圖十所不。3·數位累加器(建構於時域等效頻率 通^路)。同#接收的UWB郁腸信鏡經過反混疊低 秒器輸入S/Η電路,電路會保待相同輸出值G 信f# ^端的黯電路每隔^32秒完成輪出一位元NRZ =二11後及累加杰’每隔^秒累力σ器即可輸出〆點办 一出〗-五位元 建構之ΐ位元128侧A/D轉換器包含之 以平補/縮减128音-咖量化電路, dt?的類比sdm電路取代大量電阻與比較 然而二而簡化電路的體積與功率消耗。 呀有的UWB-0FDM接收機使用52 35 1330467 位元A/D,若128-SDM A/D轉換器只使用單一 SDM電路 單元,則五位元A/D轉換器需要超取樣倍率L = 25 =32,使得128-SDM A/D工作時脈會高達32x528MHz = 16.896GHz。為了降低128-SDM電路的工作時脈速度, 本發明揭示五位元128-SDM A/D轉換器可以使用2〃個 SDM電路單元平行處理,超取樣倍率可以降低為25 一 Λ'能夠實現較低工作時脈的128-SDM A/D轉換器電 路。當V = 1,即表示五位元128-SDM A/D轉換器使用 兩個平行處理之SDM電路,如圖十一所示,S/Η電路取 樣值X會保持G = 1/528ΜΗζ = 1.894奈秒’ S/Η電路輸出 取樣率為輸入取樣率的上/2 = 16倍’所以S/Η電路每一 取樣值X經過超取樣16倍會重覆被輸出十六次。超取樣 輸出信號X被分為兩路,其一為X經過五位元128-SDM A/D轉換器動態範圍一半振幅(0.5AL/2 = 8Δ)的限制器 輸出信號xw,當輸入信號振幅超出±8Δ,則限制器會輸 出±8Α;當輸入信號振幅在±8Α之間,則限制器會輸出 會等於輸入,所以 8Δ, for 8Δ < λ: (37) - 8Δ, for x < -8Δ x, for |x| < 8Δ 其二為x與8△振幅的限制器輸出信號之差值〜,則 (S) 36 (38) 1330467 χ ~ 8Δ, for 8Δ < χ ^ =^-^, = jx + 8A,forx<-8A 〇, for \χ\ < 8Δ - 〜與〜分別平行輸入兩組SDM電路與建構於 等效頻率縮減16倍電路輸出〜與〜之四位元量:佶 Q(〇與QQJ。由(37)與(38)可知若x不超過6 ^ 一 128-SDM A/D動態範圍(±助=±16Δ), = • 態範圍為原*的一半(±0.5助=±8Δ)。所以量二= /只需要丨og2(L/2) = & —丨=4位元解析度即可獲得^與 五位元解析度相同的SQNR,因此建構於時域等效頻率 插補倍率(超取樣倍率)降低為原來的一半(24 = 1 6/,、則 兩個平行處理的SDM電路之工作時脈速率要' .一半如528MHZ = 8.相GHz ,每隔 1/(16x528MHz) = 0.1184奈秒完成輸出 信 號輸入後級累加器,累加器每隔1.894奈秒完成一·•欠建 構於時域等效頻率縮減16倍’輸出四位元的量^值 0(尤《)與〇(々)’疋義0(“)-[“/〇.5八]為以的量化值,其中 [v]為取最接近V的整數且比V更接近零。由(37)與(38) 可得 ^ (39)1330467With a five-bit A/D converter, the number of resistors and comparators increases as the bit resolution of the A/D state is increased by two, so the A/D converter circuit volume cannot be effectively reduced. With reduced power consumption. Constructed in the time domain equivalent frequency interpolation / reduction z = 32 times 128 sound _8 〇 ^ ^ circuit five-digit analog digital converter 0 = l 〇 g2 /; = 5-bit 128-SDM A / D converter As shown in Figure 9, the five-bit 128_SDM A/D contains a five-digit array of analog-time equivalents of the time domain equivalent frequency interpolation/reduction of the 32-times '_SDM circuit. As shown in Figure 9, the five-bit 28_SDM A/D Cheng = state can be divided into two parts of the oversampling 32 = 25 circuit (constructed in the time frequency interpolation circuit). 2. The analog SDM circuit includes a subtractor, and: the integrator one-bit A/D converter and the ~bit D/A conversion are reduced to $10. 3. Digital accumulator (constructed in the time domain equivalent frequency pass). The UWB gutoscope received by # is passed through the anti-aliasing low-second input S/Η circuit, and the circuit will keep the same output value G. The f# terminal's 黯 circuit completes one bit NRZ = two every ^32 seconds. After 11 and tired Jiajie 'every ^ seconds of force σ device can output a point to do a 〗 - five-bit construction of the ΐ bit 128 side A / D converter contains to compensate / reduce 128 sound - The coffee quantization circuit, dt? analog sdm circuit replaces a large number of resistors and compares the second while simplifying the circuit's volume and power consumption. Yes, some UWB-0FDM receivers use 52 35 1330467 bit A/D. If the 128-SDM A/D converter uses only a single SDM circuit unit, the 5-bit A/D converter requires an oversampling ratio L = 25 =32, making the 128-SDM A/D working clock up to 32x528MHz = 16.896GHz. In order to reduce the operating clock speed of the 128-SDM circuit, the present invention discloses that the five-bit 128-SDM A/D converter can be processed in parallel using two SDM circuit units, and the oversampling ratio can be reduced to 25 Λ'. 128-SDM A/D converter circuit with low working clock. When V = 1, it means that the five-bit 128-SDM A/D converter uses two parallel processing SDM circuits. As shown in Figure 11, the S/Η circuit sample value X will remain G = 1/528ΜΗζ = 1.894. The output sampling rate of the nanosecond 'S/Η circuit is upper /2 = 16 times of the input sampling rate'. Therefore, each sampling value X of the S/Η circuit is oversampled 16 times and is repeatedly output 16 times. The oversampled output signal X is divided into two paths, one of which is the limiter output signal xw of the X through the five-bit 128-SDM A/D converter dynamic range half amplitude (0.5AL/2 = 8Δ), when the input signal amplitude Exceeding ±8Δ, the limiter will output ±8Α; when the input signal amplitude is between ±8Α, the limiter will output equal to the input, so 8Δ, for 8Δ < λ: (37) - 8Δ, for x < -8Δ x, for |x| < 8Δ The difference between the output signals of the limiter of x and 8 △ amplitude is ~, then (S) 36 (38) 1330467 χ ~ 8Δ, for 8Δ < χ ^ =^ -^, = jx + 8A, forx <-8A 〇, for \χ\ < 8Δ - ~ and ~ respectively input parallel two sets of SDM circuits with a 16-fold circuit output constructed at equivalent frequency reduction ~ and ~ four bits Quantity: 佶Q (〇 and QQJ. From (37) and (38), if x does not exceed 6 ^ a 128-SDM A/D dynamic range (± help = ±16Δ), = • the state range is half of the original * (±0.5 help = ±8Δ). So the quantity two = / only need 丨 og2 (L / 2) = & - 丨 = 4 bit resolution to obtain the same SQNR with the five-bit resolution, so construct Time domain equivalent frequency interpolation magnification (oversampling ratio) Reduce to half of the original (24 = 1 6 /, then the operating clock rate of two parallel processed SDM circuits should be '. Half as 528MHZ = 8. Phase GHz, every 1/(16x528MHz) = 0.1184 nanoseconds The output signal is input to the post-stage accumulator, and the accumulator is completed every 1.894 nanoseconds. • The under-constructed time-domain equivalent frequency is reduced by 16 times. The output four-bit quantity ^ value 0 (especially ") and 〇 (々)'疋 0 (") - [" / 〇. 5 八] is the quantized value, where [v] is the nearest integer to V and closer to zero than V. From (37) and (38) can be obtained ^ (39) 1330467

QM + QM Q(SA) + Q{x - 8Δ), for 8Δ < x —^(8Δ) + + 8Δ), for x < —8Δ Q(x) + 0, for |jc| < 8Δ Q(x), for 8Δ < x 16 + Q(x) -16, for 8Δ < 16 + Q(x) +16, for x < -8Δ = ^ Q(x)·, for x < -8Δ = Q(x) Q(x), for x| < 8Δ Q(x), for \x\ < 8Δ 由(39)可知Q(x„)與Q(xJ之和會等於S/H電路取樣信 號χ之五位元量化值Q(x)。原本需要兩個累加器分別完成 兩組SDM電路輸出信號的建構於時域等效頻率縮減,然 後將兩個累加器輸出的量化值相加。若改為將兩組S DM 電路輸出信號先相加,則只需要一個累加器即可完成建 構於時域等效頻率縮減,如圖十一所示。當V = 2,即 表示五位元128-SDM A/D轉換器使用四個平行處理之 SDM電路,如圖十二所示,S/Η電路取樣值jc會保持1.894 奈秒,S/Η電路輸出取樣率為輸入取樣率的L/4 = 8倍, 所以S/Η電路每一取樣值X經過超取樣八倍會重覆被輸 出八次。超取樣輸出信號X被分為兩路,其一為:c經過五 位元/V-SDM A/D轉換器動態範圍之四分之三振幅 (0.5ALx3/4= 12Δ)的限制器輸出信號,所以 12Δ, for 12Δ < x χί( = < -12Δ,forx < -12Δ (40) x, for |x| S 12Δ 其二為與1 2 A振幅的限制器輸出信號之差值 心,則 38 1330467 (41) WX-JC": Χ-12Δ, forl2A<x χ + 12Δ,ί〇Γχ<-12Δ 0, for |χ|<12Δ 由(40)可知若x不超過五位元128-SDM A/D轉換器 動態範圍(±从/2 = ±1 6Δ),則X, = 的動態範圍為原來 的四分之一(±〇.5ΔΖ74 = ±4Δ),所以量化X丨只需要 l〇g2(^/4) = 6 - 2 = 3位元解析度即可獲得與五位元解 析度相同的SQNR。將12A振幅的限制器輸出信號;^繼 續分為兩路,其一為經過五位元128-SDM A/D轉換器 動態範圍一半振幅(〇.5AIx 1/2 = 8Δ)的限制器輸出信 號,由(40)可得與X之關係為 8Δ, for 8Δ < xu x'u - < - 8Δ, for xu < -8Δ 8Δ, for 8Δ < x =< -8Δ, for x < -8Δ (42) xu, for |x;/1 < 8Δ x, for |x| < 8Δ • 其二為:^與8△振幅的限制器輸出信號之差值 X、,將(40)與(42)相減可得X、與X之關係為 4Δ, for 12Δ < X -4Δ, for X < -12Δ χΊ — x'd = xu ~xu =' χ ~~ 8Δ, for 8Δ < x < 12Δ (43 ) x + 8Δ, for - 12Δ < x < -8Δ 0, for |x| < 8Δ 由(43)可知λ:2 = 的動態範圍為原來的四分之一 39 1330467 (±0·5ΔΙ/4 = ±4Δ),所以量化jc2只三位元解析度即可獲得 與五位元解析度相同的SQNR。將8△振幅的限制器輸出 信號;cV繼續分為兩路,其一為xV經過五位元】28-SDM A/D動態範圍四分之一振幅(0.5ΔΙχ1/4 = 4Δ)的限制器 輸出信號X4,由(42)可得x4與X之關係為 4Δ, for 4Δ < x 4Δ, for 4Δ < x X4 4Δ, for x'u < -4Δ = < — 4Δ, for x < -4Δ (44) <,f〇r x, for |x| 乞 4Δ 其二為X、與4A振幅的限制器輸出信號x4之差值 x3,將(42)與(44)相減可得x3與X之關係為 x3 = Xu ~ X4 —< 4Δ, for 8Δ < x -4Δ, for x < -8Δ x - 4Δ, for 4Δ < x < 8Δ x + 4Δ, for - 8Δ < jc < -4Δ (45) 0, for |x| < 4ΔQM + QM Q(SA) + Q{x - 8Δ), for 8Δ < x -^(8Δ) + + 8Δ), for x < —8Δ Q(x) + 0, for |jc| < 8Δ Q(x), for 8Δ < x 16 + Q(x) -16, for 8Δ < 16 + Q(x) +16, for x < -8Δ = ^ Q(x)·, for x < -8Δ = Q(x) Q(x), for x| < 8Δ Q(x), for \x\ < 8Δ From (39), we know that Q(x„) and Q(xJ will equal S/ The five-bit quantized value Q(x) of the H-circuit sampling signal 。. Originally, two accumulators are required to complete the two-stage SDM circuit output signal construction in the time-domain equivalent frequency reduction, and then the quantized values of the two accumulators are output. Adding. If the two sets of S DM circuit output signals are added first, only one accumulator is needed to complete the time domain equivalent frequency reduction, as shown in Figure 11. When V = 2, it means The five-bit 128-SDM A/D converter uses four parallel-processed SDM circuits. As shown in Figure 12, the S/Η circuit sample value jc will remain at 1.894 nanoseconds, and the S/Η circuit output sample rate is input sampled. The rate of L / 4 = 8 times, so each sample value X of the S / Η circuit will be repeated eight times after oversampling eight times. The oversampled output signal X is divided Two ways, one of which is: c passes through the limiter output signal of the three-quarter amplitude (0.5ALx3/4=12Δ) of the dynamic range of the five-bit/V-SDM A/D converter, so 12Δ, for 12Δ < x χί( = < -12Δ,forx < -12Δ (40) x, for |x| S 12Δ The second difference is the difference between the output signal of the limiter and the amplitude of 1 2 A, then 38 1330467 (41) WX -JC": Χ-12Δ, forl2A<x χ + 12Δ, 〇Γχ〇Γχ<-12Δ 0, for |χ|<12Δ From (40), if x does not exceed five-bit 128-SDM A/D converter The dynamic range (± from /2 = ±1 6Δ), then the dynamic range of X, = is one quarter of the original (±〇.5ΔΖ74 = ±4Δ), so quantifying X丨 requires only l〇g2(^/4) ) = 6 - 2 = 3 bit resolution to obtain the same SQNR as the five-bit resolution. The 12A amplitude limiter output signal; ^ continues into two paths, one of which is a five-bit 128-SDM A/D converter dynamic range half amplitude (〇.5AIx 1/2 = 8Δ) limiter output signal, the relationship between (40) and X is 8Δ, for 8Δ < xu x'u - < - 8Δ, for xu < -8Δ 8Δ, for 8Δ < x =< -8Δ, for x < -8Δ (42) xu, for |x;/1 < 8Δ x, for |x| < 8Δ • The second is: the difference X between the output signal of the limiter and the amplitude of the 8 △ amplitude, which is obtained by subtracting (40) from (42) The relationship between X and X is 4Δ, for 12Δ < X -4Δ, for X < -12Δ χΊ — x'd = xu ~xu =' χ ~~ 8Δ, for 8Δ < x < 12Δ (43 ) x + 8Δ, for - 12Δ < x < -8Δ 0, for |x| < 8Δ From (43), the dynamic range of λ:2 = is the original quarter 39 1330467 (±0·5ΔΙ/ 4 = ±4Δ), so quantizing jc2 with only three-bit resolution gives the same SQNR as the five-bit resolution. The 8 Δ amplitude limiter output signal; cV continues to be divided into two paths, one of which is a limiter of xV through five bits] 28-SDM A/D dynamic range quarter amplitude (0.5 ΔΙχ 1/4 = 4 Δ) Output signal X4, from (42), the relationship between x4 and X is 4Δ, for 4Δ < x 4Δ, for 4Δ < x X4 4Δ, for x'u < -4Δ = < — 4Δ, for x &lt ; -4Δ (44) <,f〇rx, for |x| 乞4Δ The second is the difference between X and the limiter output signal x4 of the 4A amplitude x3, which is obtained by subtracting (42) from (44) The relationship between x3 and X is x3 = Xu ~ X4 - < 4Δ, for 8Δ < x -4Δ, for x < -8Δ x - 4Δ, for 4Δ < x < 8Δ x + 4Δ, for - 8Δ <; jc < -4Δ (45) 0, for |x| < 4Δ

由(45)與(44)可知x3與x4的動態範圍為原來的的四 分之一(±0.5AL/4 .== ±4A),所以量化x3與x4只需要三位 元解析度即可獲得與五位元解析度相同的SQNR。因此 建構於時域等效頻率插補倍率(超取樣倍率)降低為原 來的四分之一(23 = 8),則四個平行處理的SDM電路之 工作時脈速率只要原來的四分之一 8x528MHz = 4.224GHz,每隔仏 = 1/(8χ528ΜΗζ) = 0.237奈秒完 成輸出一位元NRZ信號輸入後級累加器,累加器每隔 1330467 1.894奈秒完成一次建構於時域等效頻率縮減8倍,輪出 三位元的量化值QO丨)、Q(x2)、Q(x3)與q(X4)。由(38) (43)、(45)與(44)可得 Q{X\ ) + Q(X2 ) Qix3 ) Q(X4 ) Q(x-\ 2Δ) + ρ(4Δ) + ^(4Δ) + ρ(4Δ), for 12Δ < χ Q(x +12Δ) + Q(-4A) + 0(-4Δ) + Q(-4A), for x s ^ 12Δ ^(0) + Q(x - 8Δ) + Q(4A) + Q(4A), for 8Δ < jc < 12Δ =< 0⑼ + - 8Δ) + 0(4Δ) + 0(4Δ), for -12Δ S x s _8Δ = g(x) (4 7 ) Q(〇) + Q(^)+ Q(x ~ 4Δ) + Q(4A), for 4Δ < x < 8Δ Q(〇) + 0(〇) + Q(x + 4Δ) + ^(4Δ), for - 8Δ < x < ^4Δ Q(〇) + Q(〇) + 0(0) + Q(x\ for H ^ 4Δ 原本需要四個累加器分別完成四組sdm電路輪出 信號的建構於時域等效頻率縮減’然後將四個累加p輸 出的量化值相加。若改為將四組SDM電路輸出信號先= 加,則只需要一個累加器即可完成建構於時域等效頻率 縮減,如圖十二所示。五位元128-SDM A/D轉換器最多 可以擴展到使用三十二個平行處理之SDM電路而且不 再需要進行超取樣因而可以保持528 MHz的取樣率,如 圖十三所示。 表一為528MHz取樣率-五位元A/D轉換器使用二 組與四組SDM電路單元平行處理之工作時脈頻率。如 表一所示’ 128-SDM A/D轉換器使用二組與四組SDm 電路單元平行處理架構,1 28-SDM電路的工作時脈分 別可以降低為原來的二分之一與四分之一。因此平行 處理架構的dSDM A/D轉換器可以依電路製裎的方 1330467 • 式選擇合適的超取樣倍率’藉著提高 電路的工作速度 減少電路體積,在電路工作迷度與體積之間取得最佳 取捨,進而降低A/D轉換器電路體積與功率消耗。 (D)模擬結果 表二為UWB-OFDM傳接機使用—至九位元 128-SDM D/A與A/D轉換器傳送/接收QpSK、16qamIt can be seen from (45) and (44) that the dynamic range of x3 and x4 is one quarter of the original (±0.5AL/4 .== ±4A), so quantization x3 and x4 only need three-dimensional resolution. Obtain the same SQNR as the five-bit resolution. Therefore, the time-domain equivalent frequency interpolation magnification (super-sampling magnification) is reduced by a factor of four (23 = 8), and the working clock rate of the four parallel-processed SDM circuits is only one quarter of the original one. 8x528MHz = 4.224GHz, every 仏 = 1/(8χ528ΜΗζ) = 0.237 nanoseconds to complete the output one-bit NRZ signal input after the stage accumulator, the accumulator is completed every 1330467 1.894 nanoseconds to construct the time domain equivalent frequency reduction 8 Times, the three-dimensional quantized values QO丨), Q(x2), Q(x3), and q(X4) are rotated. From (38) (43), (45) and (44), Q{X\ ) + Q(X2 ) Qix3 ) Q(X4 ) Q(x-\ 2Δ) + ρ(4Δ) + ^(4Δ) + ρ(4Δ), for 12Δ < χ Q(x +12Δ) + Q(-4A) + 0(-4Δ) + Q(-4A), for xs ^ 12Δ ^(0) + Q(x - 8Δ + Q(4A) + Q(4A), for 8Δ < jc < 12Δ = < 0(9) + - 8Δ) + 0(4Δ) + 0(4Δ), for -12Δ S xs _8Δ = g(x) (4 7 ) Q(〇) + Q(^)+ Q(x ~ 4Δ) + Q(4A), for 4Δ < x < 8Δ Q(〇) + 0(〇) + Q(x + 4Δ) + ^(4Δ), for - 8Δ < x < ^4Δ Q(〇) + Q(〇) + 0(0) + Q(x\ for H ^ 4Δ Originally required four accumulators to complete four sets of sdm The circuit rotation signal is constructed in the time domain equivalent frequency reduction' and then the quantized values of the four accumulated p outputs are added. If the output signals of the four groups of SDM circuits are first = added, only one accumulator is needed to complete Constructed in the time domain equivalent frequency reduction, as shown in Figure 12. The five-bit 128-SDM A/D converter can be extended to use SDM circuits with thirty-two parallel processing and no longer need to be oversampled. Maintain a sampling rate of 528 MHz, as shown in Figure 13. Table 1 shows the sampling at 528 MHz. - The five-bit A/D converter uses two working clock frequencies in parallel with four sets of SDM circuit units. As shown in Table 1, '128-SDM A/D converter uses two groups and four sets of SDm circuit units in parallel. Processing architecture, the working clock of the 1 28-SDM circuit can be reduced to one-half and one-quarter respectively. Therefore, the dSDM A/D converter of the parallel processing architecture can be selected according to the circuit recipe 1330467. Appropriate oversampling rate 'by reducing the circuit speed by increasing the circuit's working speed, the best choice between circuit work and volume, and thus reduce the A/D converter circuit volume and power consumption. (D) Simulation results table The second is used for UWB-OFDM transceivers - to nine-bit 128-SDM D/A and A/D converters to transmit/receive QpSK, 16qam

與64-QAM UWB-OFDM信號之最佳量化單位,其中最 φ 佳量化單位A為將QpSK、16-QAM與64-QAM UWB-OFDM之信號方差0.0078、0.039、0.1641與位元 解析度6 = log2L = 0 ’ 1’ ..·,9代入(29),然後計算 產生使得零點量化雜訊方差 < 為最小之量化單位A。圖 十四為比較UWB-OFDM傳接機使用一至九位元 USDM D/A與A/D轉換器傳送/接收qpsk UWB-OFDM信號,對不同量化單位0.7 A, 〇.8入, 0.9A, A, 1.1A’ 1.2λ, 1.3 Α 之 SQNR。圖中一至 九位元D/A與A/D之SQNR理論上限(Upper Bound)為根 鲁 據(21)計算之結果。由圖十四可知,使用最佳量化單位 A之一至九位元128-SDM D/A轉換器輪出QpSK UWB-OFDM信號之SQNR為最大。圖十五為模擬 UWB_OFDM傳接機根據表二,使用最佳量化單位之不 同位元128-SDM D/A與A/D轉換器分別傳送/接收】00 組 QPSK、16-QAM 與 64-QAM UWB-OFDM 信號之 SQNR。圖十五顯示128-SDM D/A與A/D轉換器每增加 一位元解析度,則128-SDM D/A與A/D轉換器傳送/接 收UWB-OFDM信號之SQNR約提高5dB左右,而且最佳 42 1330467 量化單位之不同位元128-SDM D/A與A/D轉換器傳送/ 接收 QPSK、16-QAM與 64-QAM UWB-OFDM信號之 SQNR皆相同,而與調變方式無關。The best quantization unit with the 64-QAM UWB-OFDM signal, where the most φ good quantization unit A is the signal variance of QpSK, 16-QAM and 64-QAM UWB-OFDM by 0.0078, 0.039, 0.1641 and bit resolution 6 = log2L = 0 '1' ..·, 9 is substituted into (29), and then the quantization unit A is generated such that the zero-quantization noise variance is minimized. Figure 14 is a comparison of UWB-OFDM transceivers using one to nine bit USDM D/A and A/D converter to transmit/receive qpsk UWB-OFDM signals, for different quantization units 0.7 A, 〇.8 into, 0.9A, A, 1.1A' 1.2λ, 1.3 Α SQNR. The upper limit of the SQNR of the one-to-ninth D/A and A/D in the figure is the result of the calculation according to (21). As can be seen from Fig. 14, the SQNR of the QpSK UWB-OFDM signal is maximized using one of the best quantization unit A to the nine-bit 128-SDM D/A converter. Figure 15 shows the analog UWB_OFDM transmission machine according to Table 2, using the best quantization unit of different bits 128-SDM D/A and A/D converter respectively transmit/receive] 00 groups QPSK, 16-QAM and 64-QAM SQNR for UWB-OFDM signals. Figure 15 shows that for each bit resolution of the 128-SDM D/A and A/D converter, the SQNR of the 128-SDM D/A and A/D converter transmitting/receiving UWB-OFDM signals is increased by about 5 dB. And the optimal 42 1330467 quantization unit different bits 128-SDM D/A and A/D converter transmit / receive QPSK, 16-QAM and 64-QAM UWB-OFDM signal SQNR are the same, and modulation mode Nothing.

UWB-OFDM傳接機在時間同步的AWGN通道之位 元錯誤率(BER)由SNR與SQNR決定,提高傳接 UWB-OFDM信號的SNR只能降低AWGN雜訊的影響,並 不能改善UWB-OFDM傳接機的SQNR。圖十六為分別模 擬100組QPSK、16-QAM與64_QAM調變之128點複數子 載波信號,經過浮點數值運算之128-IFFT處理,其輸出 浮點數值的OFDM符元信號,分別經過四位元128-SDM D/A、五位元128-SDM D/A轉換器與理想D/A轉換器(無 量化雜訊)’輸出之類比U WB-OFDM符元信號傳送到 AWGN通道’在時間同步的條件下接收UWB-OFDM信 號’再分別經過四位元1 28-SDM A/D、五位元丨28-SDM A/D轉換器與理想A/D轉換器轉換為四位元、五位元定 點數值與浮點數值的數位OFDM符元信號,輸入1 28-FFT 解調為128點複數子載波信號,經過最大似然法則之星 雲解碼’產生二位元資料之位元錯誤率(BEr)。由圖十 六可知’本發明揭示使用浮點運算之】28-iFFT輸出 QPSK OFDM信號經過四位元或五位元128-SDM D/A與 A/D轉換,傳送/接收qpSk UWB-OFDM信號之BER已可 趨近使用理想的D/A與A/D傳送/接收QPSK UWB-OFDM 信號之BER。因為UWB-OFDM傳接機使用四位元與五位 元128-SDM D/A與A/D轉換’當星雲調變信號之間的最 小編碼距離固定時,則傳送/接收的UWB-OFDM信號的 量化雜訊方差會隨著調變階數而變大,所以隨著調變階 43 1330467 數變高,四位元與五位元128-SDM D/A與A/D轉換器之 BER相對於理想的D/A與A/D轉換器之BER會愈差。四位The bit error rate (BER) of the UWB-OFDM transceiver in the time-synchronized AWGN channel is determined by SNR and SQNR. Increasing the SNR of the transmitted UWB-OFDM signal can only reduce the influence of AWGN noise and cannot improve UWB-OFDM. SQNR of the transfer machine. Figure 16 shows the 128-point complex subcarrier signals of 100 sets of QPSK, 16-QAM and 64_QAM modulated respectively. After 128-IFFT processing of floating-point numerical operations, the OFDM symbol signals of floating-point values are output. The U WB-OFDM symbol signal is transmitted to the AWGN channel through a four-bit 128-SDM D/A, five-bit 128-SDM D/A converter and an ideal D/A converter (no quantization noise)' output. 'Receive UWB-OFDM signal under time synchronization' and convert to four bits by four-bit 1 28-SDM A/D, five-bit 丨28-SDM A/D converter and ideal A/D converter Meta- and quintuple fixed-point values and floating-point numeric digital OFDM symbol signals, input 1 28-FFT demodulated into 128-point complex sub-carrier signals, and the maximum likelihood law of the nebula decoding 'generates the position of the two-bit data Meta error rate (BEr). It can be seen from FIG. 16 that the present invention discloses a 28-iFFT output QPSK OFDM signal using a floating point operation, and transmits/receives a qpSk UWB-OFDM signal through a four-bit or five-bit 128-SDM D/A and A/D conversion. The BER is already approaching the BER of the ideal D/A and A/D transmit/receive QPSK UWB-OFDM signals. Because the UWB-OFDM transceiver uses four-bit and five-bit 128-SDM D/A and A/D conversion' when the minimum coding distance between the nebula modulated signals is fixed, then the transmitted/received UWB-OFDM signal The quantization noise variance will increase with the modulation order, so as the modulation order 43 1330467 becomes higher, the BER of the four-bit and five-bit 128-SDM D/A and the A/D converter The worse the BER of the ideal D/A and A/D converters. Four

元128-SDM D/A與A/D轉換器傳送/接收1〇〇組16-QAM UWB-OFDM信號之BER在SNR超過23dB可以降到零,五 位元128-SDM D/A與A/D轉換器傳送/接收1〇〇組 64-QAM UWB-OFDM信號之BER在SNR超過30dB可以 降到萬分之一(10 —4)。因此UWB-OFDM傳接機在AWGN 通道使用本發明揭示五位元128-SDM D/A與A/D轉換器 傳送/接收 16-QAM與 64-QAM UWB-OFDM 信號之 SQNR 已足夠滿足UWB通訊系統對BER之要求。 如圖十七所示,UWB-OFDM傳接機使用本發明揭 示之建構於時域等效頻率插補兩倍之五位元 128-SDM(簡稱為 2-TFI 5-bit 128-SDM) D/A 轉換,產生 兩倍時間展頻之64-QAM UWB-OFDM信號的第一時間 展頻符元與第二時間展頻符元(分別簡稱為1 st與2nd TS-Symbol),其取樣振幅皆為128-IFFT輸出浮點數值 的64-QAM OFDM符元信號之五位元量化值(數值只可 能為0,士A,…,±16A)。但是2-TFI 5-bit 128-SDM D/A 轉換器產生之1 st與2^ TS-Symbol並不會完全相同,接 收的lst與〗“ TS-Symbol經過五位元128-SDM A/D轉 換器輸出的解展頻符元,即為128-IFFT輸出浮點數值 的64-QAM OFDM符元信號之六位元量化值(數值只可 能為 0,±〇.5A,土Α,±1.5Δ...,±16A),lst TS-Symbol 與2nd TS-Symbol之平均值(解展頻)定義為2-TFD 5-bit 128-SDM A/D經過時間等效頻率縮減產生之OFDM信 號。所以時域等效頻率插補兩倍所產生的兩倍時間展 44 1330467Element 128-SDM D/A and A/D converter transmit/receive 1〇〇 group 16-QAM UWB-OFDM signal BER can be reduced to zero at SNR over 23dB, five-bit 128-SDM D/A and A/ D converter transmission/reception 1 〇〇 group 64-QAM UWB-OFDM signal BER can be reduced to one ten thousandth (10 - 4) when the SNR exceeds 30dB. Therefore, the UWB-OFDM transceiver uses the present invention to disclose the SQNR of the 5-bit 128-SDM D/A and A/D converter transmitting/receiving 16-QAM and 64-QAM UWB-OFDM signals in the AWGN channel. System requirements for BER. As shown in FIG. 17, the UWB-OFDM transceiver uses the five-bit 128-SDM (referred to as 2-TFI 5-bit 128-SDM) D constructed by the present invention to be constructed in time domain equivalent frequency interpolation. /A conversion, generating the first time spread symbol and the second time spread symbol (referred to as 1 st and 2nd TS-Symbol) of the 64-QAM UWB-OFDM signal of twice the time spread spectrum, and the sampling amplitude thereof The five-bit quantized value of the 64-QAM OFDM symbol signal of the 128-IFFT output floating-point value (the value can only be 0, A, ..., ±16A). However, the 1st and 2^ TS-Symbol generated by the 2-TFI 5-bit 128-SDM D/A converter are not exactly the same, and the received lst and 〗 〖 TS-Symbol goes through the five-bit 128-SDM A/D The despread symbol output by the converter is the six-bit quantized value of the 64-QAM OFDM symbol signal of the 128-IFFT output floating-point value (the value can only be 0, ±〇.5A, bandit, ± 1.5Δ...,±16A), lst TS-Symbol and 2nd TS-Symbol average (despreading frequency) are defined as 2-TFD 5-bit 128-SDM A/D OFDM generated by time equivalent frequency reduction Signal. So the time domain equivalent frequency interpolation doubles the double time generated by the exhibition 44 1330467

頻的一筆五位元OFDM信號經過時域等效頻率縮減兩 倍平均產生增益’使得建構於時域等效頻率插補/縮減 兩倍之五位元128-SDM D/A與A/D轉換器之SQNR與六 位元128-SDM D/A與A/D轉換器相同。模擬結果驗證採 用時域等效頻率插補兩倍之五位元128-SDM D/A轉換 器產生的兩倍時間展頻的二筆OFDM信號lst與2nd TS-Symbol之動態可能量化數值介於±16A之間而量化 單位為△’而這二筆OFDM信號經過五位元】28-SDM A/D轉換與時域等效頻率縮減兩倍解展頻輸出的 OFDM信號deTS-Symbol之動態可能量化數值介於 ±16△之間而量化單位為〇.5△’相當於提高了一位元解 析度。由圖十五可知五位元與六位元128-SDM D/A與 A/D轉換器之SQNR分別約為25dB與30dB,因此本發明 揭示既有之UWB-OFDM傳接機使用五位元128-SDM D/A與A/D轉換器搭配建構於時域等效頻率插補/縮減 兩倍電路,除了能取代兩倍時間展頻/解展頻的功能, 同時五位元1 28-SDM D/A與A/D轉換器傳送/接收 U WB-OFDM信號的SQNR能增加5dB。同樣的方法推廣 後’本發明揭示之建構於時域等效頻率插補/縮減L倍 之6位元W-SDM D/A與A/D轉換器亦可以應用於採用乙 倍時間展頻與W個子載波之OFDM通訊系統,而產生办+ Iog2L位元W-SDM D/A與A/D轉換器之SQNR。 圖十八分別為模擬UWB-OFDM發射機產生1 〇〇 組QPSK、16-QAM與64-QAM調變之128點複數子載波 信號經過浮點數值運算之128-IFFT輸出浮點數值的 OFDM符元信號,分別模擬三種不同D/A與A/D架構: 45 1330467 (a).使用理想的D/A輸出UWB-OFDM信號傳送到 AWGN通道,在時間同步的條件下接收UWB-OFDM信 號,輸入理想的A/D轉換為浮點數值的OFDM符元信號 輸入1 28-FFT解調為128點複數子載波信號經過最大似 然法則之星雲解碼回二位元資料。(b).重覆輸入五位 元128-SDM D/A二次,輸出兩倍時間展頻的 UWB-OFDM信號傳送到AWGN通道,在時間同步的條 件下接收兩倍時間展頻的UWB-OFDM信號,輪入五位 元128-SDM A/D轉換為二筆五位元定點數值的〇Fdm 符元信號,將時間展頻兩倍的二筆五位元OFDM信號相 加平均後’輸入128-FFT解調為128點複數子載波信號 經過最大似然法則之星雲解碼回二位元資料。(c).時域 等效頻率插補兩倍與五位元128-SDM D/A轉換器產生 兩倍時間展頻的UWB-OFDM信號傳送到AWGN通道, 在時間同步的條件下接收兩倍時間展頻的UWB-OFDM 信號’輸入五位元128-SDM A/D轉換為二筆五位元定 點數值的OFDM符元信號’經過建構於時域等效頻率縮 減兩倍(兩倍時間展頻的二筆五位元OFDM信號相加) 可得六位元OFDM信號,輸入128-FFT解調為128點複數 子載波信號,經過最大似然法則之星雲解碼,產生二 位元資料。The frequency of a five-bit OFDM signal is reduced by twice the average of the time-domain equivalent frequency to generate a gain' such that the five-bit 128-SDM D/A and A/D conversion are constructed by interpolating/reducing twice the time domain equivalent frequency. The SQNR is the same as the six-bit 128-SDM D/A and A/D converter. The simulation results verify that the dynamic quantized value of the two-digit OFDM signal lst and 2nd TS-Symbol generated by the double-time spread-time two-bit 128-SDM D/A converter using the time-domain equivalent frequency interpolation is between Between ±16A and the quantization unit is △' and the two OFDM signals pass through five bits] 28-SDM A/D conversion and time domain equivalent frequency reduction twice the development of the deTS-Symbol of the OFDM signal The quantized value is between ±16 Δ and the quantization unit is 〇.5 Δ', which is equivalent to an increase in one-dimensional resolution. It can be seen from FIG. 15 that the SQNR of the five-bit and six-bit 128-SDM D/A and the A/D converter are about 25 dB and 30 dB, respectively. Therefore, the present invention discloses that the UWB-OFDM transceiver uses five bits. 128-SDM D/A and A/D converter are built in time domain equivalent frequency interpolation/reduction double circuit, except that it can replace the double-time spread/de-spread function, and five bits 1 28- The SQNR of the SDM D/A and A/D converter transmitting/receiving U WB-OFDM signals can be increased by 5 dB. After the same method is promoted, the 6-bit W-SDM D/A and A/D converters constructed in the time domain equivalent frequency interpolation/reduction L times can also be applied to the B-times spread spectrum and The W subcarrier OFDM communication system generates the SQNR of the I_2L bit W-SDM D/A and the A/D converter. Figure 18 shows the 128-IFFT output floating-point value of the 128-point complex subcarrier signal generated by the floating-point value of the 128-point complex subcarrier signal generated by the analog UWB-OFDM transmitter. OFDM symbol signals, which simulate three different D/A and A/D architectures respectively: 45 1330467 (a). Use the ideal D/A output UWB-OFDM signal to transmit to the AWGN channel and receive UWB-OFDM under time synchronization conditions. Signal, input the ideal A/D conversion to floating point value of the OFDM symbol signal input 1 28-FFT demodulation to 128 point complex subcarrier signal through the maximum likelihood law of the nebula decoding back to the binary data. (b) Repeat the input of the five-bit 128-SDM D/A twice, output the UWB-OFDM signal with twice the time spread spectrum to the AWGN channel, and receive the UWB with twice the time spread spectrum under the condition of time synchronization. OFDM signal, 轮Fdm symbol signal converted into five-bit 128-SDM A/D converted to two-digit five-point fixed-point value, and the two-digit five-bit OFDM signal with twice the time spread spectrum is averaged and then input. The 128-FFT demodulation is a 128-point complex subcarrier signal that is decoded back to the binary data by the maximum likelihood law of the nebula. (c) Time domain equivalent frequency interpolation twice and five-bit 128-SDM D/A converters generate twice the time spread UWB-OFDM signals are transmitted to the AWGN channel, receiving twice under time-synchronized conditions Time-spreading UWB-OFDM signal 'input five-bit 128-SDM A/D converted to two-digit five-bit fixed-point OFDM symbol signal' is constructed to double the time-domain equivalent frequency (twice the time show The two-bit five-bit OFDM signal is added to obtain a six-bit OFDM signal, and the input 128-FFT is demodulated into a 128-point complex sub-carrier signal, which is decoded by the maximum likelihood law of the nebula to generate two-bit data.

理想D/A與A/D轉換器傳送/接收的UWB-OFDM信 號之訊雜比為SNR = σ〗/σ〗,代入(33)可得五位元 128-SDM D/A與A/D轉換器傳送/接收兩倍時間展頻的 UWB-OFDM 信號之訊雜比 SNRTSP= σϊ2/(〇.5σ„2+σ|) = 1 / (0.5-SNR—1 + SQNR—1)。當 SNR 2 0.5.SQNR,則 SNRTSP 46 1330467The signal-to-noise ratio of the UWB-OFDM signal transmitted/received by the ideal D/A and A/D converter is SNR = σ〗/σ, and substituting (33) can obtain five-bit 128-SDM D/A and A/D. The converter transmits/receives the double-time spread-spectrum UWB-OFDM signal with a signal-to-noise ratio of SNRTSP= σϊ2/(〇.5σ„2+σ|) = 1 / (0.5-SNR—1 + SQNR—1). When SNR 2 0.5.SQNR, then SNRTSP 46 1330467

=1 / (0.5’SNR-1 + SQNR_I) < SNR ’ 即理想d/A 與 A/D 轉換器傳送/接收的UWB-OFDM信號之訊雜比(SNR)大 於五位元128-SDM D/A與A/D轉換器一半量化訊雜比 (0.5’SQNR) ’則五位元128-SDM D/A與A/D轉換器傳送 /接收兩倍時間展頻的UWB-OFDM接收信號之訊雜比 (SNRTSP)會小於理想D/A與A/D轉換器傳送/接收的 UWB-OFDM信號之訊雜比(SNR)。由圖十五可知,五 位元〗28-SDM D/A與A/D傳送/接收UWB-OFDM信號之 SQNR約為 25dB ’ 貝1J 當 SNR > 0.5.SQNR = 22dB後,使 用五位元128-SDM D/A與A/D轉換器傳送/接收兩倍時 間展頻的UWB-OFDM信號之BER會大於使用理想d/A 與A/D轉換器傳送/接收沒有時間展頻的UWB-OFDM信 號之BER,如圖十八所示。 UWB-OFDM傳接機使用本發明揭示建構於時域等 效頻率插補/縮減兩倍之五位元128-SDM (簡稱為 2-TFID 5-bit 128-SDM) D/A與A/D轉換器,傳送/接收兩 倍時間展頻的UWB-OFDM信號之SQNR為30dB,同理可 知當 SNR 2 27dB後,2-TFID 5-bit 128-SDM D/A與 A/D 轉換器傳送與接收兩倍時間展頻的64-QAM UWB-OFDM信號之BER才會大於使用理想D/A與A/D轉 換器而沒有時間展頻的64-QAM UWB-OFDM信號之 BER。比較圖十六與圖十八之五位元128-SDM D/A與 A/D轉換器傳送/接收兩倍時間展頻的64-QAM UWB-OFDM信號與沒有時間展頻的64-QAM UWB-OFDM信號,會發現BER皆只能降到約萬分之一 (10— 4),這是因為D/A與A/D轉換器傳送/接收信號之 47 1330467 SQNR會決定BER所能到達之最小值(BER之下限),而 SQNR不會因為兩倍時間展頻而改變,所以使用五位元 128-SDM D/A與A/D轉換器傳送/接收兩倍時間展頻的 64-QAM UWB-OFDM信號之BER下限不會因為時間展 頻而改善。而本發明揭示之2-TFI 5-bit 128-SDM D/A與 A/D轉換器’可使(JWB-OFDM傳接機之BER優於理想 D/A與A/D轉換器與沒有採用兩倍時間展頻(2_TS)之 UWB-OFDM傳接機。=1 / (0.5'SNR-1 + SQNR_I) < SNR ' is the ideal d/A and the signal-to-noise ratio (SNR) of the UWB-OFDM signal transmitted/received by the A/D converter is greater than the five-bit 128-SDM D /A and A/D converter half-quantized signal-to-noise ratio (0.5'SQNR)' then 5-bit 128-SDM D/A and A/D converter transmit/receive twice-time spread-spectrum UWB-OFDM received signal The signal-to-noise ratio (SNRTSP) is smaller than the signal-to-noise ratio (SNR) of the UWB-OFDM signal transmitted/received by the ideal D/A and A/D converter. It can be seen from Fig. 15 that the SQNR of the five-bit 28-SDM D/A and A/D transmission/reception UWB-OFDM signals is about 25 dB 'Bei 1J. When SNR > 0.5.SQNR = 22dB, use five bits. 128-SDM D/A and A/D converters transmit/receive double-time spread-spectrum UWB-OFDM signals with higher BER than UWB with no ideal time-frequency for transmitting/receiving with ideal d/A and A/D converters The BER of the OFDM signal is shown in Figure 18. The UWB-OFDM transmission machine uses the present invention to disclose a five-bit 128-SDM (referred to as 2-TFID 5-bit 128-SDM) D/A and A/D constructed twice in time domain equivalent frequency interpolation/reduction. The converter, transmitting/receiving the SQNR of the UWB-OFDM signal with twice the time spread spectrum is 30dB. Similarly, when the SNR 2 is 27dB, the 2-TFID 5-bit 128-SDM D/A and A/D converter are transmitted. The BER of a 64-QAM UWB-OFDM signal that receives twice the time spread spectrum is greater than the BER of a 64-QAM UWB-OFDM signal that uses an ideal D/A and A/D converter without time spreading. Compare the six-bit 128-SDM D/A and A/D converters of Figure 16 and Figure 18 to transmit/receive twice-time spread-spectrum 64-QAM UWB-OFDM signals and 64-QAM UWB without time spread spectrum - OFDM signal, it will be found that the BER can only be reduced to about one ten thousandth (10-4), because the D/A and A/D converter transmit/receive signals 47 1330467 SQNR will determine the BER can reach Minimum value (lower limit of BER), and SQNR does not change due to double-time spread spectrum, so use 5-bit 128-SDM D/A and A/D converter to transmit/receive 64-QAM with double time spread spectrum The BER lower limit of the UWB-OFDM signal is not improved by time spreading. The 2-TFI 5-bit 128-SDM D/A and A/D converter disclosed in the present invention can make the BER of the JWB-OFDM transceiver better than the ideal D/A and A/D converters. UWB-OFDM transceiver with twice the time spread spectrum (2_TS).

綜上所述’本發明之結構特徵及各實施例皆已詳細 揭示’而可充分顯示出本發明案在目的及功效上均深富 實施之進步性’極具產業之利用價值,且為目前市面上 如所未見之運用,依專利法之精神所述,本發明案完全 符合發明專利之要件。In summary, the structural features of the present invention and the various embodiments have been disclosed in detail, and the present invention can be fully demonstrated that the purpose and the efficacy of the present invention are both rich and progressive, and the value of the industry is extremely valuable. As never seen in the market, according to the spirit of the patent law, the present invention fully complies with the requirements of the invention patent.

唯以上所述者,僅為本發明之較佳實施例而已,當不能以 之限定本發明所實施之範圍,即大凡依本發明申請專利範圍所 作之均等變化與修飾,皆應仍屬於本發明專利涵蓋之範圍内, 謹請 貴審查委員明鑑,並祈惠准,是所至禱。 【圖式簡單說明】 表格: 表一五位元128音-SDM A/D轉換器使用平 電路之工作時脈頻率與類比SDM電路個數對 \表。 表 UWB-OFDM傳接機使用五位元128音_SD 與A/D傳送/接收QPSK、i6、Qam UWB-OFDM信號之最佳量化單位β ^ΑΜ 48 € 1330467 圖示說明: 圖一(a) 數位類比轉換器基本構架方塊圖 圖一(b) 類比數位轉換器基本構架方塊圖 圖二 線性Midread之三位元量化器轉移函數 圖三 UWB-OFDM傳接機基本構架圖 圖四 既有之Μ立元A/D轉換器(6 = 3)系統示意圖 圖五 既有之UWB-OFDM傳接機系統方塊圖 圖六(a) TV音-SDM電路系統方塊圖 圖六(b) /V音-SDM電路之離散系統方塊圖 圖七 建構於時域等效頻率插補/縮減32倍128音-SDM 電路之五位元數位類比轉換器 圖八 UWB-OFDM傳接機使用建構於時域等效頻率插 補/縮減兩倍之五位元128音-SDM數位類比轉換 器與類比數位轉換器 圖九建構於時域等效頻率插補/縮減32倍128音-SDM 之五位元類比數位轉換器 圖十 類比SDM電路 圖十一建構於時域等效頻率插補/縮減16倍128音 -SDM電路之五位元類比數位轉換器使用兩個 SDM平行處理電路 圖十二 建構於時域等效頻率插補/縮減8倍1 28音 -SDM電路之五位元類比數位轉換器使用四個 SDM平行處理電路 圖十三使用32個SDM平行處理電路之128音-SDM五 (I、 49 1330467 位元類比數位轉換器The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the equivalent variations and modifications made by the scope of the present invention should still belong to the present invention. Within the scope of the patent, I would like to ask your review committee to give a clear explanation and pray for it. It is the prayer. [Simple diagram of the diagram] Table: Table 1 five-bit 128-sound-SDM A/D converter uses the working clock frequency of the flat circuit and the analog SDM circuit pair \ table. Table UWB-OFDM Transmitter uses five-bit 128-tone _SD and A/D transmission/reception QPSK, i6, Qam UWB-OFDM signal optimal quantization unit β ^ ΑΜ 48 € 1330467 Illustration: Figure 1 (a Digital analog converter basic architecture block diagram Figure 1 (b) analog digital converter basic architecture block diagram Figure 2 linear Midread three-bit quantizer transfer function diagram three UWB-OFDM transfer machine basic architecture diagram Figure 4 Μ立元 A/D converter (6 = 3) system diagram Figure 5 UWB-OFDM transceiver system block diagram Figure 6 (a) TV sound-SDM circuit block diagram Figure 6 (b) / V sound -SDM circuit discrete system block diagram Figure 7 is constructed in time domain equivalent frequency interpolation / reduction 32 times 128 tone - SDM circuit five-bit digital analog converter Figure 8 UWB-OFDM transfer machine used in the time domain, etc. Effective frequency interpolation/reduction of twice the five-bit 128-sound-SDM digital analog converter and analog-to-digital converter. Figure 9 is constructed in the time domain equivalent frequency interpolation/reduction 32 times 128-six-simplified five-bit analog digital Converter diagram ten analogy SDM circuit diagram eleven constructed in time domain equivalent frequency interpolation / reduction 16 times 128 tone - SDM The five-bit analog-to-digital converter of the road uses two SDM parallel processing circuits. Figure 12 is constructed in time-domain equivalent frequency interpolation/reduction of 8 times. The five-bit analog-to-digital converter of the 28-bit-SDM circuit uses four SDM parallels. Processing Circuit Figure 13 uses 128 SDM parallel processing circuits for 128-SDM five (I, 49 1330467 bit analog-to-digital converters)

圖十四 比較U WB-OFDM傳接機使用對不同量化單位 之一至九位元128音-SDM D/A與A/D之SQNRFigure 14 Comparison of U WB-OFDM transceivers using SQNR for one to nine digits of 128-tone SDM D/A and A/D

圖十五 比較UWB-OFDM傳接機使用最佳量化單位之 五位元128音-SDM D/A與A/D之SQNR 圖十六 比較四位元128音-SDM D/A,A/D、五位元128 音-SDM D/A,A/D與理想D/A,A/D傳送/接收 QPSK、16-QAM與 64-QAMUWB-OFDM信號 圖十七 建構於時域等效頻率插補兩倍之五位元1 28 音-SDM D/A產生兩倍時間展頻之64-QAM UWB-OFDM 信號Figure 15 compares the UWB-OFDM transceiver using the best quantization unit of the five-bit 128-SDM D/A and the A/D SQNR. Figure 16 compares the four-bit 128-sound D-A, A/D , five-bit 128-sound D/A, A/D and ideal D/A, A/D transmission/reception QPSK, 16-QAM and 64-QAMUWB-OFDM signals Figure 17 is constructed in time domain equivalent frequency interpolation Complementing the five-bit 1 28-SDM D/A produces a double-time spread-spectrum 64-QAM UWB-OFDM signal

圖十八比較在AWGN通道UWB-OFDM傳接機使用建 構於時域等效頻率插補/縮減兩倍之五位元1 28音 -SDM D/A與A/D之BER與五位元128音-SDM D/A與 A/D 之 BER 圖號說明:Figure 18 compares the BER and the five-bit 128 of the UWB-OFDM transceiver used in the AWGN channel to construct a time-domain equivalent frequency interpolation/reduction of twice the bit 1 28-SDM D/A and A/D. BER-SDM D/A and A/D BER diagram description:

50 1330467 表格 表一 類比SDM個數(2A') 插補/缩減倍率(A = 2A'-A) 工作時脈頻率 1 32 16.896GHz 2 16 8.448GHz 4 8 4.224GHz 8 4 2.112GHz 16 2 1.056GHz 32 1 528MHz50 1330467 Table Table 1 Analogous SDM Number (2A') Interpolation/Reduction Magnification (A = 2A'-A) Operating Clock Frequency 1 32 16.896GHz 2 16 8.448GHz 4 8 4.224GHz 8 4 2.112GHz 16 2 1.056 GHz 32 1 528MHz

表二 b 1 2 3 4 "5 ' 6 7 8 9 A Δ (64-QAM) 1.001 1.368 1.730 2.067 2.378 2.662 2.931 3.174 3.430 A Δ (16-QAM) 0.488 0.667 0.844 1.008 1.158 1.299 1.434 1.562 1.690 Δ (QPSK) 0.218 0.298 0.378 0.451 0.518 0.582 0.640 0.691 0.768Table 2 b 1 2 3 4 "5 ' 6 7 8 9 A Δ (64-QAM) 1.001 1.368 1.730 2.067 2.378 2.662 2.931 3.174 3.430 A Δ (16-QAM) 0.488 0.667 0.844 1.008 1.158 1.299 1.434 1.562 1.690 Δ (QPSK 0.218 0.298 0.378 0.451 0.518 0.582 0.640 0.691 0.768

Claims (2)

13304671330467 十、申請專利範圍: ί. -種應用於正交分頻多工超寬頻傳接機之五位元128 音數位轉類比與類比轉數位之裝置,其係包括 :::數位里化态’其係包括有一時域等效頻率插 補益與一時域等效頻率縮減器,且於 有一 128音-SDM電路;以及 又罝X. The scope of application for patents: ί. - A device for the five-bit 128-tone digit-to-analog and analog-to-digital digits of the orthogonal frequency division multiplexing ultra-wideband transmission machine, including::: digitization state The system includes a time domain equivalent frequency interpolation benefit and a time domain equivalent frequency reducer, and has a 128-sound-SDM circuit; 一五位元類比/數位轉換器,其係包括有下列元件, 建構於時域等效頻率插補/縮減128音-SDM量化電 路,以平行處理架構的類比SDM電路取代大量^ 阻與比較H Μ成的量化器,進而簡化電 功率消耗; ' Μ藉=元件,其二位元資料經過星雲編碼器轉 ίίΐ 波信號,每m點複數子載波信號經過 串列轉並列後輸人128·快速反傅立葉轉換調變為一 =分頻多工信號’再與上述構件之五位元數位量化 益,、五位兀數位/類比轉換器之動作,五位元US音 梦二數:二類比與五位元128音-SDM類比轉數位 裝置採用建構於時域等效頻率插補/縮減(time domain-based equivalent frequency interpolation / —:扣⑽)之設計,且時域等效頻率插補/縮減倍軾 :,可以完全等效有頻率插補/縮減處理,而且不 3頻率插縣率增加%倍而造成快速反傅立葉轉 …、快速傅立茱轉換之長度增加為祁%,用以消除 二音-SDM電路量化雜訊’符合128•快速反傅立葉轉 換與128·快速傅立葉轉換,五位元128-SDM D/AS] 52 I33Q467 UWB-OFDM發射機採用建構於時域等效頻率插補二 倍,而使五位元128-SDM D/A輸出信號達到產生兩倍 時間展頻UWB-OFDM信號的效果,而UWB-OFDM接 收機使用建構於時域等效頻率縮減二倍,SQNR可以 増加5dB,解展頻的正交分頻多工信號輸入128-快速 傅立葉轉換解調為128點複數子載波信號,最後經由 星雲解碼器解回二位元資料。 2. 如申請專利範圍第1項所述之應用於正交分頻多工超寬頻 傳接機之五位元128音-SDM數位轉類比與類比轉數 位之裝置,其中該五位元類比/數位轉換器更係包括有 下列元件: 一超取樣32倍電路;以及 一類比的SDM電路包含一減法器、一積分器、一 位元A/D轉換器與一位元D/A轉換器;以及 一數位累加器。 3. 如申請專利範圍第1項所述之應用於正交分頻多工超寬頻 傳接機之五位元128音-SDM數位轉類比與類比轉 數位之裝置,其中該時域等效頻率插補器更係包括 有: 一固定長度(128點)快速反傅立葉轉換(inverse fast Fourier transform,IFFT); 一記憶體暫存器; —超取樣32倍電路;以及 一並列/串列轉換器。 4·如申請專利範圍第1項所述之應用於正交分頻多工超寬頻 傳接機之五位元128音-SDM數位轉類比與類比轉 53 Ϊ330467 數位之裝置,其中該時域等效頻率縮減器更係包括 有: 一串列/並列轉換器; 一記憶體暫存器; 一並列/串列轉換器; 一 128維向量累加器電路單元; 一並列/串列轉換器所構成;以及 一固定長度(128點)快速傅立葉轉換(fast F〇uHer transform,FFT)。 如申請專利範圍第i項所述之應m交分頻多工超寬頻 傳接機之五位π 128音-SDM數位轉類比與類比轉 數位之裝置,時域等效頻率插補器之插補處理是在 一固定長度(128點)快速反傅立㈣換之後,插補處 理是於時域進行’且正交分頻多卫超寬頻傳送機之 快速反傅立轉換長度*需要隨頻率插補倍率增加 32倍,而造成快速反傅立葉轉換之長度增加 4096,時域等效頻率縮減器之縮減處理是在一固^ 長度⑽點)快速傅立葉轉換之前,縮減處理是於 正父分頻多卫超寬頻接收機之快速傅立 葉轉換長度不需要隨頻率縮減倍率增加32倍 =速傅立葉轉換之長度增加為4〇96,其+該二位元 貝料依照星雲®編碼方式可選擇κA five-bit analog/digital converter consisting of the following components, constructed in a time-domain equivalent frequency interpolation/reduction 128-sigma-SDM quantization circuit, replacing a large number of resistances and comparisons with an analog SDM circuit of a parallel processing architecture The quantized device is simplified, which simplifies the electric power consumption; ' Μ borrow = component, its two-bit data is transferred to the ίίΐ wave signal by the nebula encoder, and the sub-carrier signal per m point is serially converted and paralleled and input 128· fast reverse Fourier transform is converted into a = frequency division multiplexing signal 'and then with the five-digit digit quantization of the above components, five five digits / analog converter action, five-digit US sound dream two: two analogies and five The bit-bit 128-sDM analog-to-digital device adopts a design constructed in time domain-based equivalent frequency interpolation (-: deduction (10)), and the time domain equivalent frequency interpolation/reduction times轼: It can be completely equivalent to frequency interpolation/reduction processing, and the frequency of the 3rd frequency insertion rate is increased by a factor of 5%, resulting in a fast inverse Fourier transform..., the length of the fast Fourier transform is increased to 祁% to eliminate the second tone-S DM circuit quantization noise 'according to 128• fast inverse Fourier transform and 128· fast Fourier transform, five-bit 128-SDM D/AS】 52 I33Q467 UWB-OFDM transmitter is constructed twice in time domain equivalent frequency interpolation, The 5-bit 128-SDM D/A output signal achieves the effect of generating twice the time spread-spectrum UWB-OFDM signal, while the UWB-OFDM receiver is constructed to reduce the time-domain equivalent frequency by a factor of two, and the SQNR can add 5 dB. The de-spreading orthogonal frequency division multiplexing signal input 128-fast Fourier transform is demodulated into a 128-point complex sub-carrier signal, and finally the binary data is decoded back through the nebula decoder. 2. The device for applying the five-bit 128-sound-SDM digital-to-analog and analog-to-digital digits of the orthogonal frequency division multiplexing ultra-wideband transmission machine according to the first aspect of the patent application, wherein the five-bit analogy/ The digital converter further includes the following components: an oversampling 32-fold circuit; and an analog SDM circuit including a subtractor, an integrator, a one-bit A/D converter and a one-bit D/A converter; And a digital accumulator. 3. The apparatus for applying the five-bit 128-sound-SDM digital-to-analog and analog-to-digital digits of the orthogonal frequency division multiplexing ultra-wideband transmission machine according to the first aspect of the patent application, wherein the time domain equivalent frequency The interpolator further includes: a fixed length (128 points) fast inverse Fourier transform (IFFT); a memory register; - an oversampling 32 times circuit; and a parallel/serial converter . 4. The device of the five-bit 128-SDM digital-to-analog ratio analog analogy and the analog-to-53 Ϊ330467 digital position applied to the orthogonal frequency division multiplexing ultra-wideband transmission machine according to the first application of the patent scope, wherein the time domain, etc. The effect frequency reducer further comprises: a serial/parallel converter; a memory register; a parallel/serial converter; a 128-dimensional vector accumulator circuit unit; and a parallel/serial converter And a fixed length (128 points) fast Fourier transform (FFT). For example, the five-bit π 128 tone-SDM digital to analog and analog-to-digital device of the m-crossing frequency division multiplexing ultra-wideband transmission machine described in the i-th patent application scope, the time domain equivalent frequency interpolator The compensation process is after a fixed length (128 points) fast inverse Fourier (four) change, the interpolation process is performed in the time domain and the fast inverse Fourier transform length of the orthogonal frequency division multi-band ultra-wideband transmitter * needs to follow the frequency The interpolation magnification is increased by 32 times, and the length of the fast inverse Fourier transform is increased by 4096. The reduction of the time domain equivalent frequency reducer is before the fast Fourier transform at a fixed length (10) point, and the reduction processing is performed by the positive father frequency division. The fast Fourier transform length of the multi-bandwidth ultra-wideband receiver does not need to increase by 32 times with the frequency reduction ratio. The length of the fast Fourier transform is increased to 4〇96, and the +bits of the two-element bead can be selected according to the Nebula® coding method. 64-QAM。 0 或 =奢專利範賺項所述之應用於正交分頻多工超 傳接機之五位元128音·SDM數位轉類比與類比轉 立之裝置’其中該五位元數位量化器之建構於時域等 54 1330.467 效頻率插補器與接收端之建構於時域等效頻率縮減 器,可有效消除128音-SDM電路量化雜訊’以及降 低邏輯閘數量與處理時間。 7. 如申請專利範圍第1項所述之應用於正交分頻多工超寬頻 傳接機之五位元128音-SDM數位轉類比與類比轉 數位之裝置,其中該五位元128_SDM D/A與A/D採用 最佳量化單位傳送/接收QPSK、16-QAM與64-QAM UWB-OFDM信號之SQNR皆相同’五位元128-SDM D/A與A/D可滿足高峰均值16-QA1V[與64-QAM UWB-OFDM通訊系統對BER之性能要求。 8. 如申請專利範圍第1項所述之應用於正交分頻多工超寬頻 傳接機之五位元128音-SDM數位轉類比與類比轉數 位之裝置’其中該五位元類比/數位轉換器實施方式亦 可以採用不需要超取樣的三十二個類比的SDM電路 的平行處理架構,而保持528MHz的取樣率。 5564-QAM. 0 or = the luxury patent patent earning item is applied to the octave 128-sound/SDM digital-to-analog and analog-to-analog device for orthogonal frequency division multiplexing super-transfers, where the five-digit quantizer Constructed in the time domain, etc. 54 1330.467 Effective frequency interpolator and receiver are constructed in the time domain equivalent frequency reducer, which can effectively eliminate the quantization noise of 128-SDM circuit and reduce the number of logic gates and processing time. 7. The apparatus for applying the five-bit 128-sound-SDM digital-to-analog and analog-to-digital digits of the orthogonal frequency division multiplexing ultra-wideband transmission machine according to the first aspect of the patent application, wherein the five-bit 128_SDM D /A and A/D use the best quantization unit to transmit/receive QPSK, 16-QAM and 64-QAM UWB-OFDM signals have the same SQNR' five-bit 128-SDM D/A and A/D can meet the peak mean value of 16 -QA1V [Performance requirements for BER with 64-QAM UWB-OFDM communication systems. 8. The device for applying the five-bit 128-sound-SDM digital-to-analog and analog-to-digital digits of the orthogonal frequency division multiplexing ultra-wideband transmission machine as described in claim 1 of the patent scope, wherein the five-bit analogy/ The digital converter implementation can also employ a parallel processing architecture of thirty-two analog SDM circuits that do not require oversampling while maintaining a sampling rate of 528 MHz. 55
TW95137037A 2006-10-05 2006-10-05 A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver TWI330467B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW95137037A TWI330467B (en) 2006-10-05 2006-10-05 A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW95137037A TWI330467B (en) 2006-10-05 2006-10-05 A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver

Publications (2)

Publication Number Publication Date
TW200818715A TW200818715A (en) 2008-04-16
TWI330467B true TWI330467B (en) 2010-09-11

Family

ID=44769584

Family Applications (1)

Application Number Title Priority Date Filing Date
TW95137037A TWI330467B (en) 2006-10-05 2006-10-05 A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver

Country Status (1)

Country Link
TW (1) TWI330467B (en)

Also Published As

Publication number Publication date
TW200818715A (en) 2008-04-16

Similar Documents

Publication Publication Date Title
US9760338B2 (en) Direct digital synthesis of signals using maximum likelihood bit-stream encoding
CN102754095A (en) Sparse sampling of signal innovations
EP1458156A2 (en) Transmission using Tomlinson-Harashima precoding
TWI429210B (en) Radio frequency transmitter, wireless communication unit, and method of generating radio frequency for transmitting over radio frequency interface
US6965339B2 (en) Method and system for analog to digital conversion using digital pulse width modulation (PWM)
US7876838B2 (en) Low complexity multi-channel modulation method and apparatus
EP3662578A1 (en) Distortion mitigation quantizer circuit, method for mitigating distortion noise and digital transmitter
US7928886B2 (en) Emulation of analog-to-digital converter characteristics
Neuhaus et al. Sub-THz wideband system employing 1-bit quantization and temporal oversampling
US8378871B1 (en) Data directed scrambling to improve signal-to-noise ratio
US8934556B2 (en) System and method for communicating with shaped cyclic time-domain waveforms
EP1257063A2 (en) PC card and wlan system having high speed, high resolution, digital-to -analog converter with off-line sigma delta conversion and storage
US5164727A (en) Optimal decoding method and apparatus for data acquisition applications of sigma delta modulators
CN108156106B (en) Continuous phase modulation signal transmission and reconstruction method suitable for visible light communication
WO2010011362A1 (en) Method and apparatus for reducing audio artifacts
Halsig et al. Information rates for faster-than-Nyquist signaling with 1-bit quantization and oversampling at the receiver
TWI330467B (en) A new five-bit 128-tone sigma-delta modulation d/a and a/d scheme and device for uwb-ofdm transceiver
EP1050140A1 (en) Pulse shaping according to modulation scheme
EP1477002A1 (en) Dsp-based variable aperture code generation technique
Johnson et al. Manchester encoded bandpass sigma–delta modulation for RF class D amplifiers
WO2012024824A1 (en) Method and system for the 5th generation wideband wireless communication based on digital signal encoding
JP5935519B2 (en) ΔΣ modulation system
TWI308016B (en) The quantization noise cancellation device for n-tone sigma-delta circuit in uwb-ofdm transceiver
EP3959819A1 (en) Reconstruction of clipped signals
Hill et al. A comparison of adaptively equalized PCM/FM, SOQPSK, and multi-h CPM in a multipath channel

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees