1326823 九、發明說明： 【發明所屬之技術領域】 本發明是電腦初始化，^種電腦初始化的遠端監視模組。 【先前技術】 目前乡數的區域主板在纟餘純的触巾具有特糾雜测試及 問題修復的特徵。然而那些特徵通常不易於以外部裝置或遠端監視主機加 乂矛】用這些特徵多數只疋基板層級的概。此外，測試任務的進行僅顯 •示於位於基板的指示燈上（例如：7段led燈），除非將指示燈設置於機殼 外《卩，否則監視這些任務需要外部測試設備。對於刀鋒或叢集系統，這地 指示燈在系統初始化的階段僅能提供不足的系統層級管理。 如第1圖所示為先前技術中電腦系統之區域主板的一典型舊式實施 例，區域主板01 (Local mainboard)包含運作如同一部電腦之電腦主機領 域10 (computer host domain)，電腦主機領域1〇主要包含一或多個處理 器11、系統記憶體（圖中未示）、内建於記憶體上之Bi〇s (基本輸出輸入 響系統basic input/output system 或起始碼 initialization codes) 13、 系統晶片組12連接於處理器11與BIOS 13之間、電源供應器及其他系統 元件（圖中皆未顯示）。系統輸入/輸出匯流排40 (system I/O bus)，例如： LPC匯流排或PCI基礎(PCI-based)之匯流排，以解碼器30及其他輸入/輸 出裝置（圖中未示）連接電腦主機領域10 »基板管理控制器2〇 (BMC,1326823 IX. Description of the Invention: [Technical Field of the Invention] The present invention is a computer initialization, remote initialization module for computer initialization. [Prior Art] At present, the regional motherboard of the township has the characteristics of special correction test and problem repair in the pure touch towel. However, those features are generally not easy to monitor the host with external devices or remotely. These features are mostly used only for the level of the substrate. In addition, the test task is only displayed on the indicator light on the base unit (for example, 7-segment led light). Unless the indicator light is set outside the chassis, monitoring external tasks requires external test equipment. For blade or cluster systems, this indicator can only provide insufficient system level management during the system initialization phase. As shown in FIG. 1 , a typical old-style embodiment of a regional motherboard of a prior art computer system, a local mainboard 01 includes a computer host domain 10 operating as a computer, and a computer host domain 1 〇 Mainly includes one or more processors 11, system memory (not shown), Bi〇s built in memory (basic input/output system or initialization code) 13 The system chipset 12 is connected between the processor 11 and the BIOS 13, the power supply, and other system components (not shown). System I/O bus 40, for example: LPC bus or PCI-based bus, connected to the decoder 30 and other input/output devices (not shown) Host Area 10 » Baseboard Management Controller 2〇 (BMC,
Baseboard Management Controller)以電路連接電腦主機領域1〇並透過 遠端管理鏈路提供遠端管理主機遠距監視/控制能力。 5 1326823 系統初始化的過程有兩個主要的部分，一是在初次操取起始碼（bios) 之前’另一是在開始擷取BIOS之後。一旦BIOS初始化了輸-出裝置，例如： 影像顯示器（video display)或串列埠（seriai ports)，在先前技術中 有特定軟體程式可用以處理系統提示、測試及間題修復。然而，某些資訊 諸如：BIOS檢查資料(check data)(包含用以立即指出BIOS初始化階段的 檢查點資訊(check point information))並非可透過這些軟體程式取得。在初 次擷取BIOS至輸出裝置初始化的持續期間裡廣泛提供檢查資料。 一種通常用於監視x86基礎電腦系統BIOS除錯過程而被稱為「port8〇」 的監視功能特徵’是由在系統輸入/輸出匯流排4.0上之輸入/輸出位址 0x0080 (或P〇rt80)回應之解碼器30所提供。在BIOS初始化過程期間， BIOS 13透過系統輸入/輸出匯流排40寫入前述檢查資料至解碼器30。然 後解碼器30解譯檢查資料並顯示於指示器31。當系統初始化過程停滯於某 處時’指示器31上可見之檢查資料令使用者得以發現並確認系統硬體的問 題。然而，具通常能力之基板管理控制器20並無法支援此一功能。由於舊 式基板管理控制器20及解碼器30兩者間互相獨立，因此先前技術之遠端 管理主機無法透過基板管理控制器20監視檢查資料。 除檢查資料外，在系統初始化過程之初始化事件，例如：「電力良好狀 態(power good status)」、「釋放重置(releasing reset)」、「初次 BIOS 擷取(first BIOS fetch)」等等’已經由系統輸入/輸出匯流排4〇的匯流排協定（如BIOS 初次指示擷取、釋放重置）、某些其他特定監視電路（如溫度、風扇速度、 電力充足狀態）或直接由硬體元件（如電源供應器）所提供β然而，通常 6 1326823 的基板管理控制盗20並無設计用以取用（access)這些初始化事件的客製化 功能。在先前技術中也並無其他監視設備處理這些客製化的監視任務並發 送至顯示器。因此’這些初始化事件並未發送或顯示於指示器31，亦無法 提供至遠端管理主機。要觀察系統初始化事件，使用者通常必須使用一示 波器或邏輯分析儀。 【發明内容】 因此，本發明透過一遠端監視模組提供系統和始化資訊予遠端管理主 機。基本上，在區域主板上的外加電路將用以取得系統狀態資訊並發送至 區域管理電路，例如：基板管理控制器。然後遠端管理主機便得以透過遠 端管理鍵路取用此資訊。 在本發明的實施例，遠端監視模組係用以監視在區域主板上之電腦主 機領域。電腦主機領域包含-或多處理器、腦（基本輸出輸入系統BasicThe Baseboard Management Controller is connected to the computer mainframe domain by circuit and provides remote management host remote monitoring/control capability through the remote management link. 5 1326823 The system initialization process has two main parts, one is before the initial operation of the start code (bios) and the other is after the start of the BIOS. Once the BIOS has initialized the output device, such as a video display or a seriai ports, there are specific software programs available in the prior art to handle system prompts, tests, and repairs. However, certain information such as BIOS check data (including check point information to immediately indicate the BIOS initialization phase) is not available through these software programs. Inspection data is widely available for the duration of the initial capture of the BIOS to the initialization of the output device. A monitoring feature that is commonly referred to as "port8〇" for monitoring the BIOS troubleshooting of x86 basic computer systems is the input/output address 0x0080 (or P〇rt80) on the system input/output bus 4.0. The response is provided by decoder 30. During the BIOS initialization process, the BIOS 13 writes the aforementioned inspection data to the decoder 30 through the system input/output bus 40. The decoder 30 then interprets the inspection material and displays it on the indicator 31. When the system initialization process is stuck somewhere, the inspection data visible on the indicator 31 allows the user to discover and confirm the problem of the system hardware. However, the board management controller 20 having the usual capabilities cannot support this function. Since the legacy substrate management controller 20 and the decoder 30 are independent of each other, the remote management host of the prior art cannot monitor the inspection data through the substrate management controller 20. In addition to checking the data, initialization events during system initialization, such as: "power good status", "releasing reset", "first BIOS fetch", etc. A busbar protocol that has been input/output bus 4 by the system (such as BIOS initial indication capture, release reset), some other specific monitoring circuitry (such as temperature, fan speed, power sufficient state) or directly by hardware components (as provided by the power supply) β However, the substrate management control pirate 20 of the usual 6 1326823 does not have a customization function designed to access these initialization events. There are also no other monitoring devices in the prior art that handle these customized monitoring tasks and send them to the display. Therefore, these initialization events are not sent or displayed on the indicator 31 and are not available to the remote management host. To observe system initialization events, the user typically must use an oscilloscope or logic analyzer. SUMMARY OF THE INVENTION Accordingly, the present invention provides a system and initialization information to a remote management host through a remote monitoring module. Basically, the add-on circuitry on the regional motherboard will be used to obtain system status information and send it to the zone management circuitry, such as the baseboard management controller. The remote management host then has access to this information via the remote management key. In an embodiment of the invention, the remote monitoring module is used to monitor the computer host area on the regional motherboard. Host computer domain contains - or multi-processor, brain (basic output input system Basic
Input/Output System 或起始碼 initialization codes)及在處理器與 bios 間運作如同一橋接介面（bridge interface)之系統晶片組（system chipset)。遠端監視模組包含基板管理控制器（BMC)及事件監視器。基板 管理控制器以電路連接電腦主機領域與遠端管理主機。事件監視器以電路 連接電腦主機領域與基板管理控制器，偵測對應初始化事件之狀態訊號， 產生並傳送事件喊至基板管理控彻。前述事件監漏包含狀態檢查器 (condition checker)與事件閂鎖器（event iatch)e狀態檢查器確認狀 態訊號是否位於一設定之電壓準位（v〇ltage level)，*事件閃鎖器閃鎖 並保持事件訊餘於狀之電壓準位，再傳鞋基板管贴㈣。在某些 7 1326823 % 情況下’事件監視器更包含同步器（synchronizer)，以電腦主機領域之系 統碑序同步化此狀態訊號，並傳送己同步之狀態訊號至狀態檢查器。 在本發明另一實施例’系統晶片組以系統輸入/輸出匯流排（system I/O bus)連接BIOS。遠端監視模組更包含連接於系統輸入/輸出匯流排之解碼 器。解碼器解譯由BIOS所寫入之檢查資料（檢查點訊號），並產生與傳送 檢查資料訊號至基板管理控制器》遠端監視模組可更包含一匯流排多工 器，用以依據自基板管理控制器之選擇訊號接收及選擇事件訊號與檢查資 料訊號其中之一，並發送被選擇的事件訊號或檢查資料訊號至基板管理控 制器。 在本發明的另一實施例，遠端監視模組更包含一通用輸入輸出（GPI0, General Purpose Input/Output)裝置以提供通用輸入輸出接聊，用以接 收事件訊號及檢查資料訊號。基板管理控制器與通用輸入輸出裝置皆連接 至從電腦主機領域的系統晶片組所延伸之系統管理匯流排（SMBus，System Management Bus)。因此，事件訊號及檢查資料訊號可被基板管理控制器透 過系統管理匯流排取用（access)。 有關本發明的較佳實施例及其功效，茲配合圖式說明如后。 【實施方式】 請參閲第2圖，複數的區域主板01相結合為一計算系統。每一區域主 板01透過遠端管理键路連接於遠端管理主機（圖中未示）。遠端管理鏈路 相容於智慧平台管理介面（IPMI，Intelligent Platform Management Interface)規格定義下之通訊鍵路（communication links)，例如：在區 8 丄以6823 域主板間透過祕輸人/輸出匯流排、網路介面⑽控制器與連接器）、串 列埠，甚至系統管理匯流排之通訊鍵路。 區域主板οι主要包含電腦主機領域1〇、系統輸入/輸出紐排4〇及遠 端監視模組50。Input/Output System or initialization code) and a system chipset that operates as a bridge interface between the processor and the bios. The remote monitoring module includes a baseboard management controller (BMC) and an event monitor. The baseboard management controller is electrically connected to the host computer domain and the remote management host. The event monitor is connected to the host computer domain and the baseboard management controller by a circuit, detects a status signal corresponding to the initialization event, generates and transmits an event call to the substrate management control. The foregoing event trap includes a condition checker and an event iatch e state checker to confirm whether the status signal is at a set voltage level (v〇ltage level), * event flash lock flash lock And keep the event signal in the shape of the voltage level, and then pass the shoe substrate tube (4). In some cases, the event monitor also includes a synchronizer that synchronizes the status signal in the system of the host computer domain and transmits the synchronized status signal to the status checker. In another embodiment of the present invention, the system chipset is connected to the BIOS by a system input/output bus (system I/O bus). The remote monitoring module also includes a decoder connected to the system input/output bus. The decoder interprets the inspection data (checkpoint signal) written by the BIOS, and generates and transmits the inspection data signal to the substrate management controller. The remote monitoring module may further include a bus multiplexer for The selection control signal of the baseboard management controller receives and selects one of the event signal and the inspection data signal, and sends the selected event signal or the inspection data signal to the baseboard management controller. In another embodiment of the present invention, the remote monitoring module further includes a General Purpose Input/Output (GPI0) device for providing general purpose input and output contacts for receiving event signals and checking data signals. The baseboard management controller and the universal input/output device are connected to a system management bus (SMBus, System Management Bus) extending from the system chipset in the computer mainframe field. Therefore, the event signal and the inspection data signal can be accessed by the baseboard management controller through the system management bus. Preferred embodiments of the present invention and their effects are described below in conjunction with the drawings. [Embodiment] Referring to FIG. 2, a plurality of regional motherboards 01 are combined into a computing system. Each area main board 01 is connected to the remote management host (not shown) through a remote management key. The remote management link is compatible with the communication links defined by the Intelligent Platform Management Interface (IPMI). For example, in the area 8 丄, the 6823 domain board passes the secret input/output convergence. Rows, network interfaces (10) controllers and connectors), serial ports, and even communication keys for system management busses. The regional motherboard οι mainly includes a computer mainframe field, a system input/output button row 4〇, and a remote monitoring module 50.
電腦主機領域10運作如同一部電腦，通常包含一或多處理器u、系統 記憶體（圖中未示）、BIOS (基本輸出輸入系统Basic㈣以舰⑽SysteiQ 或起始碼initialization codes) 13、在處理器與bios間運作如同一橋接 介面（bridge interface)之系統晶片組（systein物放）12、電源供 應器（圖中未示）及其他系統元件（圖中未示）。在某些實施例中，處理器 具有記憶體控制器在其中，例如：架構基礎之χ86處理器，以直接存 取系統雜體。對於未裝配有記憶體控彻的處理^欲存取纽記憶體， 記憶體中心(memory hub)或北橋(North Bridge)是不可或缺的。 所謂的BIOS 13包含開機映象資料或起始碼，通常貯存/内建於唯讀記 憶體/快閃記憶體裝置。記憶體裝置是一種輸入/輸出裝置，處理器u需要 透過系統晶片組12自記憶體裝置上擷取BI〇s 13以使區域主板〇1開機。 在本發明中，系統晶片组12在處理器與BIOS之間運作如同-橋接介面。 此外，系統晶片組12為一位在處理器11與輸入/輸出裝置（圖中未示）之 間之輸入/輸出中心（I/〇 hub)。 系統輸入/輪出匯流排40，例如：LPC或PCI基礎(pci based)之匯流 排（如：PCI, pCI-X，PCI_E)，連接電腦主機領域1〇於輸入/輸出裝置。 又系統輸入/輪出匯流排40允許BIOS 13寫入檢查資料（BI〇s檢查點資訊） 9 1326823 至其上特定的輸入/輸出位址，例如0x0080(或P〇rt80)。在實際的實施上， 系統輸入/輸出匯流排40可連接系統晶片組12及BIOS 13。 遠端監視模組50主要包含基板管理控制器（BMC) 51、一個或多個事 件監視器52及解碼器53。 基板管理控制器51為具韌體之區域管理控制器，以電路與電腦主機領 域10及遠端管理主機連接’傳送事件訊號與檢查資料訊號，並透過遠端管 理鏈路提供遠端管理主機遠端控制/監視的能力。基本上，基板管理控制器 參 51可實施為被設置於區域主板或系統管理子卡（SMDC)上之專用區域管理 控制器，或多區域主板之集中化、系統層級的區域管理控制器。基板管理 控制器51可透過與智慧平台管理介面（IPMI)相容的通訊鍵路與電腦主機 領域連接’包括系統管理匯流排（SMBus)、串列埠（Serial Port link)、 網路介面鏈路或系統輸入/輸出匯流排β 事件監視器52亦以電路與電腦主機領域10及基板管理控制器51連 結，偵測對應於在系統初始化過程期間來自電腦主機領域1〇的特定初始化 • 事件，例如：重置釋放、初次BIOS擷取等等之狀態訊號，並傳送事件訊號 Se至基板管理控制器51。請參閱第2A圖，在本發明之實施例中，事件監 視器52主要包含同步器521、狀態檢查器522及事件閂鎖器523。 同步器521接收已與系統時序同步化的監視狀態訊號、並發送至狀態 檢查器522。監視狀態訊號sm可由系統硬體元件、系統輸入/輸出匯流排或 狀態監視器（圖中未示）所提供。狀態檢查器522與同步器521及事件閂 鎖器523相連接’埃認已同步之狀態訊號是否位於一設定之電磨準位 10 1326823 (voltage level)，事件閂鎖器523閂鎖並保持事件訊號se位於一特定之 電壓準位，再傳送至基板管理控制器。事件監視器52之上述三個元件皆可 由具有正反器的電路達成，但實際的運用視情況而定。基本上，若訊號已 具有已同步之系統時序，同步器521在事件監視器52並非必要。 第2B圖說明監視初次BIOS擷取之事件監視器的實際例子。兩個訊號 LPC_F_及LPC_RESET係包含於LPC匯流排41的匯流排協定中，當BI0S 13初次被處理器11擷取，LPC_FRAME被用於指示「啟動匯流排執行(starting bus transaction)」，而LPC_RESET指示LPC匯流排41的重置。系統設計者可 限定相關訊號的電壓準位以決定初始化事件的狀態。在本發明的實施例 中，如果訊號LPC_RESET電壓準位為高(HIGH)而LPC_FRAME電壓準位為低 (LOW)(實際監視LPC一F_# and LPC_RESET*) ’兩個具特定電壓準位的 訊號將被狀態檢查器522確認，並透過具有或閘（OR-gate)及一正反器之 事件閂鎖器處理。與狀態訊號相比，事件訊號需要被限制在特定的電壓準 位以指示特定事件的發生與否。對於PCI基礎的系統輸入/輸出匯流排，事 件監視器52仍然透過與LPC匯流排相似的方法監視初次BIOS擷取事件。 亦即，相關的訊號及狀態隨實施例而定。在實際運用上所利用之系統 輸入/輸出匯流排及系統晶片的類型將對初始化事件的訊號狀態給予不同 定義。甚至連初始化事件也可能不同。例如某nVIDIA晶片（如：CK804、 MCP155)能於初次BIOS擷取之初始化事件之前自某些特定的BIOS取用初 始化資訊。再者，相同的訊號將被用於不同的監視任務，例如：倘若系統 輸入/輸出匯流排是PCI基礎的，「唯讀記憶體啟動程序(ROMStrapping)」 11 1326823 的初始化事件與「初次BIOS擷取」之初始化事件，將可能透過偵測 PCI_RESET*(LOW)訊號一起被監視。 解碼器53連接系統輸入/輸出匯流排40並解譯寫入至系統輸入/輸出 匯流排40上特定輸入/輸出位址P〇rt80上的檢查資料。解譯的檢查資料將 作為檢查資料訊號5{:傳送至基板管理控制器51。第2C圖為解碼器53之實 例。在第2圖中，匯流排介面監視系統輸入/輸出匯流排的執行 (transactions)。比較器比較當前位址與貯存BIOS檢查資料的目標位址， 之後並產生資料閂鎖致能訊號。匯流排介面亦基於系統輸入/輸出匯流排40 的匯流排協定產生資料有效(data valid)的訊號。（倘若當前的資料是檢查資 料’可被事件閂鎖器52閂鎖為一個事件。）除遠端管理外，解碼器53仍 可連接至一指示器31以顯示在其上之檢查資料。 最後’透過基板管理控制器51，遠端管理主機可取用系統初始化的設 定事件資料及BIOS檢查點資訊的檢查資料。本發明的事件監視器允許使用 ^ 者監視任何所需的初始化事件。 請參閱第3圖。在實際應用中，基板管理控制器51具有有限的通用輸 入輸出（GPIO, General Purpose Input/Output)接腳，以接收事件訊號Se與 檢查資料訊號Se ’但仍可能不足以接收全部的訊號。一個簡單的方法是安 裝一外接的通用輸入輸出裝置54以提供足夠的通用輸入輸出接腳予事件訊 號檢查資料訊號Sc，例如一通用輸入輸出擴張器(GPI〇 expender)或一 具剩餘通用輸入輸出接腳的控制器。然後將基板管理控制器51與通用輸入 輸出裝置54，連接至從電腦主機領域1〇之系統晶片組12延伸的系統管理 12 1326823 匯流排42。事件訊號Se與檢查資料訊號Sc隨後被傳送至通用輸入輸出裝置 54，並由基板管理控制器51透過系統管理匯流排42取用 請參閱第4圖’另一針對基板管理控制器之有限通用輸入輸出接腳的 解決方式’為安裝一外加的匯流排多工器（MUX) 55連接在基板管理控制 器51、事件監視器52及解碼器53之間。事件訊號Se與檢查資料訊號Sc 將被傳送至匯流排多工器55。然後匯流排多工器55將依據來自基板管理控 制器51之選擇訊號Ss ’從事件訊號Se與檢查資料訊號Sc中選擇一類型訊 ^ 號發送至基板管理控制器51。選擇訊號Ss可依照遠端管理主機的命令或基 板管理控制器51内的選擇邏輯被基板管理控制器51所傳送。 第5圖為第4圖區域主板01之實際應用的詳細圖解。在遠端監視模組 50中包含有4個外加的事件監視器52 »—連接於系統晶片組12、一連接於 電源供應器15 ;另外兩者連接於LPC匯流排41及狀態監視器16。系統晶 片組12可提供來自電源整流器（圖中未示）或電源供應器15之「電源啟 動次序(power-up sequence)」狀態訊號。關於狀態檢查器16，通常一般的硬 0 體檢查控制器可被用於監視系統溫度及風扇資訊訊號。配置有一電源控制 器之某些電源供應器可產生一個或多個狀態訊號。並如同先前提及的，某 些狀態訊號例如：「匯流排重置釋放(bus reset release)」已是系統輸入/輪出 匯流排40的匯流排協定的一部份。 因此，事件監視器52可收集在系統初始過程之不同狀態訊號予基板管 理控制器51。加上自解碼器53之檢查資料訊號，遠端監視模組51幾乎可 監視在系統初始化過程，每一立即發生於區域主板〇1之詳細事件。基板管 13 1326823 理控制器51可連接至網路介面n，例如：一具網路介面控顧（MC， MetWOTklnterfaceController)及區域網路通訊埠之區域網路（LAN)模組， 以透過遠端管理鍵路（如區域網路）傳送上述訊號至遠端管理主機。當然， 在系統初始化過程之非BIOS (non-BIOS)事件中，遠端監視模組中的解碼 器是可被省略的。 雖然本發明的技術内容已經以較佳實施例揭露如上，然其並非用以限 定本發明，任何熟習此技藝者，在不脫離本發明之精神所做些許之更動與 潤飾，皆應涵蓋於本發明之範疇内，因此本發明之保護範圍當視後附之申 請專利範圍所界定者為準-【圖式簡單說明】 第1圖為先前技術申區域主板基板層級管理之舊式實施例之方塊圖。 第2圖為依照本發明之實施例，在區域主板裝配遠端監視模組之方塊The computer mainframe field 10 operates as a computer, usually containing one or more processors u, system memory (not shown), BIOS (basic output input system Basic (four) SysteiQ or start code initialization codes) 13. Processing The system and the bios operate as a bridge interface system chipset (systein) 12, a power supply (not shown) and other system components (not shown). In some embodiments, the processor has a memory controller therein, such as an architecture-based 86 processor to directly access system matrices. For a memory that is not equipped with memory control, a memory hub or a North Bridge is indispensable. The so-called BIOS 13 contains boot image data or start code, which is usually stored/built in a read-only memory/flash memory device. The memory device is an input/output device, and the processor u needs to capture the BI〇s 13 from the memory device through the system chipset 12 to turn on the regional motherboard 〇1. In the present invention, system chipset 12 operates as a bridge interface between the processor and the BIOS. Further, the system chipset 12 is an input/output hub (I/〇 hub) between the processor 11 and an input/output device (not shown). The system inputs/rounds the bus 40, for example, an LPC or a PCI-based bus (e.g., PCI, pCI-X, PCI_E), which is connected to the computer mainframe 1 to the input/output device. The system input/rounding bus 40 allows the BIOS 13 to write the inspection data (BI〇s checkpoint information) 9 1326823 to a specific input/output address thereon, such as 0x0080 (or P〇rt80). In a practical implementation, system input/output bus 40 can be coupled to system chipset 12 and BIOS 13. The remote monitoring module 50 mainly includes a baseboard management controller (BMC) 51, one or more event monitors 52, and a decoder 53. The baseboard management controller 51 is a firmware-based area management controller that connects the computer host field 10 and the remote management host to transmit event signals and check data signals, and provides a remote management host through the remote management link. End control/monitoring capabilities. Basically, the baseboard management controller 51 can be implemented as a dedicated area management controller that is placed on a regional motherboard or system management daughter card (SMDC), or as a centralized, system level area management controller for a multi-zone motherboard. The baseboard management controller 51 can be connected to the host computer domain through a communication interface compatible with the Intelligent Platform Management Interface (IPMI), including a system management bus (SMBus), a serial port link, and a network interface link. Or the system input/output bus beta event monitor 52 is also coupled to the host computer domain 10 and the baseboard management controller 51 by circuitry to detect specific initialization events corresponding to the domain from the host computer during the system initialization process, such as : resetting the status signal of the release, initial BIOS capture, etc., and transmitting the event signal Se to the baseboard management controller 51. Referring to Figure 2A, in an embodiment of the invention, event monitor 52 primarily includes synchronizer 521, status checker 522, and event latch 523. Synchronizer 521 receives the monitoring status signal that has been synchronized with the system timing and sends it to status checker 522. The monitor status signal sm can be provided by a system hardware component, a system input/output bus or a status monitor (not shown). The status checker 522 is connected to the synchronizer 521 and the event latch 523. The status signal that is synchronized is located at a set electric grinder level 10 1326823 (voltage level), and the event latch 523 latches and holds the event. The signal se is located at a specific voltage level and transmitted to the substrate management controller. The above three components of the event monitor 52 can be achieved by a circuit having a flip-flop, but the actual operation depends on the situation. Basically, if the signal already has synchronized system timing, the synchronizer 521 is not necessary in the event monitor 52. Figure 2B illustrates a practical example of monitoring an event monitor for the initial BIOS capture. The two signals LPC_F_ and LPC_RESET are included in the bus bar protocol of the LPC bus bar 41. When the BI0S 13 is first captured by the processor 11, the LPC_FRAME is used to indicate "starting bus transaction", and LPC_RESET A reset of the LPC bus bar 41 is indicated. The system designer can limit the voltage level of the associated signal to determine the state of the initialization event. In the embodiment of the present invention, if the signal LPC_RESET voltage level is high (HIGH) and the LPC_FRAME voltage level is low (LOW) (actual monitoring LPC-F_# and LPC_RESET*) 'two signals with specific voltage levels It will be acknowledged by the state checker 522 and processed through an event latch with an OR-gate and a flip-flop. Compared to status signals, event signals need to be limited to specific voltage levels to indicate the occurrence or absence of a particular event. For PCI-based system input/output busses, event monitor 52 still monitors the initial BIOS capture event in a manner similar to the LPC bus. That is, the relevant signals and states depend on the embodiment. The system used in the actual application I/O bus and the type of system chip will give different definitions of the signal status of the initialization event. Even initialization events can be different. For example, an nVIDIA chip (eg, CK804, MCP155) can retrieve initialization information from certain BIOSes prior to the initial BIOS capture initialization event. Furthermore, the same signal will be used for different monitoring tasks, for example, if the system input/output bus is PCI-based, the initialization event of the "ROMStrapping" 11 1326823 and the "primary BIOS" The initialization event will be monitored by detecting the PCI_RESET* (LOW) signal. The decoder 53 is connected to the system input/output bus 40 and interprets the inspection data written to the specific input/output address P〇rt80 on the system input/output bus 40. The interpreted inspection data is transmitted to the substrate management controller 51 as the inspection data signal 5{:. Fig. 2C is an example of the decoder 53. In Figure 2, the bus interface monitors the input/output bus's transactions. The comparator compares the current address with the target address of the stored BIOS check data, and then generates a data latch enable signal. The bus interface also generates a data valid signal based on the bus bar protocol of the system input/output bus 40. (If the current data is an inspection data' can be latched by the event latch 52 as an event.) In addition to the remote management, the decoder 53 can still be coupled to an indicator 31 to display the inspection data thereon. Finally, through the substrate management controller 51, the remote management host can access the system-initiated setting event data and the inspection data of the BIOS checkpoint information. The event monitor of the present invention allows the use of a monitor to monitor any required initialization events. Please refer to Figure 3. In practical applications, the baseboard management controller 51 has a limited general purpose input/output (GPIO) pin to receive the event signal Se and the check data signal Se' but may not be sufficient to receive all of the signals. A simple method is to install an external universal input/output device 54 to provide sufficient general-purpose input and output pins to the event signal to check the data signal Sc, such as a general-purpose input/output expander (GPI〇expender) or a residual general-purpose input and output. The controller of the pin. The baseboard management controller 51 and the universal input/output device 54 are then connected to a system management 12 1326823 bus bar 42 extending from the system chipset 12 of the computer mainframe area. The event signal Se and the inspection data signal Sc are then transmitted to the general-purpose input/output device 54 and accessed by the substrate management controller 51 through the system management bus 42. Please refer to FIG. 4, another limited universal input for the substrate management controller. The solution of the output pin is connected between the substrate management controller 51, the event monitor 52, and the decoder 53 for mounting an additional bus multiplexer (MUX) 55. The event signal Se and the inspection data signal Sc will be transmitted to the bus multiplexer 55. The bus multiplexer 55 then transmits a type signal from the event signal Se and the inspection data signal Sc to the substrate management controller 51 in accordance with the selection signal Ss' from the substrate management controller 51. The selection signal Ss can be transmitted by the baseboard management controller 51 in accordance with a command from the remote management host or a selection logic in the board management controller 51. Figure 5 is a detailed illustration of the practical application of the motherboard 01 in the area of Figure 4. The remote monitoring module 50 includes four additional event monitors 52 » connected to the system chip set 12 , one connected to the power supply 15 , and the other connected to the LPC bus bar 41 and the status monitor 16 . System chip set 12 can provide a "power-up sequence" status signal from a power rectifier (not shown) or power supply 15. With regard to the state checker 16, a generally general hard body inspection controller can be used to monitor system temperature and fan information signals. Some power supplies configured with a power controller can generate one or more status signals. And as previously mentioned, certain status signals such as "bus reset release" are already part of the bus protocol of the system input/rounding bus 40. Thus, event monitor 52 can collect different status signals from the substrate management controller 51 during the initial process of the system. In addition to the check data signal from the decoder 53, the remote monitoring module 51 can monitor almost every event that occurs immediately in the regional motherboard 〇1 during the system initialization process. The substrate controller 13 1326823 can be connected to the network interface n, for example, a network interface control (MC, MetWOTklnterfaceController) and a regional network communication network (LAN) module to transmit through the remote end Management keys (such as regional networks) transmit the above signals to the remote management host. Of course, in a non-BIOS (non-BIOS) event during system initialization, the decoder in the remote monitoring module can be omitted. Although the technical content of the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and any modifications and refinements made by those skilled in the art without departing from the spirit of the present invention should be Within the scope of the invention, the scope of the invention is therefore defined by the scope of the appended claims. [FIG. 1] FIG. 1 is a block diagram of an old embodiment of a prior art motherboard substrate level management. . 2 is a block diagram of assembling a remote monitoring module on a regional motherboard according to an embodiment of the present invention.
第2A圖為依本發明實施例，’事件監視器之方塊圖。 第2B圖為依本發明之另一實施例’特定事件監視器實際用以監視初次 BIOS擷取事件之方塊圖。 第2C圖為依本發明之另一實施例’解碼器實際用以解譯由BIOS所寫 入之檢查資料之方塊圖。 第3圖為依本發明之另一實施例，區域主板裝配遠端監視模組之方塊 圖。 第4圖為依本發明之另一實施例’區域主板裝配遠端監視模組之方塊 圖 1326823 第5圖為第4圖中區域主板之實際運用的詳細方塊圖。 .【主要元件符號說明】 01 :區域主板 10 :電腦主機領域 11:處理器 12 .糸統晶片組Figure 2A is a block diagram of an 'event monitor' in accordance with an embodiment of the present invention. Figure 2B is a block diagram of a particular event monitor actually used to monitor an initial BIOS capture event in accordance with another embodiment of the present invention. Figure 2C is a block diagram of a decoder for actually interpreting the inspection data written by the BIOS in accordance with another embodiment of the present invention. Figure 3 is a block diagram of a remote monitoring module for a regional motherboard assembly in accordance with another embodiment of the present invention. Figure 4 is a block diagram of a remote monitoring module for a regional motherboard assembly according to another embodiment of the present invention. Figure 1326823 Figure 5 is a detailed block diagram of the actual operation of the regional motherboard in Figure 4. [Main component symbol description] 01 : Regional motherboard 10 : Computer mainframe area 11: Processor 12 .
13 : BIOS 14 :系統記憶艟 15 :電源供應器 16狀態監視器 17 :網路介面 20 :基板管理控制器 30 :解碼器 31 :指示器 40 :系統輸入/輸出匯流排 41 : L P C匯流排 42 :系統管理匯流排 50 :遠端監視模組 51 :基板管理控制器 52 :事件監視器 521 :同步器 522 :狀態檢查器 15 1326823 523 :事件閂鎖器 53. ·-解碼器·· 54 :通用輸入輸出裝置 55 :匯流排多工器13 : BIOS 14 : System Memory 艟 15 : Power Supply 16 Status Monitor 17 : Network Interface 20 : Baseboard Management Controller 30 : Decoder 31 : Indicator 40 : System Input / Output Bus 4 : LPC Bus 42 : System Management Bus 50: Remote Monitoring Module 51: Baseboard Management Controller 52: Event Monitor 521: Synchronizer 522: Status Checker 15 1326823 523: Event Latch 53. ·-Decoder·· 54 : Universal input and output device 55: bus multiplexer