1322316 16997twf.doc/y 九、發明說明： 【發明所屬之技術領域】 本發明是有關於-種 (bGndingpad)以及顯示面 板（displaypand)，且特別是有關於一種能夠提昇焊墊金 屬層之附著力的焊墊及具有此焊墊的顯示面板。 【先前技術】1322316 16997twf.doc/y IX. Description of the Invention: [Technical Field] The present invention relates to a type of (bGndingpad) and a display panel, and particularly relates to an adhesion of a metal layer of a solder pad a solder pad and a display panel having the pad. [Prior Art]
隨著視訊技術的發展，顯示器已成為人們獲取資訊的 重要媒介。-般而言，顯示器中具有㈣顯示:#訊的顯示 面板（diSplay panel)，並且此顯示面板是由驅動晶片 /dnvmg ic)所控制’藉由驅動晶片運算並提供數位訊 號’而使㈣7F面板產生畫面。然而，在驅動晶片與顯示 面板之間，需要利用晶片封裝結構將兩者電性連接。 齡秘㈣造巾，大乡採用捲帶承載 封裝、心構（Tape Carrier Package，以下稱為Tcp)以電性 連接驅動晶片與顯示面板。然而，近年來，驅動晶片的設 収多朝著高腳數⑽）與微細間距（finepitch)的趨勢With the development of video technology, displays have become an important medium for people to obtain information. In general, the display has (4) display: #di's display panel (diSplay panel), and the display panel is controlled by the drive chip / dnvmg ic) 'by driving the wafer operation and providing digital signals' (4) 7F panel Produce a picture. However, between the driving wafer and the display panel, it is necessary to electrically connect the two using the chip package structure. Ageing (4) Towels, Daxiang uses a tape carrier package and a Tape Carrier Package (hereinafter referred to as Tcp) to electrically connect the driving chip and the display panel. However, in recent years, the design of the driver chip has been trending toward a high number of pins (10) and a fine pitch (finepitch).
邁進’且_面板大錄要求錢具有可撓性（如疏） 以及可搭載被動元件等特性，所以晶粒_玻4接合封事於構 ==Giass，以τ稱為⑽）以及晶片_軟性電路; ，、、、口構(Chip 0n Film，以下稱為C〇F)被發展出來，且宜陸 績不斷地被應用在大尺寸面板中。 /、 圖1A緣示為習知中一種顯示面板的示意圖，請參照 圖1A，顯示面板100具有一顯示區11〇與一非顯示區^、，， 顯不區no中具有多數條掃晦線112與資料線ιΐ4，且掃 16997twf.doc/y 瞒線^12與資料線U4將顯示區π_分為多個晝素單元 116掃目田線112與資料線114延伸至非顯示區120的部分 會形成谭藝13〇,所以驅動晶片（未緣示）可與焊墊】3〇 電性連接並進而驅動顯示面板100。 圖1B繪示為焊墊的局部放大示意圖，圖1C繪示為沿 圖1B中之A-A，線的剖面示意圖，請共同參照圖m與圖 1C如圖1B所繪示，由於驅動晶片（未繪示）具有高腳 數（hlghI/〇)與微細間距（finepitch) ’所以焊墊130也 相f應地具有較小之寬度d。請再參照圖1C，將此具有較 小見度d之焊塾130沿圖1B中之A-A，線剖開，可得到焊 墊13〇的剖面結構。此焊墊130具有絕緣層134、焊墊金 屬層136、保護層138與導電層139。絕緣層134設置於基 上4墊金屬層136配置在絕緣層134上。保護層 又置於焊塾金屬層上。導電層139設置於保護層 I、38上1且導電層139會與焊墊金屬層⑶電性連接，更 羊、’· °其疋利用如圖1B中所緣示的開口 15〇而使焊 墊金屬層136與導電層139電性連接。 如圖1β以及圖1C中所示，因為焊墊130具有較小之 因而使得在焊塾130中各膜層彼此之間的接觸面 積^隨之變小’所以’將造成各膜層彼此之間的附著力 特別是焊墊金屬層136與絕緣層134之間的附著力 1j a所以’在修復驅動晶片時，將容易發生焊墊金屬 = <緣層134上剝落的問題，因而導致後續的驅動 曰曰片然法良好地電性連接至焊墊⑽上，而造成顯示面板 16997twf.doc/y 16997twf.doc/y 100的製作良率下降 100之不正常顯示以及顯示面板 【發明内容】 有鑑於此，本發明的目的 焊塾中各膜層之間其提昇了 之間的附著力，所以能提昇焊墊之製作良率。巴，毒層 t發明的再—目的是提供—種顯示面板，其具有 之知塾，進而能提昇顯示面板之製作良率。/、 提出一種焊墊，包括絕緣層、焊 保護層以及導電層。絕緣層設置物;上 之門=及；Ϊ在絕緣層上。圖案層配置在絕緣層與基板 絶緣層以及位於絕緣層上 、定 面0保護層設置於焊墊金屬s 至^ &伏之表 : 塾金屬層上。導電層設置於保護層上， 且導電層會與焊墊金屬層電性連接。 隻曰上 本毛月又提出一麵示面板，其具有一顯示區以及— ¥顯2 ’此顯7^面板包括多個晝素單元、多條資料線、 :條掃目田線、多個掃聪線焊墊與多個資料線焊塾。畫素單 =配^於顯示區。資料線以及掃鱗配置於顯示區，且與 ^素單元電性連接。掃崎焊魏置於賴示區，且與掃 目田線電〖生連接。資料線焊塾配置於非顯示區，且與資料線 電性連接’其中各資料線焊塾包括絕緣層、焊塾金屬層、 至少一圖案層、保護層以及導電層。絕緣層設置於基板上。 烊墊金屬層配置在絕緣層上。圖案層配置在絕緣層與基板 之間以及絕緣層以及焊墊金屬層之間至少其中之一，以使 1322316 16997twf.doc/y 絕緣層以及位於絕緣層上的焊墊金屬層具有一起伏之表 面。保護層設置於焊墊金屬層上。導電層設置於保護層上， 且導電層會與焊墊金屬層電性連接。 在本發明之一實施例中，上述之圖案層之材質是一金 屬材質，且圖案層是位於絕緣層與基板之間。 在本發明之一實施例中，上述之圖案層之材質是非晶 矽或多晶矽，且圖案層是位於絕緣層以及焊墊金屬層之間。 在本發明之一實施例中，上述之圖案層是配置在絕緣 層與基板之間以及絕緣層以及焊墊金屬層之間，且位於絕 緣層與基板之間的圖案層其材質是金屬材質，位於絕緣層 以及焊墊金屬層之間的圖案層其材質是非晶矽或多晶矽。 在本發明之一實施例中，上述之配置在絕緣層與基板 之間的圖案層以及配置在絕緣層與焊墊金屬層之間的圖案 層兩者的圖案是相同或不相同。 在本發明之一實施例中，上述之配置在絕緣層與基板 之間的圖案層以及配置在絕緣層與焊墊金屬層之間的圖案 層兩者的圖案是對齊或是沒有對齊。 在本發明之一實施例中，上述之圖案層之圖案是選自 於圓形圖案、方形圖案、多邊形圖案及其組合其中之一。 在本發明之一實施例中，上述之導電層之材質例如包 括一金屬氧化物。 本發明因採用配置在絕緣層與基板之間以及絕緣層 與焊墊金屬層之間至少其中之一的圖案層，因此使得絕緣 層以及位於絕緣層上的焊墊金屬層具有一起伏之表面。因 1322316 16997twf.doc/y • 此’可提昇各膜層之間的附著力。尤其是焊墊金屬層與絕 :、緣層之間的附著力可藉以提昇，所以可減少焊墊金屬層自 絕緣層上剝落的問題。另外，將上述之料應用於顯示面 • 板中，將能夠提昇顯示面板之製作良率。 ^為讓本發明之上述和其他目的、特徵和優點能更明顯 . 賴’ τ文特舉較佳實施例，並配合所關式，作詳細說 明如下。 " 【實施方式】 • 第一實施例 圖2繪不為本發明之較佳實施例中一種焊墊的俯視示 意圖，圖2Α繪示為圖2中沿Β_Β，線之焊墊的剖面示意圖。 請共同參照圖2與圖2Α，焊墊2〇〇包括絕緣層21〇、焊墊 金屬層220、至少一圖案層23〇、保護層24〇以及導電層 250。絕緣層210設置於基板260上。焊墊金屬層220配置 在絕緣層210上。圖案層230配置在絕緣層21〇與基板26〇 之間以及絕緣層210與焊塾金屬層220之間至少其中之一 φ (繪示於圖2Α、圖3Α〜圖3C中），以使絕緣層210以 及位於絕緣層210上的焊墊金屬層220具有一起伏之表面 27〇。保護層240設置於焊墊金屬層220上。導電層25〇 設置於保護層240上，且導電層250會與焊墊金屬層22〇 電性連接，更詳細而言，其是利用如圖2中所繪示的開口 280而使焊墊金屬層220與導電層250電性連接。此外， • 在本發明之一實施例中，導電層250之材質例如是一金屬 氧化物’且此金屬氧化物可以是銦錫氧化物（Indium Tin 1322316 16997twf.doc/y 〇xide，Iiro)或銦鋅氧化物（Indium Zinc Oxide，IZO)等。 請繼續參照圖2A，此圖案層230之材質是一金屬材 質，而圖案層230僅位於絕緣層21〇與基板26〇之間。且 由於絕緣層210之表面會相對於圖案層23〇具有起伏之表 面270，所以絕緣層210之表面的粗糙度將會增加，如此 一來’焊墊金屬層220就可以較佳地附著在絕緣層21〇上， 而減少焊墊金屬層220自絕緣層210上剝落之情形。同樣 地，由於圖案層230之設置，使得焊墊金屬層22〇、保護 層240以及導電層250等也具有起伏之表面270與良好之 粗糙度，所以各膜層之間的附著力也都能夠藉以提昇。 圖3A〜圖3C繪示為本發明較佳實施例之另外三種焊 塾的剖面不'思、圖。清先參照圖3A ’圖案層230a之材質是 非晶石夕或是多晶石夕’且圖案層230a僅位於絕緣層210以及 焊墊金屬層220之間。 請再參照圖3B ’焊墊200中設置了兩個圖案層230、 230a’而圖案層230、230a是配置在絕緣層210與基板260 之間以及絕緣層210與焊墊金屬層220之間，且位於絕緣 層210與基板260之間的圖案層230其材質是金屬材質， 位於絕緣層210與焊墊金屬層220之間的圖案層230a其材 質是非晶石夕或是多晶石夕。設置了兩個圖案層230、230a的 焊墊200可以更加地提昇各膜層表面之粗糙度，而提昇各 膜層彼此之間的附著力。 另外，如圖3B與圖3C所繪示，在具有兩個圖案層 230、230a的情形中，配置在絕緣層210與基板260之間 1322316 16997twf.doc/y 的圖案層230以及配置在絕緣層210與焊墊金屬層220之 ㈤的圖案層230a兩者的圖案可以是對齊（緣示於圖3B中） 或是沒有對齊（繪示於圖3C中）。特別是，當圖案層23〇、 . 23〇a為圖3C所綠示之沒有對齊的情況時，由於具有圖案 層、23〇&的面積變大，所以各膜層表面之粗糙度將更 .. 加提歼’因而使得各膜層彼此之間的附著力將會更佳。 在本發明之另—實施例中，如圖2A、圖3A〜圖3C 所緣不之圖案層23G、23Ga之圖案例如是選自於圓形圖 •案、方形圖案、多邊形圖案及其組合其中之-，且如圖3B 與圖3C所緣不’配置在絕緣層210與基板260之間的圖 案層230以及配置在絕緣層210與焊墊金屬層220之間的 圖案層230a兩者的圖案可以是相同或不相同。 綜上所述’藉由改設計圖案層之形狀、個數以及配置 位置’而增=各膜層表面之粗糙度，並進而提昇各膜層彼 此之間丨丨喊力。軸是焊塾金屬層22〇與絕緣層21〇之 間的附著力可藉以提昇，因此，後續在修復驅動晶片時， • 即可以減少焊墊金屬層自絕緣層21〇上剝落之問題。 苐二實施例 圖4繪示為本發明較佳實施例中一種顯示面板及其焊 • _局部放大的示意圖。請參照圖4，顯示面板具有 •户以及—非顯示區320 ’此顯示面板300包括 二德t素"!疋330、多條掃聪線340、多條資料線350、多 目田線卜墊36Q與多個資料線焊墊37〇。畫素單元33〇 12 1322316 16997twf.doc/y 配置於顯示區310。資料、線35〇以及掃瞒線34〇配置於顯 示區310 ’且與畫素單元33〇電性連接。婦目苗線焊塾綱 配置於非顯示區310，且與掃瞄線340電性連接。資料線 焊墊370配置於非顯示區31〇,且與資料線35〇電性連接。 值得注意的是，其中各資料線焊墊37〇例如為上述第 一實施例中所述之焊墊200(如圖2所繪示），也就是說， 沿圖4中之C-C’線之資料線焊墊37〇的剖面結構，其可以 是如第一實施例中圖2入、圖3A〜圖3C所示之焊墊2〇〇 的剖面結構，其中各膜層的材質、各膜層的配置關係以及 圖案層230、230a的形狀、個數以及配置位置均可與第一 貫施例中所述的類似或相同，所以在此將不再予以贅述。 另外，具有此資料線焊墊370的顯示面板可以是液晶顯示 面板（liquid crystal display panel，LCD panel )、有機電激 發光顯示盗面板（organic electro-luminescence display panel, OLED panel)或是電漿顯示面板（plasma dispky panel, PDP)。總之，將上述第一實施例中的焊墊2〇〇應 用在上述的顯示面板300中，將可以提昇顯示面板3〇〇之 製作良率。 細上所述，本發明之焊墊與顯示面板具有下列優點： (1) 焊墊因採用配置在絕緣層與基板之間以及絕緣 層與焊塾金屬層之間至少其中之一的圖案層，因此，可提 昇焊墊金屬層與絕緣層之間的附著力。 (2) 由於焊墊金屬層與絕緣層之間的附著力增加， 所以可有效地減少焊墊金屬層自絕緣層上剝落的現象。 13 I6997twfdoc/y ⑴將具有圖案層之焊墊，應用於顯 能夠提昇顯示面板之製作良率。 將 雖然本發明已以較佳實施例揭露如上， 限顯’任何熟習此技藝者，在不脫離:發;= t靶：内，當可作些許之更動與潤飾，因此本發明之：:f 粑圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A繪不為習知中一種顯示面板的示意圖。 圖1B緣示為焊墊的局部放大示意圖。 圖1C繪不為沿圖1B中之A_A，線的剖面示意圖。 圖2繪不為本發明之較佳實施例中一種焊墊的俯視示 意圖。 圖2A繪示為圖2中沿B-B，線之焊墊的剖面示意圖。 圖3A〜圖3C繪示為本發明較佳實施例之另外三種焊 墊的剖面示意圖。 圖4繪示為本發明較佳實施例中一種顯示面板及其焊 墊的局部放大的示意圖。 ^ 【主要元件符號說明】 100、300 :顯示面板 110、310 :顯示區 112、340 :掃瞄線 114、350 :資料線 116、330 :晝素單元 120、320 :非顯示區 1322316 16997twf.doc/yStepping into the 'and_ panel's record requires money to have flexibility (such as sparse) and can be equipped with passive components and other characteristics, so the grain_glass 4 joint seal is in the structure == Gias, τ is called (10)) and the wafer _ soft Circuits, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, FIG. 1A is a schematic view of a conventional display panel. Referring to FIG. 1A, the display panel 100 has a display area 11〇 and a non-display area, and has a plurality of broom lines in the display area no. 112 and the data line ιΐ4, and the sweep 16997twf.doc/y ^ line ^12 and the data line U4 divide the display area π_ into a plurality of pixel units 116, the scan field line 112 and the data line 114 extend to the non-display area 120. Part of the formation will be Tan Yi 13〇, so the driver chip (not shown) can be electrically connected to the pad 3 and drive the display panel 100. 1B is a partially enlarged schematic view of the pad, and FIG. 1C is a cross-sectional view taken along line AA of FIG. 1B. Please refer to FIG. 1B and FIG. 1C as shown in FIG. 1B, due to driving the chip (not shown). Show) has a high number of feet (hlghI / 〇) and fine pitch (finepitch) 'so the pad 130 also has a smaller width d. Referring again to Fig. 1C, the solder bump 130 having a smaller visibility d is cut along the line A-A in Fig. 1B to obtain a cross-sectional structure of the pad 13A. The pad 130 has an insulating layer 134, a pad metal layer 136, a protective layer 138, and a conductive layer 139. The insulating layer 134 is disposed on the substrate 4 and the pad metal layer 136 is disposed on the insulating layer 134. The protective layer is placed on the solder metal layer. The conductive layer 139 is disposed on the protective layer I, 38 and the conductive layer 139 is electrically connected to the pad metal layer (3), and is further soldered by using the opening 15〇 as shown in FIG. 1B. The pad metal layer 136 is electrically connected to the conductive layer 139. As shown in FIG. 1β and FIG. 1C, since the pad 130 has a small size, the contact area of each film layer in the pad 130 is reduced, so that the layers are caused to each other. The adhesion is particularly the adhesion between the pad metal layer 136 and the insulating layer 134. Therefore, when repairing the driving wafer, the problem of peeling off the pad metal = < edge layer 134 will easily occur, thus resulting in subsequent The driving blade is electrically connected to the bonding pad (10), and the display yield of the display panel 16997twf.doc/y 16997twf.doc/y 100 is reduced by 100 and the display panel is invented. In view of this, the purpose of the present invention is to improve the adhesion between the film layers in the solder bumps, so that the fabrication yield of the solder pads can be improved. Bar, toxic layer t re-invented - the purpose is to provide a kind of display panel, which has the knowledge, and thus can improve the production yield of the display panel. /, proposed a solder pad including an insulating layer, a solder resist, and a conductive layer. Insulation layer setting; upper door = and; Ϊ on the insulating layer. The pattern layer is disposed on the insulating layer and the substrate insulating layer and on the insulating layer, and the fixed layer 0 protective layer is disposed on the pad metal s to the surface of the ruthenium metal layer. The conductive layer is disposed on the protective layer, and the conductive layer is electrically connected to the pad metal layer. Only on the hairy month, a display panel is presented, which has a display area and - ¥ display 2 'This display 7^ panel includes a plurality of pixel units, multiple data lines,: a sweeping field line, multiple Sweep wire solder pads and multiple data wires are soldered. Picture list = with ^ display area. The data line and the scale are arranged in the display area, and are electrically connected to the unit. The shoji welding was placed in the Lai-Xie area and connected to the sweeping field. The data wire bonding pad is disposed in the non-display area and electrically connected to the data line. The data line soldering includes an insulating layer, a solder metal layer, at least one pattern layer, a protective layer and a conductive layer. The insulating layer is disposed on the substrate. The pad metal layer is disposed on the insulating layer. The pattern layer is disposed between the insulating layer and the substrate and at least one of the insulating layer and the pad metal layer such that the 1322316 16997 twf.doc/y insulating layer and the pad metal layer on the insulating layer have a surface together . The protective layer is disposed on the metal layer of the pad. The conductive layer is disposed on the protective layer, and the conductive layer is electrically connected to the pad metal layer. In an embodiment of the invention, the material of the pattern layer is a metal material, and the pattern layer is located between the insulating layer and the substrate. In an embodiment of the invention, the material of the pattern layer is amorphous or polycrystalline, and the pattern layer is between the insulating layer and the pad metal layer. In an embodiment of the invention, the pattern layer is disposed between the insulating layer and the substrate and between the insulating layer and the pad metal layer, and the pattern layer between the insulating layer and the substrate is made of a metal material. The pattern layer between the insulating layer and the pad metal layer is made of amorphous or polycrystalline germanium. In an embodiment of the invention, the pattern of the pattern layer disposed between the insulating layer and the substrate and the pattern layer disposed between the insulating layer and the pad metal layer is the same or different. In one embodiment of the invention, the pattern of the pattern layer disposed between the insulating layer and the substrate and the pattern layer disposed between the insulating layer and the pad metal layer is aligned or unaligned. In an embodiment of the invention, the pattern of the pattern layer is one selected from the group consisting of a circular pattern, a square pattern, a polygonal pattern, and a combination thereof. In an embodiment of the invention, the material of the conductive layer comprises, for example, a metal oxide. The present invention employs a pattern layer disposed between at least one of the insulating layer and the substrate and between the insulating layer and the pad metal layer, thereby causing the insulating layer and the pad metal layer on the insulating layer to have a surface in common. Because 1322316 16997twf.doc/y • This can improve the adhesion between the layers. In particular, the adhesion between the metal layer of the pad and the edge layer can be improved, so that the problem of peeling off the metal layer of the pad from the insulating layer can be reduced. In addition, applying the above materials to the display panel will improve the production yield of the display panel. The above and other objects, features, and advantages of the present invention will become more apparent from the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; <Embodiment> First Embodiment FIG. 2 is a plan view showing a solder pad which is not a preferred embodiment of the present invention, and FIG. 2 is a cross-sectional view of the pad along the line of FIG. Referring to FIG. 2 and FIG. 2 together, the pad 2 includes an insulating layer 21, a pad metal layer 220, at least one pattern layer 23, a protective layer 24, and a conductive layer 250. The insulating layer 210 is disposed on the substrate 260. The pad metal layer 220 is disposed on the insulating layer 210. The pattern layer 230 is disposed between the insulating layer 21A and the substrate 26A and at least one of φ (shown in FIG. 2A, FIG. 3A to FIG. 3C) between the insulating layer 210 and the solder metal layer 220 to insulate The layer 210 and the pad metal layer 220 on the insulating layer 210 have a surface 27 一起 together. The protective layer 240 is disposed on the pad metal layer 220. The conductive layer 25 is disposed on the protective layer 240, and the conductive layer 250 is electrically connected to the pad metal layer 22, and more specifically, the pad metal is made by using the opening 280 as shown in FIG. The layer 220 is electrically connected to the conductive layer 250. In addition, in an embodiment of the present invention, the material of the conductive layer 250 is, for example, a metal oxide' and the metal oxide may be indium tin oxide (Indium Tin 1322316 16997 twf.doc/y 〇xide, Iiro) or Indium Zinc Oxide (IZO) and the like. Referring to FIG. 2A, the material of the pattern layer 230 is a metal material, and the pattern layer 230 is only located between the insulating layer 21A and the substrate 26A. And since the surface of the insulating layer 210 has an undulating surface 270 with respect to the pattern layer 23, the roughness of the surface of the insulating layer 210 will increase, so that the pad metal layer 220 can be preferably attached to the insulating layer. The layer 21 is on the surface to reduce the peeling of the pad metal layer 220 from the insulating layer 210. Similarly, due to the arrangement of the pattern layer 230, the pad metal layer 22, the protective layer 240, the conductive layer 250, and the like also have an undulating surface 270 with good roughness, so that adhesion between the layers can also be utilized. Upgrade. 3A-3C illustrate cross-sectional views of three other solder rafts in accordance with a preferred embodiment of the present invention. Referring first to Fig. 3A, the material of the pattern layer 230a is amorphous or polycrystalline, and the pattern layer 230a is located only between the insulating layer 210 and the pad metal layer 220. Referring again to FIG. 3B, the two pattern layers 230, 230a' are disposed in the pad 200, and the pattern layers 230, 230a are disposed between the insulating layer 210 and the substrate 260 and between the insulating layer 210 and the pad metal layer 220. The pattern layer 230 between the insulating layer 210 and the substrate 260 is made of a metal material, and the pattern layer 230a between the insulating layer 210 and the pad metal layer 220 is made of amorphous or polycrystalline. The pad 200 provided with the two pattern layers 230, 230a can further enhance the roughness of the surface of each film layer and enhance the adhesion of the film layers to each other. In addition, as illustrated in FIG. 3B and FIG. 3C , in the case of having two pattern layers 230 , 230 a , the pattern layer 230 disposed between the insulating layer 210 and the substrate 260 1322316 16997 twf.doc/y and disposed on the insulating layer The pattern of both the 210 and the pattern layer 230a of the (f) of the pad metal layer 220 may be aligned (shown in FIG. 3B) or not aligned (shown in FIG. 3C). In particular, when the pattern layers 23〇, .23〇a are not aligned in the green color of Fig. 3C, since the area of the pattern layer, 23〇& becomes larger, the roughness of the surface of each film layer will be more .. 提提歼' thus makes the adhesion of the layers to each other will be better. In another embodiment of the present invention, the pattern of the pattern layers 23G, 23Ga as shown in FIG. 2A and FIG. 3A to FIG. 3C is selected, for example, from a circular pattern, a square pattern, a polygonal pattern, and combinations thereof. - and as shown in FIGS. 3B and 3C, the pattern layer 230 disposed between the insulating layer 210 and the substrate 260 and the pattern layer 230a disposed between the insulating layer 210 and the pad metal layer 220 are patterned. Can be the same or not the same. In summary, the thickness of each film layer is increased by changing the shape, number, and arrangement position of the design layer layer, and the squeaking force between the film layers is further enhanced. The adhesion between the solder metal layer 22 and the insulating layer 21 can be improved, so that the problem of peeling off the solder metal layer from the insulating layer 21 can be reduced in the subsequent repair of the driving wafer. Second Embodiment FIG. 4 is a schematic view showing a display panel and a partial enlargement thereof according to a preferred embodiment of the present invention. Referring to FIG. 4, the display panel has a household and a non-display area 320. The display panel 300 includes two Germans, a quot; 疋 330, a plurality of sweeping lines 340, a plurality of data lines 350, and a multi-line field. Pad 36Q and a plurality of data line pads 37A. The pixel unit 33〇 12 1322316 16997twf.doc/y is disposed in the display area 310. The data, line 35, and broom line 34 are disposed in the display area 310' and electrically connected to the pixel unit 33. The wire mesh welding wire is disposed in the non-display area 310 and electrically connected to the scanning line 340. The data line pad 370 is disposed in the non-display area 31A and electrically connected to the data line 35A. It should be noted that each of the data line pads 37 is, for example, the pad 200 (shown in FIG. 2) described in the first embodiment above, that is, along the line C-C' in FIG. The cross-sectional structure of the data line pad 37A may be a cross-sectional structure of the pad 2〇〇 as shown in FIG. 2 and FIG. 3A to FIG. 3C in the first embodiment, wherein the material of each film layer and each film are The arrangement relationship of the layers and the shape, number, and arrangement position of the pattern layers 230, 230a may be similar or identical to those described in the first embodiment, and thus will not be described herein. In addition, the display panel having the data line pad 370 may be a liquid crystal display panel (LCD panel), an organic electro-luminescence display panel (OLED panel), or a plasma display. Plasma dispky panel (PDP). In summary, the use of the bonding pad 2 in the first embodiment described above in the display panel 300 described above can improve the fabrication yield of the display panel 3A. As described in detail, the pad and the display panel of the present invention have the following advantages: (1) The pad is formed by using a pattern layer disposed between the insulating layer and the substrate and at least one of the insulating layer and the solder metal layer. Therefore, the adhesion between the metal layer of the pad and the insulating layer can be improved. (2) Since the adhesion between the metal layer of the pad and the insulating layer is increased, the phenomenon that the metal layer of the pad is peeled off from the insulating layer can be effectively reduced. 13 I6997twfdoc/y (1) Apply a patterned pad to the display panel to improve the yield of the display panel. Although the present invention has been disclosed above in the preferred embodiments, it is to be understood that any skilled person skilled in the art will be able to make some modifications and refinements without departing from the invention; The scope of the patent application scope attached to it is subject to change. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic view showing a display panel which is not conventional. Figure 1B is a partial enlarged view of the pad. 1C is a schematic cross-sectional view taken along line AA of FIG. 1B. Figure 2 depicts a top plan view of a solder pad not a preferred embodiment of the present invention. 2A is a schematic cross-sectional view of the pad along the line B-B of FIG. 2. 3A-3C are schematic cross-sectional views showing three other pads of a preferred embodiment of the present invention. 4 is a partially enlarged schematic view showing a display panel and a pad thereof in accordance with a preferred embodiment of the present invention. ^ [Main component symbol description] 100, 300: display panel 110, 310: display area 112, 340: scan line 114, 350: data line 116, 330: pixel unit 120, 320: non-display area 1322316 16997twf.doc /y
130、200 :焊墊 132、260 :基板 134、210 :絕緣層 136、220 :焊墊金屬層 138、 240 :保護層 139、 250 :導電層 150、280 :開口 230、230a :圖案層 270 :起伏表面 300 :顯示面板 360 :掃瞄線焊墊 370 :資料線焊墊 A-A，、B-B’、C-C’ ：剖面線 d :寬度 15130, 200: pads 132, 260: substrates 134, 210: insulating layers 136, 220: pad metal layers 138, 240: protective layers 139, 250: conductive layers 150, 280: openings 230, 230a: pattern layer 270: Rugged surface 300: display panel 360: scan wire pad 370: data line pad AA, B-B', C-C': hatching d: width 15