TWI319546B - Method of executing different instruction set architectures (isa) in a multi-processor system, multi-processor system, and computer-readable storage medium recording related program instructions - Google Patents
Method of executing different instruction set architectures (isa) in a multi-processor system, multi-processor system, and computer-readable storage medium recording related program instructionsInfo
- Publication number
- TWI319546B TWI319546B TW095104253A TW95104253A TWI319546B TW I319546 B TWI319546 B TW I319546B TW 095104253 A TW095104253 A TW 095104253A TW 95104253 A TW95104253 A TW 95104253A TW I319546 B TWI319546 B TW I319546B
- Authority
- TW
- Taiwan
- Prior art keywords
- processor system
- isa
- computer
- storage medium
- readable storage
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/52—Binary to binary
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/54—Indexing scheme relating to G06F9/54
- G06F2209/549—Remote execution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Devices For Executing Special Programs (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/053,512 US7818724B2 (en) | 2005-02-08 | 2005-02-08 | Methods and apparatus for instruction set emulation |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200636581A TW200636581A (en) | 2006-10-16 |
TWI319546B true TWI319546B (en) | 2010-01-11 |
Family
ID=36754296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095104253A TWI319546B (en) | 2005-02-08 | 2006-02-08 | Method of executing different instruction set architectures (isa) in a multi-processor system, multi-processor system, and computer-readable storage medium recording related program instructions |
Country Status (5)
Country | Link |
---|---|
US (1) | US7818724B2 (zh) |
EP (1) | EP1846820B1 (zh) |
JP (1) | JP4645973B2 (zh) |
TW (1) | TWI319546B (zh) |
WO (1) | WO2006085639A2 (zh) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB0623276D0 (en) | 2006-11-22 | 2007-01-03 | Transitive Ltd | Memory consistency protection in a multiprocessor computing system |
US8214808B2 (en) * | 2007-05-07 | 2012-07-03 | International Business Machines Corporation | System and method for speculative thread assist in a heterogeneous processing environment |
US8127296B2 (en) * | 2007-09-06 | 2012-02-28 | Dell Products L.P. | Virtual machine migration between processors having VM migration registers controlled by firmware to modify the reporting of common processor feature sets to support the migration |
JP2011512566A (ja) * | 2007-09-19 | 2011-04-21 | ケーピーアイティ クミンズ インフォシステムズ リミテッド | 半自動ソフトウェア移行のためにハードウェアコンポーネントのプラグアンドプレイを可能にするメカニズム |
US8060356B2 (en) * | 2007-12-19 | 2011-11-15 | Sony Computer Entertainment Inc. | Processor emulation using fragment level translation |
US9672019B2 (en) | 2008-11-24 | 2017-06-06 | Intel Corporation | Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads |
US10621092B2 (en) | 2008-11-24 | 2020-04-14 | Intel Corporation | Merging level cache and data cache units having indicator bits related to speculative execution |
US20120017070A1 (en) * | 2009-03-25 | 2012-01-19 | Satoshi Hieda | Compile system, compile method, and storage medium storing compile program |
US8775153B2 (en) * | 2009-12-23 | 2014-07-08 | Intel Corporation | Transitioning from source instruction set architecture (ISA) code to translated code in a partial emulation environment |
WO2013048468A1 (en) | 2011-09-30 | 2013-04-04 | Intel Corporation | Instruction and logic to perform dynamic binary translation |
US9891936B2 (en) | 2013-09-27 | 2018-02-13 | Intel Corporation | Method and apparatus for page-level monitoring |
US9811324B2 (en) * | 2015-05-29 | 2017-11-07 | Google Inc. | Code caching system |
US10387210B2 (en) * | 2016-04-04 | 2019-08-20 | International Business Machines Corporation | Resource schedule optimization |
CN111045905B (zh) * | 2019-11-14 | 2023-06-30 | 中国航空工业集团公司西安航空计算技术研究所 | 一种针对特定软件移植的跨处理器性能快速评估方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4388682A (en) * | 1979-09-04 | 1983-06-14 | Raytheon Company | Microprogrammable instruction translator |
JPH06202877A (ja) * | 1992-12-28 | 1994-07-22 | Fujitsu Ltd | エミュレーション装置 |
US6496922B1 (en) * | 1994-10-31 | 2002-12-17 | Sun Microsystems, Inc. | Method and apparatus for multiplatform stateless instruction set architecture (ISA) using ISA tags on-the-fly instruction translation |
JP2987308B2 (ja) * | 1995-04-28 | 1999-12-06 | 松下電器産業株式会社 | 情報処理装置 |
US6711667B1 (en) * | 1996-06-28 | 2004-03-23 | Legerity, Inc. | Microprocessor configured to translate instructions from one instruction set to another, and to store the translated instructions |
US6504554B1 (en) * | 1998-09-01 | 2003-01-07 | Microsoft Corporation | Dynamic conversion of object-oriented programs to tag-based procedural code |
US6430674B1 (en) * | 1998-12-30 | 2002-08-06 | Intel Corporation | Processor executing plural instruction sets (ISA's) with ability to have plural ISA's in different pipeline stages at same time |
US6526491B2 (en) | 2001-03-22 | 2003-02-25 | Sony Corporation Entertainment Inc. | Memory protection system and method for computer architecture for broadband networks |
US7266811B2 (en) * | 2001-09-05 | 2007-09-04 | Conexant Systems, Inc. | Methods, systems, and computer program products for translating machine code associated with a first processor for execution on a second processor |
US7251811B2 (en) * | 2002-01-02 | 2007-07-31 | Intel Corporation | Controlling compatibility levels of binary translations between instruction set architectures |
US7496494B2 (en) * | 2002-09-17 | 2009-02-24 | International Business Machines Corporation | Method and system for multiprocessor emulation on a multiprocessor host system |
US7107580B2 (en) * | 2003-01-07 | 2006-09-12 | Intel Corporation | Binary translation of self-modifying code |
US7299460B2 (en) * | 2003-05-29 | 2007-11-20 | Nec Corporation | Method and computer program for converting an assembly language program for one processor to another |
US20050289520A1 (en) * | 2004-06-29 | 2005-12-29 | Redvers Consulting, Ltd. | Unidirectional cloaking device for source code |
-
2005
- 2005-02-08 US US11/053,512 patent/US7818724B2/en active Active
-
2006
- 2006-02-07 WO PCT/JP2006/302422 patent/WO2006085639A2/en active Application Filing
- 2006-02-07 EP EP06713564.0A patent/EP1846820B1/en active Active
- 2006-02-07 JP JP2006029737A patent/JP4645973B2/ja active Active
- 2006-02-08 TW TW095104253A patent/TWI319546B/zh active
Also Published As
Publication number | Publication date |
---|---|
JP4645973B2 (ja) | 2011-03-09 |
TW200636581A (en) | 2006-10-16 |
US20060179278A1 (en) | 2006-08-10 |
WO2006085639A3 (en) | 2007-02-08 |
EP1846820B1 (en) | 2019-10-09 |
WO2006085639A2 (en) | 2006-08-17 |
JP2006221643A (ja) | 2006-08-24 |
EP1846820A2 (en) | 2007-10-24 |
US7818724B2 (en) | 2010-10-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI319546B (en) | Method of executing different instruction set architectures (isa) in a multi-processor system, multi-processor system, and computer-readable storage medium recording related program instructions | |
NO20190583A1 (no) | Kompletteringssystem for anvendelse i en brønn og fremgangsmåte for komplettering av en brønn | |
IL186949A0 (en) | System and method of executing program threads in a multi-threaded processor | |
EP2085882A4 (en) | MULTI-PROCESSOR SYSTEM, SYSTEM CONFIGURATION METHOD IN MULTI-PROCESSOR SYSTEM, AND PROGRAM THEREOF | |
NO20054549D0 (no) | A method and a system for secure transactions | |
DE602004011467D1 (de) | Speichersteuerungssystem und -verfahren | |
EP1949595A4 (en) | METHOD FOR CONSTRUCTING AND PERFORMING A DISTRIBUTED WORKFLOW IN A COMMUNICATION SYSTEM | |
EP2026327A4 (en) | LANGUAGE MODEL LEARNING, LANGUAGE MODEL LEARNING AND LANGUAGE MODEL LEARNING PROGRAM | |
EP1918894A4 (en) | INFORMATION STORAGE DEVICE, INFORMATION STORAGE PROGRAM, VERIFICATION DEVICE, AND INFORMATION STORAGE METHOD | |
EP1897055A4 (en) | METHOD AND SYSTEM FOR DETERMINING THE EFFICIENCY OF A CONFORMITY PROGRAM | |
EP1846115A4 (en) | METHOD AND SYSTEM FOR ANALYZING AND TEACHING ATHLETIC MOVEMENT | |
EP1947643A4 (en) | DEVICE AND METHOD FOR DIAGNOSING PRONUNCIATION, RECORDING MEDIUM AND DIAGNOSTIC PROGRAM FOR PRONUNCIATION | |
DE602006002241D1 (de) | Speichersystem und Steuerungsverfahren dafür | |
EP2101147A4 (en) | SYSTEM, INFORMATION TRANSMISSION METHOD, AND COMPUTER PROGRAM | |
WO2006122990A3 (es) | Aparato, sistema y método de dispositivo de memoria para conjuntos múltiples de instrucciones de tipo especulativo | |
EP1811411A4 (en) | MULTI-VARIABLE MODEL LASER SYSTEM, PROCESS, AND PROGRAMMEDIUM | |
EP1923791A4 (en) | DATA LOGGING SYSTEM, DATA LOGGING METHOD AND DATA RECORDING PROGRAM | |
EP1770641A4 (en) | COLORING ASSISTANCE SYSTEM AND PROGRAM, STORAGE MEDIUM, AND COLORING ASSISTANCE METHOD | |
DE602006007339D1 (de) | Verfahren zum übertragen von trainings-frames in einem mimo-system sowie mimo-system | |
EP1921188A4 (en) | MACHINE SIMULATION SYSTEM, ITS METHOD AND ITS PROGRAM | |
HK1137518A1 (en) | Focus assist system and method | |
EP1964334A4 (en) | SYSTEM AND / OR SUBMISSION METHOD | |
EP1868121A4 (en) | A SYSTEM, METHOD AND COMPUTER READABLE PROGRAM FOR FORMING A THREE-DIMENSIONAL MODEL AND COMPUTER-READABLE STORAGE MEDIUM WITH A PROGRAM SAVED THEREWITH | |
DE602004007884D1 (de) | Speichersteuerungssystem und -Verfahren | |
DE602006007281D1 (de) | Redundantes Bildspeichersystem und -verfahren |