TWI313522B - Conduction control device - Google Patents

Description

1313522 (1) Description of the Invention [Technical Field of the Invention] The present invention relates to a conduction control device. [Prior Art] A new type of electronic device is emerging in which at least a portion of the carrier propagation system is controlled by the charge carrier spin. Known examples of these so-called "spin-electron" devices include a giant magnetoresistance effect (G M R ) based spin valve and a magnetic tunnel junction (MTJ) device. Generally, these devices comprise alternating layers of ferromagnetic and non-ferromagnetic materials, either metallic (in the case of spin valves) or insulated (in the case of MTJ devices). Spintronic devices have several applications, including magnetic field sensors and magnetic random access memory (MRAM). A discussion of spin-based electronics and applications is presented in "Spintronics: A Spin-based Electronics Vision for the Future" by S.A. Wolf et al., Vol. 294, pp. 1488~1495 (2001). In early spintronic devices, ferromagnetic materials typically contained a metal such as iron (Fe), cobalt (Co) or nickel (Ni) or an alloy thereof. However, some of the more recent spintronic devices use ferromagnetic semiconductors, such as gallium arsenide (Ga, Mn) As, which are described in Science Journal, Vol. 281, pp. 951-956 (1 99 8 ). In the "Making Nonmagnetic Semiconductors Ferromagnetic" by H. Ohno, the ferromagnetic semiconductor-based device has a strong magnetoresistance effect. For example, 'Very Large Magnetoresistance in Lateral Ferromagnetic (Ga,Mn) As Wires with Nanoconstrictions, by C. Ruster et al., 'Physical Review Letters, Vol. 91, pp. (2) 1313522 2 1 6602 (2003) The structure showing the tunneling magnetoresistance (TMR) is described. The structure is fabricated from a 19 nm thick layer of Gao.pwMno.o^As grown on semi-insulating GaAs, which is laterally defined by etching to form a narrow constriction connected to either An island of wires on the side.

Physical R e vi ew L e tt ers Vol. 9 3, No. 1 1 7 2 0 3 (2004) by C. Gould et al. "Tunneling Anisotropic Magnetoresistance: A spin-value like tunnel magnetoresistance using a single The magnetic layer is a device that shows the effect of a spin valve. The device comprises a pillar formed of a titanium/gold (Ti/Au) metal junction on an alumina (A10x) tunneling barrier, the alumina (A1 Ox ) tunneling barrier being disposed on the growth 70 nm thick layer of Gao.94 Mno.o6As on semi-insulating GaAs. The strong anisotropic hysteresis effect in this experimental device can be attributed to tunneling anisotropic magnetoresistance (TAMR), which is caused by strong spin-orbit coupling in a single ferromagnetic layer. The invention is intended to provide a conduction control device, for example, for use in a memory and/or logic circuit, or as a magnetic sensor. According to a first aspect of the present invention, there is provided a conduction control device comprising a first ferromagnetic region having a relatively high coercive force, a second ferromagnetic region having a relatively low-correction -5, 1313522 coercive force, a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second ferromagnetic regions, and an electric field applied to the abutment region to control the charge sub-density in the junction region Gate. Thus, the gate can be used to hollow out or accumulate charge carriers in the junction region to form a tunneling barrier or conduction channel' and thereby provide read and write states, respectively. The device may include a third ferromagnetic region having a higher coercive force than the second ferromagnetic region, another junction region disposed between the second and third ferromagnetic regions, and the other interface The face region applies a field to change another gate of the charge carrier density within the junction region. The device can include a further gate for applying a field to the second ferromagnetic region. The further gate can be used to increase or decrease the charge carrier density in the second ferromagnetic region and thus change its magnetic properties, such as coercive force. The first and second ferromagnetic regions may comprise the same material, which may be a ferromagnetic semiconductor such as (Ga,Mn) As. The junction area can also contain the same material. The first and second ferromagnetic regions and junction regions may be formed in one layer. The first ferromagnetic region can be elongated and have a longitudinal axis. The longitudinal axis can be aligned in the direction along the axis of easy magnetization. The device can be constructed to exhibit tunneling anisotropic magnetoresistance (TAMR) effects and/or tunneling magnetoresistance (TMR) effects. The first ferromagnetic region may be provided by a portion or a portion of the layer disposed substantially in a plane. The layer or layer portion may have a thickness less than or equal to 1 〇 nm. The second ferromagnetic region can have an easy-producing axis oriented away from the plane of the layer or layer portion and/or an easy magnetization -6-(4) 1313522 axis oriented into the plane of the layer or layer portion. The first ferromagnetic region may be provided by another layer disposed substantially in the plane or another plane or another portion of the layer. The first ferromagnetic region can have an easy axis of magnetization oriented to enter the plane of the other layer or portion of the other layer. According to a second aspect of the present invention, there is provided a device comprising a conductive region, a ferromagnetic region, a junction region for connecting the conduction region and the ferromagnetic region, and an electric field for the interface region to control the junction region The charge of the charge carrier density. The conductive region may comprise a non-ferromagnetic material or a semiconductor material or a non-ferromagnetic semiconductor material. The junction region can comprise a semiconductor material. The conductive, junction, and/or ferromagnetic regions may comprise the same material. According to a second aspect of the present invention, there is provided a memory array of a conduction control device. According to a third aspect of the present invention, there is provided a method of fabricating a conduction control device, the method comprising: providing a first ferromagnetic region having a relatively high coercive force, providing a second ferromagnetic region having a relatively low coercive force, providing a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second ferromagnetic regions, and a field for providing a field for the abutment region to control the charge carriers in the junction region The gate of density. Providing the junction region can include defining a constriction between the first and second junction regions. According to a fourth aspect of the present invention, there is provided a method of operating a conduction control device having a channel including a first ferromagnetic region having a relatively high coercive force and having a relatively low coercive force a second ferromagnetic region, a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second (5) (5) 1313522 ferromagnetic regions, and for applying the abutment region An electric field to control a gate of a charge sub-density in the junction region, the method comprising applying a first bias voltage to the gate to increase a charge carrier density in the junction region, and driving the first current pulse through the channel The current pulse has a first current amplitude greater than a critical threshold to reverse the magnetization of the second ferromagnetic region. This may have the advantage that the magnetization of the second ferromagnetic region can be selectively reversed without reversing the magnetization of the first ferromagnetic region. The method can include applying a second bias voltage to the gate to reduce a charge carrier density in the junction region, and driving a second current pulse through the channel, the second current pulse having a second current below the threshold amplitude. According to a fifth aspect of the present invention, there is provided a method of operating a conduction control device having a passage including a first ferromagnetic region having a relatively high coercive force and a first having a relatively low coercive force a ferromagnetic region, a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second ferromagnetic regions, and a field for the abutment surface region to control the junction region a gate of a charge carrier density, the method comprising applying a magnetic field to the first and second ferromagnetic regions to reverse the magnetization of the second ferromagnetic region, the magnetic field being greater than a critical field of the second ferromagnetic region, but less than The critical field of the first ferromagnetic zone. This may have the advantage that the magnetization of the second ferromagnetic region can be selectively reversed without reversing the magnetization of the first ferromagnetic region. Embodiments of the present invention will now be described by way of example and with reference to the accompanying drawings, in which: FIG. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> <RTIgt; [Embodiment] Referring to Figures 1, 2 and 3, the conduction control device 1 according to the present invention comprises an elongated conductive channel 2 and first, second and third gates 3, 4, 5 ° channel 2 comprising First and second ferromagnetic regions 6, 7 having a relatively high coercive force and a third ferromagnetic region 8 having a relatively low coercive force. The third ferromagnetic region 8 is generally disposed between the first and second ferromagnetic regions 6, 7 such that conduction between the first and second ferromagnetic regions 6, 7 passes through the third ferromagnetic region 8 occur. Therefore, the first and second fixed regions 6, 7 also serve as source and drain electrodes. The first, second and third ferromagnetic regions 6, 7, 8 are formed from the same ferromagnetic material. However, the first, second and third ferromagnetic regions 6, 7, 8 may be formed of different ferromagnetic materials, such as ferromagnetic metals and ferromagnetic semiconductors. The ferromagnetic semiconductor may comprise a semiconductor doped with a magnetic dopant to be ferromagnetic, and the concentration of the magnetic dopant is variable. Additionally, the ferromagnetic semiconductor can be doped with additional non-magnetic dopants. Alternatively, the ferromagnetic semiconductor can comprise a semiconductor that exhibits ferromagnetism but is undoped and can be doped with a magnetic or non-magnetic dopant. Channel 2 includes first and second junction regions 9, 10. The first junction region 9 magnetically decouples the first ferromagnetic region 6 from the third ferromagnetic region 8, which means that the magnetization reversal can occur in the first and third regions 6, 8 under different magnetic fields. Similarly, -9-(7) 1313522, the second junction region 1 is magnetically decoupled from the first ferromagnetic region 7 and the third ferromagnetic region 8. The first and second junction regions 9, 10 comprise a semiconductor material. The first and second junction regions 9, 10 may be formed of the same material and may be formed of the same material as one or more of the ferromagnetic regions 6, 7, 8. The ferromagnetic region and the junction region 6, 7, 8, 9, 1 are disposed in the patterned ferromagnetic layer 11, the patterned ferromagnetic layer 11 comprising a ferromagnetic semiconductor, in this case the ferromagnetic The semiconductor is a gallium arsenide alloy (Gai-xMnxAs) having a manganese concentration of 〇.〇2, that is, Ga〇.98MnQ.〇2As. However, gallium arsenide manganese alloys having other manganese concentrations can be used, such as X = 〇.〇6. In addition, other ferromagnetic semiconductors such as (In, Mn) As, (Ga, Mn) P, (Ga, Mn) N or Ge^yMiiy may be used. In this example, the patterned ferromagnetic layer 11 has a thickness of 10 nm. However, the ferromagnetic layer 11 can be thinner, such as 3 nm or 5 nm, or thicker. The use of ferromagnetic semiconductors instead of ferromagnetic metals or alloys has the advantage that the gates can be used to apply an electric field to the ferromagnetic material and to change the density and/or distribution of charge carriers, wherein the charge carriers mediate the magnetic order and Therefore, the magnetic properties of the ferromagnetic material are changed. It can also have the advantage of reducing power consumption because the critical current density of the spin torque magnetization in the ferromagnetic semiconductor is generally two to three orders of magnitude lower than in the ferromagnetic metal. The patterned ferromagnetic layer 11 is overlaid on a coextensive insulating layer 12 comprising an insulator, which in this case is aluminum arsenide (A1 As ). Other insulators can be used. The insulator can be crystalline. The insulator may be lattice matched to the ferromagnetic semiconductor or may be mismatched to the ferromagnetic semiconductor lattice to achieve strain that contributes to magnetic anisotropy. The ferromagnetic layer 1 1 and the insulating layer 1 2 -10- (8) 1313522 do not need to be expanded together. For example, the insulating layer 12 can be larger. The insulating layer 12 is applied to a portion of the substrate 13 to be etched. In this example, the partially etched substrate 13 comprises semi-insulating gallium arsenide (G a As ). Other substrates, such as helium, can be used. The cover layer 14 (the portion shown in Fig. 1 is removed for clarity) is coextensively overlaid on the patterned ferromagnetic layer 11. In this example, the cover layer 14 contains AlAs. The cover layer 14 and the ferromagnetic layer 11 do not need to be coextensive. With particular reference to Figures 2 and 3, the second ferromagnetic region 8 and the first and first junction regions 9, 10 are defined by constrictions 15, 16. The compression sections 15 and 16 are defined between the first side wall 17 and the first and second portions 1 8 !, 1 8 2 of the opposite second side wall 18. In plan view, each of the side wall portions 1 8 !, 18 2 provides an inward recess toward the first side wall 17 . Compression segments 15 5, 16 may be defined using other sidewall configurations, such as using other shapes of inflection and/or using a pair of opposing flex segments. The compression sections 15, 16 can be elongate, such as provided by a narrow conductive channel portion. The junction areas 9, 10 can be defined in other ways and do not require the use of compression sections. For example, the junction regions 9, 10 may comprise different materials or materials having different doping concentrations. Table 1 and brother-ferromagnetic zones 6, 7 are generally elongate and have a width w and a length L such that W &lt; L. The width W can be less than or equal to 丨〇〇 nm and can be less than or equal to 50 nm. In this example, 'W is 50 ® di ferromagnetic region 8 can be elongated and have a width w and a length 丨. Width -11 - (9) 1313522 degrees w can be less than W. In this case, w is 40 nm and magnetic shape anisotropy can be used to reduce the ferromagnetic regions 6, 7, 8 of the third ferromagnetic region 8 relative to the coercive force of the regions 6, 7. When the same material. Therefore, it can be constructed to have a lower coercive force by being configured to be compared with other ferromagnetic regions 6, a length ratio. The ratio of the wide width to the length, i.e., w/1 and W/L °, may have a higher compression width than the first and second ferromagnetic regions 6, 7 each having a wide width less than w. c can be less than 20 nm. In this case, the compressed nm° compression sections 15, 16 can have different widths. The compression section 15 can be narrow enough to provide tunneling anisotropic magnetoresistance (TAMR) to the device 1 while the second compression section 16 does not provide a tunneling barrier and vice versa. Therefore, the first step, but only one of the compression sections 15, 16 provides a tunneling barrier. The first and second gates 3, 4 respectively control the charge carrier density in the first and 10, respectively, to connect the junction regions 9, 10 edge states, preferably in ohmic and tunneling states, respectively. The first and second gates 3, 4 are substantially in the same plane and are laterally and adjacent to the junction region 9 to be adjacent to the first sidewall 17 to provide the side gate 1 and the second gate 3, 4 It is applied to the first and second junction regions 9, 10 via the first side wall 17 and the second side. However, 1 is 60 nm. The first and second ferromagnetic coercive forces, in particular, the third ferromagnetic region 807 having a different aspect ratio can be defined as the third ferromagnetic region width to length ratio. Degree C. The width of the compression segment c is 1 0. For example, the first barrier can be seen to be wider, and the width to the third magnetic region 8 can be bounded by the second junction region 9, switched to conduction and absolute connection. The face areas 9, 1 and 10 are separated and arranged. Therefore, the first individual electric field is 19, and other -12-(10) 1313522 gate configurations can be used. For example, each of the side gates 3, 4 can include a pair of opposing side gates, sometimes referred to as "spUt-gates." Each of the gates 3, 4 may additionally or alternatively comprise a top gate covering the junction regions 9, 1 and/or a rear gate below the junction regions 9, 1 . The gates 3, 4 may be separated from the junction regions 9, 10 by a dielectric layer (not shown). In the side gate configuration, the first and second gates 3, 4 are separated from the first and second junction regions 9, 10 by spacing s, respectively. The interval s can be less than 20 nm, less than 10 nm or less than 5 nm. In this example, the spacing s is i 〇 nm 〇 in the top gate and/or side gate configuration, the spacing between the gates 3, 4 and the junctions 9, 1 可由 may be the thickness of the intermediate insulator (not shown) By way of example, the intermediate insulation system comprises an amorphous insulating material, such as cerium oxide (SiO 2 ), cerium nitride (Si 3 N 4 ), or an insulating crystalline material, for example for (G a, Μ n ) A s A1A s. The intermediate insulator should preferably be thick enough to prevent tunneling or collapse at least at normal gate voltages. The insulator may have a thickness of less than 20 nm and may be less than 10 nm. The insulator can be less than 6 or 5 nm thick, but greater than 2 or 3 nm. The spacing can be selected based on the strength of the collapse field of the applied electric field 19, 20 and the gap between the gates 3, 4 and the junction 9, 10 or a separate insulator (not shown). The third gate 5 is configured as a side gate of the third ferromagnetic region 8 to control the charge carrier density in the third ferromagnetic region 8, and thus to change the coercive force. This may have the advantage of reducing the current and/or magnetic field required for the magnetization reversal and thus reducing power consumption. It may also have the advantage that it can be used to increase or decrease the sensitivity of the device when the device is used as a magnetic field sensor. The third gate 5 is substantially flush with the third ferromagnetic region 8 and laterally spaced from the third ferromagnetic region 8 and is disposed adjacent the second sidewall 18 to provide a side gate configuration. Therefore, the third gate 5 applies an electric field 21 through the second side wall 18 to enter the third ferromagnetic region 8. However, other gate configurations can be used. For example, the third gate 5 can include a pair of opposing side gates. The third gate 5 of φ may additionally or alternatively comprise a top gate overlying the free region 8 and/or a back gate below the third ferromagnetic region 8. The top or bottom gate configuration may have the advantage of exposing a larger area or volume of the third ferromagnetic region 8 to the electric field and thus providing better control of the magnetic properties (e.g., coercive force) of the ferromagnetic region 8. The top gate configuration will be described in more detail later. In the side gate configuration, the third gate 5 and the third ferromagnetic region 8 are separated by an interval s'. The interval s' can be less than 20 nm, less than 1 〇 nm or less than 5 n m. In this example, the interval W is 10 n m. • In the top gate and/or side gate configuration, the spacing between the gate 5 and the third ferromagnetic region 8 may be defined by the thickness of an intermediate insulator (not shown), for example comprising amorphous or crystalline Insulation material as previously described. The insulator may have a thickness of less than 20 nm and may be less than 1 〇 nm. The thickness of the rim can be less than 6 or 5 nm but greater than 2 or 3 nm. * The interval can be selected based on the strength of the applied field 21 and the strength of the collapse field of the gap between the pole 5 and the third ferromagnetic region 8 or a separate insulator (not shown). The gates 3, 4, and 5 are disposed in the patterned ferromagnetic layer 11 and are covered with -14-(12) 1313522 on the insulating layer 12 and the substrate 13 and under the cap layer 14. A non-ferromagnetic region (e.g., a non-ferromagnetic semiconductor region) may be used in place of the first ferromagnetic region 6. The second ferromagnetic region 7 may be omitted or may be replaced with a non-ferromagnetic region. A device including a conductive region, a ferromagnetic region, a junction region for electrically coupling the conduction region and the ferromagnetic region, and a gate for controlling the charge sub-density in the junction region can be used as the magnetic sensing Device. Magnetization In this example, the first, second and third ferromagnetic regions 6, 7, 8 are formed by (G a, Μ n ) A s . (G a, Μ η ) The ferromagnetism in A s is caused by the exchange interaction between the flowing holes and the local Μn ions. Therefore, changing the density of the charge carriers can change the magnetic characteristics of the device 1, and can even suppress the magnetic sequence. The ferromagnetic regions 6, 7, 8 may each comprise an individual single magnetic domain. The regions 6, 7, 8 can be configured to have a single magnetic domain by constructing the regions 6, 7, 8 to have a size smaller than a given size (typically a level of 1 to 10 μηη). Referring to Fig. 4, there are shown schematic views of the first, second and third ferromagnetic regions 6, 7, 8 and their individual magnetizations 22, 23, 24. The first, second and third ferromagnetic regions 6, 7, 8 are magnetized in the plane of the layer 11 and have individual magnetizations 22, 23, 24. However, one or more of the ferromagnetic regions 6, 7, 8 may be magnetized outside the plane of the layer 11 'e, for example, perpendicular to the plane of the layer 1 1 . For example, the first and second ferromagnetic regions 6, 7 may be magnetized in the plane of the layer 11, and the third ferromagnetic region 8 may be magnetized outside the plane of the layer -15-(13) 1313522 1 1 , vice versa. The (Ga,Mn) As film grown on GaAs is subjected to compressive strain due to lattice mismatch and appears at low temperatures (in this case less than about 4.2 〇K) along [100] And the biaxial anisotropy of the easy magnetization axis of the crystal orientation of [010]. Therefore, in general, the magnetizations of the crystal orientation along [100], [010], [-100], or [-〇1 〇] each have the same anisotropic energy. However, another anisotropy Sex can be introduced, for example by shape or strain, which can cause the easy axis of magnetism to move and/or break the four fold degeneracy, and thereby make an easy magnetization axis better positively along another Easy to magnetize the axis alignment. The third ferromagnetic region 8 is elongated along the longitudinal axis 25 to introduce shape anisotropy. The first and second ferromagnetic regions 6, 7 may also be elongated along the axis 25. In this example, the longitudinal axis 25 is aligned along the crystal orientation 26 of [100]. However, the longitudinal axis 25 can be aligned along the crystal orientation 27 of [010]. # At a higher temperature, close to the Curie temperature, grown on GaAs (

Ga, As) Μη also exhibits uniaxial anisotropy with an easy axis of magnetization along the crystal orientation of [1 1 0]. Thus, the longitudinal axis 25 can be aligned along the crystal orientation 28 of [1 10]. The easy magnetization axis can be constructed to be in an out-of-plane direction. The out-of-plane anisotropy of GaMnAs can be achieved by introducing tensile strain into the GaMnAs film, for example, by growing a GaMnAs film on InGaAs or by reducing a hole in a GaMnAs film grown on GaAs. density. Therefore, by applying an electric field to the third ferromagnetic region 8 by using the third gate 5, the third ferromagnetic region 8 can selectively exhibit out-of-plane magnetic anisotropy, while the first and second ferromagnetic-16 - (14) 1313522

Zones 6, 7 still exhibit magnetic anisotropy in the plane. This can result in a larger TAMR effect. If different ferromagnetic materials are used, the easy magnetization axes can be different. In this case, the 'easy magnetization axis is in the plane of the layer i'. When no external magnetic field or current is applied, the magnetization 2 2, 2 3 ' 2 4 is aligned along one of the easy magnetization axes 20, 27. However, if an external magnetic field is applied in a direction different from the direction of magnetization, the direction of magnetization 2 2, 2 3, 2 4 can be switched from one easy magnetization axis 26, 27 to the other 26, 27. Alternatively, if a strong current is applied to apply the spin torque, the direction of magnetization 24 can be switched from one easy magnetization axis 26, 27 to the other 26, 27. As shown in Fig. 4, when the magnetization 24 is aligned with one of the easy magnetization axes 26, 27, a higher resistance state is produced. In this case, when the magnetization 24 is along the first easy axis 2, that is, along the crystal direction of [丨〇〇], a relatively low resistance state is produced, and when the magnetization 24 is along the line When the second easy magnetization axis 27, that is, along the crystal orientation of [〇1 〇], a relatively high resistance state is generated. In this example, the longitudinal axis 25 of the device is aligned with the crystal axis 26 of [1 0 0]. When the magnetization 24 of the third ferromagnetic region 8 is aligned parallel to the current and in the direction of [1 〇 〇 ], the device is in a low resistance state. When the magnetization is aligned with the current and aligned in the direction of [0 1 0 ], the device 1 is in a high resistance state. Although the device 1 can utilize the TAMR effect, it does not need to be. on the contrary

'Device 1 may utilize other effects, such as where the device resistance is dependent on the tunneling magnetoresistance effect of the direction of magnetization 24 of the third ferromagnetic region 8 (TMR -17-(15) 1313522), the third ferromagnetic The direction of the magnetization 24 of the region 8 is relative to the direction of the magnetizations 22, 23 of the first and second ferromagnetic regions 6, 7. Although the ferromagnetic regions 6, 7, 8 are formed of the same material, the third ferromagnetic region 8 can be constructed to have a lower coercive force, for example by selectively forming the third ferromagnetic region 8 to have Given a geometry, in this case it is less elongated. Additionally or alternatively, other techniques for reducing the coercive force may be used, such as by etching or introducing damage or combinations thereof by ion implantation in the free zone 8 to thin the region 8. Since the third ferromagnetic region 8 has a lower coercive force than the first and second regions 6, 7, the reverse of the magnetization 24 occurs in the magnetization 22, 23 of the other two ferromagnetic regions 6, 7. The lower critical magnetic field in the reverse direction. Therefore, a magnetic field higher than the critical field of the third ferromagnetic region 8 but lower than the critical field of the first and second ferromagnetic regions 6, 7 can be applied. When such a field is applied, the magnetization 24 of the third ferromagnetic region 8 can be switched, while the magnetizations 2, 2 3 of the first and second ferromagnetic regions 6, 7 are still oriented in the same direction. This behavior can be utilized such that during normal operation, the first and second ferromagnetic regions 6, 7 provide regions having fixed direction magnetizations 22, 23, while the third ferromagnetic region 8 provides reversible magnetization 24 Area. Thus, the first and second ferromagnetic regions 6, 7 can each be referred to as a "fixed" or "pinned" region, while the third ferromagnetic region 8 can be considered a "free" region. For convenience, the first and second ferromagnetic regions 6, 7 are hereinafter referred to as first and second fixed regions 6, 7' and the third region 8 is hereinafter referred to as free region 8. As previously mentioned, if a sufficiently strong current is applied, the direction of magnetization 24 can be switched from one easy axis 28, 27 to the other 26, 27. This -18-(16) 1313522 may be due to the spin torque on the magnetic domain wall, which causes the wall to move through the free zone 8. The magnetizations 22, 23 of the first and second fixed zones 6, 7 are aligned in the same direction. This can be achieved by applying a magnetic field higher than the critical field of the first and second fixed zones 6, 7. Compared to conventional spintronic devices, device 1 may have several advantages. φ φ For example, conventional spintronic devices typically take the form of a vertical stack, including a complex multi-layer configuration in which the layers have a fixed function. However, device 1 can be considered a relatively simple configuration in which different portions of device 1 can have different functions and can be tuned. For example, the junction regions 9, 1 can act as tunneling barriers to provide magnetic domain wall pinning and/or as nucleation regions of the magnetic domain walls. The magnetic properties of the third ferromagnetic region 8, such as magnetic anisotropy and coercive force, can be varied. • Device operation. Referring to Figure 5, the device 29 for operating the conduction control device 1 includes a current source 30 for driving a current pulse I through the channel 2 and an optional series resistor 31 for using the first, Second and third gate voltages v 〇 , vG2, VG3 are applied to the first, second and third side gates 3, 4, 5, respectively, the first, second and third voltage sources 3 2, 3 3, 3 4, and a voltmeter for measuring the voltage drop V s D between the first and second fixed zones 6, 7 and thus determining that the device is in a high or low resistance state. A source 36 for generating a fe field B t ; X t may also be provided. Source 3 6 g -19- (17) 1313522 a inductor (not shown) such as a wire, loop or coil, and source (not shown) to drive current through the inductor. The inductor (not shown) can be placed on the substrate 13 (Fig. 1) of the proximity device 1 (Fig. 1). The device 1 can be used to store data and/or sense magnetic fields. A procedure for reading data from the data writing device 1 and the self-installation 1 will now be described with reference to Figs. The device 1 is cooled to below the salvage temperature tc of the ferromagnetic material. In this case, the high temperature of 'Gao.wMnmAs' is about 48 °Κ, and the device is cooled to 4 _ 2 . Hey. Other ferromagnetic materials can have a higher Curie temperature&apos; and thus devices based on these materials can be operated at higher temperatures. Referring in particular to Figure 6, in the writing process, the first and second voltage ports 32, 33 can each apply a bias voltage 37, 38 to the first and second gates 3, 4, i.e., VG1 = VG2 = -Vi 'To increase the charge carrier density in the junction area 9, 1 ' to reduce the resistance of the junction area 9, 1 而 to conduct it (preferably like an ohmic conductor). The junction 9, 1 lanthanum has sufficient conductivity to show the magnetization reversal of current sensing. In this example, ' I VG1 | and I vG21 are 1 V levels. However, these can be obtained by routine experimentation. In (Ga, Mri) As, the charge carrier transport is dominated by holes. Therefore, the first and second gates 3, 4 are negatively biased to increase the charge carrier density in the junction regions 9, 1 . However, if a ferromagnetic semiconductor in which the charge carrier transmission is dominated by electrons is used, the gate 3' 4 is biased with a positive -20-(18) 1313522. The third voltage source 34 can apply a bias voltage of 3 9 VG3 = V2 to the third gate 5 to reduce the charge carrier density on the ferromagnetic islands 8 which reduces the coercive force. In this case 'lvG3| is a level of 1 v. However, this can be tested experimentally. The current source 30 drives a current pulse 40 0 Isd = Ic' having an intensity IC which is ignited by the critical current of the ferromagnetic island 8. This rush will reinforce the existing magnetization 24 (Fig. 4) or reverse the magnetic 24 (Fig. 4), for example by switching the magnetization to 9 〇. The given direction of action 2 4 can be selected by selecting the polarity of the current pulse. The current pulse 40 has a duration At!. The duration Δΐ ι can be equal to 1 00 ns, 10 ns or 1 ns. In this case, the duration of 1 0 0 ps ' 'typically a critical current density of 1〇7 for ferromagnetic metals, and 1 to 4 or 105 AcnT2 for ferromagnetic semiconductors. grade. However, the intensity and minimum duration of the pulse 40 that is reversed by magnetization can be routinely tested, for example, by increasing the current density and/or short duration current pulses, and measuring the resistance. The field source 36 can apply a magnetic field pulse 4 1 to assist the current pulse, while the magnetic field source 36 can apply a fixed magnetic field to bias the free region 8. The lower intensity current pulse 40 can be used to cause the magnetization counter field source 36 to be an inductive source or can be permanent, i.e., by current, i.e., current pulsing. Magnetize to achieve less than or ! Δίι is the Acm density required to drive 40. However, it is directional. Magnetic permanent magnet-21 - (19) 1313522 Referring specifically to Figure 7 'in the reading procedure, the first and second voltage sources 3 2, 3 3 can each bias the first and second gates 3, 4 42, 43, that is, VG1 = VG2 = V3, the self-connected surface area 9, 10 is short of charge carriers, preferably forming a tunneling barrier. Forming at least one tunneling barrier has the advantage that device j can use the T A M R effect with local resistance. In this example, since the transmission system is dominated by the holes, a positive bias is applied to reduce the charge carrier density in the junction regions 9, 10. In this example, V3 is a 1 V rating. However, the bias required for the vacant charge carriers 9 and 10 can be obtained by routine experimentation, for example, by increasing the gate bias and measuring the source-drain characteristics. The third voltage source 34 applies a zero bias 44 to the third gate 5, i.e., V 〇 3 = 0, or causes the third horn 5 to float. The current source 3 is a tether drive measurement or a probe current pulse 4 5 ′ having an intensity Ip, i s D = I p &lt; I e , which is lower than the critical current of the ferromagnetic island 8 . The current pulse 40 has a duration At2. The probe pulse can be longer than the write pulse (in other words, At2 &gt; Δΐ!), can be about the same duration (ie, At2 « At,), or can be shorter than the write pulse (ie, Δί2 &lt; Δίι ). This duration may depend on the sensitivity of the RC値 and/or voltmeter 3 6 of the device 1. The duration AU can be less than or equal to 1 〇〇 ns, 1 〇 ns, or 1 ns. In this example, the duration At2 is 1 ns. The intensity of the Ip can be made as low as possible while still measuring the voltage. Ip can be determined by routine experimentation. Since the probe current pulse 45 is driven through the device 1, the voltage drop developed across the device -22-(20) 1313522 1 is measured by the voltmeter 35. If device 1 is in a high resistance state, then a relatively large pulse 46n corresponding to the voltage drop will be measured. If the device is at low resistance, a relatively small pulse 46L corresponding to a relatively low voltage drop will be measured. Referring to Figures 8A to 8D, the manufacturing apparatus will now be described with reference to Figure 8A. Semi-insulating (〇〇1)-oriented GaAs is used as the substrate 13' and loaded into the molecular beam epitaxy (MBE) display. ). The undoped AlAs layer 12' is conventionally known on the substrate 13' by MBE. The AlAs layer 12' has a thickness of 10 nm. The AlAs layer 12' may be thinner, for example 5 nm, or it may be thicker between 20 and 50 n m.

The Ga〇.98Mn〇.〇2As layer 11' is grown on the 12' with low temperature MBE, for example as in Journal of R. Campion, 247Growth, Vol. 247, p. 42 (1 3 03 ) Ga〇.98Mn 〇.〇2 As layer 11' has a thickness of 1 〇 nm. The thickness of Ga 〇 98 〇 ( ( ( As As As 可 可 可 可 可 As 可 可 As 可 可 As As As As As As As As As As. The Gao.wMno.MAs layer 11' can be doped, for example doped with p, such as 铍 (B e ). As previously explained, other ferromagnetic materials can be used. Use other ferromagnetic semiconductors.

The AlAs layer 12' helps to bring the Ga〇.98Mn().()2As layer 11' to a relatively high state, then the method. Wafer system (not grown). However, for example, the AlAs layer f Crystal is described. However, it can be thicker dopants, especially 5 boards 1 3 1 electricity -23- (21) (21)

1313522 Sexually insulated and provides a narrow lower interface 47 to the layer of Gao.^MncK^As

The AlAs layer 14 is grown on Ga〇.98Mnu2As 1 1' by MBE. The thickness of the cover layer is 5 nm. The cover layer 14 helps to limit the oxidation of the layer of Ga0.98Mnc.02As and provides a narrow upper interface 48 Ga〇.98Mn〇, 〇2As layer 11*.

The concentration of the carrier in the Ga〇.98MnQ.〇2AS layer 1 can be increased by modulation doping. For example, the insulating AlAs layer 12' or the cap layer it can be doped, for example doped with a P-type dopant such as Be. Additionally or alternatively, an additional layer (display) comprising, for example, GaAs, AlGaAs or AlAs may be provided immediately below or above the ferromagnetic semiconductor. The ferromagnetic half system is doped to increase the charge carrier density. The wafer system comprising the substrate 1 3 ' and having the deposited layers 1 Γ, 1 2 ' above it is removed from the reactor (not shown) and processed. This can be used to divide the wafer into smaller wafers. A mesa structure (not shown) for electrically isolating different regions of the wafer (or wafer) and for using the device 1 and the bonding pad region (lead (not shown) for electrically contacting the spear Shadow and wet etching are defined in g. The device can be fabricated in the isolation region as will now be described: Refer to Figure 8B, polymethyl methacrylate (pmma) 3 electron beam photoresist layer (not shown) The wafer is applied to the upper surface of the cover layer 14. The wafer (or wafer) is loaded into an electron beam lithography system (not fogged) for exposure. The pattern contains the negative image of the pattern shown in FIG. 1' layered to the ground without the lead 14, including the surface) 知加之49 示-24- (22) (22) 1313522 The wafer (or wafer) is moved from the electron beam lithography system (not shown) Except 'and use developer developed with water and isopropyl alcohol (IPA)' to remove the exposed areas of the photoresist (not shown) and leave the patterned photoresist layer 50 as an etch mask . Referring to Figure 8C, the wafer (or wafer) is placed in a reactive ion etch (RIE) system (not shown). The unmasked portions 5 1 and 5 2 of the layers 1 13, 13, 14' are dry etched using an anisotropic ruthenium tetrachloride (s i C 14 ) etchant 5 3 . In this example, the etchant 53 extends into the substrate 13'. Other RIE etches can be used, such as Cl2. Other dry hungry methods can be used, such as ion beam honing (i ο n b e a m m i 11 i n g ). Wet etching may be used additionally or alternatively. The wafer (or wafer) is removed from the RIE system (not shown) and the patterned photoresist layer 50 can be removed using acetone. The corresponding structure is shown in Figure 8D. Additional processing steps may include introducing damage to the free zone 8 (Fig. 2). This may include opening a window (not shown) above the free zone 8 (Fig. 2) in the electron beam photoresist layer (not shown) and scanning the ion beam globally on the device 1 (Fig. 1). Alternatively, the process can include selectively scanning the ion beam (not shown) on the free zone 8 (Fig. 2). The temperature of the ferromagnetic material can be increased by annealing, for example, as described by Edmonds et al., Physical Review Letters, Vol. 92, pp. 037201 (2004). As previously stated, a non-ferromagnetic region may be used in place of the first ferromagnetic region 6 in some embodiments. -25- (23) 1313522 A device comprising a conductive region and a ferromagnetic region can be fabricated by depositing a first layer of material (eg, a ferromagnetic semiconductor material), patterning the first layer 'eg, to form a third iron The magnetic region is then deposited with a second layer of material (e.g., a non-ferromagnetic semiconductor material that overlies the patterned first layer), and the second layer is patterned, for example, to form a non-ferromagnetic region. The junction zone is provided by at least one interface zone between the first and second materials. A device comprising a conductive region and a ferromagnetic region can be fabricated by depositing a layer of material and selectively implanting impurities to form a given type of region. For example, the fabrication method can include depositing a layer of non-ferromagnetic material, such as GaAs, and selectively implanting a magnetic dopant, such as Mn, to form a third ferromagnetic region. Or, the manufacturing method may include depositing a layer of ferromagnetic material, such as (Ga, Mn) As, and selectively implanting a dopant, such as si, to damage the ferromagnetic region and/or provide a compensated semiconductor, and thus A non-ferromagnetic region is formed instead of the first ferromagnetic region. The junction zone is provided by at least one interface zone between the implanted and non-planted zones. An alternative sluice structure refers to the modified device 第 of Figures 9 and 10, which is similar to the previously described device 1 (Fig. 1) except that the lateral gate 5 (Fig. 1) is covered by the free zone. The top gate 5' of the cover layer 14 in the upper region of 8 is replaced. The top gate 5 comprises a non-ferromagnetic conductor such as a metal or a semiconductor. The ferromagnetic region 8 is in this case, and the top gate 5 | is extended from the etched substrate 13 to the overlying layer 14. An additional insulating layer 5 4 is deposited prior to deposition of the non-ferromagnetic conductor 5 to be insulated from the conductor 5 I by the conductor 5 extending from the sidewall portion -26-(24) 1313522. However, a separate side insulating layer (not shown) may be provided on the side wall portion 1 83. Therefore, the additional insulating layer 54 can be omitted. Other brake configurations can be used. For example, the bottom gate located below can be used. Logical Logic In conventional microprocessors, logic gates typically do not store the data they have output. Therefore, once a logic gate or logic gate has executed a logic job and provides an output, the output is typically stored in separate memory. Additional steps in storing output can hinder computational efficiency. Conversely, the device 1 can operate not only as a logic gate, but also the output of the job without storing the output in separate memory. Referring to Fig. 11, the apparatus 1 shown in Fig. 4 is proposed from the viewpoint of having logic switches for inputs a, B and T and output VR. Input A is operatively coupled to third gate 5 and controls magnetization reversal. Input B is operatively coupled to resistor 3 1 to drive a write or read current pulse through the resistor 31 and device 1. The input T is operatively coupled to the first and second gates 3, 4 to set the device 1 for writing or reading. The output VR is located between device 1 and resistor 31. In this example, inputs A, B, and T are provided by sources 30, 32, 33, 34 (Figure 5). However, the inputs may be provided by other logic gates (not shown) or control elements (not shown). Referring to Fig. 12, in order to switch the device 1 to the "write" state, an input T = 0 is applied. This is achieved by supplying VG1 = VG2 = -V to the -27-(25) 1313522 one and the second gates 3, 4, as described above. Applying input A = 0 by supplying VG3 = % or Vg3 = _V2 to the third gate 5, respectively, or in a similar manner as previously described, by passing no current pulses or applying a double pulse with intensity Ic Device 1 applies an input B = 〇 or B = 1. Referring to Fig. 13, in order to switch the device 1 to the "read" state, an input T = 1 is applied. This is achieved by supplying V G 1 = V G2 = V ! to the first and second gates 2, 3 as previously described. The output VR' is read out by applying a current pulse having an intensity of 1 p through the device 1 and measuring the bias voltage VR across the device as previously described. Referring to Fig. 14, a map of the device 1 is shown. The logical "AND" can be achieved by resetting Vr to "0" before writing A and B and measuring VR. The logical "NAND" can be achieved by resetting VR to "1" before writing A and B and measuring VR. The logic "CNOT" can be implemented by writing A = 1 and B = 1. Magnetic Random Access Memory Array Referring to Figure 15, a magnetic random access memory (MR AM) cell 5 5 in accordance with the present invention includes an elongated conductive channel 56 and a gate 57. The memory cell 5 is similar to the conduction control device 1 described above, except that the memory cell 55 as a building block does not need to have the second fixed area 7, the second junction area 1 〇, and the corresponding junction gate The pole 4 and the "coercive force tuning" are outside the gate 5. However, as will be detailed later, the memory cell 5 5 can be in the -28 - (26) (26)

1313522 There is a sequence of interleaving sequences of adjacent ferromagnetic regions that are decomposed by the indirect surface region. The channel 586 includes a relatively local and relatively low normal region 58, 59. The ferromagnetic regions 58, 59 are in the same ferromagnetic layer 67 (Fig. UA). However, ferromagnetic ferrules are formed of different ferromagnetic materials, such as ferromagnetic metal and iron passages 56, including joint regions 60 that untwist the iron secret regions 58, 59, which are defined by compression segments 61 that pass through the first sidewall In a further plan view of 62 and the opposite second side wall 63, the second side wall portion 63 is provided towards the inwardly facing recess. Referring to Fig. 16, a memory array 64 β is shown in Fig. 17). The memory array 64' includes a memory cell 55. The cell 55 has a unit cell size of 6F2, wherein. Each of the cells 5 5 can pass through the gate line 65 and the current line 6 6 | Refer to the 1 7th diagram, the ferromagnetic region and the junction region 58 , and the patterned ferromagnetic layer 6 including the ferromagnetic semiconductor China Railway Fe Semiconductor is a monumental mill with a concentration X of 0. 〇2 X Μ η XA s ) 'also 卩 Ga〇.98Mn〇.〇2As. The patterned ferromagnetic layer 607 is located over the edge layer 68 comprising an insulator, which in this case is aluminum arsenide but other insulators may be used. The insulator can be matched to the iron or the lattice does not match. The insulating layer 6.8 is located in ferromagnetic material containing a fixed and free-region coercive force: the material is formed in Figures S58, 59 by a magnetic semiconductor. Junction area 60. The g-segment 61 is located between and 6 3 i. In the - side wall 24 of the β-portion 64' ([column. Each memory F is a feature size port to address. 5 9, 60 system is set, in this case the match alloy (G a ! - co-expansion Absolute (A1A s ), although the magnetic semiconductor lattice is semi-insulated arsenide -29- (27) 1313522 gallium (GaAs) partially etched on the substrate 69. The cover layer 70 containing AlAs is located in the patterned ferromagnetic Above the layer 67. The current line 6 6 comprises a conductor, such as a metal, or a heavily doped semiconductor. The current line 66 can be non-ferromagnetic. If the current line 66 comprises a metal and if the ferromagnetic material is a semiconductor, the current line 6 6 can also be used as an ohmic junction. - Processing can include annealing to form an ohmic junction. In this example, current line 6 6 . contains gold/zinc as the ohmic junction of the GaG.98Mn〇.G2As ( Au/Zn φ ) alloy and a gold layer (Au) located above. The gold/zinc layer has a thickness of 50 nm, and gold has a thickness of 200 nm. However, other layer thicknesses can be used. The gate and current lines 6 5, 6 6 are electrically insulated by an intermediate insulating layer 71. The intermediate insulating layer 71 may be crystalline or amorphous. In this example, the insulating layer 71 contains cerium oxide (SiO 2 ). However, other insulating materials such as tantalum nitride (Si 3 N 4 ) may be used. The insulating layer 71 is deposited before the gate line 65. Φ Gate The line 6 5 comprises a conductor, such as a metal, or a heavily doped semiconductor. The gate line 65 may be non-ferromagnetic. In this example, the gate 65 includes a titanium (Ti) sticker layer and a cover. The upper gold layer (au). Titanium has a thickness of 20 nm, while gold has a thickness of 200 nm. However, 'other layer thicknesses can be used. ^ Memory array 64 can be constructed to be compared with No. 1, 6 7A It is different from the one shown in Fig. 7B. For example, the gate line 65 can be formed in the same plane as the patterned ferromagnetic layer 67, for example, similar to the device 1 (Fig. 1) previously described. The method is formed by the same ferromagnetic material -30-(28) 1313522 as the patterned ferromagnetic layer 67. The current line 66 can be formed over the gate line 65, especially if the gate line 65 is Formed to be coplanar with the patterned ferromagnetic layer 67. As previously described, the surface or the underlying gate configuration can be used instead Gate configuration. Alternatively, current line 66 can be formed under ferromagnetic layer 67, for example by depositing a conductive layer (not shown) on insulating layer 68, patterning the layer (not shown) into stripes (not shown) A ferromagnetic layer is deposited on stripes (not shown) of conductive and insulating material. The ferromagnetic layer is then patterned to form a patterned layer 67 and define a gate line 66. Ferromagnetic layer Patterning and defining the gate lines can occur at the same or different processing steps. Referring to Fig. 18, memory array 64 is controlled by column decoder 72 and row decoder 73. The column decoder 72 may select a gate line from the gate lines 65i, 65i.i, 65i, 65i + 1, 65n to address from the cells 551; 1, 55u. 2, 5 5 1 j. 1 ' 5 5 1 j ' 5 5 1 j + 1 ' 5 5 ij + 2 ' 55i,m,55j],i,5 5 j. ] j _2 , 55i-i,j — i,55j-i,j , 55i_i, j + i, 5 5 j. i ; j + 2 55i-iiin, 55j, i, 55丨, Bu 2, 55j, ji, 55j, j, 55]:”+ ι, 55j, j + 2 , 55j, m, 55i + i'i, 5 5 i + i J-2 ' 5 5 i + j j. j ' 5 5 j + ij ' 5 5 i + ij + ! ' 55i + 】, j + 2 , 55i + 1, m ' 55n, i, 55n, j-2, 55n, ji, 55n, j, 55η, "+ι, 55n, j + 2, 55n, m of column memory cells, and The voltage Vl, VM or VH applies a selection signal to select three different channel conduction regimes. The selection signal with the bias voltage V1 increases the charge sub-density in the junction region 60, thereby reducing the junction region. The resistance of 60 is transmitted (preferably -31 - (29) 1313522 as an ohmic conductor). The selection signal with the bias voltage VM reduces the charge sub-density in the junction region 60 such that the junction region 60 is depleted. The selection signal having the bias voltage V η reduces the charge sub-density in the junction region 60, so that the junction region 60 is strongly depleted, that is, the depletion region when the bias voltage ν η is applied is greater than when the ν 施加 is applied. Vacant area. The polarity of 乂]^ and VH is opposite to Vl. As previously explained, each enthalpy can be obtained by routine experimentation. The decoder 73 can select a pair of adjacent currents from the current lines 66ι, 662, 66j.2, 66j.i, 66j, 6 6j + 1, 66j + 2, 6 6j + 3, 66m, 66m+1. Line 'to drive a write current pulse with intensity I IH I (which is higher than the critical current of the lower coercive ferromagnetic region 59, but lower than the critical current of the higher coercive ferromagnetic region 58) Or a read current pulse with intensity | Im | which is lower than the critical current of the lower coercive ferromagnetic region 59. "〇" or "1" is written according to the polarity of the write current pulse. Referring to Figure 19, the portion 64' of the memory array 64 during the writing process is depicted. A write select signal 74 having a bias voltage VL is applied to column i, that is, a noisy line 65; and a hold signal 75 having a bias voltage Vh is applied to the other columns 'including gate lines 65^!, 65i +1. Therefore, the junction 60 of the memory cells 55丨, 55i, j, 55i, j + i on the column i will have lower resistance, while the memory cells on the other columns i-Ι, i + Ι The junction 60 of 55i iji, 55ι ΐ, 55i_ + 55UU·!, 55i + lj, 55i+1, j+1 will have a higher resistance. The write current pulse 76 is driven through lines j and j + 1, i.e., current lines 6 6", 0 6" + 1 . Current pulse 76 is passed through a high enough current density -32- (30) (30)

1313522 Recalling the body cell 55,," to set the magnetization. The other cells on the same line, 55, j, j, 55i+i, j are not set, so the connections in these devices are in a high resistance state. As explained previously, the write current pulse has a duration of less than 100 ns, 10 ns, or 1 ns. The duration of the batch is approximately 1 ns. Referring to Fig. 20, the portion 641 of the quotation 64 during the reading process is depicted. The read select signal 7 7 having the bias voltage VM is applied to the $ie drain line 6 5 i, while the hold signal 75 having the bias voltage V η still complements the other columns, including the gate line 6 5 i _ i ' 6 5 j + !. Therefore, the junction 60 of the cell 兀 55i, ji, 55i, j, 55丨"+ 1 on the column i will have a memory cell 55^ on the other columns i-Ι, i+Ι. The junction 60 of 55^ i, j + i, 55j + i, ji, 55i + 1, j, 55j + 1, j + i will have a resistance. The read current pulse 768 is driven through lines j and j + 丨, jj lines 66j, 6 6j + 1. The current pulse 74 is set to a magnetization effect with a sufficiently high current density β memory cell 5 5 i,j. The bamboo cells 55i+1,j on the same row j are not set, so the connections in these devices are in a high resistance state.

The voltage Vs developed by the current line 66′′, 66j + 1 is measured by the white device 73 (Fig. 18) to determine whether the cell is in a high resistance state named “0” or corresponds to “1”. It should be understood that the embodiment described above can be applied with | The device does not need to be a vertical II memory S 60 system i 7 6 for the lateral device previously described. In the example, the i body array can be i, and is applied to the memory i resistance, and J ' 55i. "Higher power S is the current i is decoded by the memory of the memory system S. I can respond. I can modify it: set, example -33- (31) 1313522 as a pillar. It is to be understood that the present invention is described by way of example only, but the invention is not limited thereto, and various changes and modifications may be made without departing from the spirit and scope of the invention. The scope of the patent range. [Simplified illustration of the drawings] # Fig. 1 is a perspective view of a conduction control device according to the present invention; Fig. 2 is a plan view of the device shown in Fig. 1; The cross section of the device shown along line A_A; Fig. 4 is a schematic view showing the magnetization of the ferromagnetic region in the device shown in Fig. 1; Fig. 5 is a schematic view of the device for operating the device shown in Fig. 1. Figure 6 depicts the gate bias, current pulse that can be applied to the device of Figure 1 during the write cycle. Punching and magnetic field; 9 Figure 7 depicts the drain bias and current pulses that can be applied to the device of Figure 1 during the read cycle; Figures 8A-8D show the method of fabricating the device shown in Figure 1. Figure 9 is a plan view of another conduction control device according to the present invention; _ Figure 10 is a cross-section of the device shown in Figure 9 along line B_B; 'Figure 1 depicts the first Figure The device is used as a logic diagram to depict gate bias, current pulses, and magnetic fields that can be applied to the device during the write cycle; -34- (32) 1313522 Figure 13 Depicting the gate bias and current pulses that can be applied to the device of Figure 1 during the read cycle; Figure 14 is a true table of the device shown in Figure 11; Figure 15 is a memory in accordance with the present invention Schematic diagram of a somatic cell; Figure 16 depicts a portion of a memory array including the memory cells shown in Figure 15; Figures 17A and 17B are respectively memory cells shown in Figure 15. a section along lines C - C ' and D - D '; Figure 18 is a schematic diagram of a memory array including a driver circuit; The memory cells written in the memory array shown in Fig. 18 are depicted; and the 20th image depicts the memory cells in the memory array shown in Fig. 18. [Main component symbols] Description] 1: Conduction control device 2: Conduction channel 3: First gate 4: Second smell pole 5: Third gate 5': Top gate 6: First ferromagnetic zone (first fixed zone) 7: Second ferromagnetic zone (second fixed zone) 8: Third ferromagnetic zone (free zone) -35- (33) 1313522 9 : First junction zone 1 0 : First junction zone 1 1 : Ferromagnetic layer

11': Ga0'98Mn0.02As Layer 1 2: Insulating layer 12': AlAs Layer 1 3, 1 3 ': Substrate 14, 14': Cover layer 15: First compression section 1 6 : Second compression section 1 7 : first side wall 1 8 : second side wall

18〗, 182, 183: Side wall portions 19, 20, 21: Electric field 22, 23, 24: Magnetization 25: Vertical axis 2 6 : Crystal orientation of [1 0 0 ] (first easy magnetization axis) 2 7 : [ 0 Crystal orientation of 1 0 ] (second easy axis of magnetization) 2 8 : crystal orientation of [ 1 1 0 ] 29 : device 3 0 : current source 3 1 : resistor 3 2 : first voltage source 3 3 : second voltage Source-36- (34) 1313522 34 : 35 : 36 : 37, 40 : 41 : 42

4 5 : 4 6h 46l 47 : 48 : 49 : 50 :

53 : 54 : 55 , 56 : 57 : 58 ' 60 : 61 : Third voltage source voltmeter source 3 8 , 3 9 : Bias current pulse magnetic field pulse 4 3 : Bias zero bias probe current pulse : relatively large pulse : relatively small pulse interface on the interface surface photoresist layer 5 2: unmasked part of the etchant insulating layer 55u~55n, m: memory cell conduction channel gate 5 9 : ferromagnetic zone junction area compression section -37- (35) 1313522 6 2 : First side wall 6 3 : Second side wall 6 3 !: Second side wall portion 64 : Memory array 64 ′: Part of the memory array • 6 5, 6 5 1~6 5 n : Polar line _ 66, 66i ～ 66m +1 : current line _ 6 7 : ferromagnetic layer 6 8 : insulating layer 6 9 : substrate 70 : cover layer 7 1 : insulating layer 7 2 : column decoder 7 3 : row decoder 74: Write selection signal φ 7 5 Hold signal 76: Write current pulse 77: Read selection signal '78: Read current pulse' s, V: Interval - 38

Claims (1)

1313522 X. Patent Application No. 095109460 Patent Application Revision Chinese Patent Application Revision Amendment December 12, 1997 of the Republic of China 1 · A conduction control device comprising: a first ferromagnetic region having a relatively high coercive force; Φ a second ferromagnetic region having a relatively low coercive force; a junction region disposed between the first and second ferromagnetic regions for magnetically decoupling the first and second ferromagnetic regions And a gate for applying an electric field to the junction region to control the charge sub-density in the junction region. 2. The conduction control device of claim 1, comprising: a third ferromagnetic region having a higher coercive force than the second ferromagnetic region; and another junction region disposed in the second and the second Between the three ferromagnetic regions; and φ another gate' is used to apply an electric field to the other junction region to change the charge carrier density in the junction region. 3. The conduction control device of claim 1 or 2, further comprising: another gate for applying a field to the second ferromagnetic region. 4. The conduction control device of claim 1, wherein the first and second ferromagnetic regions comprise the same material. 5. The conduction control device of claim 1, wherein the first and second ferromagnetic regions and the junction region comprise the same material. 1313522 6. As in the conduction control device of claim 1, the @_first and second ferromagnetic regions and the junction region are formed in one layer. 7. The conduction control device of claim 1, wherein the φ _ first and second ferromagnetic regions comprise a ferromagnetic semiconductor. 8. As in the case of the conduction control device of claim 7, the _ + _ ferromagnetic semiconductor contains (Ga, Mn) As. 9. The conductive control device of claim 1, wherein the gastric interface region comprises a semiconductor material. 10. The conductive control device of claim 1, wherein the first ferromagnetic region is elongated and has a longitudinal axis. 11. The conductive control device of claim 10, wherein the longitudinal axis is aligned in a direction along an easy axis of magnetization. 1 2. In the case of the conduction control device of claim 1 or 2, the device is constructed to exhibit a tunneling anisotropic magnetoresistance (TAMR) effect. 1 3. In the case of the conduction control device of claim 1 or 2, the device is constructed to exhibit a tunneling magnetoresistance (T M R ) effect. 14. The conduction control device of claim 1, wherein the second ferromagnetic region is provided by a portion of a layer or a layer disposed substantially in a plane. A conductive control device according to claim 14 wherein the layer or layer portion has a thickness of less than or equal to 10 nm. 16. The conduction control device of claim 14, wherein the second ferromagnetic region has an easy magnetization axis oriented away from the plane of the layer or layer portion. -2- 1313522 1 7 The conductive control device of claim 14, wherein the second ferromagnetic region has an easy magnetization axis oriented to enter the plane of the layer or layer portion. 18. The conduction control device of claim 14, wherein the first ferromagnetic region is provided by another layer disposed substantially in the plane or another plane or another portion of the crucible. A conduction control device according to claim 18, wherein φ the first ferromagnetic region has an easy magnetization axis oriented to enter the plane of the other layer or the other layer portion. A device comprising: a conductive region; a ferromagnetic region; a junction region 'connecting the conduction region and the ferromagnetic region; and a horn electrode' for applying an electric field to the junction region Control the charge sub-density in the junction area. #21. The device of claim 20, wherein the conductive region comprises a non-ferromagnetic material. 22. The device of claim 20, wherein the conductive region comprises a semiconductor material. 23 'A device as claimed in claim 20, wherein the junction region comprises a semiconductor material. 24' The device of claim 20, wherein the conductive zone and the junction zone comprise the same material. 25. The device of claim 2, wherein the ferromagnetic region 1313522 u-day correction replacement page 4-2- and the junction region comprise the same material. 26. A memory array as claimed in any one of claims 1 to 2, 4 to 11 and any of items 14 to 25. A method of manufacturing a conduction control device, the method comprising: providing a first ferromagnetic region having a relatively high coercive force; providing a second ferromagnetic region having a relatively low coercive force; a junction region between the first and second ferromagnetic regions for magnetically decoupling the first and second ferromagnetic regions; and providing a gate for applying an electric field to the junction region to Control the charge sub-density in the junction area. The method of claim 27, wherein providing the junction region comprises defining a compression segment between the first and second junction regions. A method of operating a conduction control device, the conduction control device having a passage including a first ferromagnetic region having a relatively high coercive force and a second ferromagnetic having a relatively low coercive force a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second ferromagnetic regions; and a field applied to the junction region to control the junction a gate of the charge carrier density in the region, the method comprising: applying a first bias to the gate to increase a charge carrier density in the junction region; and driving a first current pulse through the channel The current pulse has a first current amplitude greater than a threshold 値 to reverse the magnetization of the second ferromagnetic region. 30. The method of claim 29, wherein the method includes: -4- 1313522 ~ - - 曰 correction replacement page applies a second bias to the gate to reduce the charge sub-density in the junction region And driving a second current pulse through the channel, the second current pulse having a second current amplitude below the threshold 値. 3 1. A method of operating a conduction control device, the conduction control device having a passage including a first ferromagnetic region having a relatively high coercive force and a second ferromagnetic region having a relatively low coercive force a junction region disposed between the first and second ferromagnetic regions to magnetically decouple the first and second ferromagnetic regions; and a field applied to the junction region to control the connection a gate of the charge carrier density in the area, the method comprising: applying a magnetic field to the first and second ferromagnetic regions to reverse the magnetization of the second but not the first ferromagnetic region, The magnetic field is greater than a critical field of the second ferromagnetic region but less than a critical field of the first ferromagnetic region.