TWI306358B - Organic light emitting display and pixel circuit thereof - Google Patents

Description

1306358

Sanda number: TW2687PA Nine, invention description: '[Technical field to which the invention belongs] The invention relates to a display and its pixel circuit, and in particular to an organic light emitting display and a pixel circuit thereof. [Prior Art] Referring to Fig. 1, a conventional organic light emitting diode (OLED) pixel circuit is shown. The halogen > circuit 100 includes MOS transistors T1 to T4, a capacitor C1, and an organic light emitting diode 01. When the MOS transistors T1 and T2 are turned on, the data Idata is input to the pixel circuit 100. When the MOS transistors T1 and T2 are turned off, the capacitor C1 has stored data to cause the organic light emitting diode 01 to emit light. However, in order to turn off the MOS transistor T2, the voltage of the gate is lowered, and the potential at the point A is also lowered, which is a clock feed through effect. The clock feedthrough penetration affects the potential stored in the capacitor |C1, which causes the luminosity of the organic light-emitting diode 01 to deviate. Referring to Figure 2, another conventional organic light emitting diode circuit is shown. The pixel circuit 200 includes MOS transistors M1 to M5, a capacitor Cs, and an organic light emitting diode 02. In order to improve the clock feed penetration, the halogen circuit 200 controls the MOS transistor M2 by the signal S1 and the MOS transistor M3 with the signal S1B inverted with the signal S1 to cancel the clock. Feed penetration effect. However, the pixel circuit 200 requires an additional MOS transistor to be added compared to the pixel circuit 100, and the aperture ratio is lowered (aperture 6 1306358).

Sanda number: TW2687PA ratio) and increase costs. SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide an organic light emitting display and a pixel circuit thereof, which can solve the clock feed effect without adding an additional switch. In accordance with the purpose of the present invention, an organic light-emitting diode halogen circuit is proposed. The pixel circuit includes a first switch, a second switch, a first PMOS transistor, a second PMOS transistor, a capacitor, and an organic light emitting diode. The first switch has a first end and a second end, and the first end receives a data signal and determines whether to turn on or not under the control of a first scan signal. The second switch has a third end and a fourth end, and the third end is coupled to the second end, and the second switch determines whether to conduct or not under the control of a second scan signal. The source of the first PM0S transistor is coupled to a high potential, the drain of the first PM0S transistor is coupled to the fourth terminal of the second switch, and the gate thereof is coupled to the second terminal. The gate of the second PMOS transistor is coupled to the second terminal, and φ has its source coupled to a high potential. The capacitor is coupled between the gate of the first PM0S transistor and the high potential. The anode of the organic light emitting diode is coupled to the drain of the second PM0S transistor, and the cathode is coupled to a low potential. The above described objects, features, and advantages of the present invention will become more apparent and understood.

Sanda Number: TW2687PA [Embodiment] Please refer to FIG. 3, which illustrates a pixel circuit of an organic light emitting diode according to a first embodiment of the present invention. The pixel circuit 300 includes a switch SW1, a switch SW12, a PMOS transistor MP, an L, a PMOS transistor MP2, a capacitor C3, and an organic light emitting diode 03. The switch SW11 has a first end and a second end. The first end receives a data signal IDATA and determines whether to turn on or not under the control of the first scanning signal S1. The switch SW12 has a third end and a fourth end, and the third end of the switch is coupled to the second end of the switch SW11. The switch SW12 determines whether the switch is turned on or not under the control of the second scan signal S2. The source of the PMOS transistor MP1 is coupled to the high potential VDD, the drain of the PMOS transistor is coupled to the fourth terminal of the switch SW12, and the gate thereof is coupled to the second terminal. The gate of PM0S' transistor MP2 is coupled to the second terminal, and its source is coupled to the high power 'bit VDD. The capacitor C3 is coupled between the gate of the PMOS transistor MP1 and the high potential VDD. The anode of the organic light-emitting diode 03 is coupled to the drain of the PMOS transistor MP2, and the cathode thereof is coupled to the low potential VSS. The switch SW11 is a PMOS transistor in this embodiment, the first end is its drain, the second end is its source, and its gate receives the first scan signal S1. The switch SW12 is an NM0S transistor, the third end is its source, the fourth end is its drain, and the gate of the NM0S transistor receives the second scan signal S2. Referring to Fig. 4, there is shown a signal waveform diagram of the pixel circuit of the first embodiment. Please refer to FIG. 3 and FIG. 4 simultaneously, the first scanning signal S1 is the scanning signal SCAN1, and the second scanning signal S2 is the scanning signal SCAN1B. The scanning signal SCAN 1 and the scanning signal SCA 1B are inverted. When the feed signal IDATA is input to the halogen circuit 300, the scan signal SCAN1 is powered by the potential V41 .1306358.

Sanda number: TW2687PA is reduced to the potential V42, so that the PM0S of the switch SW11 is always a channel, and the s turtle day is turned on. The SCAN1B of the sweeper ^ is raised from the potential V43 to the potential V44, so that the capacitor of the switch is turned on. At this time, even the data signal IDATA is stored in C3. When the data signal IDATA stops inputting the pixel circuit 3〇〇, the SCAN1 rises from the potential V42 to the potential V41, and the scan signal ScaniI: the signal V44 falls to the potential V43', so that the switch SW11 and the switch SW12 are turned off the electric switch SW11 and The switch SW12 is simultaneously turned off. Or borrow a scanning mirror. The SCAN1B is lowered from the potential V44 to the potential V43 earlier than the scan signal scani potential V42 to the potential V41, so that the switch ^12 is slightly earlier than the open ^=. m Please refer to Fig. 5, which shows another example of the waveform diagram of the pixel circuit of the first embodiment. In Fig. 5, the 'first scan signal si is the scan signal WRITE_SCAN' and the second scan signal S2 is the scan signal ERASE_SCAN. Scan signal WRITE-SCAN is reduced from potential V51 to potential

V52 turns on the PM0S transistor of the switch SW11, so that the data signal 丨μτα is input to the pixel circuit. Then, after the period T51, the scanning signal is lowered from the potential V53 to the potential V54, so that the switch SW12 is turned off (10), the transistor is turned off, and the switch 0 is turned off. After the period T52, the scan signal ERASE-SAN rises from the potential V54 to the potential. V53, the Lios transistor is turned on to reset the capacitor C3 to release the potential stored by the capacitor C3. The driving method of Fig. 5 is pulse-type. Please refer to FIG. 6 , which illustrates the second embodiment of the present invention.

Sanda number: TW2687PA Organic light-emitting diode circuit. The pixel circuit 600 is different from the pixel circuit 300 of the first embodiment in that the switch SW11 is replaced by the NMOS transistor of the switch SW21, and the PMOS transistor of the switch SW22 is substituted for the switch SW12. The switch SW21 has a first end and a second end, and the first end receives the data signal IDATA and determines whether to turn on or not under the control of the first scanning signal S1'. The switch SW22 has a third end and a fourth end, and the third end is coupled to the second end of the switch SW21. The switch SW22 determines whether to turn on or off under the control of the second scan signal S2'. The source of the original OS transistor of the first end switch SW21, the original second end is its drain, and the gate receives the first scan signal S1'. The drain of the PMOS transistor of the original third terminal switch SW22 has its original fourth terminal and its gate receiving the second scanning signal S2'. • Please refer to Figure 4. In the present embodiment, the first scanning signal S1'' is, for example, a scanning signal SC AN 1B, and the second scanning signal S 2 ' is, for example, a scanning signal SCAN 1 . When the tributary signal I DATA is input to the pixel circuit 600, the scanning signal SCAN1 is lowered from the potential V41 to the potential V42, so that the | PMOS transistor of the switch SW22 is turned on; the scanning signal SCAN1B is raised from the potential V43 to the potential V44, so that the switch SW21 The NMOS transistor is turned on. At this time, the information signal IDATA is stored in the capacitor C3. When the feed signal I DATA stops inputting the halogen circuit 600, the scan signal SCAN1 rises from the potential V42 to the potential V41, and the scan signal SCAN1B falls from the potential V44 to the potential V43, causing the switch SW22 and the switch SW21 to be turned off. The switch SW22 and the switch SW21 are simultaneously turned off. Alternatively, the scan signal SCAN 1 is raised from the potential V42 to the potential V41, and the scan signal SCAN1B is lowered from the potential V44 to the potential V43 earlier, so that the switch SW22 is turned off earlier than the switch SW21. 10 .1306358

Sanda number: TW2687PA May month, day '?, Fig. 7, which shows another example of the waveform signal of the pixel circuit of the second embodiment. In this embodiment, the first scan signal S1 is a scan signal fRITE_SCAN', and the second scan signal S2 is a scan signal ERASE_SCAN. The scan signal WRITE_SCAN' is raised from the potential V71 to the potential V52 to turn on the NM0S transistor of the switch SW21, so that the data signal IDATA is input to the pixel circuit 300. Then, after the period τη, 旙 less 跋eTM “please raise the PMOS transistor to the power-off. The PMOS transistor of the switch SW22 is turned off and the period Τ72, the scanning signal is deleted E-SAN, and the zeta potential V74 is reduced to the potential V73. Turn on the brain crystal to reset the capacitor C3 to release the potential stored in the capacitor C3. The driving method in Fig. 7 is pulse type. The above-mentioned pixel circuits 300 and 6〇〇, total & Όυυ ' is active Organic Light Emitting Body (Active Matrix Organi.τ;

Light Emitting Diode ! AMOLED). Referring to Figure 8, there is shown a block diagram of an organic light-emitting display according to the present invention. The display, 800 packs of dead gold ▲ π π heart w π. 匕 昼 阵列 array 810, scan driver 820 and data driver 830. The sweep #n Natai driver 820 provides a first scan signal S1 and a second scan signal S2. Taste Mina Fine ^ Bessie Drive 830 provides the data number IDATA. The halogen array 81 includes a passenger 1 and a needle. Flu 昼 a pixel circuit, such as gold to circuit 300 or 600. The scan driver drives the pixel array 810 with the flute Marshalling signal S2: the power coffee and the second scan signal S1 and the second scan signal S2 are also driven or the first scan of the above-mentioned real age rym_81G. 1-way organic light-emitting display and its 昼 1306358

The three-way number: TW2687PA circuit can not only solve the problem of penetration due to clock feed. Compared with the traditional halogen circuit, it is not necessary to add an additional MOS switch to avoid the clock feedthrough, and the aperture ratio is not lowered. In view of the above, the present invention has been described above with reference to a preferred embodiment, and is not intended to limit the invention, and various modifications may be made without departing from the spirit and scope of the invention. And the scope of protection of the present invention is defined by the scope of the appended patent application.

12 • 1306358

Sanda number: TW2687PA 4 [Simple description of the diagram] 'The first figure shows the halogen circuit of the conventional organic light-emitting diode. FIG. 2 is a diagram showing another conventional organic light-emitting diode circuit. FIG. 3 is a diagram showing a fourth embodiment of the organic light-emitting diode according to the first embodiment of the present invention. A signal waveform diagram of a pixel circuit of an embodiment. Fig. 5 is a view showing another example of the signal waveform of the pixel circuit of the first embodiment. Fig. 6 is a view showing a pixel circuit of an organic light emitting diode according to a second embodiment of the present invention. Fig. 7 is a view showing another example of the signal waveform of the pixel circuit of the second embodiment. - Figure 8 is a block diagram of an organic light emitting display according to the present invention. [Main component symbol description] 100, 200, 300: Alizarin circuit ΤΙ, T2, T3, T4, Mb M2, M3, M4, M5: MOS transistor

Cl, Cs, C3: Capacitor 01, 02, 03: Organic Light Emitting Diode SWU, SW12, SW2 Bu SW22: Switch MP1, MP2: PMOS Transistor 800: Display 810: Alizarin Array 13 1306358

_ Sanda Number: TW2687PA 8 2 0 : Scan Drive Benefit 830: Data Drive

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Claims (1)

1306358 Sanda number: TW2687PA X. Patent application scope: 1. An organic light emitting diode (OLED) circuit comprising: a first switch having a first end and a second end; The first end receives a data signal and determines whether to conduct or not under the control of a first scanning signal; a second switch having a third end and a fourth end, the third end being coupled to the second The second switch is controlled to be turned on or under the control of a second scan signal; a first PMOS transistor whose source is coupled to a high potential and whose drain is coupled to the second switch a fourth end, the gate is coupled to the second end; • a second PMOS transistor, the gate is coupled to the second end, and the source is coupled to the high potential; a capacitor, coupled Connected between the gate of the first PMOS transistor and the high-voltage I-position; and an organic light-emitting diode having an anode coupled to the drain of the second PMOS transistor, the cathode of which is coupled to A low potential. 2. The pixel circuit of claim 1, wherein the first open relationship is a third PMOS transistor, the first end is a drain of the third PMOS transistor, and the second end is the second end a source of the third PMOS transistor, the gate of the third PMOS transistor receiving the first scan signal. 3. The patent circuit of claim 2, wherein the second open relationship is an NM0S transistor, and the third end is a 15:1306358 three-numbered circuit: TW2687PA capacitor. 10. The pixel circuit of claim 1, wherein the first open relationship is an NM0S transistor, the first end is a source of the NMOS transistor, and the second end is the NMOS transistor The gate of the 0S transistor receives the first scan signal. 11. The pixel circuit of claim 10, wherein the second open relationship is a third PMOS transistor, and the third end is a drain of the third PMOS transistor, the fourth end a source of the third PMOS transistor, the gate of the NMOS transistor receiving the second scan signal. 12. The method as claimed in claim 11, wherein when the feed signal is input into the circuit, the scan signal is raised from a potential to a second potential. The NM0S transistor is turned on, and the second scan signal is reduced from a third potential to a fourth potential to turn on the third PMOS transistor. 13. The pixel circuit of claim 12, wherein when the data signal stops inputting the pixel circuit, the first scanning signal is decreased from the second potential to the first potential, the second The scan signal is raised from the fourth potential to the third potential to turn off the third PMOS transistor and the NMOS transistor. 14. The halogen circuit of claim 13, wherein the NMOS crystal system is turned off earlier than the third PMOS transistor. 15. The pixel circuit of claim 13, wherein the NMOS transistor system is simultaneously turned off at the same time as the third PMOS transistor. 16. The pixel circuit of claim 11, wherein: 17 1306358 Sanda number: TW2687PA, the first scan signal is raised from a first potential to a second potential to turn on the NMOS transistor to enable After the poor signal is input to the halogen circuit, the second scan signal is raised from a third potential to a fourth potential through a first 'time period, so that the third PMOS transistor is turned off. 17. The pixel circuit of claim 16, wherein the third PMOS transistor is turned off by a second period of time, and the second scan signal is decreased from the fourth potential to the second potential. The second PM0S transistor _ is turned on to reset the capacitor. 18. The halogen circuit described in claim 1 is an active matrix organic light emitting diode (AMOLED) halogen circuit. 19. An Organic Light Emitting Display (OLED), comprising: a scan driver providing a first scan signal and a second scan signal; _ a data drive to provide a data signal; and a pixel The circuit includes: a first switch having a first end and a second end, the first end receiving the data signal, and determining whether to conduct or not under the control of the first scan signal; a third end and a fourth end, the third end is coupled to the second end, and the second switch determines whether to conduct or not under the control of the second scan signal; a first PMOS transistor, the source thereof The pole is coupled to a high voltage 18 1306358 Sanda number: TW2687PA bit ^ It is not (4) connected to the fourth end of the second switch, the gate is consumed to the second end of the second, - the second PMGS transistor, The gate is pure to the second end, the source is coupled to the high potential; and a capacitor is secreted between the high potential of the first Cong transistor; and J ^ an organic light emitting diode, An anode is coupled to the drain of the second PMOS transistor The cathode is coupled to the low potential / 1 as shown in claim 19 of the patent application, the first-on relationship - the third transistor, the first end is the wave of the ^, _ transistor, The second end is the third PM()S, and the gate of the third PMOS transistor receives the first scan. , ... #一一一一专利专利范围20 The display of the device ^ where the brother opened a correction: a _S transistor, the third end of the _S electricity: Shanghai: Source: 'The brother of the four ends The third_transistor:; the gate of the crystal receives the second scan signal. S- 22. If the patent application scope f21 (4) (4), when the data signal is input to the display, the first broom: a bit is reduced to a second potential, so that the third Μ S 0 S electric crystal field body ^ The 扫描 scan signal is only raised from the third power to the fourth power: the two bodies are turned on.忒NM0S electric crystal 23. If the data signal of the 22nd item of the patent application is stopped, the second potential is raised to the first potential, and the first potential is determined by the first potential. The fourth potential drop is 19 -1306358. The number reaches: TW2687PA. When the data signal is input to the display, the first scan signal is raised from a first potential to a second potential, so that the NM0S transistor is turned on. The scan signal is reduced from a third potential to a fourth potential to turn on the third PMOS transistor. 31. The display of claim 30, wherein when the data signal is stopped from being input to the display, the first scanning signal is decreased from the second potential to the first potential, and the second scanning signal is The fourth potential is boosted to the third potential, and the third PMOS transistor and the NMOS transistor are turned off. The display of claim 31, wherein the NMOS transistor system is earlier than the third PMOS The transistor is turned off. 33. The display of claim 31, wherein the -NMOS transistor system and the third PMOS transistor are simultaneously turned off. 34. The display of claim 29, wherein the first scan signal is raised from a first potential to a second potential to turn on the NMOS electric φ crystal, so that the data signal is input to the display. In the first period, the second scan signal is raised from a third potential to a fourth potential to turn off the third PMOS transistor. 35. The display of claim 34, wherein the third PMOS transistor is turned off by a second period of time, the second scan signal is decreased from the fourth potential to the third potential, so that the third The PMOS transistor is turned on to reset the capacitor. 21 *1306358 Sanda number: TW2687PA 4 36. The display of claim 19 is an Active Matrix Organic Light Emitting Diode (AMOLED) display. twenty two