1305088 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種數位影像解鴆裝置及其方法，特別是關 於一種利用反配置程序之數位影像解碼裝置及其方法。 【先前技術】 隨著人們對於娛樂與消費電子產品之多媒體品質及功能性 之市場需求提高，促成了多媒體技術择更快的計算速度與更有效 鲁率的發展方向前進。因為多媒體應用係即時處理影音訊號，因此 需要相關軟硬體資源加以配合，而製造商為了迎合多媒體技術快 速變遷與消費者偏好的曰趨多元，持續嘗試發展低成本、廣大市 場性、高品質的多媒體產品，已然成為製造商們足以因應標準及 消費者偏好的一項富有彈性之研發策略。 由於多媒體訊號包括大量資料而通常具有較高之資料儲存 資源需求’因此有各種方法以供多媒體影音於傳送及儲存前進行 ' 壓縮及編碼處理’例如一種DV ( digital video)格式，已經完 整被描述與定義於標準規格書中，例如IEC 61834，DV-SD/藍 φ 皮書與SMPTE 314M規格書。應用此種DV格式之裝置係藉由數學 技術以區分像素（pixel)為區塊（block)，例如使用一離散餘 弦轉換（discrete cosine transformation ; DCT )技術以獲得 離散餘弦區塊（DCT block)，並且以離散餘弦轉換係數（DCT coefficient )表示此影像壓縮後的形式，以及利用量化 (quantization)技術將每一離散餘弦轉換係數除以一個非零的 正整數，以減少重建該影像時之可視失真程度。另一方面，在解 碼程序中，解碼器係反向進行前述編碼程序以重建離散餘弦轉換 係數之近似結果。 此外，前述之DV格式資料串包括多個圖框（frame )，而每 1305088 個圖框包括30個影像區段（video segment)，每個影像區段各 包括5個壓縮巨集區塊（compressed macroblock)，並立每個巨 集區塊又包括一個量化編號（QN0)、4個14位元組大小的亮度 (luminance ; Y )資料區塊、2個10位元組大小的彩度 (chrominance ; Cr、Cb)資料區塊。前述每個區塊包括一組固 定長度之資訊，例如直流係數（DC coefficient)以及一個8木8 像素大小之離散餘弦轉換係數，其係由數位影像之交流係數（AC coefficient)經過離散餘弦轉換而得。對於每資料區塊而吕’ 所需用以儲存離散餘弦轉換係數的位元數量將因不同的量化編 碼模式而有所差異，因此也將造成未使用位元之有無，亦即若所 需位元數超過固定配置之該區塊大小時，需要使用到另一區塊的 額外空間，並且若所需位元數未超過固定配置之該區塊大小時’ 該區塊將產生未使用之空間。 請參閱第1圖，其係習知數位視訊系統10之架構示意圖。 其中，數位視訊系統10接收一 DV格式資料串，其來源例如一數 位電視（digital television ; DTV )、一互動式機上盒 (interactive set-top box)、數位攝影機（DV camera)以及 其他可產生DV格式資料串之裝置所產生之影像或聲音尊資料， 而且此DV格式資料串可分割為數位介面格式序列（digital interface/interchange format sequence; DIF sequence)，以 下簡稱DIF序列。其中，這些DIF序列係由多個固定長度之Dip 區塊組成，並且每一 DIF區塊至少包含有一個識別標頭 (identication header)以指明此DIF區塊之型態及其在Dip 序列之位置。然後，此DV格式資料串由該數位視訊系統1〇接收， 其係包括一 DIF剖析器（parser) 110以分離前述DIF格式化資 料序列之資料為並產生一影像資料串及一聲音資料串；一視訊解 碼器120以解碼該結果資料串之此影像資料串；一音訊解瑪器 1305088 130以解碼此聲音資料串’然後此視訊解碼器120及音訊解碼器 130之輸出可再分別送至一顯示器及一音效輸出端（未標示於圖 中）以供播放。其中，視訊解碼器120尚可包括一處理器140以 進行前置剖析（preparsing)、反量化（inverse quantization) 以及反離散餘弦轉換（inverse DCT)程序等，以及一可變長度 解碼單元 150 (variable length decoding unit; VLD unit) 以進行解碼程序。 承上所述，每一包含眾多像素之影像圖框被切割為眾多的資 料區塊，而巨集區塊即由這些資料區塊聚集而成。在DV編碼時， 每一區塊使用8*8離散餘弦轉換或2*4*8離散餘弦轉換兩種模式 之一以產生每一區塊的離散餘弦轉換係數，經過加權程序後，每 一已加權離散餘弦轉換所成區塊可再分類為4個類別（class)， 因此每一具有此離散餘弦轉換係數的區塊則被賦予一個類別編 號（class number)，而每一離散餘弦轉換係數區塊之係數亦被 指定一區域編號（area number )。上述結果可如第2A圖及第2B 圖所示，其中第2A圖係使用8*8離散餘弦轉換之區域號碼配置 示意圖，第2B圖則為使用2*4*8離散餘弦轉換之區域號碼配置 示意圖。換言之，離散餘弦轉換係數用以決定壓縮之資料儲存與 傳送量，在量化階段，離散餘弦轉換係數之分割選取係取決於類 別編號、區號編號及量化編號等，並且在DV格式中，量化編號 限制了每個影像區段為5個壓縮的巨集區塊。另一方面，在DV 解碼過程中，所有的區塊資訊係傳遞至可變長度解碼單元，因此 在該可變長度解碼單元中，每個資料區塊被解碼以獲得離散餘弦 轉換係數，然後離散餘弦轉換係數可再傳遞至反量化及反離散餘 弦轉換單元等，然後再輸出至圖框緩衝器以供後續播放與顯示。 由於DV係以固定速率傳送至Μ解碼器加以解碼，所以在單位時 間内，具有不同資料大小的區塊，其解碼往往受到限制。至此， 1305088 提出一種應用解碼端之數位影像之反配置方法與裝置，實為亟需 處理之研發課題之一，也是使用者殷切盼望及本發明人念茲在茲 者。 【發明内容】 本發明人基於多年從事於數位影像處理相關技術之研究與 相關產品開發維護諸多實務經驗，乃思及習知技術之缺陷及其改 良意念，憑藉其專業知識、多方研究設計與專題探討，藉此研究 出一種數位影像解碼裝置及其方法，可解決上述之問題。 > 本發明提供之一種數位影像解碼方法，係用於解碼一數位影 像，包括以下步驟：首先，進行一反配置程序，以依序解碼複數 個資料區塊，並依序輸出每一已完成解碼資料區塊至一解碼結果 區塊儲存區，其中該數位影像係一壓縮影像資料，該壓縮影像資 料包括複數個影像區段，每一該影像區段包括複數個壓縮巨集區 塊，並且每一該壓縮巨集區塊包括該複數個資料區塊。接著，依 序輸出儲存於該解碼結果區塊儲存區的每一個完整資料區塊至 一反量化單元及一反離散餘弦轉換單元。在此一提，每一該複數 I 個完整資料區塊係由部份該複數個已完成解碼資料區塊組成。此 外，此數位影像解碼方法更包括接收並分離一壓縮數位影像資料 串為該壓縮影像資料及一壓縮聲音資料，並且儲存該壓縮影像資 料至一壓縮影像資料儲存區，以及依序存取該壓縮影像資料儲存 區之複數個資料區塊，並且進行該反配置程序。 本發明尚提供一種數位影像解碼裝置，係用於解碼一數位影 像，包括：一反配置單元，其包括一可變長度解碼單元以及一指 標儲存區。反配置單元係用以依序解碼每一個資料區塊，並且依 序輸出已完成解碼資料區塊，其中該數位影像係一壓縮影像資 料，該壓縮影像資料包括複數個影像區段，每一個影像區段包括 8 1305088 複數個壓縮巨集區現，並且每 區塊，而該反配置單元更可包括 集區塊包括複數個 儲存複數個已完成解㈣科區塊及=區塊儲存區，以 =7該解_區塊館3=複;個已完成解 二=，：如—個靜態隨機存取記憶體(二一第-隨機存取 、第-隨機存取記憶體；該可變長）之中’也可以位 數個資料區塊，·該指標儲存 ::::係用以解 個資料區塊之_完絲度 =多個指標細表示^ 位影_置尚可包括 器，㈣縮影像資料儲存區係儲存以及-剖; 其中_影像資料儲:區及依序 中，該剖析器係用以接收並八雜一)r 隨機存 二充 ==夠在完“完 :二整地傳送至下一級處理裝置進行後續處序時， 散餘進行反： 得的數位影像就能夠藉此完成解碼/解等 賞，並且由於★過一播放程序輸出至一顯示裝置予以播放與觀 相較於純禅、發明可藉由硬體架構提供支援與訊號傳遞，因此 沐純捽U軟體進行解碼㈣’本發明之數位影像解碼裝置及 得人辆I加快解碼程序之進行與提昇其執行效率與效能，因而使 —的視聽娛樂需求及權益可獲得更多滿足與保障。 茲為使貴審查委員對本發明之技術特徵及所達成之功效有更進一步 1305088 之瞭解與認識，下文謹提供較佳之實施例及相關圖式以為輔佐之用，並以 詳細之說明文字配合說明如後。 【實施方式】 請參閱第3A圖’其係依據本發明一實施例之數位影像解碼 方法流程圖。在此實施例中，依據本發明一實施例之數位影像解 碼方法’係可於步驟S31接收並分離一壓縮數位影像資料串為一 壓縮影像資料及一壓縮聲音資料，於步驟S32儲存該壓縮影像資 料至一壓縮影像資料儲存區，接著於步驟S33依序存取該壓縮影 像資料儲存區之複數個資料區塊，並且進行一反配置程序，藉以 依序解碼複數個資料區塊，並依序輸出複數個已完成解碼資料區 塊至-解碼結果區_存區，其中該數位影像係—壓縮影像資 料’該壓縮影像資料包括複數個影像區段，每個影像區段包括複 數龍駐集區塊，並且每個壓駐㈣塊包括複數個資料區 塊。然後’於步驟S34依序輸出該解碼結果區塊儲存區之每一個 完整資料區塊至-反量化單元及―反離散餘弦轉換單元。其中， 該壓縮影像資料儲存區及該解碼結果區塊儲存區係可位於同一 第一隨機存取記憶體，或者該解碼結果區塊儲存區另可位於一第 二隨機存取記㈣之中，端賴研發人員對此數位影像解碼方法之 執行效能以及記憶體、處㈣、傳輸介㈣线魏之支援程度 與成本考量而決定其配置與規劃。 床=併參閱第3B圖，其係依據本發明一實施例之反配置程 :::圖。第3A圖步驟S33之反配置程序在此更可以透過以下 ^驟進行：首先’於步驟S331依序解碼一該複數個壓縮巨集區 塊之一該複數個資料區塊，以紀錄—[ 標值係記錄未解碼之資料區说。Τ ^才曰 拉心“ 貝针&塊其次’於步驟S332根據該第- W值進行解碼該未解狀資料區塊，並輸出—第二已完成解碼 1305088 資料區塊至該解碼結果區塊儲存區，以及產生一第二指標值，該 第二指標值係記錄資料區塊完成解碼，但尚儲存一其他資料區 塊，以根據該第二指標值以尋找該其他資料區塊，以使該未解碼 之資料區塊可以與該其他資料區塊連接，以輸出一第三已完成解 碼資料區塊至該解碼結果區塊儲存區，以成為完整之資料區塊， 於步驟S333依序解碼一該複數個壓縮巨集區塊之一該複數個資 料區塊，其中包括於解碼每一個壓縮巨集區塊之每一個資料區塊 過程中儲存該第一指標值以及該第二指標值。例如：若一資料區 塊内含資訊指示該資料區塊包括多個資料區塊組成成份時，可透 過該第一指標值與以記錄哪一個資料區塊於解壓縮時無法完全 解碼，依據每一個資料區塊之一資料區塊組成成份之一位元數以 判斷是否完全解碼以決定是否紀錄該第一指標值然後，依據每一 個資料區塊之每個資料區塊組成成份之一起始位置及每一個資 料區塊相對應之一邊界值透過該第二指標值記錄，藉以指示該資 料區塊之位置尚儲存有複數個該其他資料區塊，該其他資料區塊 係屬於未完全解碼之資料區塊。 另外，若一個資料區塊包括複數個其他資料區塊，則可設定 該第二指標值為1，並且若一個資料區塊未包括複數個其他資料 區塊時，可以設定該第二指標值〇，或者不紀錄。在另一實施例 中，若一個資料區塊包括複數個其他資料區塊，可以設定該第 二指標值為0，並且若一個資料區塊未包括複數個其他資料區塊 時，可以設定該第二指標值為1或不紀錄。 接著，執行步驟S334，依序解碼一該複數個壓縮巨集區塊 之一該複數個資料區塊後，但尚儲存之其他資料區塊，以一跨壓 縮巨集區塊指標值記錄該其他資料區塊為跨越壓縮聚集區塊。接 著於步驟S335根據該跨壓縮巨集區塊指標值以及該第一指標值 以解碼跨越一該複數個壓縮巨集區塊之一跨壓縮巨集區塊之未 11 1305088 . 完成解碼資料區塊’並且於步驟纖輪出㈣始 已完成解碼資料區塊至該解碼結果區塊儲：:：巨集區塊之 區塊儲存區之每-個完整資料區塊包括該第解碼結果 .^塊、該第二已完成解碼資料區塊、第三"已第；·已^解碼資料 以及該跨壓縮巨集區塊之已完成解碼資料區^。 料區塊， . & 了清晰說明此依據本發明—實施例之數位 ! 之細部運作流程’以及該複數個指標值在反配置程;方法 形’請接著參閱第4圖至第6圖，如圖所示·=: =情 流程時’接收並分離一_數位影像 碼 ^ :聲音資料之後’-_影像資料儲存區4二1: 像資科之影像區段，其係包括3〇個資料區塊，亦即 = 巨集區塊⑽至45〇’其㈣縮巨集區塊4 = 區塊411至416,其中資料區塊化包括亮度資料區塊γ〇括= 區塊412包括亮度資料區塊η、亮度資料區塊γ〇，&彩声次粗 . 區塊以’，資料區塊413包括亮度資料區塊Υ2,資料區：貝4;4 &括亮度資料區塊Y3及彩度資料區塊⑶，，資料區塊415 彩度資料區塊Cr，資料區塊416包括彩度資料區塊α，並^ 2個壓縮巨集區塊420之資料區塊426包括了彩度資料區塊 響 Cb” ’此種類型即稱為跨壓縮巨集區塊，至於其他壓縮巨集^塊 之資料區塊内容，為圖式簡潔之故，於第4圖中並未標示，在此 亦不予贅述。在此實施例中，因為亮度資料區塊過大無法放置於一個 資料區塊中，因此切割為Y0與Y0，，並且將Y0,放置於另一個資料區塊 之有剩餘的位置，故，資料區塊412儲存亮度資料區塊Y1與其他資料區塊 γ〇，以及Cr’，Cb、Cb’與Cb”、Cr與Cr，之切割與配置亦同理可知， 此為DV壓縮時之配置程序，而本發明係為解瑪之反配置程序。 在此一提，資料區塊411至414之大小各為14位元組，並 立資料區塊415及416各為1〇位元組，因此每一壓縮巨集區塊 12 1305088 之大小係為76位元組。接著於步驟S33進行一反配置程序，以 依序解碼I縮巨集區塊410至450之資料區塊411至456，並且 於每一個壓縮巨集區塊之每一個資料區塊解碼過程中設定該第 一指標值’其係用以作為指示資料區塊未解碼完成之資訊，例如： YO Cr、Ct?’並輸出一第一已完成解碼資料區塊至該解碼結果區塊 儲存區470’例如：η、Υ2、γ3。在此實施例中，係採用若一個 -貝料區塊包括多個資料區塊組成成份時，設定該第一指標值為 1 \以及若一個資料區塊未包括多個資料區塊組成成份時，設定 該第一指標值為〇之設計，對於根據每一資料區塊組成成份之一 位兀數以進行判斷每一資料區塊是否解碼完全，以決定該第一指 標值是否儲存。在此一提，每一個資料區塊相對應之一邊界值可 累加資料區塊大小而獲得，例如資料區塊412的邊界值28位元 組係資料區塊411的大小14位元組加上資料區塊412的大小14 位元組而得，也因此資料區塊412在進行反配置程序的過程中， 有至少一次使付指標儲存區460相對應的指標值出現1 ,以指示 該資料區塊包括一複數個資料區塊組成成份，並且意味著資料區 塊儲存位置較為分散而不連續，需進行後續反配置程序與解碼步 _ 驟。因此，根據第3Β圖所示之實施例，經過步驟S331之解碼壓 縮巨集區塊410至450之30個資料區塊411至456，可產生複 數個第一指標值，其内容係分別對應於資料區塊411至456，並 且此30個指標值之前6個及第12個第一指標值可如指標儲存區 460所示’依序為{〇 ’丨，〇 ’丨，〇，〇，…，u，係分別對應於 資料區塊411至426，至於其他資料區塊之指標值可依此類推。 在此實把例中’該指樣儲存區460係一維陣列（array )，而在另 一實施例中’該指標儲存區460可利用一 N維陣列、佇列（queue) 及其他資料結構以實現之。另外，步驟S331尚包括輸出第一已 完成解碼資料區塊至一解碼結果區塊儲存區470，該解碼結果區 13 1305088 塊儲存區470包括30個m像素 以此時解縣果區塊儲存區470之儲t空間471至獨等，所 為{Y0 H，Y3，，Cb}(存工間仍至⑽内容分別 請再㈣第4圖至第6K，^；H中）° 標值來解碼未解碼之資料區塊，所以彻各第-指 資料區塊，進行解碼，並且輸出一第n f 一：標值為1的 :It ，因此解碼結果區塊儲存區4㈣ j =至476内容分別為{γ_，，γι，γ2，⑺。，㈣^ 於圖中）。必需根據第二指標值，以未解碼之資料區塊 j他貝料區塊連接以輸出—第三6完成科資料區塊至該解 碼結果區塊儲存區470，使得該解碼結果區塊儲存區47〇之一該 複數個完整資料區塊包括該第一已完成解碼資料區塊、該第二已 完成解碼資料區塊以及該第三已完成解碼資料區塊，而此時指標 儲存區460之前6個及第12個第二指標值依序為丨0，1，〇，〇， 〇 0 ’···’ 1} ’並且解碼結果區塊储存區470之儲存空間471至 476 内容分別為{γο+γο， ’ Yl，Y2，Y3，Cr+Cr， ，Cb+Cb，}。 然後’依序解碼一該複數個壓縮巨集區塊之一該複數個資料區 塊’以取得一跨壓縮巨集區塊指標值；接著根據該跨壓縮巨集區 塊指標值依序解碼跨越一該複數個壓縮巨集區塊之一跨壓縮巨 集區塊之未解碼資料區塊，並輸出該跨壓縮巨集區塊之已完成解 碼資料區塊至該解碼結果區塊儲存區470 ’其中該解碼結果區塊 儲存區470之一該複數個完整資料區塊包括該第一已完成解碼 資料區塊、該第二已完成解碼資料區塊、該第三已完成解碼資料 區塊以及該跨壓縮巨集區塊之已完成解碼資料區塊。因此，該指 標儲存區460之前6個及第12個跨壓縮巨集區塊指標值依序為 {0 ’ 〇 ’ 〇 ’ 0，0，0，…，1}，並且解碼結果區塊儲存區470之 儲存空間471至476内容如圖所示，分別為{Υ0+Υ0， ，Y1，y?， 1305088 Y3，Cr+Cr’ ，Cb+Cb，+Cb”}。其中該跨壓縮巨集區塊指標值 為當資料區塊41卜416之儲存位置無法儲存多餘之資。係 時’此時於壓縮時，多餘資料區塊必須儲存於壓縮巨集斤α 來㉟塊420 或430或440或450 ’於反配置程序時，根據壓縮巨集區塊41〇 420、420、440與450皆完成解碼時，但尚有未解碼資料區塊時、 根據進行壓縮巨集區塊410、420、420、440與450之解碼時’ 尚儲存其他資料區塊所記錄之跨壓縮巨集區塊指標值，二’ 行之解碼。 M元成跨 在此一提，此實施例之該資料區塊係以位元組（byte) 位，資料區塊儲存於㈣影像資料儲存區綱之資料 二 像區段之資料量，即為5個壓縮 ^ ^ '、 影 史紅塊’其中每個資料區塊共 而該複數個已解％料區塊儲存於該解碼結果區 :::子區470之資料量可以是3〇個8*8像素大小，而且每個又 79位元之離散餘弦轉換係數，因此每—影像區段之資料量為 應咨把紗― 此卜，在本實施例中，該壓縮影 U =儲存區働係位於一第—隨機存取記憶體，例如一靜態隨 — (SRAM) ’並且該解碼結果區塊儲存區470亦位於 存區470係可位於—第_隨機施例中，該解瑪結果區塊儲 .辦μ、帛機存取記憶體，例如-靜態隨機存取 區塊曰知值該第一指標值以及該跨壓縮巨集 ^ 配置與解碼階段直接覆寫指標儲存區460 配ΐ斑&°二實施例中利用另—指標儲存區儲存，以待各反 配置與解碼階段配合引用。 圖。t據本發明一實施例之數位影像解碼裝置方塊 -壓縮影像資料儲存區52〇 。栝d析器 區塊储存區_。^析器51〇 ^配置單元540以及一解碼結果 ° 系用以接收並分離一壓縮數位影像 15 1305088 資料串為一壓縮影像資料及一壓縮聲音資料。壓縮影像資料儲存 區520係用以接收與儲存該壓縮影像資料，以及依序輸出一複數 個資料區塊，其中該壓縮影像資料之來源係一可產生與儲存DV 資料串之裝置，例如一數位電視、一互動式機上盒及一數位攝訊 機等，並且該壓縮影像資料儲存區520儲存内容包括一複數個影 像區段，每個影像區段包括複數個壓縮巨集區塊，並且每個壓縮 巨集區塊包括複數個資料區塊。反配置單元540係用以解碼該複 數個資料區塊，並且依序輸出該複數個已解碼資料區塊。解碼結 果區塊儲存區560係用以储存該複數個已解碼資料區塊以及依 序輸出該複數個已解碼資料區塊。在此一提，該壓縮影像資料儲 存區520係位於一第一隨機存取記憶體530，例如一靜態隨機存 取記憶體，該解碼結果區塊儲存區560可位於一第二隨機存取記 憶體570，例如另一靜態隨機存取記憶體，而在另一實施例中， 該解碼結果區塊儲存區560亦可位於該第一隨機存取記憶體 530。另外，此反配置單元540尚可包括一可變長度解碼單元550 以及一指標儲存區580，其中可變長度解碼單元550係用以解碼 該複數個資料區塊；指標儲存區580係用以儲存一複數個指標 值，以表示每一資料區塊之解碼完成程度、起始位置或位元數等 特徵值，其係可利用一維陣列與一 N維陣列實現之，亦可利用其 他資料結構。 雖然本發明已以較佳實施例揭露如上，然其並非用以限定本 發明，任何熟習此技藝者，在不脫離本發明之精神和範圍内，當 可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請 專利範圍所界定者為準。 【圖式簡單說明】 第1圖係習知數位視訊系統架構之示意圖。 16 1305088 • 第2A圖係使用8*8離散餘弦轉換之區域號碼配置之示意圖。 第2B圖係使用2*4*8離散餘弦轉換之區域號碼配置之 第3A圖係依據本發明一實施例之數位影像解碼方法流程圖。 第3B圖係依據本發明一實施例之反配置程序流程圖。回 第4圖係依據本發明一實施例之一壓縮影像資料儲存區 ' 圖。 不意 第5圖係依據本發明一實施例之一解碼、结果區塊儲存區之示意圖。 第6圖係依據本發明之一實施例之一指標儲存區之示意圖。 φ 第7圖係依據本發明一實施例之數位影像解碼裝置方塊圖。 【主要元件符號說明】 10 :數位視訊系統 110 : DIF剖析器 120 :視訊解碼器 130 :音訊解碼器 140 :處理器 150、550 :可變長度解碼單元BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital image decoding apparatus and method thereof, and more particularly to a digital image decoding apparatus using a reverse configuration program and a method thereof. [Prior Art] With the increasing market demand for multimedia quality and functionality of entertainment and consumer electronics products, multimedia technology has been chosen to move faster and more efficiently. Because multimedia applications deal with audio and video signals in real time, they need to cooperate with related software and hardware resources. Manufacturers continue to try to develop low-cost, market-oriented and high-quality products in order to cater to the rapid changes of multimedia technology and the diversification of consumer preferences. Multimedia products have become a flexible R&D strategy for manufacturers to meet standards and consumer preferences. Since multimedia signals include a large amount of data, they usually have higher data storage resource requirements. Therefore, there are various methods for 'compression and encoding processing' for multimedia video before transmission and storage, such as a DV (digital video) format, which has been completely described. It is defined in standard specifications such as IEC 61834, DV-SD/Blue φ and SMPTE 314M. The device using such a DV format is mathematically used to distinguish pixels into blocks, for example, using a discrete cosine transformation (DCT) technique to obtain discrete cosine blocks (DCT blocks). And the discrete cosine transform coefficient (DCT coefficient) is used to represent the compressed form of the image, and the quantization technique is used to divide each discrete cosine transform coefficient by a non-zero positive integer to reduce the visual distortion when reconstructing the image. degree. On the other hand, in the decoding process, the decoder reverses the aforementioned encoding procedure to reconstruct the approximate result of the discrete cosine transform coefficients. In addition, the aforementioned DV format data string includes a plurality of frames, and each of the 1,350,088 frames includes 30 video segments, and each of the image segments includes five compressed macro blocks (compressed). Macroblock), each macroblock includes a quantization number (QN0), four 14-bit tuple-sized luminance (Y) data blocks, and two 10-bit size chromas (chrominance; Cr, Cb) data block. Each of the foregoing blocks includes a set of fixed length information, such as a DC coefficient and a discrete cosine transform coefficient of 8 woods and 8 pixels, which is subjected to discrete cosine transform by the AC coefficient of the digital image. Got it. For each data block, the number of bits required to store the discrete cosine transform coefficients will vary depending on the different quantization coding modes, and therefore will also result in the presence or absence of unused bits, ie if required When the number of elements exceeds the block size of the fixed configuration, additional space to another block is required, and if the required number of bits does not exceed the block size of the fixed configuration, the block will generate unused space. . Please refer to FIG. 1 , which is a schematic diagram of the architecture of the digital video system 10 . The digital video system 10 receives a DV format data string, such as a digital television (DTV), an interactive set-top box, a digital camera (DV camera), and the like. The DV format data string generated by the device of the DV format data string, and the DV format data string can be divided into a digital interface/interchange format sequence (DIF sequence), hereinafter referred to as a DIF sequence. Wherein, the DIF sequences are composed of a plurality of fixed length Dip blocks, and each DIF block includes at least one identication header to indicate the type of the DIF block and its position in the Dip sequence. . Then, the DV format data string is received by the digital video system 1A, which includes a DIF parser 110 to separate the data of the DIF formatted data sequence and generate an image data string and a sound data string; a video decoder 120 is configured to decode the image data string of the result data string; an audio decimator 1305088 130 to decode the sound data string 'and then the output of the video decoder 120 and the audio decoder 130 can be separately sent to one The display and an audio output (not shown) are available for playback. The video decoder 120 may further include a processor 140 for performing pre-preparation, inverse quantization, and inverse DCT procedures, and a variable length decoding unit 150 (variable). Length decoding unit; VLD unit) to perform the decoding process. As described above, each image frame containing a large number of pixels is cut into a plurality of data blocks, and the macro blocks are gathered from these data blocks. In DV encoding, each block uses one of 8*8 discrete cosine transform or 2*4*8 discrete cosine transform to generate discrete cosine transform coefficients for each block. After the weighting procedure, each has The blocks formed by the weighted discrete cosine transform can be subdivided into four classes, so each block having the discrete cosine transform coefficient is assigned a class number and each discrete cosine transform coefficient region The coefficient of the block is also assigned an area number. The above results can be as shown in Figures 2A and 2B, wherein Figure 2A is a schematic diagram of the area number configuration using 8*8 discrete cosine transform, and Figure 2B is an area number configuration using 2*4*8 discrete cosine transform. schematic diagram. In other words, the discrete cosine transform coefficient is used to determine the data storage and transfer amount of compression. In the quantization stage, the partition selection of discrete cosine transform coefficients depends on the category number, area code number, and quantization number, and in the DV format, the quantization number is limited. Each image segment is 5 compressed macroblocks. On the other hand, in the DV decoding process, all the block information is passed to the variable length decoding unit, so in the variable length decoding unit, each data block is decoded to obtain discrete cosine transform coefficients, and then discrete The cosine transform coefficients can be passed to the inverse quantized and inverse discrete cosine transform units, etc., and then output to the frame buffer for subsequent playback and display. Since the DV is transmitted to the Μ decoder for decoding at a fixed rate, the decoding of blocks having different data sizes is often limited in unit time. So far, 1305088 proposes a method and device for the inverse configuration of the digital image applied to the decoding end, which is one of the research and development topics that are urgently needed to be processed, and is also eagerly expected by the user and the inventor of the present invention. SUMMARY OF THE INVENTION The present inventors are based on years of research and related product development and related product development and maintenance of digital image processing technology, and are concerned with the defects of the prior art and its improved ideas, with its professional knowledge, multi-party research design and special topics. In view of this, a digital image decoding device and a method thereof are researched to solve the above problems. < The present invention provides a digital image decoding method for decoding a digital image, comprising the following steps: First, performing an inverse configuration process to sequentially decode a plurality of data blocks and sequentially output each completed image. Decoding the data block to a decoding result block storage area, wherein the digital image is a compressed image data, the compressed image data comprising a plurality of image segments, each of the image segments comprising a plurality of compressed macroblocks, and Each of the compressed macroblocks includes the plurality of data blocks. Then, each complete data block stored in the decoding result block storage area is sequentially outputted to an inverse quantization unit and an inverse discrete cosine conversion unit. In this case, each of the plurality of complete data blocks is composed of a plurality of the plurality of decoded data blocks. In addition, the digital image decoding method further includes receiving and separating a compressed digital image data string into the compressed image data and a compressed sound data, and storing the compressed image data into a compressed image data storage area, and sequentially accessing the compression. A plurality of data blocks of the image data storage area, and the reverse configuration process is performed. The present invention further provides a digital video decoding apparatus for decoding a digital image, comprising: a reverse configuration unit comprising a variable length decoding unit and an index storage area. The anti-configuration unit is configured to sequentially decode each data block, and sequentially output the decoded data block, wherein the digital image is a compressed image data, and the compressed image data includes a plurality of image segments, each image The segment includes 8 1305088 a plurality of compressed macro regions, and each block, and the reverse configuration unit further includes a plurality of stored blocks, a plurality of stored solutions, and a block storage area. =7 The solution_block library 3=complex; one completed solution==: such as a static random access memory (two-first-random access, first-random access memory; the variable length Among them, 'the number of data blocks can also be digitized. · The indicator is stored:::: is used to solve the data block. _Finishing degree = multiple indicators are finely represented ^ Position shadow _ can still include, (4) The storage of the reduced image data storage area and the sectioning; wherein _image data storage: area and sequence, the parser is used to receive and eight miscellaneous) r random storage two charge == enough to finish "finish: two When the ground is transferred to the next-stage processing device for subsequent sequence, the residual is reversed: For example, it is possible to complete the decoding/decimation, and because the output of a playback program is output to a display device for playback and viewing, the invention can provide support and signal transmission through the hardware architecture.捽U software to decode (4) 'The digital image decoding device of the present invention and the driver I speed up the decoding process and improve its execution efficiency and efficiency, so that the audio-visual entertainment needs and rights can be more satisfied and guaranteed. In order to give the reviewers a better understanding of the technical features of the present invention and the efficacies achieved, the preferred embodiments and related drawings are provided for assistance, and the detailed descriptions are followed by a description. [Embodiment] Please refer to FIG. 3A, which is a flowchart of a digital image decoding method according to an embodiment of the present invention. In this embodiment, a digital image decoding method according to an embodiment of the present invention is available in step S31. Receiving and separating a compressed digital image data string into a compressed image data and a compressed sound data, and storing the compressed image in step S32 The image data is stored in a compressed image data storage area, and then the plurality of data blocks of the compressed image data storage area are sequentially accessed in step S33, and an inverse configuration process is performed to sequentially decode the plurality of data blocks, and And outputting a plurality of decoded data blocks to the decoding result area_storage area, wherein the digital image system-compressed image data includes a plurality of image segments, each image segment including a plurality of image stations a block, and each of the indented (four) blocks includes a plurality of data blocks. Then, in step S34, each of the complete data blocks of the decoding result block storage area is sequentially outputted to an inverse quantization unit and an "inverse discrete cosine transform" The compressed image data storage area and the decoded result block storage area may be located in the same first random access memory, or the decoded result block storage area may be located in a second random access record (4). In the middle, it depends on the implementation performance of the digital image decoding method and the memory, the (four), the transmission (four) line Wei support level and cost considerations Its configuration and planning. Bed = and see Figure 3B, which is an inverse configuration procedure ::: diagram in accordance with an embodiment of the present invention. The reverse configuration procedure of step S33 of FIG. 3A can be further performed by: firstly, in step S331, sequentially decoding one of the plurality of compressed macroblocks in the plurality of compressed macroblocks to record-[ The value is recorded in the undecoded data area. Τ ^曰曰心心 "Beet pin & block second" in step S332 according to the first - W value to decode the unsolved data block, and output - second completed decoding 1305088 data block to the decoding result area Block storage area, and generating a second indicator value, wherein the second index value is a data block to complete decoding, but another data block is further stored to find the other data block according to the second indicator value, The undecoded data block can be connected to the other data block to output a third completed decoded data block to the decoded result block storage area to become a complete data block, in step S333. Decoding a plurality of data blocks of one of the plurality of compressed macroblocks, wherein storing the first indicator value and the second indicator value during decoding each of the data blocks of each compressed macroblock For example, if a data block contains information indicating that the data block includes a plurality of data block components, the first index value can be used to record which data block cannot be completely solved when decompressing. Determining whether to completely decode to determine whether to record the first indicator value according to one of the components of the data block of each data block, and then, according to each data block component of each data block A starting position and a corresponding boundary value of each data block are recorded by the second index value, thereby indicating that the location of the data block still stores a plurality of the other data blocks, and the other data blocks belong to The fully decoded data block. In addition, if a data block includes a plurality of other data blocks, the second indicator value may be set to 1, and if a data block does not include a plurality of other data blocks, Setting the second indicator value 〇, or not recording. In another embodiment, if a data block includes a plurality of other data blocks, the second indicator value may be set to 0, and if a data block is not included When the plurality of other data blocks are plural, the second indicator value may be set to 1 or not. Then, step S334 is executed to sequentially decode the plurality of compressed macro areas. After the plurality of data blocks, but other data blocks still stored, the other data blocks are recorded as a cross-compressed aggregate block by a cross-compressed macro block index value, and then the cross-compression is performed according to step S335. The macroblock indicator value and the first indicator value are decoded to span one of the plurality of compressed macroblocks across the compressed macroblock block 11 1305088. Completing the decoded data block 'and in the step fiber round (4) The decoding data block is completed to the decoding result block::: Each complete data block of the block storage area of the macro block includes the decoding result. The block, the second completed decoding data Block, third "has been;··························································································· The detailed operation process 'and the multiple index values are in the reverse configuration process; the method shape' Please refer to Figure 4 to Figure 6, as shown in the figure. ==: = When the process is 'receive and separate a _ digital image Code ^ : After sound data '-_image data Storage Area 4:1: Image section of Zike, which consists of 3 data blocks, ie = macro block (10) to 45〇' (4) miniature block 4 = block 411 to 416 Where the data tiling includes the luminance data block γ = = block 412 includes the luminance data block η, the luminance data block γ 〇, & the color sound is coarse; the block is ', the data block 413 includes the brightness Data block Υ 2, data area: Bay 4; 4 & brightness data block Y3 and chroma data block (3), data block 415 chroma data block Cr, data block 416 including chroma data block The data block 426 of the 2, and 2 compressed macroblocks 420 includes the chroma data block block Cb" 'this type is called the cross-compressed macro block, and the data of other compressed macro blocks The contents of the block are for the sake of simplicity and are not indicated in Figure 4 and will not be repeated here. In this embodiment, since the luminance data block is too large to be placed in one data block, it is cut into Y0 and Y0, and Y0 is placed in the remaining position of another data block, so the data area Block 412 stores the luminance data block Y1 and other data blocks γ〇, and Cr', Cb, Cb' and Cb", Cr and Cr, and the cutting and configuration are also known. This is a configuration procedure for DV compression. The present invention is an inverse configuration procedure of the solution. Here, the size of the data blocks 411 to 414 are each a 14-bit tuple, and the data blocks 415 and 416 are each a 1-bit byte, so each The size of the compressed macro block 12 1305088 is 76 bytes. Then, a reverse configuration procedure is performed in step S33 to sequentially decode the data blocks 411 to 456 of the I macroblocks 410 to 450, and each The first indicator value is set in each data block decoding process of a compressed macroblock, which is used as information indicating that the data block is not decoded, for example: YO Cr, Ct?' and outputs a first The decoded data block has been completed to the decoding result block storage area 470 For example, η, Υ2, γ3. In this embodiment, if the one-before block includes a plurality of data block components, the first index value is set to 1 \ and if a data block is not included When a plurality of data blocks are composed of components, the first index value is set to be a design of 〇, and it is determined whether each data block is completely decoded according to one of the components of each data block component to determine the first Whether an index value is stored or not. Here, one of the data block corresponding to one of the boundary values may be obtained by accumulating the data block size, for example, the boundary value of the data block 412 is 28 bytes of the data block 411. The 14-bit tuple is added to the size 14-bit tuple of the data block 412. Therefore, in the process of performing the anti-configuration procedure, the data block 412 has at least one time corresponding to the index value corresponding to the indicator storage area 460. In order to indicate that the data block includes a plurality of data block components, and means that the data block storage location is relatively dispersed and discontinuous, and a subsequent anti-configuration procedure and decoding step are required. Therefore, according to the third parameter In the illustrated embodiment, after decoding the 30 data blocks 411 to 456 of the compressed macroblocks 410 to 450 through the decoding of step S331, a plurality of first index values may be generated, the contents of which correspond to the data blocks 411 to 456, respectively. And the 6 and 12th first indicator values of the 30 indicator values may be as shown in the indicator storage area 460. The order is {〇'丨, 〇'丨, 〇, 〇, ..., u, respectively. In the data blocks 411 to 426, the index values of other data blocks can be deduced by analogy. In this example, the reference storage area 460 is a one-dimensional array, and in another embodiment The indicator storage area 460 can be implemented using an N-dimensional array, queue, and other data structures. In addition, step S331 further includes outputting the first completed decoded data block to a decoding result block storage area 470, and the decoding result area 13 1305088 block storage area 470 includes 30 m pixels to solve the county fruit block storage area at this time. 470 storage t space 471 to exclusive, which is {Y0 H, Y3,, Cb} (the work room is still up to (10) content please (4) 4th to 6K, ^; H)) ° value to decode The decoded data block, so the data block is decoded, and an nf is output: the value is 1: It is, so the decoding result block storage area 4 (4) j = to 476 contents are respectively { Γ_, γι, γ2, (7). , (four) ^ in the picture). According to the second indicator value, the undecoded data block j is connected to the block to output - the third 6th completion block to the decoding result block storage area 470, so that the decoding result block storage area One of the plurality of complete data blocks includes the first completed decoded data block, the second completed decoded data block, and the third completed decoded data block, and before the indicator storage area 460 The 6th and 12th second index values are sequentially 丨0,1,〇,〇, 〇0 '···' 1} ' and the storage space 471 to 476 of the decoding result block storage area 470 are respectively { Γο+γο, ' Yl, Y2, Y3, Cr+Cr, , Cb+Cb,}. Then 'sequentially decoding one of the plurality of compressed macroblocks to the plurality of data blocks' to obtain a cross-compressed macroblock index value; and then sequentially decoding the span according to the cross-compressed macroblock index value One of the plurality of compressed macroblocks spans the undecoded data block of the compressed macroblock, and outputs the decoded data block of the compressed macroblock to the decoded result block storage area 470' The plurality of complete data blocks of the decoding result block storage area 470 includes the first completed decoded data block, the second completed decoded data block, the third completed decoded data block, and the The decoded data block has been completed across the compressed macroblock. Therefore, the index values of the 6 and 12th cross-compressed macroblocks in the indicator storage area 460 are sequentially {0 ' 〇' 〇 ' 0, 0, 0, ..., 1}, and the decoding result block storage area is decoded. The contents of storage space 471 to 476 of 470 are as shown in the figure, respectively: {Υ0+Υ0, , Y1, y?, 1305088 Y3, Cr+Cr', Cb+Cb, +Cb"}. The cross-compressed macro area The block index value cannot be stored in the storage location of the data block 41 416. When the time is compressed, the redundant data block must be stored in the compressed macro set to 35 blocks 420 or 430 or 440 or When the 450' is in the reverse configuration procedure, the decoding is performed according to the compressed macroblocks 41〇420, 420, 440, and 450, but when there are undecoded data blocks, the compressed macroblocks 410, 420, and 420 are performed according to the compression macroblocks 410, 420, and 420. When decoding 440 and 450, the value of the cross-compressed macroblock index recorded in other data blocks is stored, and the decoding of the two's is performed. The M-component is mentioned here, and the data block of this embodiment is In the byte group, the data block is stored in the data volume of the data image storage area, and the data volume is 5 compression ^ ^ ', shadow history red block 'where each data block is common and the plurality of solved % material blocks are stored in the decoding result area::: The data amount of the sub-area 470 can be 3〇8* 8 pixels in size, and each of the 79-bit discrete cosine transform coefficients, so the amount of data per image segment is the recommended yarn - this, in this embodiment, the compression shadow U = storage area Located in a first random access memory, such as a static random (SRAM) ' and the decoded result block storage area 470 is also located in the storage area 470 can be located in the -_ random instance, the solution result block Store the μ, the machine access memory, for example, the static random access block knows the value of the first indicator and the cross-compressed macro ^ configuration and decoding stage directly overwrites the indicator storage area 460 with the spot & In the second embodiment, the other-indicator storage area is stored for reference to each of the anti-configuration and decoding stages. The digital image decoding apparatus block-compressed image data storage area 52〇 according to an embodiment of the present invention. d arranging block storage area _ _ _ _ _ configuration unit 540 A decoding result is used to receive and separate a compressed digital image 15 1305088 data string as a compressed image data and a compressed sound data. The compressed image data storage area 520 is used for receiving and storing the compressed image data, and sequentially outputting a plurality of data blocks, wherein the source of the compressed image data is a device capable of generating and storing DV data strings, such as a digital television, an interactive set-top box, and a digital camera, and the compressed image data The storage area 520 stores content including a plurality of image segments, each image segment includes a plurality of compressed macroblocks, and each compressed macroblock includes a plurality of data blocks. The anti-configuration unit 540 is configured to decode the plurality of data blocks and sequentially output the plurality of decoded data blocks. The decoding result block storage area 560 is configured to store the plurality of decoded data blocks and sequentially output the plurality of decoded data blocks. The compressed image data storage area 520 is located in a first random access memory 530, such as a static random access memory. The decoded result block storage area 560 can be located in a second random access memory. The body 570 is, for example, another static random access memory, and in another embodiment, the decoding result block storage area 560 can also be located in the first random access memory 530. In addition, the inverse configuration unit 540 may further include a variable length decoding unit 550 and an indicator storage area 580, wherein the variable length decoding unit 550 is configured to decode the plurality of data blocks; the indicator storage area 580 is used for storing a plurality of index values to indicate the degree of decoding completion, starting position or number of bits of each data block, which may be implemented by using a one-dimensional array and an N-dimensional array, and may also utilize other data structures. . While the present invention has been described above by way of a preferred embodiment, it is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. [Simple description of the diagram] Fig. 1 is a schematic diagram of a conventional digital video system architecture. 16 1305088 • Figure 2A is a schematic diagram of an area number configuration using an 8*8 discrete cosine transform. Fig. 2B is a configuration of a region number using a 2*4*8 discrete cosine transform. Fig. 3A is a flow chart of a digital image decoding method according to an embodiment of the present invention. Figure 3B is a flow diagram of an inverse configuration procedure in accordance with an embodiment of the present invention. Figure 4 is a diagram of a compressed image data storage area in accordance with one embodiment of the present invention. 5 is a schematic diagram of decoding and resulting block storage area according to one embodiment of the present invention. Figure 6 is a schematic illustration of an indicator storage area in accordance with one embodiment of the present invention. Fig. 7 is a block diagram of a digital image decoding apparatus according to an embodiment of the present invention. [Major component symbol description] 10: Digital video system 110: DIF parser 120: Video decoder 130: Audio decoder 140: Processor 150, 550: Variable length decoding unit
400、520 :壓縮影像資料儲存區 壓縮巨集區塊 410 、 420 、 430 、 440 、 450 : 411〜416、426 :資料區塊 Y0〜Y3、Y0’ ：亮度資料區塊400, 520: compressed image data storage area compressed macro block 410, 420, 430, 440, 450: 411~416, 426: data block Y0~Y3, Y0': brightness data block
Cr、Cr’ ：彩度資料區塊 Cb、Cb 、Cb” ：彩度資料區塊 460、580 :指標儲存區 470、560 :解碼結果區塊儲存區 50 :數位影像解碼裝置 510 :剖析器 17 1305088 530 :第一隨機存取記憶體 540 :反配置單元 570 :第二隨機存取記憶體Cr, Cr': chroma data block Cb, Cb, Cb": chroma data block 460, 580: indicator storage area 470, 560: decoding result block storage area 50: digital image decoding device 510: parser 17 1305088 530: first random access memory 540: inverse configuration unit 570: second random access memory