TWI301705B - Sigma-delta modulator, d/a conversion system and dynamic element matching method - Google Patents

Description

1301705 - IX. Description of the invention: 1. Field of the Invention The present invention relates to a data conversion system; and more particularly to an integral triangular modulator, a data conversion system and a method thereof using dynamic component matching logic. [Prior Art] Data conversion technology has existed for many years and is extremely versatile. In general-purpose homes, converters can be found in applications such as communication systems, consumer and professional audio systems, and precision measurement devices, such as a digital/analog ratio (D/A) converter or analog/digital (A/D). converter. The Sigma-delta modulator (SDM) is an oversampling analog/digital converter with a high dynamic range and high resolution. The integral delta modulator has been successfully used in communications and other data processing areas. 1-bit integral three Φ An angle modulator has been widely used in the past due to its linearity. However, in order to achieve higher resolution and wider bandwidth without increasing the oversampling rate, a multi-bit integral delta modulator that reduces the amount of noise power is used. However, in a multi-bit integral triangular modulator, there is a mismatching of the digital/analog elements in the multi-bit digital/analog converter, which affects linearity. The first diagram shows a conventional N-bit integral triangular modulator 1〇, where N is an integer greater than one. 0697-A40463TWF 6 曰Replacement Replacement Page 1301705 • The N-bit integration delta modulator 10 includes an adder 12, a loop filter 14, a N-bit quantizer 16 and an N-bit. A meta-bit/analog converter 18. The adder 12 receives an analog input signal Vin and subtracts a class 1 ratio feedback signal VFB transmitted from the N bit digital/analog converter 18. The loop filter 14 is coupled to the adder 12 and receives the output of the adder 12. The loop filter 14 includes a plurality of series of analog integrators for generating a filter analog output to the N bit quantity converter 16. The N-bit quantizer 16 then quantizes the analog output of the loop filter 14 to produce a digital code to N-bit digital/analog converter 18. The N-bit digit/analog converter 18 includes a complex digital/analog ratio (D/A) element for converting the digital code into an analog feedback signal Vfb and inputting it to the adder 12. Digital/analog ratio (D/A) components in N-bit digital/analog converters 18, such as capacitors, resistors, or current sources, may be subject to manufacturing variations, use of plague materials, temperature variations, humidity, and degradation (degradation) ) ® causes a matching problem. The matching error between the components affects the linearity of the feedback path, and the distortion occurs in the output and the noise element dynamic material matching (DM) can be solved. The linearity problem of multi-bit digital/analog converters. Figure lb shows a conventional N-bit integral delta modulator 20 using a dynamic component matching averaging method. The lb diagram is very similar to the first diagram, except that in the lb 0697-A40463TWF 7 1301705, the replacement page includes dynamic component matching and n-bit digit/analog transfer coupled between the N-bit converters 18. The downtime selects the iY bit read/class &"d element matching logic 22 pieces to take one of the digital/analog element averaging methods in the nonlinear error distribution converter 丨8 as the extra-component 'dynamic component matching, d-weighting Ping, average, DWA). Figure 2 shows the == (N-bit digit/analog converter of the data weighted component uses a dynamic component with a weighted averaging method of 8 digits/analog data. The 9 β, medium, and γ-axis systems represent the principle of the round-robin of each time slot. The squares and numbers represent the selected _ horse, and the gray-weighted average method of the X-axis is based on the number of digits input and the order of selection. The data is selected as a digit/analog component. For example, in the predetermined order, one is 5, then the data weighted average method will be based on the financial position = code for a time slot, and the digit input for C1 to C5. Finally, the component G5'(4) material weighted average method will be C7. The order of the digit/analog component is selected as C6, and then the ta shell order is selected as shown in the previous figure. The data weighted average method _ average per-digit/analog component is selected. The probability of shifting the matching error of the digital/analog conversion II to the higher frequency band, and it is easier to implement, and has a first order noise shaping effect. However, due to the data weighted average method and lose Digital code size amplitude 0697-A40463TWF 8 1301705 Positive replacement page j • Correlation, therefore, when the input digit code is small, in-band will produce a large number of tones, thus seriously affecting the integral integration triangle The signal to noise distortion ratio of the modulator (signa to-noise plus distortion ratio) and the spur free dynamic range (SFDR). The 3a and 3b diagrams have the 3-bit digit in the first figure. Third-order integral delta modulator of analog/analog converter, when using data weighted averaging

The output spectrum has input signals of -2 (dB) and -45 (dB). Comparing Figures 3a and 3b, we can see that a large number of glitch are generated in Figure 3b because the input triangle is very small when the input signal is small. The integral triangle modulator generates periodic feedback signals, where the digital/analog components match. The error is also periodically periodicized, and this periodic error and the input signal produce a frequency shift (a 1 iasing), thus generating a glitch in the frequency domain. Therefore, there is a need for a data weighted average method that can reduce the glitch in the frequency domain when the input signal is small. SUMMARY OF THE INVENTION The present invention discloses an integrated delta modulator (Sigma_delta modulator), including an adder that receives an analog wheel signal and a feedback signal 'for rounding between the analog signal and the feedback signal. The difference 'generating-error signal'; the loop data device (L〇〇p

Filtering, coupled to the adder, and receiving the error 汛唬, no 汛唬 to generate a filtered signal; a quantizer (Quantizer) coupled to the 肷, 会, 略 filter to The filtered signal is converted into a quantized round-out signal; - the sigh/analog conversion 0697-A40463TWF 9 13 coffee L 嶋 __ one state, and the addition, filial piety, including a plurality of digits / analog components for the ' An equal-bit/analog component that generates the feedback signal corresponding to the quantized output signal to a far-reaching French, and a dynamic element matching l〇gic coupled to the quantizer and the digital/analog conversion Between the devices, and receiving the quantized output signal for selecting the digit/analog components of the digital/analog converter, wherein the dynamic component matching logic divides the digital/analog components into a plurality of groups, and The number of ® of the groups is contiguous with the number of the digits/analog components, and the groups are selected based on the quantized output signals and the previously selected groups and the digits/analog components These digits/analog components. The present invention further discloses a digital/analog conversion system including a digital/analog conversion, including a complex digital/analog component for generating an analog output signal equivalent to a digital input signal; and a dynamic element matching logic (dynamic element) Matching logic, coupled to the digital/analog conversion, and receiving the digital input signal for selecting the digital/analog components of the digital/analog converter, wherein the dynamic component matching logic is the digital/analog component Divided into a plurality of groups, and the number of the groups is relatively prime with the number of the digits/analog components, and is selected according to the digit input signal and the previously selected group and the digit/analog components The groups and the digit/analog components. The invention further discloses a method for selecting a digit/class according to a digital wheel code. 0697-A40463TWF 10 1301705

Τι

- a method of comparing components, comprising dividing a plurality of digits/analog components into a plurality of groups, - wherein the number of the groups is equal to the number of the digits/analog components; inputting the code according to the digits and selecting the previous one The groups and the digit/analog components select the groups and the digit/analog components. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above objects, features and advantages of the present invention more comprehensible, a preferred embodiment of the invention will be described in detail with reference to the accompanying drawings. Fig. 4 is a view showing a multi-bit integral triangular modulator 40 according to an embodiment of the present invention. The integrating delta modulator 40 includes an adder 12, a loop filter 14, a Quantizer 16, an N-bit digit/analog converter 18, and an advanced dynamic component matching logic. 42. Figure 4 is similar to the first and third and lb diagrams except that the dynamic component matching logic 42 is coupled between the N-bit quantizer 16 and the N-bit digit/analog converter 18. Elements labeled with the same numerals in Figures 4 and 1 have the same function and will not be described here. The operation of the advanced dynamic component matching logic 42 is explained below. It is assumed that the N-bit digit/analog converter 18 includes eight digit/analog components C1 to C8. The advanced dynamic component matching logic 42 divides the digital/analog components into groups, and the number of groups is mutually prime with the number of digital/analog components. For example, when there are 8 digits in the N-bit digit/analog converter 18 / 0697-A40463TWF 11th day correction replaces the yellow 1301705 analog component, then the first qi Μ - 勒 70 70 matching logic 42 can be Cl ~ C8 Divided into 3, 5 or 7 groups. The RR^^ meter diagram is based on a digital/analog converter with eight digit/analog elements. The advanced dynamic component of the embodiment of the present invention For example, the advanced dynamic component matching logic 42 divides the digital/analog components into three groups. In Fig. 5, the x-axis indicates the wheel-in digit of the parent-time slot Βί ^ 1 玛' and the gray squares and numbers on the X-axis indicate the selected components and the order in which the selection is long. The advanced dynamic component matching logic 42 divides C1~(:8 into three groups of h-knife, wherein ci~C3 are the first group, C4~C5 are the second group, rR r. Dan, C6~C8 Then, it is the third group. When the digitizer code is received from the N-bitizer (Quantizer) l6, the advanced dynamic component matching logic 42 will select the group according to the digit and the previously selected group and the digit/analog component. Select the group and its digits and ratio components, and the total number of digits/analog components selected is equivalent to the digit input code. For example, when the time slot is tl, the digits are rounded to 5, and the advanced dynamic components are ^ Series 42 will follow the order of the arrows, according to: the C1 is selected for the first group, the C4' third group view is selected for the group, the C2 is selected for the first, the C5 is selected for the second group, and the C5 is selected for the second group. The digital input code is 2, and the advanced dynamic component matching logic 42 will extract the components from the next group (ie, the third group) of the first *most (four) group _ 卩 second group). And it will start from the last selected digit/analog component (that is, the second digit/analog component (ie C7) of the second group). So the dynamic component is 0697-A40463TWF 12

λ positive replacement page 1301705 • The matching logic 42 first selects the C7 of the third group, followed by the digit/analog component of the last last selected digit/analog component in the next group, ie the C3 of the first group . The dynamic component matching logic of the present invention can effectively remove the glitch in the frequency domain, thereby improving the performance of the integral triangular modulator in the frequency domain. Figure 2 is a diagram showing the output spectrum of the integrating delta modulator according to an embodiment of the present invention, and the input signal is -45 (dB), wherein there is 0.1% to 0. 2% ® The matching error, and the advanced dynamic component matching logic 42 divides the digital/analog components into three groups. Comparing Figures 3b and 6, it can be seen that the glitch in the frequency domain has been removed, thus improving the performance of the integral delta modulator in the frequency domain. Fig. 7 shows the signal noise distortion ratio (SNDR) using the conventional data weighted average method (DWA) (o) and the dynamic element matching logic (X) of the present invention. It can be found that the integral delta modulator using the advanced dynamic component matching logic of the present invention has better signal noise distortion than linearity compared to the integral delta modulator using the conventional data weighted average method. Figure 8 is a diagram showing a method 80 for selecting a digital/analog component based on a digital input code in accordance with an embodiment of the present invention. First, the complex digital/analog components are divided into complex groups, wherein the number of groups is relatively prime to the number of digital/analog components (step 82). Then, based on the digit input code and the previously selected group and digital/analog components, the group and the digit/analog component are selected (step 84), wherein the selected group and the digit/analog components are in accordance with 0697-A40463TWF.

1JU1/UJ is scheduled to be carried out. At _ - number 84. In addition, in step 84, the first take ^ ' will repeat the group of the step group, and the last batch of the last selection = the last time before the last selection of the number of elements (four) of the number of components = group, In the next group, select the digital ship component of the next group followed by the digital/analog component. After the core is selected, the number of analog components is equivalent to the digital wheel human code. ~, select the number of digits / the hairpin 实施 good implementation _ dew as above, (four) lin to limit r rt this artist 'without the spirit and scope of the invention' * can make some changes and refinements, Therefore, the scope of the invention is defined by the scope of the appended claims. [Simple description of the figure] The first picture is a block diagram of a conventional N-bit integral triangular modulator. Figure lb shows a block diagram of a conventional N-bit integral delta modulator using DEM techniques. The 苐2 diagram is a schematic diagram of a conventional DWA technique used in an N-bit analog/digital converter with 8 components. Figures 3a and 3b show the 3-bit analog/digital converter with 8 components in Figure 2, which is converted by the third-order 64-times oversampling rate. 1§ 'In the input signal is -2 (dB) And -45 (dB), the output spectrum of the component is selected by the traditional DWA technique. 0697-A40463TWF 14 13〇17〇5 ---||a i_ % FIG. 4 is an angle modulator according to an embodiment of the invention. N-bit shouting three crying Figure 5 is a schematic diagram of the advanced dynamic component matching logic of the present invention in an N-bit analog-to-performance converter having eight components. ^ Fig. 6 is a diagram showing the output spectrum of an embodiment of the present invention in the fourth embodiment of the present invention when the round-in signal is -45 (dB). ϋ Figure 7 shows the use of the traditional data weighted average method (DWA) (〇) 乂 and the dynamic component matching logic (X) of the present invention, the integral triangular modulator | 'the round-in amplitude versus signal noise distortion ratio Schematic diagram of (SNDR). Figure 8 is a diagram showing a method of selecting a digital/analog component based on a digital wheel-in code according to an embodiment of the invention. [Description of main component symbols] 1G '20, 40~ Integral triangular modulator B 12~Volume 14 to loop filter 16 to N bit quantizer 18 to N bit digit/analog converter 22 to dynamic component matching Logic 42 ~ advanced dynamic component matching logic C1 ~ C8 ~ digital / analog components

0697-A40463TWF 15

Claims (1)

1301705 ~~ί I Amendment Replacement Page 10, Patent Range: - I A Sigma-delta modulator, including: an adder that receives an analog input signal and a feedback (feedback) • The apostrophe ' is used to generate an error signal according to the difference between the analog input signal and the feedback signal; a loop filter is coupled to the adder, and the error signal is received to generate a a quantizer (coupler) coupled to the loop filter for converting the filtered signal into a quantized output signal; a digital/analog converter coupled to the adder, comprising a plurality of digital/analog components And the dynamic element matching logic is coupled to the quantizer and the digital/analog converter. And receiving the quantized output signal for selecting the digit/analog components of the digit/analog converter, wherein the dynamic component matching logic The digital/analog components are divided into a plurality of groups, and the number of the groups is relatively prime to the number of the digital/analog components, and the quantized output signals and the previously selected groups and the digits are selected according to the quantized output signals / analog component to select the groups and the digit/analog components. 2. In the case of the integral triangular modulator described in claim 1, the dynamic component matching logic of the 0697-A40463TWF 16 is replaced by the digital and analog components. ~Order 'Select these groups 3 ·If the dynamic component matches the logic first in the second paragraph of the Shenqing patent range, the integral two-angle modulator of the jin, the gong, the 琏 琏 嫱乂 , ,, and select The last selection of the previous selection, the selection of the group after the selection, the last selected digits / analog components of the digit = the = in the group before the group, select the next group in the green two test The f and the singularity of the sequel are the last digits/analog components of the component. Bit/Analog 4. The integral delta modulator of claim 3, wherein the number of selected digital/analog components is equivalent to the quantized round signal ^'. 5. The integral delta modulator of claim 2, wherein the number of selected digital/analog components corresponds to the quantized round-trip signal. 6. The integral delta modulator of claim 1, wherein the quantizer is a multi/blt summerizer. 7. The integral delta modulator of claim 1, wherein the digital/analog converter is a multi-bit digital/analog converter. 8. The integral delta modulator of claim 1, wherein the digital/analog component is a capacitor, a power source, or a current source. 9. A digital/analog conversion tether' includes: a digital/analog converter, a digital video/analog component, used for 0697-A40463TWF 17 J301705 m:^rrir~~Ί JI 曰月曰修ji replacement page U_... _ _ .. one by one; generating an analog output signal equivalent to one digit input signal; and dynamic element matching (coupled to a digital/analog converter and receiving the digital input signal) The digit/analog component for selecting the digit/analog converter, wherein the dynamic component matching logic divides the digit/analog component into a plurality of groups, and 'and the number of the groups and the digits/ The number of analog components is mutually exclusive, and the groups and the digits/analog components are selected based on the number of rounded signals and the previously selected groups and the analog/analog components. 1〇·If applying The digital/analog conversion system of claim 9, wherein the digital/analog converter generates the analog output signal by using the digital/analog components selected by the dynamic component matching logic. 1. The digital/analog conversion system described in claim 9 of the patent application scope, wherein the dynamic component matching logic selects the groups and the digit/analog components in a predetermined order. The digital/analog conversion system of the range of item u, wherein the dynamic component matching logic first selects a continuation in the group that selects the last last selected group, the group, and selects the last selected group of the previous selection. The last digit/analog component of the digit/analog component is selected last, and then the next group, the species, and the next group are selected: the last digit/analog component of the digit/analog component. 0697- A40463TWF 18 1301705 ferrrs- The date of the stomach I / analog conversion system is equivalent to the digital transmission system. 13. The digits described in item 12 of the patent application range, wherein the selected digits / analog components of the input signal. , 9 digits / analogy into the signal 4 miscellaneous touch / such as ^ the number of the new phase of the digital input 15 · as claimed in the scope of the ninth system, where the digital / analog conversion crypt one, eve, bit / analogy The conversion system is as in the scope of the patent application / 9 items / 70 digits / analog converter. These digital / analog components are the digital / analog conversion system of the capacitor ^ circuit, resistors or current sources. Method, =; _ - number of materials (9) view number (10) - the component side of the complex digital / analog component is divided into complex quantities and the number of fiscal / analog components of the number of each other '· the number of groups J1 according to Wei Yirencan and before The domain takes the equal frequency and the digit/analog components, and the groups and the digit/analog components are selected. 2 is selected according to the method of inputting the digits/standing/analog components according to the item 17 of the claim axis, wherein the group and the digit/analog components are selected in a private order. The method of inputting the stone horses according to the digits according to the selected item, firstly selecting the last selection of the previous 0697-A40463TWF 19 1301705 p?VA is replacing ΐ| —____________—" 1 to take the group of the group, and Select the digits/analog components of the last selected digit/analog component in the group of the last selected group in the previous connection, and then select the last last in the next group in the next group. Select the digit/analog component of the digital/analog component. 20. The method according to claim 18, wherein the number of digits/analog elements is equivalent to the digit input code. 0697-A40463TWF 20 1301705 VII. Designated representative map: (1) The representative representative of the case is: figure (4). (2) A brief description of the component symbols of this representative figure: 40~Integral triangular modulator 12~Adder 14~loop filter 16~N bit quantizer 18~Nbit digit/analog converter 42~Advanced dynamic component matching logic 8. If there is a chemical formula in this case, please reveal the chemical formula that best shows the characteristics of the invention: slightly 0697-A40463TWF 5