TWI297582B - - Google Patents

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TWI297582B
TWI297582B TW94142239A TW94142239A TWI297582B TW I297582 B TWI297582 B TW I297582B TW 94142239 A TW94142239 A TW 94142239A TW 94142239 A TW94142239 A TW 94142239A TW I297582 B TWI297582 B TW I297582B
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Taiwan
Prior art keywords
circuit board
layout
circuit
component
layout method
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TW94142239A
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Chinese (zh)
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TW200723970A (en
Inventor
Quite Wu
Christina Yang
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Inventec Corp
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Priority to TW094142239A priority Critical patent/TW200723970A/en
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Publication of TWI297582B publication Critical patent/TWI297582B/zh

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Description

1297582 九、發明說明: 【發明所屬之技術領域】 , 本發明係有關於一種電路板佈局方法,更詳而言之, ;係於線路圖之電子元件提供一内嵌圖形的屬性參數,以提 ~ 供線路佈局之需要。 - 【先前技術】 ,一性能優良的電子裝置,除選擇高品質的電子元件與 .籲δ l的电路外,印刷電路板元件之佈局及線路連接的阻抗 等,亦為影響該電子裝置品質之其它因素;#同一楂元件 以及參數的電路,由於元件佈局(layout)設計及線路連接 不同丄即有不同的阻抗值,而阻抗大小影響訊號傳送及控 制%疋性的影響不小。因而如何降低線路佈局所產生的阻 *抗,以消除佈線不當所産生的雜訊干擾,同時便於生產中 的安裝、調試與檢修等,在電子產業中已成為重要的一環。 μ而在電路板上佈設電子元件及線路佈局,以往之佈局 鲁設計工程師係依據線路圖而將電子元件先安排在電路板 上2後再依電子元件的連#關係進行線路連接。而習知 、功能簡單且電路板面積較大的電路設計可依據上述之方法 ,直接將線路圖轉換成電路板的佈局線路,但隨著科技發展 迅速,目冑之電子裝置的功能相當齊全且功能強大,又電 7板由以往之單層線路板發展至現今的多層線路板,使得 1路佈局之設計越來越複雜及困難,且連接的電子元件數 ;由早先的數十個演變至今上千個,將來有可能衍生至上 個。因此電路佈局設計,所耗費的時間越來越長,且因 19047 5 1297582 1·=方、配置數里龐大之電子元件的過程中,該電子設計工 t師難免會發生疏忽遺漏的情況;如將被動元件或相關元 件配錯位置或配置的過遠,進而造成除錯時間增長,更嚴 重者將導致無法除錯修復,使得設計週期拉長。 (2)當電子設計工程師完成了部分電路的佈局後,若 該電路板中使用的電子元件規格變更,而必須改 =一+配置位置時,對於電子設計工程師來說,則必須 “又什,因而要耗費更長的時間與精神來進行修改。 :广—寻簡化並力—計工程師佈局的 作抓耘,已有其必要性。 【發明内容】 上述習知技術之缺點,本發明之主要 供一 ^路板佈局方法,藉以達到提高佈局效率之功效者 以達二再二I; — — .並儲存於一資料 =及以所屬之屬性參數建立 ,其所屬之屬性參數;以及 嵌入該線路圖之電子元件之標示位置 尺寸=數係為電子元件之形狀、接腳間距及位置之 供佈局設計者有利之工具。弓1¥用5。寺’俾以直接提 依據上述之方法,復包括依該線路圖所標示的電子元 19047 7 1297582 •屬:::排放於一初步線路佈局(1一) -3书子凡件依線路圖排放成初步線路佈/ 圖於該初步線路佈局進行引線 ° ' JL W路 佑兮M A丄 凡成该線路佈局圖;然 Μ、、泉路佈局圖製作成電路板 、 (debug)。 MM路板進行除錯 該電路板係為印刷電路板、封裳基 而該電子元件係為晶片組、中央 _夕曰电路板’ 制曰H 4± , ^ Τ兴處理早兀、驅動晶片、控 c用晶片或被動元件,❹ 包阻盗、電容器、電感器或開關。 〒竹马 本發明之電路板佈局方法的 子元件係由至少一中心元件及至二方:,其中該電 件;附屬元件係為作用相關聯之元件,且 口系电子7G件所屬之屬性參數禆 — 形狀、接腳間距與位置之尺寸几件及附屬兀件之 含有中心元件及附二=供設計者直接將該包 以供佈線U的屬性參數-併取出 便,以提供設計者更方便之使用^件㈣^件之不 ,設料可依照線路圖之配置直接選取該電子元件之 圖形或文字之屬性參數直接作 除習知方、Ή“ 接作為線路佈局的依據,而可免 必須重新佈局之缺失,俾可提高佈 局之效率以及降低人為之疏失。 【實施方式】 以下係藉由特定的具體實例說明本發明之實施方 19047 8 1297582 •式,熟悉此技藝之人士可由本說明書所揭 .瞭解本發明之其他優點與功效。 内谷輕易地 ’的具體實例加以施行或應用;查中::由其他不同 ,·基於不同觀點與應用,在不節:可 ;修飾與變更。 4如月之和神下進打各種1297582 IX. Description of the Invention: [Technical Field] The present invention relates to a circuit board layout method, and more particularly, an electronic component of a circuit diagram provides an in-line graphic attribute parameter to ~ For the needs of the layout of the line. - [Prior Art] A good performance electronic device, in addition to selecting high-quality electronic components and circuits, the layout of printed circuit board components and the impedance of the line connection, etc., also affect the quality of the electronic device. Other factors; #The same 楂 component and parameter circuit, due to different layout design and circuit connection, there are different impedance values, and the influence of impedance on the signal transmission and control % 不 is not small. Therefore, how to reduce the resistance generated by the circuit layout to eliminate the noise interference caused by improper wiring, and at the same time facilitate the installation, debugging and maintenance in production, has become an important part in the electronics industry. μ, and the electronic components and circuit layout are arranged on the circuit board. In the past, the design engineer Lu arranged the electronic components on the circuit board according to the circuit diagram, and then connected the lines according to the connection relationship of the electronic components. The circuit design with simple functions and simple circuit board area can directly convert the circuit diagram into the layout circuit of the circuit board according to the above method. However, with the rapid development of technology, the functions of the electronic device are quite complete. Powerful, and the 7-board from the previous single-layer circuit board to the current multi-layer circuit board, making the design of the 1-way layout more and more complicated and difficult, and the number of connected electronic components; from the previous dozens to the present Thousands, may be derived from the previous one. Therefore, the circuit layout design takes longer and longer, and in the process of 19047 5 1297582 1·= square, the number of large electronic components in the configuration, the electronic design engineer t inevitably will be negligent and omission; If the passive component or related component is misplaced or configured too far, the debugging time will increase, and more serious will result in the inability to debug and repair, which will lengthen the design cycle. (2) When the electronic design engineer completes the layout of some circuits, if the electronic component used in the circuit board changes, it must be changed to a + configuration position, for the electronic design engineer, it must be "again, Therefore, it takes a long time and a spirit to make modifications. 广 广 寻 寻 寻 寻 — — 计 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师 工程师For the method of layout layout, the effect of improving the efficiency of the layout is up to two times; and is stored in a data = and attribute parameters established by the attribute parameters, and the attribute parameters to which it belongs; and embedded in the circuit diagram The marked position size of the electronic component=number is the tool for the layout designer to shape the shape of the electronic component, the pitch of the pin and the position. The bow 1¥ uses 5. The temple '俾 directly refers to the above method, including The electronic element indicated by the circuit diagram is 19047 7 1297582 • genus::: discharged in a preliminary line layout (1) -3 books are discharged into preliminary line according to the circuit diagram / picture on the preliminary line Layout for the lead ° ' JL W Lu You 兮 丄 丄 丄 成 该 该 该 该 该 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 The electronic component is a chipset, a central _ 曰 曰 circuit board 曰 H 4± , ^ Τ 处理 processing early 兀, drive wafer, control c wafer or passive components, 阻 packet blocking, capacitor , an inductor or a switch. The sub-component of the circuit board layout method of the present invention is composed of at least one central component and two sides: wherein the electrical component; the accessory component is an element associated with the function, and the port electronics 7G piece Attribute parameter 禆 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状 形状It is more convenient for the designer to use the ^ (4) ^ pieces, the material can be directly selected according to the configuration of the circuit diagram, the attribute parameters of the graphic or text of the electronic component are directly removed from the conventional knowledge, and the "connection" is used as the basis of the line layout. Exempt The lack of re-layout must improve the efficiency of the layout and reduce human error. [Embodiment] The following is a description of the embodiments of the present invention by way of specific specific examples, and those skilled in the art can be devised by the present disclosure. Other advantages and effects of the present invention will be understood. The specific examples of the inner valley are easily implemented or applied; the investigation:: by other differences, based on different viewpoints and applications, in the absence of: can; modification and change. 4, such as the moon and the gods into the various

^ 請同時參閱第2及q FI丄止M ,9Π· Μ - 圖,如乂^ S21所示,首先提供 、7路圖2〇,接者如步驟S22,依據該嗖踗R 9n + _ # 20a , Λ 〇 ^ 曰曰 u , , , ^ 貝科犀而该電子元件20a係為 B曰 片;被m元,晶片、控制…特殊應用 哭i門門二”或5亥被動兀件係為電阻器、電容器、電感 • 開關’“如步驟S23將該線路圖2〇 —=補斗庫中取出其所屬之屬性參數21; =:r線路圖20中之電子元件騎其屬性 •肷入圖20之電子元件2〇a之標示位置,而 :· mi係為電子元件之形狀、接腳間距及位置之尺 '的圖形’或包括為該電子元件之提示語及引導用語 字。 接著晴蒼閱第2圖,如步驟S25所示,該線路圖所標 不的電子元件依其屬性參數排放於-初步線路佈局 (layout)圖;接著如步驟26所示,該電子元件依線路圖排 /成初v、.泉路佈局圖後,並依線路圖於該初步線路佈局進 仃引線以完成,亥線路佈局圖;然後如步驟26所示,依該線 路佈局圖製作成電路板;最後,如步驟27所示該電路板進 19047 9 I297582 7錯(debug)’除錯之後若無任何錯誤則結束線路 電路板係為印刷電路板、封裝基板及多層電路板其 由於該設計者由線路圖2〇轉換成線路佈局 =路圖20中之電子元件2〇a直接取得該電子元件別: 、腳位及位置等之尺寸的圖形,以供直接應用於線 。圖上’且所有相關的資料及提示,皆可同時取得: 可避免設計錯誤以提高佈局效率。 又於線路佈局巾,該屬性參數21可提 =佈局使用’因而得降低人為疏失所造成的錯:二 局設!Ϊ料間,㈣可減少重新佈局之缺失。、 凊蒼閱弟4目,在電路設計巾,部份之 一 同時搭配相關聯的電子元件,因此得將主要中:必須 f其周圍附近相關之附屬元件42佈局後建立成:一模41 、,且,且該模_時具有該中心元件❹附屬 、 性二數;増子元件所屬之屬性參數係包括中心屬 附屬兀件之形狀、接腳間距與位置之尺寸 :牛及 的圖形,或提示語及引導用 及連接關係 係為…曰“ • 寺,又該中心元件41 :為日曰片、组、中央處理單元、驅動晶 :? 應用晶片,而該附屬元件42係為電阻::片或特殊 或開關, 电谷态、電感器 設計者於下次線路佈局時,若有使用 =5可=選取具有中心元件41及_ ^ 而無須再重新佈局一今· m T W之杈組, 人,因而得以節省線路佈局時間。甚 10 19047 1297582 者右每次電子設計工程 出現的電子元件以及其周圍附近 立成為同-模組,並存入資:=關之附屬兀件佈局後建 程師之使用,有著莫大的;:庫中,對於曰後或者其他工 佈局::::為ΓΓ件及其周圍附近相關之附屬元件 刀月b屬性一併建立於模 電子設計工程師於元件佈局時 生^屬11茶數内,則 能屬性以及1相對心Z “清楚了解到元件之功 笋上、二、 使其更了解整體模組之功能。 m下日丨处*明所各項具體實施例中所承述,亦可n 侍到下列優點效益如下: 丌了%類 ⑴藉由建立模組的方式將f經佈局過之 :乃二曰後使用’可使電子設計工程師不需要-直^下-佈局相同之電路,俾以節省時間。 直重铍 ⑵藉由建立模組的方式將曾經佈局過之 來,以利日後使用,可使電子設計工程師 子下 佈局相同之電路’降低其發生疏失的機會。直重複 上述實施例僅例示性說明本發明之原理及 限綱明:?何熟習此項技藝之人士 ί可:二 月本叙明之精神及範®壽下,對上过 不延 變。因此,本發明之權利保護範二 =行修,與改 範圍所列。 ’應如後述之申請專利 【圖式簡單說明】 第1圖係為習知電路板元件之佈局流程圖; 19047 11 !297582 f 2圖係為本發明之電路板佈局方法之流程圖; 第3圖係為本&明之電路板佈局方法之線 屬性參數之示意圖;以及 第4圖係為本發明之電路板佈局方法之屬性參數包含 有中心元件及附屬元件之示意圖。 【主要元件符號說明】 20 線路圖 20a *21 41 42 電子元件 屬性參數 中心元件 附屬元件 S21-S27 步驟 12 19047^ Please also refer to the 2nd and q FI丄M, 9Π· Μ - diagram, as shown in 乂^ S21, first provide, 7 way diagram 2〇, the receiver is as in step S22, according to the 嗖踗R 9n + _ # 20a , Λ 〇 ^ 曰曰u , , , ^ Beike rhino and the electronic component 20a is a B-chip; by m-ary, wafer, control... special application crying i door 2" or 5 hai passive element Resistor, capacitor, inductor • switch '", as shown in step S23, the circuit diagram 2〇—= the bucket library is taken out of its attribute parameter 21; =:r circuit diagram 20 in the electronic component riding its properties • Intrusion diagram 20 is the position of the electronic component 2〇a, and: · mi is the shape of the electronic component, the pitch of the pin and the figure of the position ', or includes the prompt and the leading word for the electronic component. Then, according to the second figure, as shown in step S25, the electronic components marked by the circuit diagram are discharged according to the attribute parameters in the preliminary layout layout; then, as shown in step 26, the electronic components are in accordance with the route. After the layout/formation of the initial v and .spring road layout diagrams, and according to the circuit diagram, the lead wires are arranged in the preliminary circuit layout to complete the layout of the layout of the circuit; then, as shown in step 26, the circuit layout is prepared according to the layout diagram. Finally, as shown in step 27, the board enters 19047 9 I297582 7 "debug" after debugging, if there is no error, the circuit board is terminated as a printed circuit board, a package substrate and a multilayer circuit board. Converted from the circuit diagram 2〇 to the line layout = the electronic component 2〇a in the road diagram 20 directly obtains the size of the electronic component: , the position of the foot and the position, etc., for direct application to the line. All the relevant information and tips on the map can be obtained at the same time: Design errors can be avoided to improve layout efficiency. Also in the line layout towel, the attribute parameter 21 can be used = layout use ' thus reduces the error caused by human error: two settings! Ϊ , , ( , , , 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。凊苍读弟四目, in the circuit design towel, one of the parts is accompanied by the associated electronic components, so it must be: in the main: must be around the surrounding related components 42 layout and then established: a model 41, And, the modulo _ has the central component ❹ affiliation, the sex number; the attribute parameter of the scorpion component includes the shape of the central accessory component, the distance between the pin and the position: the graphic of the cow and the prompt The language and the guiding and connecting relationship are...曰" • Temple, and the central component 41: is a scorpion, a group, a central processing unit, a driving crystal: an application chip, and the accessory element 42 is a resistor:: Or special or switch, electric grid state, inductor designer in the next line layout, if there is use = 5 can = select with the central component 41 and _ ^ without having to re-layout the present · m TW group, people Therefore, it is possible to save the layout time of the line. Very 10 19047 1297582 The electronic components appearing in the electronic design project right now and the surrounding areas become the same-module, and are deposited into the capital: = Guan Zhi's attached components layout after the construction of the engineer Use, there is a great;: in the library, for the post-mortem or other work layout:::: for the piece and its surrounding related components, the knife b attribute is established together with the die design engineer in the component layout ^ Within the number of 11 teas, the attributes and 1 relative Z "clearly understand the function of the components, and second, to make them more aware of the function of the overall module. m The following is stated in the specific examples of the Department of Health, and the following advantages and benefits can be obtained as follows: %% class (1) By setting up the module, f is laid out: After use 'can make electronic design engineers do not need - straight down - layout the same circuit, so as to save time. Straight and heavy 铍 (2) By setting up the module, the layout will be used for future use, so that the electronic design engineer can lay out the same circuit' to reduce the chance of loss. The above embodiments are merely illustrative of the principles and limitations of the present invention: Anyone who is familiar with this skill ί Ke: In February, the spirit of this narration and Fan® Shou will not change. Therefore, the scope of the invention is set forth in the scope of the invention. 'Applicable to the patent application as described later [Simple description of the drawing] Figure 1 is a flow chart of the layout of the conventional circuit board components; 19047 11 !297582 f 2 is a flow chart of the circuit board layout method of the present invention; The figure is a schematic diagram of the line attribute parameters of the circuit board layout method of the present invention; and FIG. 4 is a schematic diagram of the attribute parameters of the board layout method of the present invention including the center element and the accessory element. [Main component symbol description] 20 Wiring diagram 20a *21 41 42 Electronic components Attribute parameters Center component Subsidiary component S21-S27 Step 12 19047

Claims (1)

/582 /582 十 申清專利範圍: 、種電路板佈局方法 ⑴提供-線路圖:下列步驟: 、資子元件及其所屬之屬性參數建立並儲存於 (3) 依該線路圖 一 出其所屬之屬性參數::之電子元件由資料庫中取 (4) 依線路圖中之φ $ 一 乂止 略圖t件將其屬性參數嵌入該線 _之包子兀件之標示位置。 利範圍第1項之電路板佈局方法,復包括依 2圖所標示的電子元件依其屬性參數排放於-初 乂、、泉路佈局(layout)圖。 =申請專利範圍第2項之電路板佈局方法,復包括該 电子兀件依線路圖排放成初步線路佈局圖後,並依線 路圖於該初步線路佈局進行引線以完成該線路佈局 圖〇 .如申請專利範圍第3項之電路板佈局方法,復包括依 该線路佈局圖製作成電路板。 5·如申請專利範圍第4項之電路板佈局方法,復包括該 電路板進行除錯(debug)。 6·如申請專利範圍第1項之電路板佈局方法,其中,該 屬性麥數係為電子元件之形狀、接腳間距及位置之尺 寸的圖形。 7.如申請專利範圍第1項之電路板佈局方法,其中,該 ]3 19047 1297582 屬性參數復包括為該電子元件之^語及引導用語之 文字。 8·如申請專利範圍第4項之電路板佈局方法,其中,兮 電路板係為印刷電路板、封裝基板及多層電路板其^ —去 〇 N 之電路板佈局方法,其中,該 心元件及至少一附屬元件所組/582 /582 Ten Shenqing patent scope:, circuit board layout method (1) provide - circuit diagram: the following steps:, the sub-components and their attribute parameters are established and stored in (3) according to the circuit diagram The attribute parameters:: The electronic components are taken from the database (4) According to the φ $ in the circuit diagram, the attribute parameters are embedded in the marked position of the buns of the line _. The circuit board layout method of the first item of the benefit range includes the electronic components indicated in Fig. 2 according to the attribute parameters of the layout, and the layout of the spring road. = The circuit board layout method of claim 2, including the electronic device, after discharging into a preliminary circuit layout according to the circuit diagram, and performing lead routing on the preliminary circuit layout according to the circuit diagram to complete the layout of the circuit. The circuit board layout method of claim 3 of the patent scope is further composed of a circuit board according to the circuit layout diagram. 5. If the circuit board layout method of claim 4 is applied for, the circuit board is included for debugging. 6. The circuit board layout method of claim 1, wherein the property mic is a figure of a shape, a pitch of the pin, and a size of the position of the electronic component. 7. The method of layout of a circuit board according to claim 1, wherein the attribute parameter of the 3 19047 1297582 is included in the text of the electronic component and the language of the guiding term. 8. The circuit board layout method of claim 4, wherein the circuit board is a circuit board layout method of a printed circuit board, a package substrate, and a multi-layer circuit board, wherein the core component and At least one accessory component 9·如申請專利範圍第1項 電子元件係由至少一中 成0 1〇·如申請專利範圍第9項之電路板佈局方法,其中,該 電子兀件所屬之屬性參數係包括中心元件 ^ :形狀、接腳間距與位置之尺寸、以及連接關係J 如申請專利範圍第10項之電路㈣局方法, 屬性參數復包括為嗲雨早 八中5玄 祜马°亥电子兀件之提示語及引導用語之 文子。 12. 如申請專利範圍第9項之電路板佈局方法,其中 中〜元件係為晶片組、中央處 Τ天慝理早兀、驅動晶片、护 制日日片、特殊應用晶片其中一者。 " 13. 如申請專利範圍第9項之電路板伟局方法,其中 :屬元件係為電阻器、電容器、電感器及開關其二 者。 該 控 申請專利範圍第!項之電路板佈局方法,其中 电:兀件係為晶片組、中央處理單元、驅動晶片 制晶片、特殊應用晶片及被動元件其中一者。 19047 14 1297582 15.如申請專利範圍第14項之電路板佈局方法,其中,該 被動元件係為電阻器、電容器、電感器及開關其中一 者0 15 190479. The electronic component of claim 1 is a circuit board layout method according to claim 9, wherein the attribute parameter of the electronic component includes a central component ^: The shape, the pitch of the pin and the size of the position, and the connection relationship. J. For the circuit of the 10th item of the patent application (4), the attribute parameter includes the prompt of the 5th 祜 祜 ° ° ° ° 及 及Guide the language of the language. 12. The circuit board layout method of claim 9 wherein the medium-to-component is one of a chipset, a central Τ天慝理兀, a driver chip, a protective day chip, and a special application chip. " 13. For the circuit board method of claim 9 of the patent scope, wherein: the components are resistors, capacitors, inductors and switches. The control applies for the scope of patents! The circuit board layout method of the item, wherein the electrical component is one of a wafer set, a central processing unit, a driven wafer, a special application chip, and a passive component. 19047 14 1297582. The circuit board layout method of claim 14, wherein the passive component is one of a resistor, a capacitor, an inductor, and a switch. 0 15 19047
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