1295435 九、發明說明： 【發明所屬之技術領域】 、本發鴨涉及-種電子電路輯之裝置，尤其_於多媒崔 視訊與音訊由一可程式邏輯晶片所控制，並控制信號之傳遞。 【先前技術】 ^著科技的進步’漸漸的形成一機需具備多功能之要求，名 ,般的家庭影音需求上也是具有同樣的麟，@此，此方面之技 W不斷有人在研U新巾。細技術如中華民國公告第572264號 之新型專利所揭露之附加於影音設備之多媒體處理裝置，其内容 為藉由夕媒版處理裝置使傳統之影音設備如音響、類比電視或 是電腦螢幕能夠經由通甩序列匯流排—Μb此， USB)連接具此傳輸介面之設備，而來傳輸聲音（如·、觀戋 猜等）、影像（如動錢縮標準1(mGtK)npictureexperts _Ρ，_)或動畫壓縮標準2 (Μ·)等）或是影像（如JpG 或離等）且如中華民國公告第號與第_3號之發明 專利所揭露之多魏多媒_放裝置與多魏整合式多媒體播放 裝置，其内容為經由此裝置可利用傳統視聽設備進行相片圈覽、 影視播放、音_放、視訊與音訊錄製魏、播放音轉注 目、錄製漁與蝴目恤輪，输峨置，= 上述之不同信號處理模組經由—控制單元予以控制信號之傳遞。 上述之電視訊號皆為傳統之類比電視訊號，晝面信 續性的變化，採用财sc系 蜀連 4主要的原因為類比訊號在經過傳 1295435 ^過財，繼物綠法错，叫，數錄播便庫 心生，目紐位域可灿_去除，轉原有 : 心另外數位德賴可以經由壓縮，使傳 ，、乾 一個類比電視頻道只能播送-個節目，而、°里口大，例如： 播送三、四個或更多節目。 以位電視頻道卻可 域位錢歧電料之電視節目源1&峨 比把信號轉換為壓縮信號，而再經由 又備 盔線^ έ 先二由不问之發射管道如衛星lc、 二電視發射絲台ld、魏_統le網路η等 ε逼、？外發射信號，從發射㈣發射翻 道利用數錄纖來舰，如第丨圖，t車1h的通 乐圏亚且此k號為經由壓縮後 /琥，目前騎統-的壓縮標準是MPEG_2，所以需要_接受 ^來接受此數位信號，為了提高此接受器之附加價值與功能，: 而具備其它功能，方能符合現代人之需求。 【發明内容】 。蓉於以上關題，本發明駐要目的在於提供_種多媒體訊 説處理系統，藉以來接收數值信號，並且可將信號進行處理，如 ，存或制·或_ f彡像格_，並且本發明之電路設計利用 口口來處理視成與音和吕號來減少許多的硬體成本，以及視訊 晶片之數量。 本發明之利用相同的系統時脈信號因此可減少了視訊與音訊 之％間延遲之問題，除此之外，本發明之電路設計非常簡化，因 此使得電路板之設計較容易，也可減少電路板餅人員之設計失 1295435 誤、減少製造上之問題等。 Q此’為達上迎目的’本發明所揭露之多媒體減處理系統 係利用： 第一^虎輸入裝置，此第一信號輪入裝置係接收包含視訊與 音訊信號之電波’且該第-信號輸入裝置將該電波轉為數位信 =兵另―第二信號輸人裝置，此第二信號輸人裝置係為一符合 =傳輪之介面’ 以進行#料之傳輪；從第—信號輸入裝置 與第二信號輸入裝置之信號傳送至控制裝置，此控制裝置為一同 步化視訊與音訊多工H ’並且此控制裝置負髓此信號傳給其它 處理7L件，亚此控織置接收—外部控敏置之控輸號，此外 部控制單元為—搖控模組，包含—微處理器與—感測器，可接受 使用者之遙控信號，_由感廳接受並且經微處'將之解碼 後，亚且再經外部控制模組將此控制信號傳給控制裝置。 控制裝置再她齡號與錄傳輸至處理裝置，此處理 裝置處理控制信號與資料信號’並且將此信號傳至信號輸出裝 置，而後傳輸至驅動設備。 另外’若欲將由第-信號輸人裝置或第二信號輸人裝置之作 號進行_編碼處理，翁繼毅將均輸人裝麵傳送入控 制裝置之信_送至編碼H編碼祕將控縣置所傳送之信 號編碼，並且將此已編碼之信號再傳回控制裝置。 系統需要-時脈輪入方能正常工作，因此尚需一時脈產生單 1295435 一並且此礼脈產生單元為一多時序鎖相迴路（phase lock loop) 產生，且此％脈“號傳至控制裝置，此外，控制裝置還連接一 W奐裔’此轉換n可將由控制裝置所傳送之資料錢轉換為如動 晝壓縮標準1 _晝壓縮鮮2之信號格式，而後再將此壓縮信 號再回傳給控制裝置。 ”為使對本發明的目的、構造、特徵、及其功能有進一步制 解’茲配合實施例詳細說明如下。 【實施方式】 請茶閱第2圖，顯示本發明之系統方塊圖，由圖中可看到負 -信號輸人裝置丨係接收包含視簡音訊錢之紐，且第一卞 號輸入裝置1將此電波轉駿位錢，所以第-信號輸入裝置^ 包含一數位調諧器11與一類比調言皆器…而數位調諧器12可宣 接接受外界由衛星、電視發射台或有線電視系統業者所發送之數 位信號；而類比觸單元12包含類比觸器i2i ="_、電視發射㈣_視_者所發送之類比 物由音訊處取 器⑽1 wd «胸_，MSP)。衫曰處理 ▲此外，錢輸人單域包括另—第二信號輪人裝 二信號輸入裝置2係為一符合標 、 昂 +得_之；I面，本發明之第二信 1295435 號輸入裝置2之標準傳輸介面係包含記憶卡（CompactFlash)介 面21與通用串列匯流排介面22，本發明之記憶卡介面21符合1295435 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a device for electronic circuit programming, in particular, for multi-media video and audio control by a programmable logic chip and control of signal transmission. [Prior technology] ^The advancement of technology' gradually formed a machine that needs to have the requirements of multi-function, the name, the general family audio and video needs also have the same Lin, @ this, the technology of this aspect is constantly researching U new towel. A multimedia processing device attached to an audio-visual device disclosed in the new patent of the Republic of China Publication No. 572264, the content of which is to enable a conventional audio-visual device such as an audio, analog television or computer screen to be passed through a media processing device. Through-sequence bus - Μb, USB) connects devices with this transmission interface to transmit sounds (such as ·, 戋 戋 guess, etc.), images (such as money reduction standard 1 (mGtK) npictureexperts _ Ρ, _) or Animation compression standard 2 (Μ·), etc.) or image (such as JpG or detachment) and the multi-wei multi-media integrated device disclosed in the invention patents of the Republic of China Announcement No. and No. _3 The multimedia playback device has the content that through the device, the traditional audio-visual equipment can be used for photo circle viewing, film and television playback, sound-playing, video and audio recording, broadcast, audio-visual transfer, recording of fishing and butterfly wheels, and transmission and placement. = The different signal processing modules described above pass the control signal to the control signal. The above-mentioned TV signals are all analogous to the TV signal, and the change of the letter is the same. The main reason for using the financial sc system is the analog signal. After the passage of 1295435, the money is wrong, and the number is wrong. Recording and broadcasting of the library, the destination field can be removed _, the original: the heart of the other number of De Lai can be compressed, make, and do an analog TV channel can only broadcast - a program, and ° Likou Large, for example: Broadcast three, four or more programs. The TV channel source 1 & 峨 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 把 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视 电视Launching the wire table ld, Wei _ system, network η, etc. ε forced,? The external emission signal, from the launch (four) launching the turn, uses the number of recording fibers to come to the ship, such as the first map, the t-car 1h of the Tongle 圏ya and the k number is after compression / a, the current riding system - the compression standard is MPEG_2 Therefore, it is necessary to accept _ accept ^ to accept this digital signal, in order to improve the added value and function of this receiver, and have other functions to meet the needs of modern people. SUMMARY OF THE INVENTION In the above question, the purpose of the present invention is to provide a multimedia message processing system, which receives a numerical signal and can process the signal, such as storing or making _f彡 _, and The circuit design of the invention utilizes a mouthpiece to process the audio and audio and the Lu number to reduce the cost of many hardware and the number of video chips. The use of the same system clock signal of the present invention can reduce the problem of delay between % of video and audio. In addition, the circuit design of the present invention is very simplified, thereby making the design of the circuit board easier and reducing the circuit. The design of the cake staff lost 1295435 errors, reducing manufacturing problems. The multimedia subtraction system disclosed in the present invention utilizes: a first input device, the first signal wheeling device receives a radio wave containing video and audio signals and the first signal The input device converts the electric wave into a digital letter=Binger-second signal input device, and the second signal input device is a device that conforms to the pass-through wheel to carry out the transmission of the material; from the first signal input The signal of the device and the second signal input device is transmitted to the control device, and the control device is a synchronized video and audio multiplexing H' and the control device transmits the signal to the other processing 7L device, and the control device receives the receiving device. The external control unit is controlled by the remote control unit. The external control unit is a remote control module, which includes a microprocessor and a sensor. The remote control signal of the user can be accepted. After decoding, the control signal is transmitted to the control device via the external control module. The control device transmits the age number and recording to the processing device, which processes the control signal and the data signal' and transmits the signal to the signal output device and then to the drive device. In addition, if you want to encode the signal from the first signal input device or the second signal input device, Weng Yiyi will send the letter of the input device into the control device. Send it to the code H code to control the county. The transmitted signal is encoded and the encoded signal is transmitted back to the control device. The system needs - the clock wheel can work normally, so it is still necessary to generate a single 1295435 one and the pulse generation unit is generated by a multi-phase phase lock loop, and the % pulse is transmitted to the control. The device, in addition, the control device is also connected to a W. The conversion n can convert the data transmitted by the control device into a signal format such as a dynamic compression standard 1 _ 昼 compressed fresh 2, and then return the compressed signal again. It is transmitted to the control device. "In order to further clarify the object, structure, features, and functions of the present invention," the following is a detailed description of the embodiments. [Embodiment] Please refer to Fig. 2 for a block diagram of the system of the present invention. It can be seen that the negative-signal input device receives the button containing the simple audio signal, and the first nickname input device 1 The radio signal is transferred to the money, so the first signal input device ^ includes a digital tuner 11 and an analog speaker... and the digital tuner 12 can accept the outside world by satellite, television transmitter or cable television system operator. The transmitted digital signal; and the analog touch unit 12 includes the analogy contactor i2i ="_, the television transmission (four)_view_the analogy sent by the audio receiver (10) 1 wd «chest_, MSP). In addition, the money input single field includes another - the second signal wheel, the two-input signal input device 2 is a standard, ang + _; I side, the second letter 1295435 input device of the present invention The standard transmission interface of the second embodiment comprises a memory card (CompactFlash) interface 21 and a universal serial bus interface interface 22, which is compatible with the memory card interface 21 of the present invention.
Memory Stick、Multi media Card、Smart Media、CompactFlash Type 1/11、IBM Microdrive、Memory Stick、Memory Stick PRO、Memory Stick, Multi Media Card, Smart Media, CompactFlash Type 1/11, IBM Microdrive, Memory Stick, Memory Stick PRO,
Secure Digital與XD其中一種規格，因此，只要在包含於記憶卡 之視§孔與音§孔資料或是利用通用串列匯流排傳輸資料之儲存設備 所包含之視訊與音訊資料，可藉由記憶卡介面21或是通用串列匯 流排介面22將資料傳入本發明之多媒體訊號處理系統中。 除了有彳a 5虎輸入裝置外，當需一處理裝置3，此處理裝置3 係接受或傳回控制裝置之控制信號與資料信號，此處理裝置3包 各處理裔31、一 §己憶體32及一硬碟33，並且處理裝置g支援 數位記錄。 *在信號輪入單元卜2與處理裝置3之間有—控制裝置4，此 衣置4為同步化視訊與音訊多工^，為可程式邏輯元件， (programmable logic device > PLD) 列（Field Pr〇g_ble Gate Array，fpga)，用來 ^4之1 咖乍存取、_、編碼或解碼等，猶後再說明此控制 衣罝4之内部結構。 連接於控制裝置4之 控制襄置4所傳送之”早、 此鳊石馬器5係將 回控梅置4，本ρ日M編碼，亚且將此已辦之信號再傳 X月之編碼器5係為一動晝壓縮標準2之編碼 10 1295435 器，而轉換器6係將視訊與音訊信號轉換為壓縮信號格式，本發 明可壓縮之錢格式為動麵縮鮮丨與動 _ . x ^在—微處理㈣巾，必需要有—時脈缝單此時脈產 土早兀9係產生時脈信號供控制裝置4或是處理器31等元件作為 :^之準則，而本發日狀雜魅單元9為—多時序鎖相迴 接下來當處_31㈣控織置4所傳送之錄處理完後， 7 ^ 7 之視式與音矾傳輸至驅動設備；信號輪出裝置7包人一交* :!=: Γ視訊_72，多，聲^^ 立1 且傳至鶴設備，1轉料如·或是-此 曰曰等设備，而視訊緩衝器72係接受處理器31 一 樣地，把此視訊信號先轉換為驅動設備所能接受之，同 傳至其驅動設備，如顯示H或電視等設備。 〜。工、’亚 另外，在控制裝置4連接—外部控制單元 元8係傳送—控制信號給控織置4,使控置 f空制單 =在本剌中，外部控制單元δ為—搖控模組 =含一微處理器與-感測器(圖面未顯示 之信號後，再將此信號經由外部控制單元δ之微處上，外來 再把此信號傳送給微處·，而此感測 糾。禮後’ 、、工外線感測器，因 11 Ϊ295435 九便用者可藉由無線之方式將控制信號經由此外部控制單元 傳送至控制裝置4。 所以由上述之制可知，第—信號輸人裝置丨與第二信號輸 將已處理之視成與音訊信號經由通用輸入與輪出介面 (General I_/〇_t)傳送至控制裝置4，而控制裝置4將選 擇此信號餘_進行處理，如先減訊與音黯號進行動 晝壓縮標準2之編碼後，再把錢經由處理裝置3與信號輪出農 置7傳达至驅動設備或是其它記錄儲存媒體，或是將視訊與音訊 W傳送缚換n、6，進行動晝魏鮮2或是動晝壓縮標準1 之貝料格式麵，最後再經域理裝置3與錢輸出裝置7將資 枓傳送至,_設備或是其它記親存舰，以上這她制動作經 由外部控制單元8將控制信號傳輸給控制裝置4，而控制裝置4 便執行上述之動作。 請參閱第3圖，所示為本發明之控制裝置内部結構方塊圖， 控制裝置4係在一邏輯電路上，連接許多模組，其中包含一解碼 器41、一第一控制器42、一緩衝器43、一暫存器私、一觸發感 測（edge detector)單元 45、一 中斷控制裝置（interrupi controller) 46、一音訊多工器47、一視訊多工器48、與一傳輸 流多工器（transport stream multiplexer) 49，以下各別古兒明 其功用舆連結關係·· 首先處理裝置3經由通用輸入與輸出介面將處理裝置3之位 12 1295435One of the specifications of Secure Digital and XD, so as long as the video and audio data contained in the storage device included in the memory card and the data stored in the universal serial bus are used, The card interface 21 or the universal serial bus interface 22 transmits data to the multimedia signal processing system of the present invention. In addition to the 彳a 5 tiger input device, when a processing device 3 is required, the processing device 3 receives or transmits back the control signal and the data signal of the control device, and the processing device 3 includes each processing person 31, a § hexamed body 32 and a hard disk 33, and the processing device g supports digital recording. * between the signal wheeling unit 2 and the processing device 3, there is a control device 4, which is a synchronous video and audio multiplexing, which is a programmable logic device > PLD column ( Field Pr〇g_ble Gate Array, fpga), used for ^4 of 1 curry access, _, encoding or decoding, etc., then explain the internal structure of this control 罝4. Connected to the control device 4 of the control device 4 to transmit the "early", the meteorite 5 device will be returned to the control unit 4, the current ρ day M code, and the code of this already transmitted signal is transmitted X month The device 5 is a coded 10 1295435 device of the dynamic compression standard 2, and the converter 6 converts the video and audio signals into a compressed signal format, and the compressible money format of the present invention is a dynamic surface reduction and motion _. x ^ In the -micro-processing (four) towel, it is necessary to have - the clock-sewn single-segment at this time, the pulse-producing soil is early and the 9-series generates the clock signal for the control device 4 or the processor 31 as the criterion: The illusion unit 9 is - multi-time-locked back. Next, after the recording of the _31 (four) control woven 4 is transmitted, the 7 ^ 7 view and the sound are transmitted to the driving device; the signal wheeling device 7 is packaged一交* :!=: Γ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Similarly, the video signal is first converted to a drive device that can be accepted, and transmitted to its driving device, such as a device such as H or TV. In addition, the control device 4 is connected - the external control unit 8 is transmitted - the control signal is given to the control weaving 4, so that the control f is empty. In the present case, the external control unit δ is - the remote control module = one The microprocessor and the sensor (after the signal not shown on the screen, the signal is sent to the micro-location through the external control unit δ, and then the signal is transmitted to the micro-location, and the sense is corrected. ',, external line sensor, because 11 Ϊ 295435 nine users can wirelessly transmit control signals to the control device 4 via the external control unit. Therefore, the above-mentioned system can be known, the first signal input device丨And the second signal transmission transmits the processed visual and audio signals to the control device 4 via the universal input and turn-out interface (General I_/〇_t), and the control device 4 selects the signal residual_ for processing, such as After the reduction and the sound number are encoded by the compression standard 2, the money is transmitted to the driving device or other recording and storage medium via the processing device 3 and the signal rotation, or the video and audio are transmitted. Bind n, 6, and move Wei Wei 2 or move The bedding format surface of the standard 1 is compressed, and finally, the information is transmitted to the device, or other memory, via the domain device 3 and the money output device 7, and the above control action is performed by the external control unit 8. It is transmitted to the control device 4, and the control device 4 performs the above-mentioned actions. Please refer to FIG. 3, which is a block diagram showing the internal structure of the control device of the present invention. The control device 4 is connected to a plurality of modules on a logic circuit. The method includes a decoder 41, a first controller 42, a buffer 43, a register private, an edge detector unit 45, an interrupi controller 46, and an audio multiplexing. 47, a video multiplexer 48, and a transport stream multiplexer 49, the following respective functions are used for the connection relationship. First, the processing device 3 passes the processing device via the universal input and output interface. 3rd place 12 1295435
emble)、資料傳輸模式（她）或預備狀態（ready)。 而資料或信號從控制裝置4的輸入接腳（iiiput 傳送至 ’在解碼器41中，它接受處理裝置3之信Emble), data transfer mode (her) or ready state (ready). The data or signal is transmitted from the input pin of the control device 4 (iiiput to 'in the decoder 41, which accepts the letter from the processing device 3)
而且輸出符合輸入之數 控制裝置4之解碼器41，4 5虎並且將之解碼，如位址， 上述解碼器41為一 值’換句話說，解碼器41的電路為二進制之數值輸入而輸出與輸 入相付合之值並且此值保持固定不變。 當位址被解碼後，便傳送至第—控織置&，而使第一控制 裝置42來決定控織置4對信號作讀取或是寫人，若控制裝置4 為寫入動作時，則將解碼器41之資料傳送至缓衝器43，並且缓衝 器43能暫時地記錄資料。 在暫存器44模組中為一八位元之正反器（flip—fl〇p)，並且 此暫存器44在接受了從解碼器41來之寫入致能（write enable)、 靖取致能（read enable)、資料傳輸預備（data ready)、位址碼 (addresses code)專之控制信號後執行讀取或是寫入之動作。 音訊多工器47接收來自暫存器之音訊信號後，將此音訊 信號決定音訊之目的地，如處理裝置3或是編碼器5等；視訊多 13 1295435 / 48同樣接收暫存器私之視訊信號後，並且決定此視訊信號 將傳i個彳論處理，如處理裝置3或是編碼器5等。 傳輪流多工器49將決定傳遞流信號將傳送至編碼器5或是處 理裝置3。 、同吩，觸發感測單元45若感測到輪入觸發感測單元45之信 f為问位料’發感測單元45將傳送-信號給巾斷控制裝置46 存為44 ’表不需要一中斷需求，而可輸入中斷信號之模組包 含編碼器5、視訊解碼器4卜轉換器6、記憶卡介面2卜外部控 制裝置42或是_序舰流排介面私#上述之模組傳送一中斷 信號後，代表此裝置有中斷需求，當觸發感測單元45接受到高位 準訊狀’觸發感測單元45便傳送-訊號給中斷控制裝置46 此中斷控制裝置46將傳送—非可屏蔽中斷（maskaWe ，腿)信_控繼置4之細難，並且此非可屏 蔽中斷為最高中斷層級，甚至能中斷標準硬體㈣ hardware interrupt)° 請參閱第4圖，所示為本發明之中斷控制系統圖，此中斷控 制系統包含重置標準硬體中斷向量（Reset IRQ) 461、外部控制 標準硬體中斷向量搬、轉換器標準硬體中斷向量棚、視訊解碼 器標準硬體中斷向量偷、編碼器標準硬體中斷向量465、記憶卡 介面標準硬體中斷向量備、通物流排介面標準硬體中斷向 量術、觸發娜元45、中斷控制裝置46與非可屏蔽中斷信號 14 1295435 4692 ’其中重置標準硬體中斷向量461由控制裝置4之重置中斷 需求腳位之信號來控制，並且設定為低位準（low level)時，便 傳輸一重置中斷信號給控制裝置4,要求重置系統；外部控制裝置 4標準硬體中斷向量由控制裝置4之外部控制裝置4中斷需求腳位 之信號來控制，並且設定為高位準（high level)時，便傳輪一 外部控制中斷信號給控制裝置4;轉換器標準硬體中斷向量463 由控制裝置4之轉換器中斷需求腳位之信號來控制，當在轉換器6 之信號流（Signal flow)或資料流（data n〇w)要傳輪給控制 装置4時，便使轉換器標準硬體中斷向量妨3設定為高位準，便 傳輸-轉換n情信號給控制裝置4，財斷控制裝置46，並且 把在I換$ 6之㈣傳給系統；視訊解碼器標準硬體中斷向量 46^由控健置4之視訊解碼器中斷需求腳位之信號來控制，並 冬㈣2^準％便傳輪—視訊解碼器中斷信號給控織置4， 糸、、先B守，便使視訊解碼器中 體中斷向⑽補崎置=卩位為高位準；編碼器標準硬 制，並轉絲高辨時，便龄，巾斷絲離之信號來控 4，當編碼㈣細^麵_魏給控做置 器5中斷需麵㈣高鱗，料^控崎置4時，便使編石馬 準硬體中斷向量466,由控制裝置4 ^裝置46 ;記憶卡介面標 信號來控制，並且設定為高位準b±之咖卡介面中斷需求腳位之 t ’便傳輪—記憶卡介面中斷信 1295435 號给控制裝置4，當系統之記憶卡介面被記憶卡插入時，便使記憶 卡介面中斷需求腳位為高位準，來中斷控制裝置祁，並可使記憶 卡之健或是倾藉減憶卡介面傳至系統巾；制串列匯流排 介，標準硬體帽向量467，由控制裝置4之通用串順流排介面 中斯需求腳位之信號來控制，並且設定為高位準時，便傳輸—通 ^串列該排介面帽魏給控繼置4，#具有通科列匯流排 介面22之設備連接到系統之通用串列匯流排介面22時，便使通 歹Uh面22中斷需求腳位為高位準以中斷控制裝置妨。 當有任何—個上述元件（重置鮮硬體帽向量備、外部 控制標準硬體中斷向量462、韓拖哭沪 硬體情向量463、視訊 料，準硬體中斷向量464、編碼器標準硬體中斷向量娜、記 帽=標準硬體中斷向量細與通用串列匯流排介面標準硬體 發出之錄傳給财_單元45，使觸發_單元45 設定令•制m b衣置46 ’而此中斷需求信號將 再傳輪- 5之輪出端，並且再傳4硬體中斷向量467到控制裝 &亚且再傳輸至系統之處理單元3。 衣 請參閱第5圖，所示為太於卩口丄 圖中所示為中斷控制系統之内部結構圖 邏輯元件包含件’財斷控制系统： 向量啦、轉換器標準硬體中ΓΓ㈣標準硬體中渥 h 463、視訊解碼器標準硬體t 1295435 斷向量464、記憶卡介面標準硬體中斷向量466、通用串列匯流排 "面標準硬體中斷向量467、輪入缓衝器43、觸發感測單元45、 中斷屏蔽暫存器468、及邏輯閘（AND logic) 469、或邏輯閘⑺R logic) 4691與非可屏蔽中斷信號4692。 匕έ 一輸入緩衝器451與一觸發感測器 452 ’亚且觸發感測單a 45用來感測由中斷控制系統之邏輯元件 包含重置標準硬體中斷向量備、外部控制標準硬體中斷向量 他、轉換讀準硬體中斷向量463、視訊解碼器標準硬體中斷向 量464、記憶卡介面標準硬體中斷向量侧與通用串列匯流排介面 標準硬體中斷向量術中任何一個中斷需求錢；因此，當觸發 :測單元45接收到重置標準硬體中斷向量側、外部控制標準硬 肢中_量462、轉換器標準硬體中斷向量柳、視碼 ^中斷向量偷、記憶卡介面鮮硬體帽向量卿與通用= 、=排介面鮮硬體中斷向量術其中之任何一個信號，觸發感 "早π 45便發出一信號到及邏輯間姻士心 :r:r為高位準時’及邏輯設定為= 因此’當有任何一個及邏輯間侧平 邏輯間4691’而或邏輯間個 ⑺r t驅動或 制裝置4。 更傳廷—個標準硬體中斷向量到控 設計用多種_再搭配電路 號，並且將所接受之信號加 1295435 解馬處理’取後再將此已處理之信號傳送至影視視聰裝置， 而且本發明之電路設計係利用多工器來處理視訊與音訊信號，如 此可減少許多的硬體成本，以及視訊晶片之數量，並且本發明利 用_的纽時脈錢，批可減少了視訊與音訊之時間延遲之 問喊，經由本發明之系統設計，使得電路板之設計較容易，也可 減少電路板設計人狀設計失淑造上之醜等。 雖然本發明以前述之較佳實施例揭露如上，然其並非用以限 定本f月，任何熟習相像技藝者，在不脫離本發明之精神和範圍 田可作=許之更_顯，11此本㈣之專娜護範圍須視 „兒明書所附之申請專利範騎界定者為準。 【圖式簡單說明】 弟1圖係顯示數位信號之傳送方式。 第2圖係顯示本發明之系統方塊圖。 f 3圖係顯示本發明之控制裝置内部結構方塊圖。 ^ 4圖_示本發明之中斷控制系統圖。 乐5圖係顯示本發明之中斷控統之内部 【主要树符號_】 (la) 電視節目源 (lb) 數位壓縮設備 (lc) 衛星 (ld) 愿線電视發射基地台 (le) 有線電視系統 18 1295435 (if)有線電視系統 (lg) 家庭 (lh) 汽車 (1) 第一信號輸入裝置 (11) 數位調諧器 (12) 類比調諧單元 (121) 類比調諧器 (122) 視訊解碼器 (123) 音訊處理器 (2) 第二信號輸入裝置 (21) 記憶卡介面 (22) 通用串列匯流排介面 (3) 處理裝置 (31) 處理器 (32) 記憶體 (33) 硬碟 (4) 控制裝置 (41) 解碼器 (42) 第一控制器 (43) 缓衝器 (44) 暫存器 19 1295435 (45) 觸發感測單元 (451) 輸入緩衝器 (452) 觸發感測器 (46) 中斷控制裝置 (461) 重置標準硬體中斷向量 (462) 外部控制標準硬體中斷向量 (463) 轉換器標準硬體中斷向量 (464) 視訊解碼器標準硬體中斷向量 (465) 編碼器標準硬體中斷向量 (466) 記憶卡介面標準硬體中斷向量 (467) 通用串列匯流排介面標準硬體中斷向量 (468) 中斷屏蔽暫存器 (469) 及邏輯閘 (4691 )或邏輯閘 (4692)非可屏蔽中斷信號 (47) 音訊多工器 (48) 視訊多工器 (49) 傳輸流多工器 (5) 編碼器 (6) 轉換器 (7) 信號輸出裝置 20 1295435 (71) 多工標準聲音處理器 (72) 視訊缓衝器 (8) 外部控制單元 (9) 時脈產生單元 21Moreover, the decoder 41, which is in accordance with the input number control means 4, is output and decoded, such as an address, the decoder 41 is a value. In other words, the circuit of the decoder 41 is output as a binary value. The value that is combined with the input and this value remains fixed. When the address is decoded, it is sent to the first control &<RTIID=0.0>>> Then, the data of the decoder 41 is transferred to the buffer 43, and the buffer 43 can temporarily record the data. In the module of the register 44 is an eight-bit flip-flop (flip-fl〇p), and the register 44 receives the write enable from the decoder 41. The read or write operation is performed after the control signal is read enable, data ready, and address code. After receiving the audio signal from the register, the audio multiplexer 47 determines the destination of the audio signal, such as the processing device 3 or the encoder 5; the video 13 1395435 / 48 also receives the private video of the register. After the signal, it is determined that the video signal will be processed by a paradox, such as the processing device 3 or the encoder 5. The pass-through multiplexer 49 will determine whether the transfer stream signal will be transmitted to the encoder 5 or the processing device 3. If the sensation, the trigger sensing unit 45 senses the letter f of the wheel-in trigger sensing unit 45 as the problem material, the sensor unit 45 transmits the signal to the towel control device 46 as 44'. The module that can input the interrupt signal includes an encoder 5, a video decoder 4, a converter 6, a memory card interface 2, an external control device 42, or a module transmission interface. After an interrupt signal, it indicates that the device has an interrupt request. When the trigger sensing unit 45 receives the high level signal, the trigger sensing unit 45 transmits a signal to the interrupt control device 46. The interrupt control device 46 transmits - non-maskable Interrupt (maskaWe, leg) letter _ control relay 4 is difficult, and this non-maskable interrupt is the highest interrupt level, and even can interrupt the standard hardware (4) hardware interrupt) ° See Figure 4, shown in the present invention Interrupt control system diagram, this interrupt control system includes reset standard hardware interrupt vector (Reset IRQ) 461, external control standard hardware interrupt vector vector, converter standard hardware interrupt vector shed, video decoder standard hardware interrupt vector Encoder standard hardware interrupt vector 465, memory card interface standard hardware interrupt vector preparation, communication logistics interface standard hardware interrupt vector, trigger nano element 45, interrupt control device 46 and non-maskable interrupt signal 14 1295435 4692 ' The reset standard hardware interrupt vector 461 is controlled by the signal of the reset interrupt demand pin of the control device 4, and when set to a low level, a reset interrupt signal is transmitted to the control device 4, requiring heavy Setting the system; the external control device 4 standard hardware interrupt vector is controlled by the external control device 4 of the control device 4 interrupting the signal of the demand pin, and when set to a high level, the external control interrupt signal is transmitted to the wheel The control device 4; the converter standard hardware interrupt vector 463 is controlled by the signal of the converter interrupting the demand pin of the control device 4, when the signal flow or data stream (data n〇w) of the converter 6 is When the transmission device 4 is sent to the control device 4, the converter standard hardware interrupt vector 3 is set to a high level, and the transmission-conversion signal is transmitted to the control device 4, the financial control device 46, And pass the I in the $6 (four) to the system; the video decoder standard hardware interrupt vector 46^ is controlled by the signal of the video decoder interrupting the demand pin of the control device 4, and the winter (four) 2^%% will pass the wheel - Video decoder interrupt signal is given to control woven 4, 糸, and B 守, then the video decoder is interrupted to (10) 补崎定=卩 position is high level; the encoder standard is hard, and the wire is high When, age, the towel is broken from the signal to control 4, when the code (four) fine ^ face _ Wei to control the device 5 interrupted need to face (four) high scale, material ^ control when set 4, then make the stone Ma Zhu The hardware interrupt vector 466 is controlled by the control device 4^ device 46; the memory card interface signal, and is set to the high level b± coffee card interface interrupt demand pin t 'will pass the wheel - the memory card interface interrupt letter 1295435 The control device 4, when the memory card interface of the system is inserted by the memory card, causes the memory card interface to interrupt the demanding pin to a high level, interrupts the control device, and can make the memory card healthy or deductive memory. The card interface is transmitted to the system towel; the serial bus bar is introduced, the standard hard cap vector 467 is controlled by the control device 4 The universal string is controlled by the signal of the required pin position in the downstream interface, and is set to the high level on time, and then transmitted - the serial port is arranged in the interface cap Wei control relay 4, # has the Tongke column bus interface 22 When the device is connected to the universal serial bus interface 22 of the system, the Uh surface 22 is interrupted by the Uh surface 22 to a high level to interrupt the control device. When there is any of the above components (reset fresh hard hat vector preparation, external control standard hardware interrupt vector 462, Han dragged Shanghai hardware vector 463, video material, quasi-hardware interrupt vector 464, encoder standard hard Body interrupt vector Na, hat = standard hardware interrupt vector fine and universal serial bus interface standard hardware issued by the transmission to the financial unit 45, so that the trigger_unit 45 set the order to make mb clothes 46 ' and this The interrupt demand signal will be transmitted again to the round 5 end, and then the 4 hardware interrupt vector 467 will be transferred to the control unit & and then transferred to the processing unit 3 of the system. Please refer to Figure 5 for the clothing. The internal structure of the interrupt control system is shown in the diagram of the interrupt control system. The logic component contains the 'financial control system: vector, converter standard hardware, 四 (4) standard hardware 渥h 463, video decoder standard hardware t 1295435 break vector 464, memory card interface standard hardware interrupt vector 466, universal serial bus " face standard hardware interrupt vector 467, wheeled buffer 43, trigger sensing unit 45, interrupt mask register 468 And logic gate (AND logic) 469, or logic gate (7) R logic) 4691 and non-maskable interrupt signal 4692.匕έ an input buffer 451 and a trigger sensor 452 ′ and trigger sensing list a 45 is used to sense that the logic component of the interrupt control system includes a reset standard hardware interrupt vector device, an external control standard hardware interrupt Vector, conversion read quasi-hardware interrupt vector 463, video decoder standard hardware interrupt vector 464, memory card interface standard hardware interrupt vector side and universal serial bus interface standard hardware interrupt vector operation any interruption request money; Therefore, when the trigger: the measuring unit 45 receives the reset standard hardware interrupt vector side, the external control standard hard limb _ quantity 462, the converter standard hardware interrupt vector willow, the video code ^ interrupt vector steal, the memory card interface is hard Body cap vector and general =, = row interface fresh hardware interrupt vector technique any of the signals, trigger sense " early π 45 will send a signal to the logic between the heart: r: r is high on time ' and The logic is set to = so 'when there is any one and the inter-logic side logic between 4691' or the inter-logic (7) r t drive or device 4. More subtending - a standard hardware interrupt vector to control design with a variety of _ re-matching the circuit number, and the received signal plus 1295435 solution processing 'taken and then send this processed signal to the video and video device, and The circuit design of the present invention utilizes a multiplexer to process video and audio signals, thereby reducing the cost of many hardware and the number of video chips, and the invention can reduce video and audio by using the clock of the clock. The time delay is called, and the design of the system of the present invention makes the design of the circuit board easier, and also reduces the ugliness of the design of the circuit board design. Although the present invention has been disclosed in the foregoing preferred embodiments, it is not intended to limit the present invention. Any skilled person skilled in the art can make a change without departing from the spirit and scope of the present invention. The scope of the special protection of this (4) shall be subject to the definition of the patent application parade attached to the Children's Book. [Simple description of the diagram] The 1st diagram shows the transmission mode of the digital signal. Figure 2 shows the transmission of the invention. System block diagram f 3 is a block diagram showing the internal structure of the control device of the present invention. ^ 4 Figure _ shows the interrupt control system diagram of the present invention. Le 5 diagram shows the internals of the interrupt control system of the present invention [main tree symbol _ 】 (la) TV program source (lb) digital compression device (lc) satellite (ld) televised television transmission base station (le) cable television system 18 1295435 (if) cable television system (lg) family (lh) car ( 1) First signal input device (11) Digital tuner (12) Analog tuning unit (121) Analog tuner (122) Video decoder (123) Audio processor (2) Second signal input device (21) Memory card Interface (22) Universal Serial Bus Interface (3) Processing Unit (31) Processor (32) Memory (33) Hard Disk (4) Control Unit (41) Decoder (42) First Controller (43) Buffer (44) Register 19 1295435 (45) Trigger Sensing Unit (451) Input Buffer (452) Trigger Sensor (46) Interrupt Control (461) Reset Standard Hardware Interrupt Vector (462) External Control Standard Hardware Interrupt Vector (463) Converter Standard Hardware Interrupt Vector (464) Video Decoder Standard Hardware Interrupt Vector (465) Encoder Standard Hardware Interrupt Vector (466) Memory Card Interface Standard Hardware Interrupt Vector (467) Universal Serial Bus Interface Standard Hardware Interrupt Vector (468) Interrupt Shield register (469) and logic gate (4691) or logic gate (4692) non-maskable interrupt signal (47) audio multiplexer (48) video multiplexer (49) transport stream multiplexer (5) encoding (6) Converter (7) Signal output device 20 1295435 (71) Multiplex standard sound processor (72) Video buffer (8) External control unit (9) Clock generation unit 21