TWI294167B - Ceramic substrate - Google Patents

Ceramic substrate Download PDF

Info

Publication number
TWI294167B
TWI294167B TW95103058A TW95103058A TWI294167B TW I294167 B TWI294167 B TW I294167B TW 95103058 A TW95103058 A TW 95103058A TW 95103058 A TW95103058 A TW 95103058A TW I294167 B TWI294167 B TW I294167B
Authority
TW
Taiwan
Prior art keywords
ceramic substrate
ceramic
buried hole
substrate
hole
Prior art date
Application number
TW95103058A
Other languages
Chinese (zh)
Other versions
TW200729421A (en
Inventor
Wei Ting Chen
Yung Ping Wu
Shang Chieh Hou
Original Assignee
Darfon Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Darfon Electronics Corp filed Critical Darfon Electronics Corp
Priority to TW95103058A priority Critical patent/TWI294167B/en
Publication of TW200729421A publication Critical patent/TW200729421A/en
Application granted granted Critical
Publication of TWI294167B publication Critical patent/TWI294167B/en

Links

Landscapes

  • Structure Of Printed Boards (AREA)
  • Sewage (AREA)

Description

1294167 九、發明說明: 【發明所屬之技術領域】 本發明係有關於電路板技術’特別係關於陶究 【先前技術】 " 在半導體封裝領域中,由於陶瓷美 常數以及與半導體晶片特別切晶的介電 =數差’在要求高品質封裝時’陶㈣為 為了能-次生產複數個封裝體’通常將複 如 列=基板上,在封裝製程最彳= 易碎的特性,以刀具分割陶究基板時,容易造成反陶$ 的崩裂而使成形後的封裝體外觀不良,1 土板 較快且需耗費較多的時間。 $ /、耗損 請參考f 為—系列之侧視圖,係 知陶曼基板的分離製程。在陶-¾基板1的分割道處 有-凹槽2於表© 1 a上。錢行陶総板的分 ( 陶竟基板1的表面U靠於切物3上,凹槽2触於= 支樓物3中間,頂針4則在陶t基板1的另—相對口 與凹槽2對應之處’朝表面1a的方向對陶变基板Μ加库 力,該應力分別以兩個支撐物3為支點而產生不同;; 力矩,而在喊基板1受_針4賴之處產,生剪、 該剪應力在凹槽2發生應力集f著分破斷了而將1294167 IX. Description of the Invention: [Technical Fields of the Invention] The present invention relates to circuit board technology. [Specially related to ceramics [Prior Art] " In the field of semiconductor packaging, due to ceramic beauty constants and special dicing with semiconductor wafers Dielectric = difference in 'When high-quality packaging is required' (Tao (4) in order to be able to produce a plurality of packages in a sub-package' will usually be repeated on the substrate = on the substrate, in the final packaging process = fragile characteristics, with tool segmentation When the substrate is used, it is easy to cause the crack of the anti-pottery, and the appearance of the formed package is poor, and the soil plate is faster and takes a lot of time. $ /, loss Please refer to f for the side view of the series to know the separation process of the Tauman substrate. At the dividing lane of the ceramic-plate 1 there is a groove 2 on the table © 1 a. The branch of the money row ceramic plate (the surface U of the ceramic substrate 1 is on the cut object 3, the groove 2 touches the middle of the support object 3, and the thimble 4 is on the other opposite mouth and groove of the ceramic substrate 1 2 Correspondence 'to the surface of the surface 1a to add force to the ceramic substrate, the stress is different with the two supports 3 as the fulcrum;; the moment, while the substrate 1 is _ pin 4 , the shearing, the shear stress occurs in the groove 2, the stress set f is broken and will

0798-A21286TWF(N2);C05086;DWWANG 5 1294167 陶瓷基板1的封裝單元自其分離出來。 然而,隨著半導體裝置的尺寸不斷縮減,在陶炙參, 1的分離製程中的定位亦益加困難,而使有時頂針4辦 λ AC] 作用在與凹槽2對應之處。如第1A圖所示,當頂計4〆 作用位置偏左時,應力作用後所造成的破斷面5a的延神〆 會左偏;如第1B圖所示,當頂針4的作用位置偏多诗、 應力作用後所造成的破斷面5b的延伸就會右偏;而#參成 形後的封裝體外觀不良的問題。 公告於2005年6月28曰的US 6,910,473係揭嚴/參 切割陶瓷基板的生胚片的方法,其先將已形成線路詹的阑 瓷生胚片層疊之後,先以刀具切割成單一的封裝單元壤存 進行燒結,其不適用於前述一次生產複數個封裝體的情 公告於2004年9月7日的US 6,788,545、公告於如〇2 年η月19日的us 6,482,679、與公告於2〇〇〇 ^ 6月以 曰的US 6,079,099係揭露分別一種複合式電子元件,其存 板的生胚片設計複數個縱向與横向的分割道,炎揉 述分割道而實質上伸入兩側 數個介層孔,並在上述介# λ | 7〜早凡 的内部線路電性連接,將;陶二=料並祕 可曝露上述介層孔中的導電材料;::離S裝單元後, 上。該元件並不適用於以第U、1B㈤金屬封蓋銲於其 成封裝單元,否則分離時破斷面合會示的方式分離 2元的複數個介層孔而伸入對=兩側相鄰的封 形後的封裝體外觀不.良的問題。肖裝早元中,發生成 0赛A2崎卿獅〇86_鑛 1294167 【發明内容】 有嚴於此,本發明 — 在以施加應力的方H 的係提供一種陶£基板,可 板分離設備之間發基板時,即使陶·板與基 後的封裝體外觀^良 的問題,能夠減少或避免成形 為it忐4喊,而可提升製程良率。 板,包含.· ’本發明係提供一種陶竟基 —切口於上述分_道的=陶餘板》分為複數個單元; 道中、且於上述;^下1面;以及第—内埋孔於上述分割 本發明係又提供一種陶 陶变基片,上述陶莞基片分:’…層登的複數個 數個線路區,各陶竟基片的上;二:=其劃分為複 基板的分割道,各陶曼美M沾 Μ貝上重合而成該陶瓷 成上述陶嫩的_單==2亡重合而 於其線路lit#至卜In ^ =路層 叫通鄰近的兩個線路層;—切W上述分割道的表面; 以及第一内埋孔於上述分割道中、且於上述切口下方。 本發明的特徵在於在陶瓷基板的分割道中,設置内埋 孔於切口的下方,將陶瓷基板分離成複數個單元時,上述 内埋孔有助於導正破裂面的延伸方向,避免破裂面延伸至 汉有線路層的單元中,可在不更動現有製程設備的情形 下’避免分離後的單元發生外觀不良的問題。 【實施方式】 為讓本發明之上述和其他目的、特徵、和優點能更明0798-A21286TWF(N2); C05086; DWWANG 5 1294167 The package unit of the ceramic substrate 1 is separated therefrom. However, as the size of the semiconductor device continues to shrink, the positioning in the separation process of the ceramic ginseng, 1 is also difficult, and sometimes the thimble 4 is operated at the position corresponding to the groove 2. As shown in Fig. 1A, when the action position of the top gauge 4 is to the left, the extension of the fracture surface 5a caused by the stress will be left-biased; as shown in Fig. 1B, when the action position of the thimble 4 is biased The extension of the fractured section 5b caused by the multi-poetry and stress action will be right-biased; and the appearance of the package after the formation of the reference is poor. US 6,910,473, issued June 28, 2005, is a method for uncovering the green sheets of a ceramic substrate, which is first formed by laminating the enamel green sheets of the line Zhan, and then cutting into a single package with a cutter. The unit is soiled for sintering, and it is not suitable for the above-mentioned production of a plurality of packages at a time. US 6,788,545, published on September 7, 2004, announced on July 19, 2014, us 6,482,679, and announced at 2〇 〇〇^ The US 6,079,099 series in June reveals a composite electronic component, in which the green sheets of the plate are designed in a plurality of longitudinal and lateral divisions, and the segments are divided into several sections on the sides. Interlayer holes, and in the above-mentioned dielectric #λ | 7~ early internal wiring electrical connection, will; Tao II = material and secret can expose the conductive material in the above-mentioned interlayer holes;:: after the S-mounted unit, on . The component is not suitable for being soldered to the package unit by the U, 1B (5) metal cap. Otherwise, the separation of the cross-sections will be separated to form a plurality of via holes of 2 elements and extend into the pair = adjacent on both sides. The appearance of the package after the closure is not a good problem. In the Xiaozhao Zaoyuan, it takes place in the 0th game, A2, Qiqing, Griffin, 86_Mine 1294167. SUMMARY OF THE INVENTION The present invention is directed to providing a ceramic substrate, a plate separation device, in the system of applying stress H. When the substrate is printed between, even if the appearance of the ceramic plate and the package after the base is good, the formation can be reduced or avoided, and the process yield can be improved. The board comprises: · The invention provides a pottery base - the slit in the above-mentioned sub-channel = pottery board" is divided into a plurality of units; in the middle, and above; ^ 1 side; and the first - buried hole In the above division, the present invention further provides a ceramic pottery substrate, wherein the above-mentioned ceramics base sheet is divided into: a plurality of circuit areas of the '... layer, each of which is on the base of the ceramic substrate; and two: = divided into division paths of the complex substrate , each Taomanmei M dip on the mussels to form the ceramic into the above-mentioned pottery _ single == 2 dead recombination and in its line lit# to Bu In ^ = road layer called the adjacent two circuit layers; Cutting the surface of the dividing track; and the first buried hole in the dividing lane and below the slit. The invention is characterized in that, in the dividing lane of the ceramic substrate, the buried hole is disposed below the slit, and when the ceramic substrate is separated into a plurality of units, the buried hole helps to guide the extending direction of the rupture surface and avoid the extension of the rupture surface In the unit to the Han line layer, the problem of poor appearance of the separated unit can be avoided without changing the existing process equipment. [Embodiment] The above and other objects, features, and advantages of the present invention will become more apparent.

0798-A21286TWF(N2);C05086;DWWANG 7 1294167 顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳 - 細說明如下: , 凊參考第2A、2B圖,為一系列之剖面圖,係分別顯 示本發明較佳實施例之陶瓷基板1〇〇、1〇〇,。 在弟2A圖所繪不的陶竟基板1 〇〇中,其包含一分割道 101將其劃分為複數個單元102。一切口 115則設於分割道 101的表面,在以施加應力的方式分離陶瓷基板10〇時, 會在切口 115處發生應力集中的現象,切口 Π5通常具有 • 朝下的尖端處,可成為破斷面的起始點,並導引其延伸方 向。弟一内埋孔13 5則設於分割道1 〇 1中,且位於切口 115 的下方。而在第2B圖的陶瓷基板1〇〇,中,則又更包含一 第二内埋孔155於分割道101中,且位於第一内埋孔135 的下方。 陶瓷基板100、100,通常為多層基板,例示於第2A、 2B圖的陶瓷基板100、100’則包含層疊的陶瓷基片n〇、 120、130、140、150、與160。請注意陶瓷基片的數量方 鲁面’本發明所屬技術領域具有通常知識者可視其需求加以 增減’雨不應以第2A、2B圖所、纟會示者為限。 在陶瓷基片110中,其具有一分割區111將其劃分為 複數個線路區112,在線路區112中的至少一個表面(本實 施例中為上表面)上設有一線路層114,其藉由貫穿陶瓷基 片110的一導通孔113電性連接至下層的線路層。在本實 施例中,線路層114的至少部分接點(未繪示)可用以電性 連接一外部元件例如半導體晶片、光主動元件、被動元伟、0798-A21286TWF(N2); C05086; DWWANG 7 1294167 It is to be understood that the preferred embodiments are described below, and the detailed description is as follows with reference to the accompanying drawings: 凊 Referring to Figures 2A and 2B, The cross-sectional views of the series show the ceramic substrates 1〇〇, 1〇〇, respectively, of the preferred embodiment of the present invention. In the ceramic substrate 1 which is not depicted in Figure 2A, it includes a dividing track 101 which is divided into a plurality of cells 102. A slit 115 is provided on the surface of the dividing passage 101, and when the ceramic substrate 10 is separated by applying stress, stress concentration occurs at the slit 115, and the slit Π 5 usually has a tip portion facing downward, which can be broken. The starting point of the section and guide its direction of extension. The inner buried hole 13 5 is disposed in the dividing lane 1 〇 1 and below the slit 115. Further, in the ceramic substrate 1A of Fig. 2B, a second buried hole 155 is further included in the dividing lane 101 and located below the first buried hole 135. The ceramic substrates 100 and 100 are usually multilayer substrates, and the ceramic substrates 100 and 100' illustrated in Figs. 2A and 2B include laminated ceramic substrates n, 120, 130, 140, 150, and 160. Please note that the number of ceramic substrates is the same as that of those skilled in the art, and the general knowledge may be increased or decreased according to their needs. The rain should not be limited to those shown in Figures 2A and 2B. In the ceramic substrate 110, it has a divisional region 111 which divides it into a plurality of wiring regions 112, and at least one surface (upper surface in this embodiment) of the wiring region 112 is provided with a wiring layer 114, which A via hole 113 penetrating through the ceramic substrate 110 is electrically connected to the underlying wiring layer. In this embodiment, at least some of the contacts (not shown) of the circuit layer 114 can be used to electrically connect an external component such as a semiconductor wafer, a light active component, a passive element,

0798-A21286TWF(N2);C05086;DWWANG 1294167 區m中或其他種頬的外部元件。切口 ii5則設於分割 伸至其下的視需求切口 115亦可以貫穿陶莞基片110而延 穿陶竟基片:基片例如陶編120,亦可以未完全貫 萨數瓷基片120中,其具有-分割區121將其劃分為 複數個線路區丨 施例中為上表 :路區122中的至少-個表面(本實 與線路層有'線路層124,其藉由導通孔113 10 生連接,並藉由貫穿陶瓷基片120的一導 通孔1231性連接至下層的線路層。 ,叙”基片130中,其具有-分割區131將其劃分為 稷數:線路區132,在線路區132中的至少—個表面(本實 :列為上表面)上設有—線路層134,其藉由導通孔123 124電性連接’並藉由貫穿陶竟基片13〇的一導 t孔133包性連接至下層的線路層。第一内埋孔135則設 於分割區131中。 ,在陶瓷基片140中,其具有一分割區141將其劃分為 ,數個線路區142,在線路區142中的至少一個表面(本實 細例中為上表面)上設有一線路層144,其藉由導通孔133 與線路層134電性連接,並藉由貫穿陶瓷基片14〇的一導 通孔143電性連接至下層的線路層。 在陶甍基片150中’其具有一分割區ι51將其劃分為 複數個線路區152,在線路區152中的至少一個表面(本實 鈀例中為上表面)上設有一線路層154,其藉由導通孔143 與線路層144電性連接,並暮由貫穿陶瓷基片15〇的一導0798-A21286TWF(N2); C05086; DWWANG 1294167 External element in zone m or other species. The slit ii5 is disposed on the under-demand slit 115 extending therethrough and can also extend through the ceramic substrate 110 and extend through the ceramic substrate: the substrate, for example, the ceramic tile 120, or the ceramic substrate 120, which may not be completely The having-dividing area 121 divides it into a plurality of line areas. In the embodiment, at least one surface in the road area 122 (the real and the circuit layer have a 'circuit layer 124, which is formed by the via hole 113 10 Connected and connected to the underlying wiring layer by a via hole 1231 extending through the ceramic substrate 120. In the substrate 130, it has a-divided area 131 which is divided into turns: a line region 132, in the line At least one surface (in this case: listed as the upper surface) of the region 132 is provided with a wiring layer 134 electrically connected by the via hole 123 124 and by a conductive trace through the ceramic substrate 13 The hole 133 is inductively connected to the underlying wiring layer. The first buried via 135 is disposed in the dividing region 131. In the ceramic substrate 140, it has a dividing region 141 to divide it into a plurality of wiring regions 142. A wiring layer 144 is disposed on at least one surface (the upper surface in the present embodiment) of the wiring region 142, The via layer 133 is electrically connected to the circuit layer 134, and is electrically connected to the underlying wiring layer by a via hole 143 extending through the ceramic substrate 14A. In the ceramic substrate 150, it has a partition ι51. Divided into a plurality of line regions 152, a circuit layer 154 is disposed on at least one surface of the circuit region 152 (the upper surface of the present palladium example), and is electrically connected to the circuit layer 144 through the via holes 143, and a guide through the ceramic substrate 15〇

0798-A21286TWF(N2);C05086;DWWANG 9 1294167 甩性連接至下層的線路層。在繪示於第2B圖的 究土板1〇〇中,則在分割區152設有一第二内埋孔u卜0798-A21286TWF(N2); C05086; DWWANG 9 1294167 Connected to the underlying circuit layer. In the soil panel 1B shown in Fig. 2B, a second buried hole is provided in the dividing area 152.

if ^基片16G巾,其具有—分割區161將其劃分為 π線路區162,在線路區152 f的兩個表面上,則分 別叹有線路層⑹與⑹。線路層刚係藉由導通孔⑸ 與線路層154電性連接,並藉由貫穿陶£基片·的一導 通孔163電性連接至下層的線路層165。在本實施例中, 線路層165的至少部分接點(未繪示)可用以電性連接一外 #件例如半導體晶片、光主動元件、被動元件、一電路 板、或其他種類的外部元件。 另外’各陶莞基片對應的線路區112、122、132、142、 b2、與162實質上重合而成為陶瓷基板1〇〇、1〇〇,的單元 102,而各陶瓷基片對應的分割區111、121、131、141、 151、與161實質上重合而成為陶瓷基板1〇〇、1〇〇,的分割 道 101。If the substrate 16G towel has a division area 161 which divides it into π line areas 162, on both surfaces of the line area 152f, the circuit layers (6) and (6) are respectively sighed. The wiring layer is electrically connected to the wiring layer 154 through the via hole (5), and is electrically connected to the underlying wiring layer 165 through a via hole 163 extending through the substrate. In this embodiment, at least some of the contacts (not shown) of the circuit layer 165 can be used to electrically connect an external component such as a semiconductor wafer, a light active device, a passive component, a circuit board, or other kinds of external components. Further, the circuit regions 112, 122, 132, 142, b2, and 162 corresponding to the respective ceramic substrates are substantially overlapped to form the cells 102 of the ceramic substrate 1 〇〇, 1 ,, and the division regions 111 corresponding to the respective ceramic substrates 121, 131, 141, 151, and 161 are substantially overlapped to form a divided track 101 of the ceramic substrate 1〇〇, 1〇〇.

請參考第3圖,為一側視圖,係顯示本發明之陶瓷基 板100的分離製程。在執行陶瓷基板1〇〇的分離時,係使 陶兗基板100中切口 115所在的表面靠於支撐物3上,切 口 115則位於兩個支撐物3中間,頂針4則在陶瓷基板1〇〇 的另一相對表面上與切口 115對應之處,朝切口 115所在 表面的方向對陶瓷基板1〇〇施加應力,該應力分別以兩個 支撐物3為支點而產生不同方向的力矩,而在陶瓷基板100 受到頂針4作用之處產生剪應力,該剪應力在切口 115發 生應力集中而沿著分割道破斷,破裂秦170勝自切口 L1SReferring to Fig. 3, a side view showing the separation process of the ceramic substrate 100 of the present invention. When the separation of the ceramic substrate 1 is performed, the surface of the ceramic substrate 100 where the slit 115 is located is placed on the support 3, the slit 115 is located between the two supports 3, and the thimble 4 is placed on the ceramic substrate 1 On the other opposite surface corresponding to the slit 115, a stress is applied to the ceramic substrate 1 in the direction of the surface of the slit 115, and the stress is generated by the two supports 3 as fulcrums, respectively, in the ceramic. The substrate 100 is subjected to shear stress by the action of the ejector pin 4, and the shear stress is concentrated in the slit 115 and is broken along the dividing path, and the rupture Qin 170 wins from the slit L1S.

0798-A21286TWF(N2);C05086;DWWANG 1294167 的尖端處開始向下延伸。受惠於分割道101中的第一内埋 孔135,即使陶瓷基板100與基板分離設備之間發生定位 上的間題,而使頂針4的作用在分割道101以外偏右的位 置如第3圖所示或偏左時,即使破裂面170在向下延伸的 過程中,稍微偏左或偏右,而在破裂面170的延伸未超出 分割道101的範圍時,便延伸至下方的第一内埋孔135, 與破裂面170相連的第一内埋孔135便可導正破裂面 170。此時由切口 115至第一内埋孔135的裂口則導引破裂 面170在上述剪應力的作用下,持續以近乎與陶瓷基板100 的兩表面垂直的方向向下延伸,直到貫穿陶瓷基板100。 其結果’破裂面170的延伸實質上未超出分割道101的範 圍,避免破裂面170延伸至設有線路層的單元102中,避 免分離後的單元102發生外觀不良的問題。 另外’在執行陶瓷基板100’的分離時,由於其在第一 内埋孔135下方的分割道1〇1中,多設置了 一第二内埋孔 155,可更加強導正破裂面170的延伸的功效。 請參考第2A、2B圖,在陶瓷基板100、100,的製程中, 第一内埋孔135可與導通孔133同時形成,兩者可實質上 並列於同一水平上。而第一内埋孔135内較好為實質上未 填入任何凝態物質,而實質上為一空孔,以便其發揮最佳 的導正破裂面延伸的功效。 同理,第2B圖中的第一内埋孔155可與導通孔153 同時形成,兩者可實質上並列於同一水平上。而第〆内埋 孔155内較好為實質上未;填入任,何凝應:物質,而實質上為0798-A21286TWF(N2); C05086; DWWANG 1294167 begins to extend downward at the tip end. Benefiting from the first buried hole 135 in the dividing lane 101, even if the positioning problem occurs between the ceramic substrate 100 and the substrate separating device, the position of the ejector pin 4 outside the dividing lane 101 is the third position. When shown in the figure or to the left, even if the rupture surface 170 is slightly left or right during the downward extension, and when the extension of the rupture surface 170 does not exceed the range of the segment 101, it extends to the first below. The buried hole 135 and the first buried hole 135 connected to the rupture surface 170 can guide the rupture surface 170. At this time, the slit from the slit 115 to the first inner hole 135 guides the fracture surface 170 to continue downward in a direction substantially perpendicular to both surfaces of the ceramic substrate 100 under the above-mentioned shear stress until the ceramic substrate 100 is penetrated. . As a result, the extension of the fracture surface 170 does not substantially extend beyond the range of the dividing passage 101, and the fracture surface 170 is prevented from extending into the unit 102 in which the wiring layer is provided, thereby avoiding the problem of poor appearance of the separated unit 102. In addition, when performing the separation of the ceramic substrate 100', since the second buried hole 155 is provided in the dividing lane 1〇1 below the first buried hole 135, the guiding fracture surface 170 can be further strengthened. The effect of extension. Referring to FIGS. 2A and 2B, in the process of the ceramic substrates 100 and 100, the first buried vias 135 may be formed simultaneously with the vias 133, and the two may be substantially juxtaposed on the same level. Preferably, the first buried hole 135 is substantially not filled with any condensed matter, but is substantially a hole so that it can exert the best effect of extending the rupture surface. Similarly, the first buried via 155 in FIG. 2B can be formed simultaneously with the via 153, and the two can be substantially juxtaposed on the same level. The inner hole 155 of the second crucible is preferably substantially not; if it is filled, he should be: substance, but substantially

0798-A21286TWF(N2);C05086;DWWANG 11 1294167 一空孔,以便其發揮最佳的導正破裂面延伸的功效。 另外,第2A、2B圖所示的第一内埋孔135與切口 115 的距離較好為不大於陶瓷基板100、100,總厚度的二分之 一。當第一内埋孔135與切口 115的距離大於陶瓷基板 =0、100總厚度的二分之一時,在例如第3圖所示的分離 製耘中,破裂面170就有可能延伸至分割道101以外的單 元102中,而無法延伸至第一内埋孔135與其相連,此時 第一内埋孔135就有可能無法發揮其導正破裂面延伸的功 .效。而第一内埋孔135的寬度Wi較好為不大於〇.3mm, 當第一内埋孔135的寬度Wi大於〇.3mm時,第3圖所示 的破裂面穿過第一内埋孔135向下延伸的向左或向右的偏 移幅度可能加大,而使破裂面170就有可能延伸至分割道 101以外的單元1〇2中。 同理,第2A、2B圖所示的第二内埋孔155與第一内 埋孔135的距離較好為不大於陶瓷基板1〇〇,總厚度的二分 之一;而第二内埋孔155的寬度W2較好為不大於0.3mm。 & 接下來,第4A〜4D圖為一系列的剖面圖,係顯示本發 明之陶瓷基板100的製造流程。 第2A、2B圖所示的陶瓷基片110、120、130、140、 150、與160的製造可分別、同時進行,在層疊而成多層的 陶瓷基板100。在第4A〜4C圖中,係陶瓷基片130以為例, 說明各陶瓷基片的製造。其他陶瓷基片110、120、140、 150、與160的製造,亦與第4A〜4C圖所示者相似。 在第4A圖中,首先提供一陶奏生胚、片(gmen sheet):0798-A21286TWF(N2); C05086; DWWANG 11 1294167 A hole so that it can exert the best effect of guiding the extension of the fracture surface. Further, the distance between the first buried hole 135 and the slit 115 shown in Figs. 2A and 2B is preferably not more than one-half of the total thickness of the ceramic substrates 100 and 100. When the distance between the first buried hole 135 and the slit 115 is greater than one-half of the total thickness of the ceramic substrate=0, 100, in the separation system shown in FIG. 3, for example, the fracture surface 170 may extend to the division. In the unit 102 other than the track 101, it is not possible to extend to the first buried hole 135 to be connected thereto. At this time, the first buried hole 135 may not be able to exert its function of extending the positive fracture surface. The width Wi of the first buried hole 135 is preferably not more than 〇3 mm. When the width Wi of the first buried hole 135 is greater than 〇.3 mm, the rupture surface shown in FIG. 3 passes through the first buried hole. The offset to the left or right of the downward extension of 135 may be increased, and it is possible for the fracture surface 170 to extend into the unit 1〇2 outside the division lane 101. Similarly, the distance between the second buried hole 155 and the first buried hole 135 shown in FIGS. 2A and 2B is preferably not more than one-half of the total thickness of the ceramic substrate, and the second buried portion. The width W2 of the hole 155 is preferably not more than 0.3 mm. & Next, the 4A to 4D drawings are a series of sectional views showing the manufacturing flow of the ceramic substrate 100 of the present invention. The ceramic substrates 110, 120, 130, 140, 150, and 160 shown in Figs. 2A and 2B can be produced separately and simultaneously, and the multilayer ceramic substrate 100 can be laminated. In the 4A to 4C drawings, the ceramic substrate 130 is taken as an example to explain the manufacture of each ceramic substrate. The manufacture of other ceramic substrates 110, 120, 140, 150, and 160 is similar to that shown in Figures 4A-4C. In Figure 4A, a ceramic gem sheet is first provided:

0798-A21286TWF(N2);C05086;DWWANG 12 1294167 230’其上已預定出分割區131與線路區η]的位置。陶瓷 .生胚片230為第2A圖所示的陶瓷基片13〇的前身,經過 ..後述的共燒(c〇fire)步驟之後,即可成為陶瓷基片13〇。而 在其他陶瓷基片110、120、140、15〇、與16〇的製造方面, 亦與陶瓷基片130相同,分別以陶瓷生胚片21〇、22〇、24〇、 25〇、與260為前身,可參考第4D圖。 接下來請參考第4B圖,依照第2A圖所示的線路層134 的佈局,以機械鑽孔、雷射鑽孔、或其他方法,在線路區 ,13-^成貝牙孔2〇3,其為導通孔133的前身。同時以相同 方法在分割區131形成一貫穿孔,作為第一内埋孔135。 在其他陶瓷基片110、120、140、150、與160的製造方面, 除了未在各自的分割區形成貫穿孔以外,則與前述步驟相 似。另外在製造第2B圖所示的陶瓷基板1〇〇,時,陶究基 片150的製造,則與陶瓷基片130相似,同時在其分割區 151形成一貫穿孔作為第二内埋孔155。 然後晴參考第4C圖,分別將一導電層例如銅及/或其 他金屬形成於陶瓷生胚片230的表面上與貫穿孔233内(請 參考第4B圖),再予以圖形化而形成線路層I%與導通孔 133。另外在第一内埋孔135内,較好為實質上未填入任何 凝態物質。在其他陶瓷基片110、12〇、HO、15〇、與16〇 的製造方面,則與前述步驟相似。 接下來請參考第4D圖,將完成上述製程的陶瓷生肱片 210、220、230、240、250、與260的對應的各分割區與線 路區對準後層疊在r起;,施以層壓的氟程後.,成為燒結前0798-A21286TWF(N2); C05086; DWWANG 12 1294167 230' where the position of the divided area 131 and the line area η] has been predetermined. Ceramic. The green sheet 230 is the precursor of the ceramic substrate 13A shown in Fig. 2A, and after the co-firing step described later, the ceramic substrate 13 can be formed. In the manufacture of other ceramic substrates 110, 120, 140, 15〇, and 16〇, the same as the ceramic substrate 130, respectively, ceramic green sheets 21〇, 22〇, 24〇, 25〇, and 260 For the predecessor, please refer to the 4D picture. Next, please refer to FIG. 4B, according to the layout of the circuit layer 134 shown in FIG. 2A, by mechanical drilling, laser drilling, or other methods, in the line area, 13-^ into the dental hole 2〇3, It is the front body of the via hole 133. At the same time, a uniform perforation is formed in the divisional region 131 in the same manner as the first buried hole 135. In the manufacture of the other ceramic substrates 110, 120, 140, 150, and 160, the steps are similar except that the through holes are not formed in the respective divided regions. Further, in the case of manufacturing the ceramic substrate 1 shown in Fig. 2B, the ceramic substrate 150 is manufactured similarly to the ceramic substrate 130, and a uniform perforation is formed in the divided portion 151 as the second buried hole 155. Then, referring to FIG. 4C, a conductive layer such as copper and/or other metal is formed on the surface of the ceramic green sheet 230 and the through hole 233 (refer to FIG. 4B), and then patterned to form a circuit layer. I% and via 133. Further, in the first buried hole 135, it is preferred that substantially no condensed matter is filled. In the manufacture of other ceramic substrates 110, 12, HO, 15 〇, and 16 ,, the steps are similar to those described above. Next, referring to FIG. 4D, the ceramic green sheets 210, 220, 230, 240, 250, and 260 of the above process are aligned with the line regions and then stacked on the r; After the pressure of the fluorine process, before the sintering

0798-A21286TWF(N2);C05086;DWWANG 13 1294167 的陶瓷基板100。然後在陶瓷基板100的上表面的分割道 - 101中,形成切口 115。Ceramic substrate 100 of 0798-A21286TWF(N2); C05086; DWWANG 13 1294167. Then, in the dividing lane - 101 of the upper surface of the ceramic substrate 100, a slit 115 is formed.

; 最後,使用已知的共燒製程燒結之後,即形成第2A 圖所示的陶瓷基板100。另外,在陶瓷基片150的分割區 151形成一貫穿孔作為第二内埋孔155時,則形成第2B圖 所示的陶莞基板100’。 綜上所述,本發明係提供一種陶瓷基板,將其分離成 複數個單元時,可實質上避免破裂面延伸至設有線路層的 • 單元中,可在不更動現有製程設備的情形下,避免分離後 的單元發生外觀不良的問題,係達成上述本發明之目的。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。Finally, after sintering using a known co-firing process, the ceramic substrate 100 shown in FIG. 2A is formed. Further, when the divided portion 151 of the ceramic substrate 150 is formed as a continuous hole as the second buried hole 155, the pottery substrate 100' shown in Fig. 2B is formed. In summary, the present invention provides a ceramic substrate which can be substantially prevented from extending to a unit provided with a circuit layer when separated into a plurality of units, without changing the existing process equipment. The object of the present invention is achieved by avoiding the problem of poor appearance of the unit after separation. While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

0798-A21286TWF(N2);C05086;DWWANG 14 1294167 【圖式簡單說明】 • 第ΙΑ、1B圖為一系列之側視圖,係顯示習知陶瓷基 „ 板的分離製程。 第2A、2B圖為一系列之剖面圖,係顯示本發明較佳 實施例之陶瓷基板。 第3圖為一侧視圖,係顯示本發明之陶瓷基板的分離 製程。 第4A〜4D圖為一系列的剖面圖,係顯示本發明之陶瓷 _ 基板的製造流程。 【主要元件符號說明】 1〜陶瓷基板 la〜表面 lb〜表面 2〜凹槽 3〜支撐物 4〜頂針 5a〜破斷面 5b〜破斷面 100〜陶瓷基板 100’〜陶瓷基板 101〜分割道 102〜單元 110〜陶瓷基片 111〜分割區 112〜線路區 113〜導通孔 114〜線路層 115〜切口 120〜陶瓷基片 121〜分割區 122〜線路區 123〜導通孔 124〜線路層 130〜陶瓷基片 131〜分割區 132〜線路區 133〜導通孔 134〜線路層0798-A21286TWF(N2);C05086;DWWANG 14 1294167 [Simple description of the diagram] • The first and second diagrams are a series of side views showing the separation process of the conventional ceramic base. The 2A and 2B diagrams are The cross-sectional view of the series shows a ceramic substrate according to a preferred embodiment of the present invention. Fig. 3 is a side view showing the separation process of the ceramic substrate of the present invention. Figs. 4A to 4D are a series of cross-sectional views showing The manufacturing process of the ceramic _ substrate of the present invention. [Main component symbol description] 1 ~ ceramic substrate la ~ surface lb ~ surface 2 ~ groove 3 ~ support 4 ~ thimble 5a ~ broken section 5b ~ broken section 100 ~ ceramic Substrate 100' to ceramic substrate 101 to division 102 to unit 110 to ceramic substrate 111 to division 112 to line region 113 to via 114 to circuit layer 115 to slit 120 to ceramic substrate 121 to division 122 to line region 123 to via 124 to circuit layer 130 to ceramic substrate 131 to division 132 to line region 133 to via 134 to circuit layer

0798-A21286TWF(N2);C05086;DWWANG 15 1294167 135〜第一内埋孔 - 141〜分割區 ; 143〜導通孔 150〜陶瓷基片 152〜線路區 154〜線路層 160〜陶瓷基片 162〜線路區 • 164〜線路層 170〜破斷面 220〜陶瓷生胚片 233〜貫穿孔 250〜陶瓷生胚片 140〜陶瓷基片 142〜線路區 144〜線路層 151〜分割區 153〜導通孔 155〜第二内埋孔 161〜分割區 163〜導通孔 165〜線路層 210〜陶瓷生胚片 230〜陶瓷生胚片 240〜陶瓷生胚片 260〜陶瓷生胚片0798-A21286TWF(N2); C05086; DWWANG 15 1294167 135~ first buried hole - 141~ partition; 143~ via 150~ ceramic substrate 152~ line region 154~ wiring layer 160~ ceramic substrate 162~ Area 164 to circuit layer 170 to broken section 220 to ceramic green sheet 233 to through hole 250 to ceramic green sheet 140 to ceramic substrate 142 to line area 144 to line layer 151 to division area 153 to conduction hole 155 Second buried hole 161 to divided region 163 to conductive via 165 to circuit layer 210 to ceramic green sheet 230 to ceramic green sheet 240 to ceramic green sheet 260 to ceramic green sheet

0798-A21286TWF(N2);C05086;DWWANG 160798-A21286TWF(N2); C05086; DWWANG 16

Claims (1)

1294167 十、申請專利範圍: ; 1.一種陶瓷基板,包含: * 一分割道將該陶瓷基板劃分為複數個單元; 一切口於該分割道的表面;以及 第一内埋孔於該分割道中、且於該切口下方。 2.如申請專利範圍第1項所述之陶瓷基板,更包含至 少二導電層藉由兩者之間的一導通孔電性連接,該第一内 埋孔實質上與該導通孔並列於同一水平上。 _ 3.如申請專利範圍第1項所述之陶瓷基板,其中該第 一内埋孔與該切口的距離不大於該陶瓷基板總厚度的二分 — ° 4. 如申請專利範圍第1項所述之陶瓷基板,其中該第 一内埋孔的寬度不大於〇.3mm。 5. 如申請專利範圍第1項所述之陶瓷基板,更包含一 第二内埋孔於該分割道中、且於該第一内埋孔下方。 6. 如申請專利範圍第5項所述之陶瓷基板,其中該第 _ 二内埋孔與該第一内埋孔的距離不大於該陶瓷基板總厚度 的二分之一。 7. 如申請專利範圍第5項所述之陶瓷基板,其中該第 二内埋孔的寬度不大於0.3mm。 8. —種陶瓷基板,包含: 層疊的複數個陶瓷基片,該些陶瓷基片分別具有一分 割區將其劃分為複數個線路區,各陶瓷基片的分割區實質 上重合而成該陶瓷基板的分割道,各陶瓷基片的對應的線 0798-A21286TWF(N2);C05086;DWWANG 17 1294167 路區貝處上重合而成該陶t基板的複數 片具有-線路層於其線路區中的至少一表面、與 於其線路區中用以導通鄰近的兩個線路層; 一切口於該分割道的表面;以及 第一内埋孔於該分割道中、且於該切口下方。 9.如申請專利翻帛8項所述之㈣基板,其中該第 一内埋孔係位於該切口下方的其中一陶瓷基片的分割區 中 〇 10·如申請專利範圍第9項所述之陶瓷基板,其中該第 一内埋孔係實質上貫穿其所在的該陶瓷基片。 Π·如申請專利範圍第8項所述之陶瓷基板,其中該第 一内埋孔與該切口的距離不大於該陶瓷基板總厚度的二分 之一0 12·如申請專利範圍第8項所述之陶瓷基板,其中該第 一内埋孔的寬度不大於〇.3mm。 13·如申請專利範圍第9項所述之陶莞基板,更包含一 第二内埋孔於該分割道中、且於該第一内埋孔下方的其中 一陶瓷基片的分割區中。 14·如申請專利範圍第13項所述之陶瓷基板,其中該 第二内埋孔係實質上貫穿其所在的該陶莞基片。 15.如申请專利範圍弟13項所述之陶兗基板,其中該 第二内埋孔與該第一内埋孔的距離不大於該陶瓷基板總厚 度的二分之一。 16·如申清專利乾圍弟13項所述之陶兗基板,其中該 0798-A21286TWF(N2);C05086;DWWANG 18 1294167 第二内埋孔的寬度不大於0.3mm。1294167 X. Patent application scope: 1. A ceramic substrate comprising: * a dividing lane dividing the ceramic substrate into a plurality of units; a slit in a surface of the dividing lane; and a first buried hole in the dividing lane, And below the incision. 2. The ceramic substrate of claim 1, further comprising at least two electrically conductive layers electrically connected by a via hole therebetween, the first buried via being substantially juxtaposed with the via hole Horizontally. The ceramic substrate according to claim 1, wherein the distance between the first buried hole and the slit is not more than two cents of the total thickness of the ceramic substrate - ° 4. As described in claim 1 The ceramic substrate, wherein the width of the first buried hole is not more than 〇3 mm. 5. The ceramic substrate of claim 1, further comprising a second buried hole in the dividing track and below the first buried hole. 6. The ceramic substrate of claim 5, wherein the distance between the first buried hole and the first buried hole is not more than one-half of the total thickness of the ceramic substrate. 7. The ceramic substrate of claim 5, wherein the second buried hole has a width of not more than 0.3 mm. 8. A ceramic substrate comprising: a plurality of laminated ceramic substrates, each of the ceramic substrates having a division region divided into a plurality of wiring regions, the ceramic regions of the ceramic substrates substantially overlapping to form the ceramic The dividing line of the substrate, the corresponding line of each ceramic substrate 0798-A21286TWF(N2); C05086; DWWANG 17 1294167, the overlapping area of the surrounding area of the ceramic substrate has a circuit layer in the line area thereof At least one surface, and two circuit layers adjacent to each other in the line region thereof; a slit is formed on a surface of the dividing track; and a first buried hole is in the lower portion of the dividing track. 9. The substrate according to claim 4, wherein the first buried hole is located in a divided region of one of the ceramic substrates below the slit. 10 is as described in claim 9 A ceramic substrate, wherein the first buried via is substantially through the ceramic substrate on which it is located. The ceramic substrate of claim 8, wherein the distance between the first buried hole and the slit is not more than one-half of the total thickness of the ceramic substrate. 12 12 as claimed in claim 8 The ceramic substrate, wherein the width of the first buried hole is not more than 〇3 mm. 13. The pottery substrate according to claim 9, further comprising a second buried hole in the partition and in a partition of one of the ceramic substrates below the first buried hole. The ceramic substrate of claim 13, wherein the second buried hole substantially penetrates the ceramic substrate on which it is located. 15. The ceramic substrate of claim 13, wherein the distance between the second buried hole and the first buried hole is not more than one-half of the total thickness of the ceramic substrate. 16· For example, the ceramic raft substrate described in the 13th patent of Shen Qing, in which the width of the second buried hole is not more than 0.3mm, the 0798-A21286TWF(N2); C05086; DWWANG 18 1294167. 0798-A21286TWF(N2);C05086;DWWANG 190798-A21286TWF(N2); C05086; DWWANG 19
TW95103058A 2006-01-26 2006-01-26 Ceramic substrate TWI294167B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW95103058A TWI294167B (en) 2006-01-26 2006-01-26 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW95103058A TWI294167B (en) 2006-01-26 2006-01-26 Ceramic substrate

Publications (2)

Publication Number Publication Date
TW200729421A TW200729421A (en) 2007-08-01
TWI294167B true TWI294167B (en) 2008-03-01

Family

ID=45068079

Family Applications (1)

Application Number Title Priority Date Filing Date
TW95103058A TWI294167B (en) 2006-01-26 2006-01-26 Ceramic substrate

Country Status (1)

Country Link
TW (1) TWI294167B (en)

Also Published As

Publication number Publication date
TW200729421A (en) 2007-08-01

Similar Documents

Publication Publication Date Title
JP6249548B2 (en) Multilayer microelectronic package having sidewall conductor and method of manufacturing the same
US9159648B2 (en) Wiring substrate and manufacturing method thereof
CN103178032B (en) Use the method for packaging semiconductor for penetrating silicon passage
CN104377116B (en) Prevent from generating the bottom substrate and its manufacturing method of flash in cutting process
US8368180B2 (en) Scribe line metal structure
US9064977B2 (en) Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
CN105374762B (en) Semiconductor chip structure and its manufacturing method to be cut
KR101476947B1 (en) Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices
CN105529300B (en) Dummy metal structure and the method for forming dummy metal structure
TW201125086A (en) Chip package and manufacturing method thereof
JP6531845B2 (en) Multilayer wiring board and probe card provided with the same
TW201251537A (en) Ceramic wiring substrate, multi-piece ceramic wiring substrate and method for manufacturing the same
JP2007095927A (en) Wiring board and its production method
TW201131697A (en) Substrate for electronic device stacked structure for electronic device electronic device and a method for manufacturing the same
CN103579145A (en) Through-silicon via interposer, method for manufacturing through-silicon via interposer, packaging substrate and method for manufacturing packaging substrate
KR20070004056A (en) Method for making chips and associated support
JP5567445B2 (en) Manufacturing method of ceramic multilayer wiring board
TWI294167B (en) Ceramic substrate
US20170040247A1 (en) Substrate core with effective through substrate vias and method for making the same
US8555492B2 (en) Method for manufacturing a conductive substrate structure with conductive channels formed by using a two-sided cut approach
US9316768B2 (en) Substrate for preventing burr generation
JP2009105326A5 (en)
WO2024004566A1 (en) Glass core laminate structure and production method for glass core laminate structure
CN2917190Y (en) Ceramic baseplate
US20220130771A1 (en) Substrate processing and packaging

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees