TWI294135B - Apparatus and method for driving of plasma display panel - Google Patents

Apparatus and method for driving of plasma display panel Download PDF

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Publication number
TWI294135B
TWI294135B TW91100535A TW91100535A TWI294135B TW I294135 B TWI294135 B TW I294135B TW 91100535 A TW91100535 A TW 91100535A TW 91100535 A TW91100535 A TW 91100535A TW I294135 B TWI294135 B TW I294135B
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Taiwan
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display panel
plasma display
waveform
voltage source
electrical signal
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TW91100535A
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Chinese (zh)
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Hoo Park Chung
Kim Dong-Hyun
Hyun Lee Sung
Kee Kim Young
Eun Heo Jeong
Hong Shin Joong
Jun Lee Ho
Kwan Lee Eung
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Lg Electronics Inc
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Publication of TWI294135B publication Critical patent/TWI294135B/en

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12941351294135

【發明之技術領域】 本發明係有關於電漿顯示面板之驅動裝置及方法, 特別是關於弱化初始化放電而降低暗部亮度,同時縮短 初始化時間且可以單一掃描之電漿顯示面板之驅動裝置 及方法。 ^ 【發明背景】 電漿顯示面板(?1821113〇丨5?137?3116 1;以下 稱▼ PDP )係藉由He+ Xe (氦與氤)或Ne+ Xe (氖與氣) 非活性混合瓦斯放電時發生的1 47nm之紫外線使螢光&發 光’而顯示包括文字或圖表之影像。該p D p不僅容易薄膜 化和大型化且最近的技術在提供大幅提昇之畫質方面不、 遺餘力。尤其,因為交流型三極式PDP放電時會在面板表 面蓄積電荷壁,保護電極等不受到因放電發生的賤射, 故具有低電壓驅動和壽命長之優點。 蒼照第1圖’交流型三極式PDP的放電胞具有在上部 基板(1 0)上形成的掃描電極(γ)及維持電極(z)二 和在下部基板(18)上形成的位址電極(χ)。 掃描電極(Y)及維持電極(Z)分別包含透明電極 (12Y、12Z),和具有比透明電極(ΐ2γ、12Z)線幅小 的線幅且在透明電極(1 2 Y、1 2 Z) —側緣形成之金屬匯 流排(Bus)電極(13Y、13Z)。透明電極(i2Y、12Z) 為透明電導性金屬,例如,用氧化銦錫(Indium_Tin_ Oxide:以下稱n ITOff)在上部基板(10)上形成。金屬 匯流排電極(1 3Y、1 3Z)則以鉻(Cr)等金屬在透明電BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device and method for a plasma display panel, and more particularly to a driving device and method for a plasma display panel that reduces initializing discharge and reduces brightness of a dark portion while shortening initialization time and capable of single scanning . ^ [Background of the Invention] The plasma display panel (?1821113〇丨5?137?3116 1; hereinafter referred to as "▼ PDP") is discharged by inactive mixing of He+Xe (氦 and 氤) or Ne+Xe (氖 and )) The resulting UV radiation of 1 47 nm causes the fluorescence & illumination to display an image including text or graphics. This p D p is not only easy to thin and large, but recent technologies have not spared much effort in providing a greatly improved image quality. In particular, since the AC type three-pole PDP discharges an electric charge wall on the surface of the panel, and the protective electrode or the like is not subjected to the emission due to the discharge, it has the advantages of low voltage driving and long life. FIG. 1 'The discharge cell of the alternating current type three-pole PDP has a scan electrode (γ) and a sustain electrode (z) formed on the upper substrate (10) and an address formed on the lower substrate (18). Electrode (χ). The scan electrode (Y) and the sustain electrode (Z) respectively comprise a transparent electrode (12Y, 12Z), and have a line width smaller than that of the transparent electrode (ΐ2γ, 12Z) and at the transparent electrode (1 2 Y, 1 2 Z) - Metal busbar electrodes (13Y, 13Z) formed by the side edges. The transparent electrode (i2Y, 12Z) is a transparent conductive metal, and is formed on the upper substrate (10) by, for example, indium tin oxide (Indium_Tin_Oxide: hereinafter referred to as n ITOff). The metal bus bar electrode (1 3Y, 1 3Z) is made of metal such as chromium (Cr) in transparent electricity.

第7頁 1294135 I五、發明說明(2) 〜____________ 極(12Y' 12Z)上形成且备主# |( 12Y、12Z)造成之電壓下&電阻高的透明電極 掃描電極(γ)及維持電極(z)並列形成的上部基 板(10)層疊有上"卩誘電層(14)和保護膜(丨6)。上 部誘電層(1 4)蓄積電漿放電時發生的電荷壁。保護膜 (16)防止電漿放電時發生的濺射損傷上部誘電層 (14),同時提高二次電子(secondary electrons)釋放 效率。且一般係使用氧化鎂(MS〇)當作保護膜(16)。 位址電極(X)與掃描電極(Y)及維持電極(Z)直 交。且在形成該位址電極(X)的下部基板(18)上形成 下部誘電層(2〇)和阻隔壁(22)。阻隔壁(22)與位 址電極(X)並列形成且防止因放電生成的紫外線及可視 光洩漏到鄰接的放電胞。下部誘電層(2 0)和阻隔壁 (2 2)的表面爹敷有螢光體(24)。螢光體(24)藉由 電漿放電時所虞生的紫外線而激發,產生紅色、綠色或 藍色中任一種 < 視光線。 在裝設在上/下部基板(1 0、1 8)和阻隔壁(2 2)之 間的放電胞之放電空間’注入用於放電之He+ xe或 Ne+ Xe非活性潞合瓦斯。 該構造之PDp胞的位址電極(X)係依據掃描電極 (γ)之間的相對放電而選擇後,藉由掃描電極(γ)及 維持電極(Z)之間的面放電而維持放電。在PDP胞藉由 維持放電時發生的紫外線以使勞光體(2 4)發光的方气 將可視光放出|功犯放電胞(c e 1 1)外部。其結果為具Page 7 1294135 I5, invention description (2) ~____________ The transparent electrode scan electrode (γ) and the high resistance and high resistance of the voltage generated by the electrode (12Y' 12Z) and the main # | (12Y, 12Z) The upper substrate (10) in which the electrodes (z) are juxtaposed is laminated with an upper "antimony electric layer (14) and a protective film (丨6). The upper trapping layer (14) accumulates the wall of charge that occurs when the plasma is discharged. The protective film (16) prevents spatter damage to the upper electric layer (14) caused by the discharge of the plasma while improving the secondary electrons release efficiency. Magnesium oxide (MS〇) is generally used as the protective film (16). The address electrode (X) is orthogonal to the scan electrode (Y) and the sustain electrode (Z). And a lower electric layer (2) and a barrier wall (22) are formed on the lower substrate (18) on which the address electrode (X) is formed. The barrier ribs (22) are formed in parallel with the address electrodes (X) to prevent ultraviolet rays and visible light generated by the discharge from leaking to adjacent discharge cells. The surface of the lower electric layer (20) and the barrier wall (22) is coated with a phosphor (24). The phosphor (24) is excited by the ultraviolet rays generated by the discharge of the plasma to produce any of red, green or blue < The He+xe or Ne+Xe inactive gas mixture for discharge is injected into the discharge space of the discharge cells disposed between the upper/lower substrate (10, 18) and the barrier wall (22). The address electrode (X) of the PDp cell of this structure is selected in accordance with the relative discharge between the scan electrodes (?), and the discharge is maintained by the surface discharge between the scan electrode (?) and the sustain electrode (Z). The ultraviolet rays generated by the PDP cell by sustaining the discharge cause the visible light of the luminous body (24) to emit visible light outside the discharge cell (c e 1 1). The result is

1294135 i三、發明說明(3) 電胞等之灣顯示影像。 4 丨次數,且在马傻:二ϊ持週期’即調節維持敌雷 sca〗e)。在,“象頬不牯頦現必要的灰階(Gray 電 Ρί)ρ為了顯現出灰階而用放 % (SUb〜fie】ds,SFs) 人數相兴的多數個子圖 f動位址與顯示分離(Address刀圖框(Fi*aflie)且以驅 ADS)的方式驅動。 11 display Separated^ 各子圖場分成初始化週期、 I例如,欲以25 6灰階顯示影像時,每錄週f及維持週期。 j U.^sec)以8個子圖場=八母咏、之圖框週期 为別再區分成記錄週期和維持;/ °同時,8個子圖場等 :始化週期及記錄週期在每隹處,各子圖場為 持週期在各子圖場以2n( n各子,%之同一反面而維 丨比例增加。如此一來, /、2、3、4、5、6' 7) |可顯現出影像之灰階。 圖%之維持週期會相異,故 參照第2圖,習知夕DT^n |用於在需要面板初期條件之= j致分為4個週期, ,,用於選擇玫電胞之.記錄週;,用:,供的重置週 數之灰階之維持週期,及 掉於頒現依據放電次 在初始化週期之前半初始^】率之熄滅週期。 及維持電極(ζ)維持在〇ν。° 中,位址電極(X) I維持電極(Ζ)施加具有從放顯示^,描電極(Υ)對 (Vs)缓缓朝向超過放電顯電之、姿以下之維持電極 < ^通電壓(Vr)方 第9頁 1294135 五、發明說明(4) 向的上昇斜坡電壓(第一斜坡^ (ramp 1)上昇之間,放電胞 =1)。上昇斜坡電厭 」(间㈢毛生被弱的初始化 〔Z)及知插電 上的保護膜(16)表面會形二朽因此,掃描電極 f位址電極(x)上的下部誘電體ί 71 (—)電壓壁’ ϊ ( z)上的保護膜(16) *面會。陽面及維持電 壁。 乂味極(+ )電壓 接下來的初始化之後半初始化動作 j + )電壓(Vz)供給到所有的維持電二:二正極性 有的掃描電極(Y)對維持電極(z)施^ H且在所 示電慶以下之維持電屢(Vs)緩緩傾向〇v;:=放電顯 坡電壓(第二斜坡ramp2)。下降斜坡電芦/ 、下降斜 降之間,又在放電胞之維持電極(z);;ur()Y; 之間發生媳滅放電。因此,掃描電極(γ) 膜(η)表面之陰極(—)電壓壁及維持電極'm 保護膜(16)表面之陽極(+ )電壓壁都會媳滅。且位勺 址電極(X)和掃描電極(γ)之間發生微;電,5 址電極(X)上的下部誘電體層(20)表面之陽極) 1電壓壁會調節到適合記錄週期之記錄放電的條件。 在記錄週期,首先掃描電極(Υ)維持在所定之正極 性(+ )電壓。接著,位址電極(X)中,在與選擇的放 電胞對應之位址電極(X)施加所定之正極性(+ )記錄 |脈衝(Vx),在該記錄脈衝(Vx)之同期,將偏離〇ν之”' |掃描脈衝(Vy)施加在掃描電極(Υ)。因此,在位址電 第10頁 1294135 五、發明說明(5) 1極(of)及掃插電極(Y)之Μ 2 〇)表面和掃描電極f ν/的交又部,Τ 電壓會將位址f ^ ^ f ( Υ)上的保^ 7部誘電體層 ,因此,在脈衝(':(20)表面之 叉部,所定之位址ίί及掃插電極 捋虿位(Z)與掃描 田電極 J人 掃描電極(Υ)上(/彳)及掃描電極(Υ)θ ‘ 5記錄放電。 電壓壁’而唯呆護膜(^表面ϋ的交又部之 L r 、、准持電極(Z)上的伴嘈^曰形成陽極(+ ) 丨陰極(~ )電壓壁。 遵膜(16)表面上二) 在維持週至 、, #面^形成 Z)之帝Π I先將掃描電極(Y)爲1294135 iIII. Description of invention (3) The bay of the cell, etc. displays images. 4 丨 times, and in the horse stupid: the second holding period ‘that is to maintain the enemy sca〗 e). In the "Gray electric Ρ ) ρ ρ ρ ρ ρ ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( Separate (Address *Fi*aflie and drive ADS). 11 display Separated^ Each subfield is divided into initialization cycles, I. For example, if you want to display images in 25 6 grayscale, each recorded week and Maintain the period. j U.^sec) with 8 subfields = eight mothers, the frame period is divided into recording periods and maintenance; / ° at the same time, 8 subfields, etc.: the initialization period and the recording period are At each turn, each sub-field has a period of 2n (n, n, and the same negative side of each sub-field increases the proportion of the voxes. Thus, /, 2, 3, 4, 5, 6' 7 The gray level of the image can be displayed. The maintenance period of the graph % will be different. Therefore, referring to Fig. 2, the DT^n | is used to determine the initial condition of the panel = j is divided into 4 cycles, For selecting the cell of the cell. Recording week;, with:, the sustain period of the gray level of the reset period, and the drop of the release according to the discharge time before the first half of the initialization cycle The initial ^] rate of the extinguishing period. And the sustain electrode (ζ) is maintained at 〇ν.°, the address electrode (X) I sustaining electrode (Ζ) is applied with the display, the electrode (Υ) pair (Vs) The sustain electrode is gradually turned to the position above the discharge display voltage. ^T voltage (Vr) side, page 9 1294135 5. Description of the invention (4) The rising ramp voltage (the first ramp ^ (ramp 1) rises) Between, the discharge cell = 1). The rising slope is electrically anomalous (the (three) hair is weakly initialized [Z) and the surface of the protective film (16) on the plug-in is shaped to be second, therefore, the scanning electrode f address electrode ( x) Upper lower electric body ί 71 (-) Voltage wall ' ϊ ( z) Protective film (16) * Face will. The sun and the wall are maintained. The 乂 极 (+) voltage is initialized after the next half initialization operation j + ) The voltage (Vz) is supplied to all of the sustaining power two: the second positive polarity of the scan electrode (Y) is applied to the sustain electrode (z) In the case of the electric power below, the sustaining frequency (Vs) is gradually inclined to 〇v;: = the discharge ramp voltage (second ramp ramp2). Between the falling ramps, the falling ramps, and the annihilation discharge between the sustaining electrodes (z); ur()Y; Therefore, the cathode (-) voltage wall on the surface of the scan electrode (γ) film (η) and the anode (+) voltage wall on the surface of the sustain electrode 'm protective film (16) are quenched. And the micro-electrode occurs between the address electrode (X) and the scanning electrode (γ); the anode of the surface of the lower electric conductor layer (20) on the 5th electrode (X)) 1 The voltage wall is adjusted to the record suitable for the recording period The conditions of discharge. During the recording cycle, the scanning electrode (Υ) is first maintained at a predetermined positive polarity (+) voltage. Next, in the address electrode (X), a predetermined positive polarity (+) recording|pulse (Vx) is applied to the address electrode (X) corresponding to the selected discharge cell, and at the same time as the recording pulse (Vx), The scan pulse (Vy) is applied to the scan electrode (Υ). Therefore, in the address page, page 10, 1294135. 5, invention description (5) 1 pole (of) and sweep electrode (Y) Μ 2 〇) the surface and the intersection of the scan electrode f ν / , the Τ voltage will be located on the address f ^ ^ f ( Υ) on the 7 layer of the electric conductor layer, therefore, in the pulse (': (20) surface The fork, the specified address ίί and the sweep electrode clamp (Z) and the scanning field electrode J human scan electrode (Υ) (/彳) and the scan electrode (Υ) θ '5 record discharge. Voltage wall ' Only the film of the film (the surface of the surface of the ϋ 又 L L , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , In the maintenance of Zhouzhi, #面^形成Z) Emperor I first scan electrode (Y)

Vsus) %輪产供持认在0V。然後,將陽極(+ f持電極 ,丨因此,在發:記=;:;以V維持電 護膜(16)表面和維】,掃描電極(/】)。 I間之電壓為加曾紀錄$電極(z)上的保護膜(〗a勺保 I的保護膜(::期蓄積的蓄積在掃插電極(f面 ΙΐΞϋ 護膜(16)表面之陰極(Λ在維待 %過放電_不雷廢。 、 )電壓辟, 胞藉由輪流施加的唯拄在,用依據記錄放電選擇的 拄=的維持脈衝(vsus)而發生維持;^ ϊ电 德滅週期,在維持電極(z)以二放電人 士 Y 1向的陽極(+ )熄滅斜坡波形(Ve) 。ϋ μ缓緩 寸,^生維持放電之放電胞,掃描電極(γ)上的 的保護 第11頁 1294135 五、發明說明(6) 膜(1 6)表面和維牲 陽極(+ )電题辟4電極(z)上的保護膜(16)表面之 此,發生維持i二二力D算到熄滅斜坡波形(Ve)。因 (Y)之間發生敌電胞的維持電極(Z)和掃描電極 在掃描電極\ Ϊ的熄滅放電。因此,維持放電之蓄積 壓壁和蓄積在維持電:保護7膜卜(丄6)表面之陰極(-)電 極(”電壓壁都;;= 止的保護膜(1…之陽 第3圖的電壓f PDPf動方法中的初始化週期,從如 Ramp:以下稱” V #M皮壓供給部(v〇Hage controUed 參照第3圖,CR )供給斜坡波形。 描電極(Y)二:給部具有面板,即並列連接在掃 形供給部(3 2)。幵斜坡波形供給部(3 0)及下降斜坡波 在維持電壓(= j 3〇)係生成上昇斜坡波形, 有對應控制訊號二=方向上昇到導通(Vr),具 和裝設在第1開關坡波形之第1開關(Q1), 制訊號供給部(Γ ς τ、 《極端及源極端之間的第1控 (Q1)之閘極端及且裝設有並列連接在第1開關 (R1) 。 I l LSI)之間的第1電阻 第1開關(Ω (、 VDD)。第4丨士 %〆亟端連接有共通電壓源 第1開關(〇ι)Ί Λ 5;b t、給部(CS1)將控制訊號供給到 <閘極鈿且負責開關。 ΜVsus) % round production is recognized at 0V. Then, the anode (+f holds the electrode, 丨, therefore, in the hair: remember =;:; maintain the surface and dimension of the electric film (16) with V), scan the electrode (/). The voltage between the two is the record Protective film on the electrode (z) (a) a protective film of the spoon I (:: accumulation of accumulating in the electrode of the sweeping electrode (f face 护 film (16) on the surface (Λ in the maintenance of over-discharge _ No, the voltage is broken, the cell is applied by the turn-on, and is maintained by the sustain pulse (vsus) according to the record discharge selection; ^ ϊ 德 灭 period, at the sustain electrode (z) The anode (+) of the two discharge person Y 1 is extinguished by the ramp waveform (Ve). ϋ μ is slow, and the sustaining discharge is performed on the discharge cell, and the protection on the scan electrode (γ) is page 11 1294135. (6) The surface of the membrane (1 6) and the surface of the protective film (16) on the electrode (z) of the electrode (1), the occurrence of the maintenance of the second and second force D is calculated to the waveform of the extinguishing ramp (Ve) The sustain electrode (Z) of the enemy cell between the (Y) and the extinguishing discharge of the scan electrode at the scan electrode \ 。. Therefore, the accumulation wall and the accumulation of the sustain discharge In the maintenance of electricity: protection of the 7 film (丄6) surface of the cathode (-) electrode ("voltage wall are;; = the protective film (1 ... the anode of the voltage diagram of the third figure of the voltage f PDPf dynamic method, The ramp waveform is supplied from, for example, Ramp: hereinafter referred to as "V #M skin pressure supply unit (v〇Hage controUed, see Fig. 3, CR). Trace electrode (Y) 2: the feed portion has a panel, that is, connected in parallel to the scan supply portion (3 2). The ramp waveform supply unit (3 0) and the falling ramp wave generate a rising ramp waveform at the sustain voltage (= j 3〇), and there is a corresponding control signal 2 = direction rise to conduction (Vr), with and The first switch (Q1) of the waveform of the first switching slope is provided, and the signal supply unit (Γ τ τ, the gate of the first control (Q1) between the extreme and the source terminal is connected in parallel. 1 switch (R1) I l LSI) The first resistor 1st switch (Ω (, VDD). The 4th gentleman %〆亟 is connected to the common voltage source 1st switch (〇ι) Ί Λ 5; Bt, the donor (CS1) supplies the control signal to the <gate and is responsible for the switch.

第12頁 1294135 ;五、發明說明(7) I 第1電容器(C1)及第1電阻(R1)依據RC時之正數 |值設定通過第1開關(Q1)流到面板之電壓。即,依據RC |時之正數值而供應到面板之上昇斜坡波形會朝向所定方 向上昇。因此,如第2圖圖示之重置(reset)波形,從 共通電壓源(VDD)供給之電壓會如第2圖圖示之重置波 形,從維持電壓(Vs)朝向所定方向上昇到4 0 0 V之導通 (V r)。然後,以大約4 0 0 V之導通電壓(V r)的電位下 降到大約180V的維持電壓(Vs)時,第1開關(Q1)之閘 極端及源極端之間會發生大約-7 0 V之反向電壓而損傷第1 開關(Q1),但為了防止其發生而與第1電阻(R1)並列 裝設有第1二極體(D1)。 因此,依據第1電阻(R1)和第1電容器(C1)之RC 充電時間,將具有一定方向之上昇斜坡波形供給到面 板。 下降斜坡波形供給部(32)係在維持電壓(Vs)朝向所 定方向生成下降到接地電位(GND)之下降斜坡波形,具 有對應控制訊號且將下降斜坡波形切換到顯示面板之第2 開關(Q2),和裝設在第2開關(Q2)之閘極端及源極端 之間的第2控制訊號供給部(CS2)。且裝設有並列連接 在第2開關(Q2)之閘極端及汲極端之間的第2電容器 (C2)及閘極端和第2控制訊號供給部(CS2)之間的第2 電阻(R2)。 第2開關(Q2)之汲極端連接在面板,源極端連接在 接地電壓源。第2控制訊號供給部(CS2)將控制訊號供Page 12 1294135 ; V. INSTRUCTIONS (7) I The first capacitor (C1) and the first resistor (R1) set the voltage that flows through the first switch (Q1) to the panel based on the positive value of RC. That is, the rising ramp waveform supplied to the panel based on the positive value of RC | will rise toward the specified direction. Therefore, as shown in the second diagram of the reset waveform, the voltage supplied from the common voltage source (VDD) will rise from the sustain voltage (Vs) to the predetermined direction as shown in the reset waveform shown in FIG. 0 0 V is turned on (V r). Then, when the potential of the turn-on voltage (V r) of about 4,000 V drops to a sustain voltage (Vs) of about 180 V, approximately -7 0 V occurs between the gate terminal and the source terminal of the first switch (Q1). The first switch (Q1) is damaged by the reverse voltage, but the first diode (D1) is mounted in parallel with the first resistor (R1) in order to prevent this from occurring. Therefore, a rising ramp waveform having a certain direction is supplied to the panel based on the RC charging time of the first resistor (R1) and the first capacitor (C1). The falling ramp waveform supply unit (32) generates a falling ramp waveform that drops to the ground potential (GND) toward the predetermined direction in the sustain voltage (Vs), has a corresponding control signal, and switches the falling ramp waveform to the second switch of the display panel (Q2) And a second control signal supply unit (CS2) installed between the gate terminal and the source terminal of the second switch (Q2). And a second resistor (C2) connected in parallel between the gate terminal and the drain terminal of the second switch (Q2) and a second resistor (R2) between the gate terminal and the second control signal supply portion (CS2) . The 开关 terminal of the second switch (Q2) is connected to the panel, and the source terminal is connected to the ground voltage source. The second control signal supply unit (CS2) will provide control signals for

1294135 I三、發明說明(8) 給到ϊ 2ΐϋ JQ2)之閑極端且負責開關。 山第2電容器(C2)及第2電阻(R2)依據RC時之正數 值1设定通過第2開關(Q2)流到面板之電壓。即,依據 RC時之正數值使供給到面板之下降斜坡波形朝向所定方 ^下降三因此’如第2圖圖示之重置波形,下降斜坡波形 會以所定方向從維持電壓(Vs)下降到接地電位 ^ GND)。然後’以大約ι8〇ν下降到接地電位(GnD) ^ ’在第2開關(Q2)之閘極端及源極端之間會發生大 $ -70V的反向電壓而損傷第2開關(Q2),但為了防止其 ♦生而與第2電阻(R2)並列裝設有第2二極體(D2)。 因此,依據第2開關(Q2)之可變電阻和汲極端及閘 極端之間的第2電容器(C2)之RC充放電時間,供給到面 板之電壓會朝向一定方向減少。 該利用從VCR供給部供給的電壓控制型上昇及下降斜 坡波形之方式,使斜坡時間變長且缓緩地增加斜坡電壓 ί *藉由一面減少一面反覆發生弱放電的方式’可在放 电空間上形成電壓壁及空間電荷且降低紀錄電壓。而此 種初始化週期減少背景光的方式,具有可以改善暗房對 比之優點。 果、仁疋’使斜坡時間變長就會增加初始化週期。其結 1 維持週期減少且亮度減少。萬一,為了減少初始化 $,而縮短斜坡時間時,放電電流增加且放電胞内會因 姑轭加在相反極性之電壓和電壓壁間之間隙電壓而在斜 波形發生震動減少(Oscillati〇n)的現象。因此,會1294135 I III. Description of invention (8) Give the 极端 2ΐϋ JQ2) the idle extreme and be responsible for the switch. The mountain second capacitor (C2) and the second resistor (R2) set the voltage that flows through the second switch (Q2) to the panel based on the positive value of RC. That is, according to the positive value of RC, the falling ramp waveform supplied to the panel is lowered toward the predetermined square. Therefore, as shown in the reset waveform shown in FIG. 2, the falling ramp waveform is lowered from the sustain voltage (Vs) in the predetermined direction. Ground potential ^ GND). Then 'falls to approximately ι8〇ν to ground potential (GnD) ^ 'A large reverse voltage of $ -70V occurs between the gate and source terminals of the second switch (Q2), damaging the second switch (Q2), However, in order to prevent this, the second diode (D2) is mounted in parallel with the second resistor (R2). Therefore, the voltage supplied to the panel decreases in a certain direction in accordance with the RC charge and discharge time of the varistor of the second switch (Q2) and the second capacitor (C2) between the 汲 terminal and the gate terminal. By using the voltage-controlled rising and falling ramp waveforms supplied from the VCR supply unit, the ramp time is lengthened and the ramp voltage is gradually increased. ** The method of reducing the weak discharge on one side can be reduced on the discharge space. Voltage wall and space charge are formed and the recording voltage is lowered. This type of initialization cycle reduces the background light and has the advantage of improving darkroom contrast. If you make the ramp time longer, the initialization cycle will increase. Its junction 1 has a reduced sustain period and reduced brightness. In case, in order to reduce the initialization time, the ramp current is shortened, and the discharge current is increased and the shock is reduced in the oblique waveform due to the gap voltage between the voltage of the opposite polarity and the voltage wall in the discharge cell (Oscillati〇n). The phenomenon. Therefore, will

第14頁 1294135 五、發明說明(9) 產生由於放電而致使背景光增加且放電變成不安定狀 態,導致記錄失敗的問題。 因此,勢必需要有一種新的驅動方法,可藉由放電 胞附加而控制放電電流的方式代替施加供應與放電胞附 加變動無關之電波波形的VCR方式,而能控制間隙電壓之 震動,並可一面增加背景光一面減少初始化時間。 【發明之目的及概述】 因此,本發明之目的在提供一種弱化初始化放電而 降低暗部亮度,同時縮短初始化時間且可以單一掃描之 電漿顯示面板之驅動裝置及方法。 為了達成前述目的,本發明之電漿顯示面板驅動裝 置,其特徵為具有偵測部,用於偵測從電壓源供給到顯 示面板之初始化波形電氣訊號;和控制部,用於控制依 據前述偵測到的電氣訊號而從前述電壓源供給到前述顯 示面板之初始化波形電氣訊號。 其中,前述控制部為配設在前述電壓源和前述顯示 面板之間的開關元件。而前述電氣訊號為電流及電壓中 任一種。並且前述電壓源為導通(set up)電壓源及斷 開(set down)電壓源中任一種。以及,前述偵測部為 裝設在前述控制部和前述顯示面板之間的電阻元件。還 有,前述電阻元件會調整供應到前述顯示面板之前述初 始化波形的上昇方向。此外,前述電阻元件會調整供應 到前述顯示面板之前述初始化波形的下降方向。另外, 更具備有裝設在前述電壓源和前述顯示面板之間的二極Page 14 1294135 V. INSTRUCTIONS (9) A problem arises in which the backlight is increased due to discharge and the discharge becomes unstable, resulting in failure of recording. Therefore, it is necessary to have a new driving method, which can control the discharge current by means of the discharge cell addition instead of applying the VCR mode of supplying the waveform of the wave irrespective of the additional variation of the discharge cell, and can control the vibration of the gap voltage. Increasing the background light reduces the initialization time. OBJECT AND SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a driving apparatus and method for a plasma display panel that weakens initializing discharge and reduces dark portion brightness while shortening initialization time and capable of single scanning. In order to achieve the foregoing object, a plasma display panel driving device of the present invention has a detecting portion for detecting an initial waveform electric signal supplied from a voltage source to a display panel, and a control portion for controlling the Detector according to the foregoing The measured electrical signal is supplied to the initial waveform electrical signal of the display panel from the voltage source. The control unit is a switching element disposed between the voltage source and the display panel. The aforementioned electrical signals are either current or voltage. And the aforementioned voltage source is any one of a set up voltage source and a set down voltage source. And the detecting unit is a resistive element mounted between the control unit and the display panel. Further, the resistive element adjusts the rising direction of the initializing waveform supplied to the display panel. Further, the resistive element adjusts the descending direction of the initializing waveform supplied to the display panel. In addition, a diode having a polarity between the voltage source and the display panel is further provided.

第15頁 1294135 I五、發明說明(10) 1體。最後,前述控制部更具備有前述開關元件之控制端 和裝設在前述顯示面板之間以控制前述開關元件的控制 訊號之供給部。 本發明之電漿顯示面板驅動裝置,並具有第1偵測 部,用於偵測導通電壓源、斷開電壓源和從前述導通電 壓源供給到顯示面板之第1初始化波形電氣訊號;第1控 制部,用於控制依據前述偵測到的電氣訊號而從前述導 通電壓源供給到前述顯示面板之第1初始化波形電氣訊 號;第2偵測部,用於偵測從前述斷開電壓源供給到顯示 面板之第2初始化波形電氣訊號;和第2控制部,用於控 制依據前述偵測到的電氣訊號而從前述斷開電壓源供給 到前述顯示面板之第2初始化波形電氣訊號。 其中,前述第1控制部為裝設在前述導通電壓源和前 述顯示面板之間的第1開關元件。其次,前述第2控制部 為裝設在前述斷開電壓源和前述顯示面板之間的第2開關 元件。再者,前述電氣訊號為電流及電壓中任一種。此 外,前述第1偵測部為裝設在前述第1控制部和前述顯示 面板之間的第1電阻元件。另外,前述第1電阻元件會調 整供應到前述顯示面板之前述第1初始化波形的上昇方 向。並且,前述第2偵測部為裝設在前述第2控制部和前 述斷開電壓源之間的第2電阻元件。尚且,前述第2電阻 元件會調整供應到前述顯示面板之前述第2初始化波形的 下降方向。再者,更具備有裝設在前述導通電壓源和前 述顯示面板之間的第1二極體。Page 15 1294135 I V. Description of invention (10) 1 body. Finally, the control unit further includes a control unit having the control unit of the switching element and a supply unit mounted between the display panel to control the control signal of the switching element. The plasma display panel driving device of the present invention has a first detecting portion for detecting a turn-on voltage source, a turn-off voltage source, and a first initializing waveform electrical signal supplied from the turn-on voltage source to the display panel; a control unit configured to control a first initialization waveform electrical signal supplied from the on-voltage source to the display panel according to the detected electrical signal; and a second detecting unit configured to detect the supply from the disconnected voltage source a second initialization waveform electrical signal to the display panel; and a second control unit for controlling a second initialization waveform electrical signal supplied from the disconnection voltage source to the display panel according to the detected electrical signal. The first control unit is a first switching element provided between the on-voltage source and the display panel. Next, the second control unit is a second switching element provided between the off voltage source and the display panel. Furthermore, the electrical signal is any one of current and voltage. Further, the first detecting unit is a first resistive element provided between the first control unit and the display panel. Further, the first resistive element adjusts the rising direction of the first initializing waveform supplied to the display panel. Further, the second detecting unit is a second resistive element provided between the second control unit and the disconnection voltage source. Further, the second resistance element adjusts a downward direction of the second initialization waveform supplied to the display panel. Further, the first diode is provided between the on-voltage source and the display panel.

第16頁 1294135 I五、發明說明(11) i 最後幾點,其一,更具備有裝設在前述斷開電壓源 |和前述顯示面板之間的第2二極體。其二,前述第1控制 部更具備有前述第1開關元件之控制端和裝設在前述顯示 面板之間的第1控制訊號供給部。其三,前述第2控制部 更具備有前述第2開關元件之控制端和裝設在前述顯示面 板之間的第2控制訊號供給部。 本發明之電漿顯示面板之驅動方法為,其中包括偵 測從電壓源供給到顯示面板的初始化波形電氣訊號之階 段;和控制依據前述偵測到的電氣訊號而從前述電壓源 供給到前述顯示面板的初始化波形電氣訊號之階段。 其中,前述電氣訊號為電流及電壓中之一種。其 次,前述電壓源為導通電壓源及斷開電壓源中任一種。 最後,控制前述初始化波形電氣訊號之階段在調整供應 到前述顯示面板之前述初始化波形的上昇方向及下降方 向中任一種。 本發明之電漿顯示面板驅動方法為,其中包括偵測 從導通電壓源供給到顯示面板的第1初始化波形電氣訊號 之階段、控制依據前述偵測到的電氣訊號而從前述導通 電壓源供給到前述顯示面板的第1初始化波形電氣訊號之 階段、偵測從斷開電壓源供給到前述顯示面板的第2初始 化波形電氣訊號之階段、控制依據前述偵測到的電氣訊 號而從前述斷開電壓源供給到前述顯示面板的第2初始化 波形電氣訊號之階段。 其中,前述第1及第2初始化波形之電氣訊號為電流Page 16 1294135 I5, invention description (11) i Last, first, there is a second diode installed between the aforementioned disconnection voltage source and the display panel. Second, the first control unit further includes a control terminal of the first switching element and a first control signal supply unit mounted between the display panels. Third, the second control unit further includes a control terminal of the second switching element and a second control signal supply unit provided between the display panels. The driving method of the plasma display panel of the present invention comprises: detecting a phase of initializing a waveform electrical signal supplied from a voltage source to the display panel; and controlling the supply of the electrical signal from the voltage source to the display according to the detected electrical signal The panel initializes the phase of the waveform electrical signal. Wherein, the electrical signal is one of current and voltage. Second, the voltage source is any one of a turn-on voltage source and a turn-off voltage source. Finally, the stage of controlling the initial waveform electric signal is adjusted in any one of a rising direction and a falling direction of the initializing waveform supplied to the display panel. The plasma display panel driving method of the present invention comprises: detecting a phase of the first initializing waveform electrical signal supplied from the on-voltage source to the display panel, and controlling the supply from the aforementioned on-voltage source according to the detected electrical signal to a stage of the first initialization waveform electrical signal of the display panel, detecting a phase of the second initialization waveform electrical signal supplied from the disconnection voltage source to the display panel, and controlling the disconnection voltage according to the detected electrical signal The source is supplied to the second initialization waveform electrical signal of the aforementioned display panel. Wherein, the electrical signals of the first and second initialization waveforms are current

第17頁 1294135 I三、發明說明(12) i及電壓之任一種。其次,控制前述第1初始化波形電氣訊 號之階段在調整供給到前述顯示面板之前述第1初始化波 形的上昇方向。最後,控制前述第2初始化波形電氣訊號 之階段在調整供給到前述顯示面板之前述第2初始化波形 的下降方向。 【發明之詳細說明】 除了前述目的以外,經由參照附圖等來說明本發明 適當之實施例,即可了解本發明之不同的目的及優點。 以下參照附帶本發明實施例之第4圖及第1 5 b圖並詳細說 明。 參照第4圖,本發明實施例之電漿顯示面板驅動裝置 具有電源部(3 6),和控制從電源部(3 6)供給到面板 (3 9)之放電電流且發生斜坡波形之斜坡波形供給部 (38) 〇 斜坡波形供給部(38)更具有用於偵測從電源部 (3 6)供給的電流之電流偵測部(4 1) (current detector),和依據偵測到的電流而控制從電源部(3 6) 供給到面板(39)的放電電流控制部(43)。 參照第5圖及第6圖,本發明第1實施例。電漿顯示面板之 上昇初始化波形的供給部(4 0)係以維持電壓(Vr e f) 朝向所定方向將上昇到導通電壓源(Vup)的導通電壓之 上昇初始化波形供給到面板,並具有對應控制訊號且將 從導通電壓源(Vup)供給的電壓切換到面板之開關 (5 Q 1 )、裝設在開關(5 Q 1)之源極端和面板之間的第1Page 17 1294135 IIII. Description of invention (12) Any of i and voltage. Next, the stage of controlling the first initializing waveform electrical signal adjusts the rising direction of the first initializing waveform supplied to the display panel. Finally, the stage of controlling the second initializing waveform electrical signal adjusts the falling direction of the second initializing waveform supplied to the display panel. DETAILED DESCRIPTION OF THE INVENTION In addition to the foregoing objects, various objects and advantages of the present invention will become apparent from the accompanying drawings. Hereinafter, reference will be made to Figs. 4 and 15b of the embodiment of the present invention and will be described in detail. Referring to Fig. 4, a plasma display panel driving device according to an embodiment of the present invention has a power supply portion (36), and a ramp waveform for controlling a discharge current supplied from a power supply portion (36) to a panel (39) and generating a ramp waveform. The supply unit (38) 〇 the ramp waveform supply unit (38) further has a current detector (4 1) for detecting the current supplied from the power supply unit (36), and based on the detected current The control is supplied from the power supply unit (36) to the discharge current control unit (43) of the panel (39). Referring to Figures 5 and 6, a first embodiment of the present invention will be described. The supply unit (40) of the rising initializing waveform of the plasma display panel supplies the rising voltage of the on-voltage of the on-voltage source (Vup) to the panel with the sustain voltage (Vr ef) toward the predetermined direction, and has a corresponding control Signal and switch the voltage supplied from the on-voltage source (Vup) to the switch of the panel (5 Q 1 ), the first terminal installed between the source terminal of the switch (5 Q 1) and the panel

1294135 五、發明說明(13) 電阻(5 R 1)、裝設在開關(5 Q 1)之閘極端及面板之間 用以將控制訊號供給到閘極端之控制訊號供給部 (5CS)。 * 開關(5Q1)由連接在導通電壓源(Vup)之汲極 端,和連接在供給導通控制訊號之閘極端及面板之源極 端構成。此處,開關(5Q1) —般使用場效電晶體 (FET)。 控制訊號供給部(5CS)將控制訊號供給到開關(5Q1) 之閘極端且負責開關。因此,開關(5 Q1)之閘極端和控 制訊號供給部(5 C S)之間裝設有弟2電阻(5R2)。 第1電阻(5R1)依據電阻值偵測通過開關(5Q1)流 到面板之電流而控制開關(5Q1)。依據第1電阻(5R1) 之電阻值控制供給到面板之電流,上昇初始化電壓壁就 具有所定之上昇方向。此處,第1電阻(5R1)可運用可 變電阻。 詳細說明之,即從控制訊號供給部(5CS)供給3〜4V 之電壓時,以開啟開關(5 Q1)的方式,從導通電壓源 (Vup)將直流電壓供給到面板。因此,面板會發生面板 放電,再藉由面板放電以流過放電電流的方式在第1電阻 (5 R1)兩端顯示電Μ下降。因此,開關(5 Q1)之閘極 端和源極端之間相對地發生電壓下降,開關(5 Q 1)就關 閉。因此,會以維持電壓(Vre f)朝向所定方向將上昇 到導通電壓源(Vup)的導通電壓之上昇初始化波形即供 給到面板。1294135 V. INSTRUCTIONS (13) A resistor (5 R 1) is provided between the gate terminal of the switch (5 Q 1) and the panel to supply a control signal to the control signal supply unit (5CS) of the gate terminal. * The switch (5Q1) is connected to the drain terminal of the on-voltage source (Vup) and to the gate terminal of the supply conduction control signal and the source terminal of the panel. Here, the switch (5Q1) generally uses a field effect transistor (FET). The control signal supply unit (5CS) supplies a control signal to the gate terminal of the switch (5Q1) and is responsible for the switch. Therefore, a resistor 2 (5R2) is provided between the gate terminal of the switch (5 Q1) and the control signal supply portion (5 C S). The first resistor (5R1) controls the switch (5Q1) by detecting the current flowing to the panel through the switch (5Q1) according to the resistance value. The current supplied to the panel is controlled according to the resistance value of the first resistor (5R1), and the rising initialization voltage wall has a predetermined rising direction. Here, the first resistor (5R1) can use a variable resistor. Specifically, when a voltage of 3 to 4 V is supplied from the control signal supply unit (5CS), a DC voltage is supplied from the on-voltage source (Vup) to the panel so that the switch (5 Q1) is turned on. Therefore, panel discharge occurs on the panel, and the power drop is displayed across the first resistor (5 R1) by discharging the discharge current through the panel. Therefore, a voltage drop occurs between the gate terminal and the source terminal of the switch (5 Q1), and the switch (5 Q 1) is turned off. Therefore, the initialization waveform is supplied to the panel with the sustain voltage (Vre f) rising toward the on-voltage of the on-voltage source (Vup) toward the predetermined direction.

第19頁 1294135 五、發明說明(14) 另一方面,更可裝設二極體,連接在斷開電壓源 (Vdn)和面板之間用於遮斷從面板供給的反向電流。 參照第7圖及第8圖,本發明第2實施例之電漿顯示面板之 下降初始化波形供給部(42)係以維持電壓(Vref)朝 向所定方向將下降到斷開電壓源(Vdn)的斷開電壓之下 降初始化波形供給到Φ板,並具有對應控制訊號且將供 給到面板的電壓切換到斷開電壓源(Vdn)之開關 (7Q1)、裝設在開關(7Q1)和斷開電壓源(Vdn)之間 的第1電阻(7R1)、裝設在開關.(7Q1)之閘極端及斷開 電壓源(Vdn)之間且將控制訊號供給到開關(7Q1)之 閘極端的控制訊號供給部(7CS)。 開關(7 Q 1)由連接在面板之汲極端,和連接在供給 導通控制訊號之閘極端及斷開電壓源(Vdn)之源極端構 成。此處,開關(7 Q1) —般使用場效電晶體(F E T)。 控制訊號供給部(7CS)將控制訊號供給到開關(7Q 1) 之閘極端且負責開關。因此,開關(7Q1)之閘極端和控 制訊號供給部(7CS)之間裝設有第2電阻(7R2)。 第1電阻(7R1)藉由電阻值偵測通過開關(7Q1)流 到面板之電流而控制開關(7 Q1)。再藉由第1電阻 (7 R 1)之電阻值控制供給到面板之電流,下降初始化電 壓壁就具有所定之下降方向。此處,第1電阻(7R1)可 運用可變電阻。 詳細說明之,即從控制訊號供給部(7CS)供給3〜4V 之電壓時,以開啟開關(7 Q1)的方式,使面板傳來的電Page 19 1294135 V. INSTRUCTIONS (14) On the other hand, a diode can be installed, connected between the disconnection voltage source (Vdn) and the panel to block the reverse current supplied from the panel. Referring to Fig. 7 and Fig. 8, the falling initialization waveform supply unit (42) of the plasma display panel according to the second embodiment of the present invention is lowered to the off voltage source (Vdn) with the sustain voltage (Vref) directed in a predetermined direction. The falling voltage is initialized to the Φ board, and has a corresponding control signal and switches the voltage supplied to the panel to the open voltage source (Vdn) switch (7Q1), the switch (7Q1), and the open voltage Control of the first resistor (7R1) between the source (Vdn), the gate terminal connected to the switch (7Q1) and the open voltage source (Vdn) and supplying the control signal to the gate terminal of the switch (7Q1) Signal supply unit (7CS). The switch (7 Q 1) consists of a terminal connected to the top of the panel and connected to the source terminal of the supply control signal and the source of the open voltage source (Vdn). Here, the switch (7 Q1) generally uses a field effect transistor (F E T). The control signal supply unit (7CS) supplies a control signal to the gate terminal of the switch (7Q 1) and is responsible for the switch. Therefore, a second resistor (7R2) is provided between the gate terminal of the switch (7Q1) and the control signal supply portion (7CS). The first resistor (7R1) controls the switch (7 Q1) by detecting the current flowing to the panel through the switch (7Q1) by the resistance value. Further, the current supplied to the panel is controlled by the resistance value of the first resistor (7 R 1), and the falling initialization voltage wall has a predetermined falling direction. Here, the first resistor (7R1) can use a variable resistor. Specifically, when a voltage of 3 to 4 V is supplied from the control signal supply unit (7CS), the power transmitted from the panel is turned on by opening the switch (7 Q1).

第20頁 1294135 j五、發明說明(15) 丨流流到斷開電壓源(Vdn)。因此,面板會發生面板放 電,再藉由面板放電以流過放電電流的方式在第1電阻 (7R1)兩端顯示電壓下降。因此,開關(7Q1)之閘極 端和源極端之間相對地發生電壓下降,開關(7Q1)就關 閉。因此,會以維持電壓(V r e f)朝向所定方向將下降 到斷開電壓源(Vdη)之斷開電壓下降各初始化波形供給 到面板。 另一方面,更可裝設二極體,連接在導通電壓源 (Vup)和面板之間用於遮斷從導通電壓源(Vup)供給 之反向電流。 參照第9圖,本發明第3實施例之電漿顯示面板之驅 動裝置具有在初始化週期用於將上昇波形供給到面板的 上昇初始化波形供給部(5 0),和上昇初始化波形之後 用於將下降初始化波形供給到面板的下降初始化波形供 給部(52)。 上昇初始化波形供給部(5 0)具有對應控制訊號且 將導通電壓源(Vup)供給的電壓切換到面板之第1開關 (9 Q1)、裝設在開關(9 Q1)之源極端和面板之間的第1 電阻(9R1)、裝設在第1開關(9Q1)之閘極端及面板之 間用以將控制訊號供給到閘極端之第1控制訊號供給部 (CS1)。 第1開關(9Q1)由連接在導通電壓源(Vup)之汲極 端,和連接在供給導通控制訊號之閘極端及面板之源極 端構成。此處,第1開關(9Q1) —般使用場效電晶體Page 20 1294135 j V. Description of the invention (15) The turbulent flow to the disconnected voltage source (Vdn). Therefore, the panel is discharged, and the voltage drop is displayed across the first resistor (7R1) by discharging the discharge current through the panel. Therefore, a voltage drop occurs between the gate terminal and the source terminal of the switch (7Q1), and the switch (7Q1) is turned off. Therefore, each of the initializing waveforms which are lowered to the off voltage of the off voltage source (Vdη) in the predetermined direction with the sustain voltage (V r e f) is supplied to the panel. On the other hand, a diode can be mounted, connected between the on-voltage source (Vup) and the panel for interrupting the reverse current supplied from the on-voltage source (Vup). Referring to Fig. 9, a driving device for a plasma display panel according to a third embodiment of the present invention has a rising initializing waveform supply portion (50) for supplying a rising waveform to a panel during an initialization period, and a rising initializing waveform for The falling initializing waveform is supplied to the falling initializing waveform supply unit (52) of the panel. The rising initializing waveform supply unit (50) has a corresponding control signal and switches the voltage supplied from the on-voltage source (Vup) to the first switch (9 Q1) of the panel, the source terminal of the switch (9 Q1), and the panel. The first resistor (9R1) is provided between the gate terminal of the first switch (9Q1) and the panel to supply a control signal to the first control signal supply unit (CS1) of the gate terminal. The first switch (9Q1) is connected to the drain terminal of the on-voltage source (Vup), and is connected to the gate terminal for supplying the conduction control signal and the source terminal of the panel. Here, the first switch (9Q1) generally uses a field effect transistor.

1294135 i三、發明說明(16) | [i FET) 〇 [ 第1控制訊號供給部(CS1)將控制訊號供給到第1開 j關(9 Q 1)之閘極端且負責開關。因此,第1開關(9 Q 1) 之閘極端和第1控制訊號供給部(CS 1)之間裝設有第2電 阻(9R2) 〇 第1電阻(9R1)依據電阻值偵測通過第1開關 (9Q1)流到面板之電流而控制第1開關(9Q1)。依據第 1電阻(9 R 1)之電阻值控制供給到面板之電流,上昇初 始化波形電壓就具有所定的上昇方向。此處,第1電阻 (9 R1)可運用可變電阻。 然後,更可裝設二極體,連接在導通電壓源(Vup) 和面板之間用於遮斷從導通電壓源(Vup)供給之反向電 流。 下降初始化波形供給部(5 2)具有對應控制訊號且 將供給到面板之電壓切換到斷開電壓源(Vdn)的第2開 關(9Q2)、裝設在第2開關(9Q2)和斷開電壓源 (Vdn)之間的第3電阻(9R3)、裝設在第2開關(9Q2) 之閘極端及斷開電壓源(Vdn)之間用以將控制訊號供給 到第1開關(9Q1)之閘極端的第2控制訊號供給部 (CS2)。 第2開關(9Q2)由連接在面板之汲極端,和連接在 供給導通控制訊號之閘極端及斷開電壓源(Vdn)之源極 端構成。此處,第2開關(9Q2) —般使用場效電晶體 (FET) 〇1294135 iIII. Invention description (16) | [i FET) 〇 [The first control signal supply unit (CS1) supplies the control signal to the gate of the first open j (9 Q 1) and is responsible for switching. Therefore, a second resistor (9R2) is disposed between the gate terminal of the first switch (9 Q 1) and the first control signal supply portion (CS 1). The first resistor (9R1) is detected by the resistance value according to the first value. The switch (9Q1) flows to the panel current to control the first switch (9Q1). The current supplied to the panel is controlled according to the resistance value of the first resistor (9 R 1), and the rising initializing waveform voltage has a predetermined rising direction. Here, the first resistor (9 R1) can be a variable resistor. Then, a diode can be mounted, connected between the on-voltage source (Vup) and the panel for interrupting the reverse current supplied from the on-voltage source (Vup). The falling initializing waveform supply unit (52) has a second switch (9Q2) corresponding to the control signal and switching the voltage supplied to the panel to the off voltage source (Vdn), the second switch (9Q2), and the off voltage The third resistor (9R3) between the source (Vdn), the gate terminal of the second switch (9Q2), and the off voltage source (Vdn) are used to supply the control signal to the first switch (9Q1). The second control signal supply unit (CS2) of the gate terminal. The second switch (9Q2) is composed of a terminal connected to the top of the panel, and a source connected to the gate terminal for supplying the conduction control signal and the voltage source for disconnecting (Vdn). Here, the second switch (9Q2) generally uses a field effect transistor (FET) 〇

1294135 I五、發明說明(17) 第2控制訊號供給部(CS2)將控制訊號供給到第2開 關(9Q2)之閘極端且負責開關。因此,第2開關(9Q2) 之閘極端和第2控制訊號供給部(CS2)之間裝設有第4電 阻(9R4)。 第3電阻(9R3)依據電阻值偵測通過第2開關 .(9Q2)流到面板之電流而控制第2開關(9Q2)。依據第 3電阻(9R3)之電阻值控制供給到面板之電流,下降初 始化波形電壓就具有所定的下降方向。此處,第3電阻 (9R3)可運用可變電阻。 然後,更可裝設二極體,連接在斷開電壓源(Vdn) 和面板之間用於遮斷從面板供給之反向電流。 依據該本發明第3實施例之電漿顯示面板之驅動裝 置,即從第1控制訊號供給部(CS1)供給3〜4V之電壓 時,以開啟第1開關(9Q1)的方式,將導通電壓源 (Vup)傳來的直流電流供給到面板。因此,面板會發生 面板放電’再措由面板放電以流過放電電流的方式在弟1 電阻(9 R 1)兩端顯示電壓下降。因此,第1.開關(9 Q 1) 之閘極端和源極端之間相對地發生電壓下降,第1開關 (9 Q 1)就關閉。因此,會以維持電壓(V r e f)朝向所定 方向將上昇到導通電壓源(Vup)之上昇初始化波形供應 到面板。 如此供铪到面板之上昇初始化波形之後,接著從第2 控制訊號供給部(CS2)供給3〜4V的電壓時,藉由開啟第 2開關(9Q2)的方式,使面板電流流到斷開電壓源1294135 I. INSTRUCTION DESCRIPTION (17) The second control signal supply unit (CS2) supplies a control signal to the gate terminal of the second switch (9Q2) and is responsible for switching. Therefore, a fourth resistor (9R4) is provided between the gate terminal of the second switch (9Q2) and the second control signal supply portion (CS2). The third resistor (9R3) detects the second switch (9Q2) by detecting the current flowing to the panel through the second switch (9Q2) according to the resistance value. The current supplied to the panel is controlled according to the resistance value of the third resistor (9R3), and the falling initializing waveform voltage has a predetermined falling direction. Here, the third resistor (9R3) can use a variable resistor. A diode can then be installed, connected between the disconnected voltage source (Vdn) and the panel to interrupt the reverse current supplied from the panel. According to the driving device for the plasma display panel of the third embodiment of the present invention, when the voltage of 3 to 4 V is supplied from the first control signal supply unit (CS1), the on-voltage is turned on by turning on the first switch (9Q1). The DC current from the source (Vup) is supplied to the panel. Therefore, the panel discharge occurs, and the panel discharges to discharge the discharge current to show a voltage drop across the resistor (9 R 1). Therefore, a voltage drop occurs between the gate terminal and the source terminal of the first switch (9 Q 1), and the first switch (9 Q 1) is turned off. Therefore, the rising initializing waveform rising to the on-voltage source (Vup) is supplied to the panel with the sustain voltage (V r e f) toward the predetermined direction. After supplying the voltage of 3 to 4 V from the second control signal supply unit (CS2), the panel current is caused to flow to the off voltage by turning on the second switch (9Q2). source

1294135 五、發明說明(18) (Vdn)。因此,面板會發生面板放電,再藉由面板放電 以流過放電電流的方式在第3電阻(9R3)兩端顯示電壓 下降。因此,第2開關(9Q2)之閘極端和源極端之間相 對地發生電壓下降,第2開關(9Q2)就關閉。因此,會 以維持電壓(Vref)朝向所定方向將下降到斷開電壓源 (Vdn)的斷開電壓之下降初始化波形供應到面板。 如此,本發明之電漿顯示面板之驅動裝置(以下 稱"CCR供應部")依據控制訊號經由輪流地開關的第1及 第2開關(9Q1、9Q2)使從導通電壓源(Vup)供給的電 壓利用第1及第3電阻(9R1、9R3)控制供給到面板的電 流之方式,將上昇或下降的初始化波形供給到面板之掃 描線。 如此,本發明之CCR供給部控制供給到面板之電流且控制 間隙電壓之震動,可一面減少背景光一面減少初始化時 間而提高對比。 第1 0圖(a)為顯示一般放電胞之等效電路圖,由電 容器(Cp)和二個齊納二極體(Zdl、Zd2)構成。此 處,二個齊納二極體(Zdl、Zd2)於21 0V會發生齊納崩 潰(Zener Breakdown) 〇 第1 0圖(b)及(c)之VCR及CCR波形為施加同一維 持電壓(Vref)及導通電壓源(Vup)。 從第1 0圖(b)之VCR來看,初始化波形係依據與放 電胞之附加變動無關的RC充放電而發生之波形。相反地 從第1 0圖(c)之CCR來看,在發生放電之時點可看見電1294135 V. Description of invention (18) (Vdn). Therefore, panel discharge occurs on the panel, and voltage drop occurs across the third resistor (9R3) by discharging the panel through the discharge current. Therefore, a voltage drop occurs between the gate terminal and the source terminal of the second switch (9Q2), and the second switch (9Q2) is turned off. Therefore, the initialization waveform of the falling voltage falling to the off voltage source (Vdn) is supplied to the panel with the sustain voltage (Vref) directed toward the predetermined direction. As described above, the driving device for the plasma display panel of the present invention (hereinafter referred to as "CCR supply unit") causes the slave voltage source (Vup) to be turned on via the first and second switches (9Q1, 9Q2) of the switch in accordance with the control signal. The supplied voltage is used to control the current supplied to the panel by the first and third resistors (9R1, 9R3), and the rising or falling initializing waveform is supplied to the scanning line of the panel. Thus, the CCR supply unit of the present invention controls the current supplied to the panel and controls the vibration of the gap voltage, thereby reducing the initialization time while reducing the background light and improving the contrast. Fig. 10(a) is an equivalent circuit diagram showing a general discharge cell, which is composed of a capacitor (Cp) and two Zener diodes (Zdl, Zd2). Here, the Zener diodes (Zdl, Zd2) will undergo Zener Breakdown at 21 0V. The VCR and CCR waveforms of Figures 10(b) and (c) are applied with the same sustain voltage ( Vref) and a turn-on voltage source (Vup). From the VCR of Fig. 10(b), the initial waveform is a waveform generated by RC charge and discharge irrespective of the additional variation of the discharge cell. Conversely, from the CCR of Figure 10 (c), electricity can be seen at the point of discharge.

1294135 五、發明說明(19) 壓波形(A)變化。這是以第1電阻(9R1、5R1)控制供 給電流而發生的。此時,CCR之放電電流量會比VCR時較 少 0 第1 1 ( a )、( b )圖為供給上昇初始化波形後,顯示以導通 電壓源(Vup)的導通電壓下降到維持電壓(Vref)時之 VCR及CCR的電壓波形和光波形。此處之光波形為藉由放 電電流而發生之光波形。 第1 1圖(a)中,習知之VCR電壓波形為以導通電壓 源(Vup)的導通電壓下降到維持電壓(Vref)時,因為 第3圖圖示之第1開關(Q1)之開關動作造成的雜音 (N〇 i s e)而自然地使阻尼(Damp i ng)現象顯示成光波 形(LW)。將自我熄滅(Se)放t之電流成分加在該光 波形(LW),就會發生如第12圖(a)之錯誤放電 (Misfiring)。 參照第1 2圖(a),可看見因為開關之雜音造成的阻 尼減少和自我熄滅(Se)放電所造成的錯誤放電以光波 形持續地偵測到不安定的高尖峰電壓(HP)。 這是因為縮短初始化週期而使上昇及下降之初始化 波形分別在2 0// s之間供給時,當供給上昇初始化波形 時,放電胞内的放電電流會急遽增加而發生過度放電, 造成電壓壁增加。因此,供給上昇初始化波形後,發生 自我熄滅(Se)放電現象而導致記錄失敗。 相反地,第1 2圖(b)中,本發明之CCR初始化波形 以導通電壓源(Vup)的導通電壓下降到維持電壓1294135 V. Description of invention (19) Pressure waveform (A) changes. This is caused by the supply of the first resistor (9R1, 5R1) to control the supply current. At this time, the amount of discharge current of the CCR will be less than that of the VCR. 1 1 ( a ), ( b ) shows the supply of the rising initializing waveform, and the on-voltage of the on-voltage source (Vup) is lowered to the sustain voltage (Vref). The voltage waveform and optical waveform of the VCR and CCR. The light waveform here is the light waveform generated by the discharge current. In Fig. 1(a), the conventional VCR voltage waveform is such that the on-voltage of the on-voltage source (Vup) drops to the sustain voltage (Vref), and the switching of the first switch (Q1) shown in Fig. 3 is performed. The resulting noise (N〇ise) naturally causes the damping phenomenon to be displayed as a light waveform (LW). When the current component of self-extinguishing (Se) is applied to the light waveform (LW), an error discharge (missing) as shown in Fig. 12(a) occurs. Referring to Fig. 22(a), it can be seen that the erroneous discharge caused by the noise reduction of the switch and the self-extinguishing (Se) discharge continuously detects the unstable high peak voltage (HP) in the light waveform. This is because when the initialization period is shortened and the rising and falling initializing waveforms are supplied between 20 and / s, respectively, when the rising initializing waveform is supplied, the discharge current in the discharge cell is suddenly increased and overdischarge occurs, causing the voltage wall. increase. Therefore, after the rising initializing waveform is supplied, a self-extinguishing (Se) discharge phenomenon occurs and the recording fails. Conversely, in Fig. 22(b), the CCR initialization waveform of the present invention drops to the sustain voltage with the turn-on voltage of the turn-on voltage source (Vup).

1294135 ;三、發明說明(20) U Vref)時,如第5圖及第9圖所圖示,由於第1開關 (5Q1、9Q1)之開關動作造成的雜音會自然地使阻尼現 象(Damp i ng)僅顯示成光波形(LW)而不會發生錯誤放 電。由於這是本發明之CCR供給部控制供給電流的方式, 故會限制如習知之VCR將自我熄滅(Se)放電之電流成分 加在光波形(LW)的情形,而如第12圖(b),顯示出安 定的光波形而不會顯示記錄失敗現象。 以下為參照第1 3 a圖至第1 5 b圖之實驗資料,比較本 發明之C C R和習知之V C R。 第1 3 a圖至第1 3 d圖係比較與上昇初始化波形之供給 時間20/z s、50// s、100// s、150# s分別相對的下降初 始化波形之供給時間(2 0" s、5 0 // s、1 0 0 // s、 15 0/z s)的背景光(VCR: Ή K、CCR: ι〇π)和維持週 期的全白色(ful 1 white) ( VCR: ” H、CCR: 〃·") 之變化。1294135 ; 3, invention description (20) U Vref), as shown in Fig. 5 and Fig. 9, the noise caused by the switching action of the first switch (5Q1, 9Q1) naturally causes the damping phenomenon (Damp i Ng) only shows the light waveform (LW) without erroneous discharge. Since this is the manner in which the CCR supply unit of the present invention controls the supply current, it limits the case where the conventional VCR applies a current component of the self-extinguishing (Se) discharge to the optical waveform (LW), as shown in Fig. 12(b). , shows a stable light waveform without showing the recording failure. The following is a comparison of the experimental data of Figs. 1 3 a to 15 b to compare the C C R of the present invention with the conventional V C R . The 1st to the 1st 3th graph compares the supply time of the falling initialization waveform with respect to the supply time of 20/zs, 50//s, 100//s, and 150# s of the rising initial waveform (2 0" s, 5 0 // s, 1 0 0 // s, 15 0/zs) background light (VCR: Ή K, CCR: ι〇π) and sustain period full white (ful 1 white) ( VCR: ” H, CCR: 〃·") changes.

第1 3圖中,上昇初始化波形之供給時間為2 0// s時,下降 初始化波形之供給時間愈短本發明之CCR背景光亮度就愈 顯示出比習知之VCR低,而下降初始化波形之供給時間為 2 s時,維持週期的全白色亮度顯示出比習知之VCR 高,且愈增加到5 0 // s、1 0 0 // s、1 5 0 # s愈顯示出和習知 之V C R類似。 第1 3b圖中,上昇初始化波形之供給時間為5 0// s 時,下降初始化波形之供給時間為2 0 // s、5 0 // s、 1 00/z s、1 50/z s全部都有時,本發明之CCR背景光亮度顯In Fig. 3, when the supply time of the rising initializing waveform is 20/s, the shorter the supply time of the falling initializing waveform, the more the CCR background light brightness of the present invention is lower than the conventional VCR, and the initializing waveform is lowered. When the supply time is 2 s, the full white brightness of the sustain period is higher than the conventional VCR, and the more it increases to 50 @ s, 1 0 0 // s, 1 5 0 # s, the more and the known VCR similar. In Fig. 1b, when the supply time of the rising initial waveform is 5 0/s, the supply time of the falling initial waveform is 2 0 // s, 5 0 // s, 1 00/zs, 1 50/zs Sometimes, the CCR background brightness of the present invention is bright.

1294135 ;五、發明說明(21) \ 示出比習知之VCR低,且維持週期的全白色亮度在所有的 時間都顯示出略微比VCR高。 第1 3 c圖及第1 3 d圖中,上昇初始化波形之供給時間 為1 0 0// s及1 5 0// s時,下降初始化波形之供給時間為 20/z s、50/z s、100// s、150// s全部都有時,背景光亮 度為本發明之CCR亮度顯示比習知之VCR低,且維持週期 的全白色亮度在所有時間都顯示略微比VCR高。 如第1 3圖所見,CCR和VCR所有的上昇及下降之初始 化波形供給時間愈短愈會強力放電而造成背景光亮度增 加,並得知CCR時之全體背景和亮度比VCR低。尤其,上 昇初始化波形之供給時間為2 0// s時,習知之V C R在發生 初始化放電後,由於放電急遽供應電柱而使放電胞内的 施加電壓及電壓壁間的間隙電壓發生震動,故背景光顯 示出比本發明之CCR高。相反地,本發明之CCR在發生初 始化放電後,亦因為會限制放電急遽供應電柱,故背景 光亮度顯示出比習知之V C R低。 在5 0# s〜1 5 0// s的時間之間供給的上昇初始化波形 之亮度,可看見VCR及CCR的結果幾乎相同。另一方面, 在VCR供給上昇及下降之初始化波形的時間全部為20// s 時,由於錯誤放電而使背景光亮度急遽上昇,可看見維 持週期之亮度減少。因此,由於背景光愈高則對比愈 低,故得知本發明之CCR的背景光因為比習知之VCR低, 因此對比提高。 第1 4圖為依據供給上昇及下降之初始化波形的時間1294135; V. Description of the Invention (21) \ shows that the VCR is lower than the conventional VCR, and the full white luminance of the sustain period shows slightly higher than the VCR at all times. In the 1st 3th and 13th graphs, when the supply time of the rising initial waveform is 1 0 0/s and 1 5 0/s, the supply time of the falling initial waveform is 20/zs, 50/zs, When both 100//s and 150//s are present, the brightness of the backlight is that the CCR brightness display of the present invention is lower than the conventional VCR, and the full white brightness of the sustain period is slightly higher than the VCR at all times. As seen in Figure 13, the shorter the initial supply of the CCR and VCR, the shorter the supply time of the initial waveform, the stronger the discharge will cause the background light to increase, and the overall background and brightness of the CCR will be lower than the VCR. In particular, when the supply time of the rising initializing waveform is 20/s s, the conventional VCR vibrates the applied voltage and the gap voltage between the voltage walls in the discharge cell after the initializing discharge occurs, so that the background is vibrated. The light shows a higher CCR than the present invention. Conversely, the CCR of the present invention exhibits a background light brightness that is lower than the conventional V C R after the initial discharge has occurred, because the discharge is urgently supplied to the column. The brightness of the rising initialization waveform supplied between the time of 5 0# s~1 5 0//s can be seen that the results of the VCR and the CCR are almost the same. On the other hand, when the initial waveform of the VCR supply rise and fall is all 20/s s, the brightness of the background light rises sharply due to the erroneous discharge, and the brightness of the sustain period can be seen to decrease. Therefore, since the contrast is lower as the background light is higher, it is found that the background light of the CCR of the present invention is lower because it is lower than the conventional VCR. Figure 14 shows the time of the initial waveform based on the rise and fall of the supply.

1294135 丨三、發明說明(22) i之對比。橫軸為下降初始化波形的供給時間等,左侧之 i 縱軸為上昇初始化波形的供給時間等,右側之縱軸為對 比0 第1 4圖中,供給上昇及下降之初始化波形的時間為 20// s、50/z s、100" s、150// s時,可看見對於習知 VCR 方式之對比比對於本發明CCR方式之對比低很多。尤其, 為了減少初始化週期而將供給上昇或下降之初始化波形 的時間全部減少至2 0/z s時,在不發生錯誤放電之區域, 本發明之CCR方式比習知之VCR的對比顯示出大約高 12% 。這是因為將供給上昇或下降之初始化波形的時間 全部減至20// s時,在VCR方式不會發生錯誤放電,故可 看見本發明之CCR的對比極高。 第1 5a圖為在同一背景光亮度比較VCR和CCR之初始化 波形的供給時間,橫轴為背景光,縱軸為初始化波形之 供給時間。 第1 5 a圖中,可看見在同一背景和亮度時,本發明之 CCR比習知之VCR供給初始化波形之供給時間短。 參照第15b圖,在VCR及CCR具有同一亮度值之時點看初始 化波形之供給時間時,CCR比VCR大約可減少50/z s〜 7 5/z s之初始化波形供給時間。意即,背景光亮度為1. 0 8 (c d /m2 )時,V C R之初始化波形供給時間為1 5 0 // s,則 為了使C C R之初始化波形供給時間變成1 0 0 // s,本發明之 CCR可以將初始化波形供給時間比習知之VCR減少大約 5 0// s 〇1294135 丨 three, invention description (22) i comparison. The horizontal axis is the supply time of the falling initialization waveform, and the vertical axis on the left side is the supply time of the rising initializing waveform, and the vertical axis on the right side is the contrast 0. In the first picture, the time for initializing the rising and falling waveforms is 20 // s, 50/zs, 100" s, 150//s, it can be seen that the comparison of the conventional VCR mode is much lower than the comparison of the CCR mode of the present invention. In particular, in order to reduce the initialization period and reduce the time of the initialization waveform for supplying the rising or falling to 2 0/zs, the comparison of the CCR method of the present invention to the conventional VCR in the region where the erroneous discharge does not occur is shown to be about 12 %. This is because when the time of the initializing waveform for supplying the rising or falling is reduced to 20/s s, the erroneous discharge does not occur in the VCR mode, so that the contrast of the CCR of the present invention can be seen to be extremely high. Fig. 15a is a supply time of the initial waveforms of the VCR and CCR in the same background light luminance comparison, the horizontal axis is the background light, and the vertical axis is the supply time of the initializing waveform. In Fig. 15a, it can be seen that the CCR of the present invention has a shorter supply time than the conventional VCR supply initialization waveform at the same background and brightness. Referring to Fig. 15b, when the VCR and CCR have the same luminance value, the CCR can reduce the initial waveform supply time of 50/z s to 7 5/z s more than the VCR. That is, when the brightness of the background light is 1. 0 8 (cd / m2 ), the initial waveform supply time of the VCR is 1 5 0 // s, in order to make the initial waveform supply time of the CCR become 1 0 0 // s, this The inventive CCR can reduce the initial waveform supply time by about 5 0//s s from the conventional VCR.

1294135 五、發明說明(23) 背景光亮度為1 · 0 ( cd/m2 )時,VCR之初始化波形供給時 間為3 0 0// s,則為了使CCR之初始化波形供給時間變成 2 2 5// s,本發明之C C R可以將初始化波形供給時間比習知 之V C R減少大約75// s。原因是在同一背景光亮度值比較 CCR和VCR之初始化波形供給時間時,CCR比VCR可大約縮 短 2 5% 〜3 3% 。 【發明之功效】 如上述,依據本發明之電漿顯示面板之驅動裝置及 方法,可藉由減少初始化時間的方式增加維持週期之時 間,因而可以提高亮度。 本發明之電漿顯示面板之驅動裝置及方法為查出供 給到放電胞之初始化波形電氣訊號後,以控制上昇及下 降之初始化波形的方式,在初始化週期減少暗部亮度且 提高對比,同時縮短初始化時間增加記錄週期且可以單 一掃描。尤其可以維持或增加週期而提高亮度。 經由以上說明之内容得知該業者在不超越本發明之 技術思想範圍内,可做多樣化變更及修正。因此,本發 明之技術性範圍並不限於說明書中發明之說明所記載的 内容,而應依據申請專利範圍而定。1294135 V. Description of invention (23) When the background luminance is 1 · 0 ( cd/m 2 ), the initial waveform supply time of the VCR is 3 0 / / s, in order to make the initial waveform supply time of CCR become 2 2 5 / / s, the CCR of the present invention can reduce the initialization waveform supply time by about 75 // s over the conventional VCR. The reason is that the CCR can be shortened by approximately 2 5% to 3 3% from the VCR when the same background luminance value is compared with the initial waveform supply time of the CCR and VCR. [Effect of the Invention] As described above, according to the driving device and method of the plasma display panel of the present invention, the time of the sustain period can be increased by reducing the initialization time, so that the brightness can be improved. The driving device and method for the plasma display panel of the present invention is to reduce the brightness of the dark portion and improve the contrast during the initialization period, and to shorten the initialization, after detecting the initial waveform waveform signal supplied to the discharge cell to control the rising and falling initial waveforms. The time increases the recording period and can be scanned in a single. In particular, it is possible to maintain or increase the period to increase the brightness. From the above description, it is known that the manufacturer can make various changes and modifications without departing from the scope of the technical idea of the present invention. Therefore, the technical scope of the present invention is not limited to the contents described in the description of the invention in the specification, but should be determined according to the scope of the patent application.

1294135 圖式簡單說明 第1圖係一般交流型三極式電漿顯示面板之放電胞外 觀圖; 第2圖係驅動第1圖圖示之PDP放電胞之驅動波形圖; 第3圖係第2圖圖示之初始化週期用於供給斜坡波形 之電壓控制型斜坡波形供給部電路圖; 第4圖係本發明實施例之電漿顯示面板驅動裝置方塊 圖; 第5圖係本發明第1實施例用於生成上昇初始化波形 之上昇初始化波形供給部電路圖; 第6圖係第5圖圖示之上昇初始化波形之驅動裝置的 輸出波形波形圖; 第7圖係本發明第2實施例用於生成下降初始化波形 之下降初始化波形供給部電路圖; 第8圖係第7圖圖示之下降初始化波形驅動裝置的輸 出波形波形圖; 第9圖係本發明第3實施例電漿顯示面板之驅動裝置 電路圖; 第1 0圖係比較供給到放電胞之等效電路和放電胞的 電壓控制型及電流控制型的初始化波形之波形圖; 第1 1圖係將上昇初始化波形供給到放電胞後,藉由 導通下降到維持電壓時之VCR及CCR的電壓波形和光波形 之波形圖; 第1 2圖係表示習知之VCR和本發明之CCR有無發生錯 誤放電之波形圖;1294135 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a discharge cell of a general AC type three-pole plasma display panel; Fig. 2 is a driving waveform diagram of a PDP discharge cell shown in Fig. 1; FIG. 4 is a block diagram of a voltage-controlled ramp waveform supply unit for supplying a ramp waveform; FIG. 4 is a block diagram of a plasma display panel driving device according to an embodiment of the present invention; FIG. 5 is a first embodiment of the present invention. The waveform of the initializing waveform supply unit is generated by the rise of the rising initializing waveform; the output waveform waveform of the driving device for the rising initializing waveform shown in FIG. 5; FIG. 7 is a second embodiment of the present invention for generating the falling initialization. FIG. 8 is a waveform diagram of an output waveform of a falling initializing waveform driving device illustrated in FIG. 7; FIG. 9 is a circuit diagram of a driving device of a plasma display panel according to a third embodiment of the present invention; The 1 0 figure compares the waveforms of the voltage-controlled and current-controlled initialization waveforms supplied to the equivalent circuit and the discharge cell of the discharge cell; A waveform diagram of voltage waveforms and optical waveforms of VCR and CCR when the initializing waveform is supplied to the discharge cell, and is turned on to maintain the voltage; FIG. 2 is a waveform diagram showing the presence or absence of an erroneous discharge of the conventional VCR and the CCR of the present invention. ;

第30頁 1294135 ί圖式簡單說明Page 30 1294135 ί 图 Simple description

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! 第13a圖至第13d圖係比較習知之VCR和本發明之CCR 的斜 坡波形在供給時 間的背 景光及在維持週 期的全白色 亮度 圖; 第1 4圖係比較習 知之V C R和本發明之C C R的斜坡波形 供給 時間之對比圖; 第1 5 a圖係以同- 一背景光亮度比較VCR和 CCR的斜坡波 形供 給時間圖;及 第1 5b圖係以第 1 5圖a同 一背景光亮度, VCR和CCR對 於初 始化波形供給日寺 間之短 縮比率圖。 【圖 示符號之說明】 5CS、 7CS 控 制訊號供給部 5Q卜 7Q1 開 關 5R卜 7R卜9R卜R1 第 1電阻 5R2、 7R2、 R2 第 2電阻 9R3 第 3電阻 9R4 第 4電阻 9Q卜 Q1 第 1開關 9Q2、 Q2 第 2開關 10 上 部基板 12Y、 12Z 透 明電極 13Y、 13Z 金 屬電極 14 上 部誘電層 16 保 護膜 18 下 部基板Figures 13a to 13d are background light of the conventional VCR and the CCR of the present invention at the supply time and an all-white luminance map at the sustain period; Figure 14 compares the conventional VCR with the present invention. CCR ramp waveform supply time comparison chart; 15th a picture is the same as a background light brightness comparison VCR and CCR ramp waveform supply time map; and 15b picture with the same background light brightness , VCR and CCR provide a shortened ratio map between the Japanese temples for the initial waveform. [Description of Symbols] 5CS, 7CS Control Signal Supply Unit 5Q Bu 7Q1 Switch 5R Bu 7R Bu 9R Bu R1 1st Resistor 5R2, 7R2, R2 2nd Resistor 9R3 3rd Resistor 9R4 4th Resistor 9Q Bu Q1 1st Switch 9Q2, Q2 second switch 10 upper substrate 12Y, 12Z transparent electrode 13Y, 13Z metal electrode 14 upper electric layer 16 protective film 18 lower substrate

1294135 圖式簡單說明 2 4 30 40、50 32 42、52 36 38 39 41 detector) 43 A Cl C2 CCR供給部 Cp Cr1294135 Simple description of the diagram 2 4 30 40, 50 32 42, 52 36 38 39 41 detector) 43 A Cl C2 CCR supply Cp Cr

CS1 CS2 D1 D2 FET 下部誘電層 隔壁 螢光體 上昇斜坡波形供給部 上昇之初始化波形供給部 下降斜坡波形供給部 下降初始化波形供給部 電源部 斜坡波形供給部 面板 電流偵測部(c u r r e n t 控制部 電壓波形 第1電容器 第2電容器 電漿顯示面板之驅動裝置 電容器 鉻 第1控制訊號供給部 第2控制訊號供給部 第1二極體 第2二極體 電晶體CS1 CS2 D1 D2 FET Lower ferroelectric layer partition phosphor phosphor rising ramp waveform supply unit rising initial waveform supply unit falling ramp waveform supply unit falling initialization waveform supply unit power supply unit ramp waveform supply unit panel current detection unit (current control unit voltage waveform First capacitor second capacitor plasma display panel drive device capacitor chrome first control signal supply unit second control signal supply unit first diode second diode transistor

第32頁 1294135 圖式簡單說明 GND 接地電位 HP 尖峰電壓 ITO 錫化銦氧化物 LW 光波形 MgO 氧化鎂 PDP 電漿顯示面板 ramp 1 上昇斜坡電壓 ramp 2 下降斜坡電壓 Se 自我熄滅 VCR 斜坡電壓控制部 VDD 共通電壓源 Vdn 斷開電壓源 Ve 熄滅斜坡波形 Vr 導通電壓 Vref 維持電壓 Vs、Z 維持電極 Vsus 維持脈衝 Vup 導通電壓源 Vx 記錄脈衝 Vy 掃描脈衝 Vz 正極性電壓 X 位址電極 Y 掃描電極 ZcH、Zd2 齊納二極體Page 32 1294135 Schematic description GND Ground potential HP spike voltage ITO Tin indium oxide LW Optical waveform MgO Magnesium oxide PDP Plasma display panel ramp 1 Ramp ramp voltage ramp 2 Falling ramp voltage Se Self-extinguishing VCR Ramp voltage control VDD Common voltage source Vdn disconnected voltage source Ve extinguished ramp waveform Vr turn-on voltage Vref sustain voltage Vs, Z sustain electrode Vsus sustain pulse Vup turn-on voltage source Vx recording pulse Vy scan pulse Vz positive polarity voltage address electrode Y scan electrode ZcH, Zd2 Zener diode

第33頁Page 33

Claims (1)

12941351294135 1294135 六、申請專利範圍 化波形的上昇方向。 7、 如申請專利範圍第5項之電漿顯示面板之驅動裝置, 其 中該電阻元件會調整供給到該電漿顯示面板之該初始 化波形的下降方向。 . 8、 如申請專利範圍第1項之電漿顯示面板之驅動裝置, 其 中更包含有裝設在該電壓源和該電漿顯示面板之間的 一二極體。 9、 如申請專利範圍第2項之電漿顯示面板之驅動裝置,1294135 6. The upward direction of the waveform of the patent application scope. 7. The driving device of the plasma display panel of claim 5, wherein the resistive element adjusts a downward direction of the initializing waveform supplied to the plasma display panel. 8. The driving device of the plasma display panel of claim 1, further comprising a diode disposed between the voltage source and the plasma display panel. 9. For the driving device of the plasma display panel of claim 2, 其 中該控制部更包含有該開關元件之一控制端和裝設在 該電漿顯示面板之間用以控制該開關元件的一控制訊 號供給部。 10、 一種電漿顯示面板之驅動裝置,包含: 一第一偵測部,用以偵測一導通電壓源、一斷 開 電壓源和從該導通電壓源供給到該電漿顯示面板之 第一初始化波形電氣訊號;The control unit further includes a control end of the switching element and a control signal supply unit disposed between the plasma display panel for controlling the switching element. 10. A driving device for a plasma display panel, comprising: a first detecting portion for detecting a turn-on voltage source, a turn-off voltage source, and a first supply from the turn-on voltage source to the plasma display panel Initialize the waveform electrical signal; 一第一控制部,用以控制依據該偵測到的電氣 訊 號而從該導通電壓源供給到該電漿顯示面板之該第a first control unit configured to control the first supply from the on-voltage source to the plasma display panel according to the detected electrical signal 第35頁 1294135 [巧、申請專利範圍 j 初始化波形電氣訊號; | | 一第二偵測部,用以偵測從該斷開電壓源供給 到 該電漿顯示面板之一第二初始化波形電氣訊號;及 一第二控制部,用以控制依據該偵測到的電氣 訊 號而從該斷開電壓源供給到該電漿顯示面板之該第 初始化波形電氣訊號。 11、如申請專利範圍第1 〇項之電漿顯示面板之驅動裝 置, 其中該第1控制部為裝設在該導通電壓源和該電漿顯 示面板之間的一第一開關元件。 1 2、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置, 其中該第二控制部為裝設在該斷開電壓源和該電漿 顯 示面板之間的一第二開關元件。 1 3、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置, 其中該電氣訊號為電流及電壓中任一種。 1 4、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置, 其中該第一偵測部為裝設在該第一控制部和該電漿Page 35 1294135 [Calculation, patent application range j Initialize waveform electrical signal; | | A second detection unit for detecting a second initializing waveform electrical signal supplied from the disconnected voltage source to the plasma display panel And a second control unit for controlling the initial waveform electric signal supplied from the disconnection voltage source to the plasma display panel according to the detected electrical signal. 11. The driving device for a plasma display panel according to the first aspect of the invention, wherein the first control unit is a first switching element disposed between the on-voltage source and the plasma display panel. 1 . The driving device of the plasma display panel of claim 10, wherein the second control unit is a second switching element disposed between the disconnection voltage source and the plasma display panel. 1 3. A driving device for a plasma display panel according to claim 10, wherein the electrical signal is any one of current and voltage. The driving device of the plasma display panel of claim 10, wherein the first detecting portion is installed in the first control portion and the plasma 第36頁 1294135 I六、申請專利範圍 L· 一 顯. 示面板之間的一第一電阻元件。 1 5、如申請專利範圍第1 4項之電漿顯示面板之驅動裝 置, 其中該第一電阻元件會調整供給到該電漿顯示面板 之 該第一初始化波形的上昇方向。 1 6、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置, 其中該第二偵測部為裝設在該第二控制部和該斷開 電 壓源之間的一第二電阻元件。 1 7、如申請專利範圍第1 6項之電漿顯示面板之驅動裝 置, 其中該第二電阻元件會調整供給到該電漿顯示面板 之 該第二初始化波形的下降方向。 1 8、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置, 其中更包含有裝設在該導通電壓源和該電漿顯示面 板 之間的一第二二極體。 1 9、如申請專利範圍第1 0項之電漿顯示面板之驅動裝 置,Page 36 1294135 I. Patent scope L. A display. A first resistance element between the panels. A driving device for a plasma display panel according to claim 14 wherein the first resistive element adjusts a rising direction of the first initializing waveform supplied to the plasma display panel. The driving device of the plasma display panel of claim 10, wherein the second detecting portion is a second resistive element disposed between the second control portion and the off voltage source . 17. The driving device for a plasma display panel according to claim 16 wherein the second resistive element adjusts a downward direction of the second initializing waveform supplied to the plasma display panel. 18. The driving device for a plasma display panel according to claim 10, further comprising a second diode disposed between the on-voltage source and the plasma display panel. 1 9. The driving device of the plasma display panel as claimed in item 10 of the patent scope, 1294135 六、申請專利範圍 其中更包含有裝設在該斷開電壓源和該電漿顯示面 板 之間的一第二二極體。 2 〇、如申請專利範圍第1 1項之電漿顯示面板之驅動裝 置, 其中該第一控制部更包含有該第一開關元件之一控 制 端和裝設在該電漿顯示面板之間的一第一控制訊號 供 給部。 2 1、如申請專利範圍第1 2項之電漿顯示面板之驅動裝 置, 其中該第二控制部更包含有該第二開關元件之一控 制 端和裝設在該電漿顯示面板之間的一第二控制訊號 供 給部。 2 2、一種電漿顯示面板之驅動方法,包含下列步驟: 偵測從一電壓源供給到該電漿顯示面板的一初 始 化波形電氣訊號;及 控制依據該偵測到的電氣訊號而從該電壓源供 給 到該電漿顯示面板的該初始化波形電氣訊號。1294135 6. Patent application scope Further includes a second diode disposed between the disconnection voltage source and the plasma display panel. The driving device of the plasma display panel of claim 1 , wherein the first control unit further comprises a control end of the first switching element and is disposed between the plasma display panel. A first control signal supply unit. The driving device of the plasma display panel of claim 12, wherein the second control unit further comprises a control end of the second switching element and is disposed between the plasma display panel. A second control signal supply unit. 2, a method for driving a plasma display panel, comprising the steps of: detecting an initial waveform electrical signal supplied from a voltage source to the plasma display panel; and controlling the electrical signal according to the detected electrical signal The initial waveform electrical signal supplied to the plasma display panel by the source. 1294135 六、申請專利範圍 2 3、如申請專利範圍第2 2項之電漿顯示面板之驅動方 法, 其中該電氣訊號為電流及電壓中任一種。 2 4、如申請專利範圍第2 2項之電漿顯示面板之驅動方 法, 其中該電壓源為一導通電壓源及一斷開電壓源中任 種。 2 5、如申請專利範圍第2 2項之電漿顯示面板之驅動方 法, 其中控制該初始化波形電氣訊號步驟,係調整供給 到 該電漿顯示面板之該初始化波形的上昇方向及下降 方 向中任一種方向。 2 6、一種電漿顯示面板之驅動方法,包含下列步驟: 偵測從一導通電壓源供給到該電漿顯示面板的 第一初始化波形電氣訊號; 控制依據該偵測到的電氣訊號而從該導通電壓 源 供給到該電漿顯示面板的該第一初始化波形電氣訊 號; 债測從一斷開電壓源供給到該電漿顯示面板的1294135 VI. Application for Patent Range 2 3. The driving method of the plasma display panel as claimed in Item 2 of the patent application, wherein the electrical signal is any one of current and voltage. 2. The driving method of the plasma display panel of claim 22, wherein the voltage source is any one of a turn-on voltage source and a turn-off voltage source. The driving method of the plasma display panel according to the second aspect of the patent application, wherein the step of controlling the initial waveform electrical signal adjusts the rising direction and the falling direction of the initializing waveform supplied to the plasma display panel. One direction. A driving method for a plasma display panel, comprising the steps of: detecting a first initializing waveform electrical signal supplied from a conducting voltage source to the plasma display panel; controlling the electrical signal according to the detected electrical signal Turning on the first initialization waveform electrical signal to the plasma display panel; the debt measurement is supplied from a disconnected voltage source to the plasma display panel 1294135 I六、申請專利範圍 ί 斤 ,_ — 第二初始化波形電氣訊號;及 控制依據該偵測到的電氣訊號而從該斷開電壓 源 供給到該電漿顯示面板的該第二初始化波形電氣訊 號。 2 7、如申請專利範圍第2 6項之電漿顯示面板之驅動方 法, 其中該第一及第二初始化波形之電氣訊號為電流及 電 壓中任一種。 2 8、如申請專利範圍第2 6項之電漿顯示面板之驅動方 法, 其中控制該第一初始化波形電氣訊號步驟,係調整 供 給到該電漿顯示面板之該第一初始化波形的上昇方 向。 2 9、如申請專利範圍第2 6項之電漿顯示面板之驅動方 法, 其中控制該第二初始化波形電氣訊號步驟,係調整 供 給到該電漿顯示面板之該第二初始化波形的下降方 向。1294135 I. Patent application scope, __ second initializing waveform electrical signal; and controlling the second initializing waveform electrically supplied from the disconnecting voltage source to the plasma display panel according to the detected electrical signal Signal. 2 7. The driving method of the plasma display panel of claim 26, wherein the electrical signals of the first and second initializing waveforms are any one of current and voltage. 2. The driving method of the plasma display panel of claim 26, wherein the step of controlling the first initializing waveform electrical signal adjusts a rising direction of the first initializing waveform supplied to the plasma display panel. 2. The driving method of the plasma display panel of claim 26, wherein the step of controlling the second initializing waveform electrical signal adjusts a falling direction of the second initializing waveform supplied to the plasma display panel. 12941351294135 第5頁Page 5
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