I2868Q3_ 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種半導體元件及其製造方法，且特 別是有關於一種半導體之堆疊閘及其製造方法，其可避免 複晶矽化金屬產生孔洞、剝離。 【先前技術】 ^習知之半導體之堆疊閘的結構，是在基底上形成一二 氧化矽層，並在二氧化矽層上先沉積一多晶矽層。由於多 晶石夕的電阻高，所以通常會再沉積一層厚度相當的石夕化鶴 層來增進其導電性。之後，再將上述神化鎢層與多晶石夕 層圖案化，以形成一堆疊結構。之後，再於堆疊結構的侧 壁形成間隙壁。通常，在形成_壁之前，為了能修補石夕 層與乡晶⑦層在侧過財所造成的晶格缺陷，會先 行I再氧化程序(cell re〇xidati〇n pr〇cess)，再於堆疊结 構的側壁形成間隙壁。 、 、 白巧胞再氧化程序係在晶片載人反應室或爐管時 二°由於氧氣的氧化速率非常高，因此，很容易 ί㈣產生反應，使得雜鎢中產生孔洞。當孔 的良^下=重時，矽化鎢層會與複晶矽層剝離，使得製程 【發明内容】 造方^纟^目的就是在提供—種半導體之堆疊閘的製 產4^/,、、"構，以解決習知氧擴散進入複晶矽化金屬層所 座生的孔洞、剝離的問題。 本發明的又一目的是在提供一種氧化程序，以解決習 丨 275 1 twf.doc 1286803 ’氧化速率太快所造成氧擴散進入複晶矽 化金屬層而產生孔洞、剝離的問題。 ，提出—種半導體之堆疊閘的製造方法，此方法 金屬# ϋ依序形成-料電層、—複晶料與一石夕化 以开51案化魏金屬層、複晶㈣與閘介電層， 豐結構。之後’進行一氧化程序，以於堆疊結 】上=士Ζ形成—阻障層與—氧化石夕層。其後，在基 =壁材料層、氧化石夕層與阻障層，以裸露出石夕化： -間隙^留下堆疊閘之侧壁之阻障層與氧化石夕層並形成 pjn·/1述氧化&序包括-載人階段(lGading stage)、一升溫 零ng stage)與一氧化階段(〇χ_ ;;:?用:氣體係選自於-第-氣艘族群，第-L; =:祕體，料含氧氣。升溫階段，其所使用之氣體 一f二氣體族群’第二氣體族群為含氮氣體，但 1化階段，其所使用之氣體係選自 氣所組成之族群。 /、乳 依…、本發明較佳實施例所述，上述之載階段 氣體族群包括NH3、N2〇與NO。上述之=3: 包括NH3、N2〇與N〇。上述之氧化階段之氣體 為H2和〇2或〇2。 本發明提出一種氧化程序，適於用以在一已形成—含 石夕層之基底上依序形成-轉賴—氧化層。氧化程序包 括一載入階段、-升溫階段以及—氧切段。其中載入階 12868低 twf.doc 速率低於氧化階段之氧化速率。 本發明更題-料導斷㈣， j 基底、一堆疊結構、—阻播層、與-氧化‘ ^ · 一 結構包括依序堆疊在基底±的—閘介電層f:中堆豐 。剛、氧化層係依序:置於 金屬層中的石夕反應而產生孔洞、剝離的問題。 諸nr之上述和其他目的、舰和優點能更明顯 ϋ ’下文特.較佳實施例，並配合所_式， 况明如下。 【實施方式】 第1圖至第5圖係繪示本發明一較佳實施例的半導體 之堆疊閘的製造流程剖面示意圖。 清參照第1目，首先在基底100 i依順序形成一閘介 電層102、一複晶矽層104與一矽化金屬層1〇6。其中閘介 ，層102的材質例如是二氧切，其形成的方法例如是熱 氧化，。複晶石夕層104的材質例如是多晶石夕；形成的方法 例如疋化學氣相沉積法。矽化金屬層1〇6的材質例如是矽 化鎢；形成的方法例如是化學氣相沉積法。 之後，請參照第2圖，在矽化金屬層1〇6上形成一圖 案化之光阻層（未繪示”並以光阻層作為蝕刻1幕，蝕刻 1286803 丁 5 11 w f. d 〇 c 矽化金屬層106、複晶矽層l〇4與閘介電層1〇2，以形成由 圖案化之矽化金屬層106a、複晶矽層1〇4a與閘介電層 所構成之堆疊結構120。 〃繼之，睛參照第3圖，進行一氧化程序例如是一胞再 氧化程序(Cell Reoxidation)，以在堆疊結構12〇之表面上 依序形成一阻障層108與一氧化矽層11〇。阻障層1〇8之 厚度例如10埃至5〇埃之間，阻障層1〇8之材質例如是氮 氧化氧化石夕層110之厚度例如是8〇埃至15〇 睛參照第6圖’上述氧化程序包括一載入階段A、一 升溫階段B與-賴〇載人階段a與升溫階段B是 目環境^操作，且載讀段A與升溫階段 的J化，率例如是低於氧化階段c。載入階段A其所使 二巧例如是顺3、N2〇與N0。升溫階段B a 一氣體族群例如是與第一氣體族群相同者， 每分^ 2。^至^0，N〇。升溫階段B的升溫速度例如是 八。^ ^之間，升溫時間例如是在40分鐘至1〇〇 階段^所使用之氣體例如是〇2*Η2或是 段分鐘至20分鐘之間。氧化階 底二行氧化程序之後，接著在基 Γ方：:層如〗= 料，是氧切或氣化，其形成 Deposition，CVD)。予氣相沉積法（Chemical 乂啊 接下來，請參照第5圖，回_間隙壁材料層112、 I2868Q3 氧化矽層lio與阻障層108。以裸露出矽化金屬層⑺如之 表面’、留下堆疊閘120之側壁之阻障層1〇8a與氧化矽層 1 l〇a，形成間隙壁114。其兹刻方式例如是非等向性餘刻曰。 田成上述半導體的製造流程之後，可得一堆疊閘。此 堆，閘包括：一基底1〇〇、一堆疊結構12〇、一阻擋層1〇^、 一氧化石f層UOa與一間隙壁114。其中堆疊結構12〇包括 依序堆疊在基底1〇〇上的一閘介電層1〇2a、一複晶矽層 104a與一矽化金屬層1〇6a。阻擋層1〇如、氧化矽層η二 與間隙壁114係依序配置在堆疊結構之側壁上與部份基底 100 上0 - ，於本發明之氧化程序的載入階段與升溫階段所使 用之氣體不含有氧氣，因此，可以有效地降低氧化速率， 並且可在堆疊結構的侧壁上先形成一層阻障層。當進入氧 化階段時，由於阻障層的阻隔，因此氧氣不會迅&與石夕化 金屬層中的矽反應而產生孔洞、剝離的問題。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限^本發明，任何熟習此技藝者，在不脫離本發明之精神 t範圍内，當可作些許之更動與潤飾，因此本發明之保 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 、第1圖至第5圖是依照本發明一較佳實例所繪示的丰 導體之堆疊閘的製造流程剖面示意圖。 第6圖係繪示本發明較佳實施例之氧化程序的溫度與 時間的關係圖。 里又-、 【主要元件符號說明】 I2868Q1 100 ··基底 102、102a :閘介電層 104、104a :複晶矽層 106、106a ··石夕化金屬層 108、108a :阻障層 110、110a :氧化矽層 112 :間隙壁材料層 114 :間隙壁 120 :堆疊結構 A:載入階段 B:升溫階段 C:氧化階段I2868Q3_ IX. Description of the Invention: [Technical Field] The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly to a stacked gate of a semiconductor and a method of fabricating the same, which can avoid voids in a polycrystalline metal Stripped. [Prior Art] The structure of a conventional stacked gate of a semiconductor is to form a germanium dioxide layer on a substrate and deposit a polysilicon layer on the germanium dioxide layer. Due to the high electrical resistance of the polycrystalline stone, a layer of equivalent thickness of the Shi Xihua crane is usually deposited to enhance its electrical conductivity. Thereafter, the above-described deuterated tungsten layer and the polycrystalline layer are patterned to form a stacked structure. Thereafter, spacers are formed on the side walls of the stacked structure. Usually, before the formation of the wall, in order to repair the lattice defects caused by the side of the Shixia layer and the 7th layer of the crystal, the I reoxidation process (cell re〇xidati〇n pr〇cess) will be performed first. The sidewalls of the stacked structure form a spacer. The whitening cell reoxidation process is carried out in the wafer-loaded reaction chamber or furnace tube. Since the oxidation rate of oxygen is very high, it is easy to generate a reaction to cause pores in the hetero-tungsten. When the pores are lower = heavy, the tungsten-tungsten layer will be stripped from the polycrystalline germanium layer, so that the process of the invention is to provide the production of the stacked gates of the semiconductors 4^/, And "structure to solve the problem of the diffusion and peeling of the conventional oxygen diffusion into the polycrystalline metallized layer. A further object of the present invention is to provide an oxidation procedure to solve the problem of diffusion of oxygen into the polycrystalline metallization layer caused by the excessive oxidation rate of the conventional 275 1 twf.doc 1286803. A method for manufacturing a stacked gate of a semiconductor is proposed. The method of forming a metal layer is sequentially formed into a material layer, a compound material layer, and a stone compounding layer to open a 51-layered Wei metal layer, a polycrystalline layer (4), and a gate dielectric layer. , Feng structure. After that, an oxidation process is performed to form a junction = = girth formation - a barrier layer and a oxidized stone layer. Thereafter, in the base = wall material layer, the oxidized stone layer and the barrier layer, to expose the Xi Xihua: - the gap ^ leaves the barrier layer of the sidewall of the stacked gate and the oxidized stone layer and forms pjn · / 1 The oxidation & sequence includes - lGading stage, a temperature rise ng stage and a oxidation stage (〇χ _ ;;: use: gas system is selected from the - gas-hull group, -L; =: The secret body contains oxygen. During the heating phase, the gas used is a gas group of the f-two gas group. The second gas group is a nitrogen-containing gas, but in the 1st stage, the gas system used is selected from the group consisting of gas. In the preferred embodiment of the present invention, the above-mentioned carrier gas group includes NH3, N2, and NO. The above = 3: includes NH3, N2, and N. The oxidation stage gas described above. It is H2 and 〇2 or 〇2. The present invention provides an oxidation procedure suitable for sequentially forming a-transfer-oxidation layer on a substrate which has been formed into a layer containing a layer. The oxidation process includes a loading stage, - a temperature rising phase and an oxygen cutting section, wherein the loading step 12868 has a low twf.doc rate lower than the oxidation rate of the oxidation stage. - material conduction (4), j substrate, a stack structure, - blocking layer, and - oxidation ' ^ · a structure including sequential stacking on the substrate ± thyristor layer f: in the heap of abundance. Sequentially: the problem of holes and peeling caused by the reaction of the stone in the metal layer. The above and other purposes, ships and advantages of the nr can be more obvious ϋ 'the best embodiment, and with the _ formula, [Embodiment] FIG. 1 to FIG. 5 are schematic cross-sectional views showing a manufacturing process of a stacked gate of a semiconductor according to a preferred embodiment of the present invention. Referring to the first object, first, the substrate 100 i is sequentially formed. A gate dielectric layer 102, a polysilicon layer 104 and a deuterated metal layer 1〇6, wherein the material of the layer 102 is, for example, dioxotomy, and the method of forming is, for example, thermal oxidation. The material of the layer 104 is, for example, polycrystalline; the method of forming is, for example, a bismuth chemical vapor deposition method. The material of the bismuth metal layer 1 〇 6 is, for example, tungsten telluride; the method of formation is, for example, a chemical vapor deposition method. Figure 2, forming a pattern on the deuterated metal layer 1〇6 a photoresist layer (not shown) and a photoresist layer as an etch 1 screen, etching 1268803 butyl 5 11 w f. d 〇 c bismuth metal layer 106, a polysilicon layer l 〇 4 and a gate dielectric layer 1 〇 2, To form a stacked structure 120 composed of a patterned deuterated metal layer 106a, a polysilicon layer 1〇4a and a gate dielectric layer. Next, with reference to FIG. 3, an oxidation process such as one-cell reoxidation is performed. (Cell Reoxidation), a barrier layer 108 and a ruthenium oxide layer 11 are sequentially formed on the surface of the stacked structure 12. The thickness of the barrier layer 1 〇 8 is, for example, 10 angstroms to 5 angstroms, and the resistance is The material of the barrier layer 1〇8 is, for example, the thickness of the oxynitride oxide layer 110, for example, 8 〇 to 15 〇 eye. Referring to FIG. 6 'the oxidation process includes a loading phase A, a heating phase B and a Lai The manned phase a and the warming phase B are the operating conditions, and the loading of the read segment A and the temperature rising phase is, for example, lower than the oxidation phase c. In the loading phase A, the two are, for example, cis 3, N2 〇 and N0. The temperature rising phase B a a gas group is, for example, the same as the first gas group, each minute. ^ to ^0, N〇. The temperature increase rate in the temperature rising phase B is, for example, eight. Between ^, the temperature rise time is, for example, from 40 minutes to 1 ^. The gas used is, for example, 〇2*Η2 or between minutes and 20 minutes. The oxidation stage is followed by a two-row oxidation process followed by a base:: layer, such as a material, which is oxygen cut or gasified, which forms Deposition, CVD). To the vapor deposition method (Chemical 接下来 ah, please refer to Figure 5, back to the spacer material layer 112, I2868Q3 yttrium oxide layer lio and the barrier layer 108. To expose the bismuth metal layer (7) such as the surface ', stay The barrier layer 1 〇 8 a of the sidewall of the stacked gate 120 and the yttrium oxide layer 1 l 〇 a form a spacer 114. The mode is, for example, an anisotropic remnant 曰. After the manufacturing process of the semiconductor described above, A stacking gate is provided. The stack includes: a substrate 1 〇〇, a stack structure 12 〇, a barrier layer 1 、, a monolithic oxide layer UOa and a spacer 114. The stacked structure 12 〇 includes sequential A gate dielectric layer 1〇2a, a polysilicon layer 104a and a deuterated metal layer 1〇6a stacked on the substrate 1〇〇. The barrier layer 1 is, for example, the yttria layer η2 and the spacers 114 are sequentially arranged. It is disposed on the sidewall of the stacked structure and on the partial substrate 100. The gas used in the loading phase and the temperature rising phase of the oxidation process of the present invention does not contain oxygen, and therefore, the oxidation rate can be effectively reduced, and can be stacked. A barrier layer is formed on the sidewall of the structure. When entering the oxidation At the stage, due to the barrier of the barrier layer, the oxygen does not quickly react with the ruthenium in the metal layer of the Shihua chemical layer to cause voids and peeling. Although the present invention has been disclosed above in the preferred embodiment, it is not In order to limit the invention, those skilled in the art can make some modifications and refinements within the scope of the spirit of the invention, and therefore the scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a manufacturing process of a stacked gate of a conductor according to a preferred embodiment of the present invention. FIG. 6 is a view showing a preferred embodiment of the present invention. The relationship between the temperature and the time of the oxidation procedure of the embodiment. In addition, - [Major component symbol description] I2868Q1 100 · Base 102, 102a: Gate dielectric layer 104, 104a: Polysilicon layer 106, 106a · Stone Xiyang metal layer 108, 108a: barrier layer 110, 110a: yttrium oxide layer 112: spacer material layer 114: spacer 120: stacked structure A: loading phase B: temperature rising phase C: oxidation phase
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