TWI283383B - Thin film transistor array substrate and repairing method thereof - Google Patents

Thin film transistor array substrate and repairing method thereof Download PDF

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Publication number
TWI283383B
TWI283383B TW93123443A TW93123443A TWI283383B TW I283383 B TWI283383 B TW I283383B TW 93123443 A TW93123443 A TW 93123443A TW 93123443 A TW93123443 A TW 93123443A TW I283383 B TWI283383 B TW I283383B
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Taiwan
Prior art keywords
electrodes
thin film
electrode
film transistor
sub
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TW93123443A
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Chinese (zh)
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TW200535760A (en
Inventor
Han-Chung Lai
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Au Optronics Corp
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Priority to TW93123443A priority Critical patent/TWI283383B/en
Priority to US10/904,042 priority patent/US7221413B2/en
Priority to JP2005000568A priority patent/JP2006047957A/en
Publication of TW200535760A publication Critical patent/TW200535760A/en
Priority to US11/695,056 priority patent/US7349035B2/en
Application granted granted Critical
Publication of TWI283383B publication Critical patent/TWI283383B/en
Priority to US11/971,886 priority patent/US7436466B2/en
Priority to US11/971,883 priority patent/US7426006B2/en
Priority to US12/190,577 priority patent/US7646446B2/en
Priority to US12/618,788 priority patent/US7817240B2/en

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  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

A thin film transistor array substrate comprising a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of common lines and a pattern up electrode is provided. The scan lines and the data lines are disposed on the substrate to define a plurality of pixel areas. Each thin film transistor is located at one of the pixel areas respectively, and is driven by the corresponding scan line and data line. Each pixel electrode is located at one of the pixel areas respectively, and is electrically connected with the corresponding thin film transistor. Common lines are disposed on the substrate and each pixel is located on one of the common lines respectively. The patterned up electrode comprises a plurality of sub-upper electrodes disposed between the pixel electrode and the common line, wherein the sub-upper electrodes are electrically connected to the pixel electrode and suitable for coupling with the common lines to form a storage capacitor. In addition, a repairing method of the thin film transistor array mentioned above is also provided. The method is removing a portion of the pixel electrode corresponding to the sub-upper electrode of a defect storage capacitor to isolating the pixel electrode and the sub-upper electrode of the defect storage capacitor.

Description

1283383 13683twf.doc/006 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種薄膜電晶體陣列基板(TFT array substrate)及其修補方法,且特別是有關於一種 能夠避免儲存電容發生洩漏之薄膜電晶體陣列基板 及其修補方法。 【先前技術】 針對多媒體社會之急速進步,多半受惠於半導 體元件或顯示裝置的飛躍性進步。就顯示器而言, 陰極射線管(Cathode Ray Tube,CRT)因具有優異 的顯示品質與其經濟性,一直獨佔近年來的顯示器 市場。然而,對於個人在桌上操作多數終端機/顯示 器裝置的環境,或是以環保的觀點切入,若以節省 能源的潮流加以預測,陰極射線管因空間利用以及 能源消耗上仍存在很多問題,而對於輕、薄、短、 小以及低消耗功率的需求無法有效提供解決之道。 因此,具有高晝質、空間利用效率佳、低消耗功率、 無輻射等優越特性之薄膜電晶體液晶顯示器(Thin Film Transistor Liquid Crystal Display ^ TFT LCD) 已逐漸成為市場之主流。 薄膜電晶體液晶顯示器(TFT LCD )主要由薄 膜電晶體陣列基板、彩色濾光陣列基板和液晶層所 構成,其中薄膜電晶體陣列基板是由多個以^歹^排 列之薄膜電晶體’以及與每一個薄膜電晶體對應配 1283383 13683twf.doc/006 置之晝素電極(pixel Electr〇de)所組成。而薄膜電 晶體係用來作為液晶顯示單元的開關元件。此外, 為了控制個別的畫素單元,通常經由掃描配線(Scan line—)與資料配線(Date Hne)以選取特定之畫素, 並藉由施於適當的操作電壓,以顯示對應此^素之 顯示資料。另外,通常會將上述之晝素電極^部分 區域覆蓋於掃描配線或是共用配線(c〇mm〇n丨丨⑽) 上,而此重疊的部分即作為儲存電容(Cst ),以使 薄膜電晶體液晶顯示器中的各畫素能夠正常顯示。 值得注意的是,習知技術中更在製作資料配 線、源極及汲極時之同時,在每一個晝素電極與對 應之共用配線(或掃描配線)之間配置一上電極, 並將畫素電極與此上電極電性連接,使得此上電極、 共用配線(或%描配線)及位於此上電極與此共用 配線(或掃描配線)之間的介電層形成一種金屬-絕 緣-金屬結構(Metal-Insulator_Metal Structure)的儲 存電容。 圖1緣示為習知一種薄膜電晶體陣列基板之上 視圖,而圖2為根據圖丨的薄膜電晶體陣列基板沿 著剖面線A-A’所見之剖面圖。 請共同參閱圖1及圖2 ,習知薄膜電晶體陣 列基板100主要係由一基板110、多個掃描配線12〇、 多個資料配線130、多個薄膜電晶體14〇、多個晝素 電極150、多數個共用配線160 (本圖僅繪示其一), 1283观 twf.doc/006 以及多個上電極170所構成。 其中,掃描配線120以及資料配線13〇係配置 於基板11〇上,以區分出多個畫素區域112。薄膜 電晶體140係分別位於各畫素區域112内,並且藉 由對應之掃描配線120以及對應之資料配線13〇驅 動。晝素電極150係分別位於各晝素區域112内, 以與對應之薄膜電晶體140電性連接。共用配線16〇 配置於基板110上,且每一個晝素電極15〇之部分 區域係位於對應之共用配線16()的上方。 此外,每一個晝素電極15〇以及對應之共用配 線160之間皆配置有一上電極17〇,且上電極17〇 與對應之共用配線160之間配置有一介電層18〇而 保持電性隔絕。另外,上電極17〇與對應之晝素電 極150之間亦配置一介電層19〇,而此介電層19〇 具有一接觸窗192,藉由接觸窗192使上電極17〇 與對應之畫素電極150電性連接。 請繼續參閱圖2,由於上電極17〇與對應之共 用配線160之間構成一儲存電容(Cst),用以使薄 膜電晶體液晶顯示器中的各畫素能夠正常顯示。然 而,製程的缺陷或其他因素可能使得粒子(partide) 1〇落於介電層180中或因介電層18〇破洞,而導致 電容洩漏(leakage )的情形。如此一來,將會導致 畫素顯示異常,而使得顯示品質不佳。 【發明内容】 loc/006 本發明的目的係提供一種薄膜電晶體陣列基板 及其修補方法,係可避免儲存電容之上下電極因為 粒子而發生茂漏的情形。 為達上述目的,本發明提出一種薄膜電晶體陣 列基板,主要係由一基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個晝素電極、多數個 共用配線,以及一圖案化上電極所構成。其中,掃 描配線以及資料配線係配置於基板上,以區分出多 個晝素區域。薄膜電晶體係分別位於各畫素區域内, 並且藉由對應之掃描配線以及對應之資料配線驅 動。晝素電極係分別位於各畫素區域内,以與對應 之薄膜電晶體電性連接。共用配線配置於基板上, 且每一個畫素電極之部分區域係位於對應之共用配 線的上方。圖案化上電極配置於每一個畫素電極以 及對應共用配線其中之—之間,其中圖案化上電極 包括多數個子上電極,且每一個子上電極的部分區 域係分別與對應之晝素電極電性連接。 為達上述目的,本發明提出一種薄膜電晶體陣 列基板,主要係由一基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個晝素電極,以及二 圖案化上電極所構成。其中,掃描配線以及資料配 線係配置於基板上,以區分出多個畫素區域。薄膜 電曰a體係为別位於各畫素區域内,並且藉由對應之 掃描配線以及對應之資料配線驅動。畫素電極^分 f.doc/006 ,位於各晝素區域内,以與對應之薄膜電晶體電性 連接,且# 一個畫素電極之部&amp;區域係位於對應之 掃描配線的上方。圖案化上電極配置於每―個畫素 電極以及對應掃描配線其中之一之間,其中圖案化 上電極包括多數個子上電極,且每—個子上電極的 部分區域係分別與對應之晝素電極電性連接。 為達上述目的,本發明提出一種薄膜電晶體陣 列基板,主要係由一基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個畫素電極、多數個 共用配線,以及一圖案化上電極所構成。其中,掃 描配線以及資料配線係配置於基板上,以區分出多 個晝素區域。薄膜電晶體係分別位於各畫素區域内, 並且藉由對應之掃描配線以及對應之資料配線驅 動。晝素電極係分別位於各畫素區域内,以與對應 之薄膜電晶體電性連接。共用配線配置於基板上, 且每一個畫素電極之部分區域係位於對應之共用配 線的上方。圖案化上電極配置於每一個晝素電極以 及對應之共用配線之間,圖案化上電極包括多數個 子上電極,其中子上電極係與晝素電極電性連接, 且適於與共用配線輕合形成多個電容,當其中至少 一個電容為瑕疵電容時,瑕疵電容中的子上電極係 與對應之晝素電極電性絕緣,而其他的子上電極的 部分區域係分別與對應之畫素電極電性連接。 為達上述目的,本發明提出一種薄膜電晶體陣 1283·一。6 列基板,主要係由一基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個畫素電極,以及一 圖案化上電極所構成。其中,掃描配線以及資料配 線係配置於基板上,以區分出多個晝素區域。薄膜 電晶體係分別位於各畫素區域内,並且藉由對應之 掃描配線以及對應之資料配線驅動。晝素電極係分 別位於各晝素區域内,以與對應之薄膜電晶體電性 連接,且每一個晝素電極之部分區域係位於對應之 掃描配線的上方。圖案化上電極配置於每一個畫素 電極以及對應掃描配線其中之一之間,其中圖案化 上電極包括多數個子上電極,其中子上電極係與晝 素^極電性連接,且適於與掃瞄配線搞合形成多個 ,容,當其中至少一個電容為瑕疵電容時,瑕疵電 谷中的子上電極係與對應之晝素電極電性絕緣,而 其他子上電極的部分區域係分別與對應之 電性連接。 為達上述目的,本發明提出一種薄膜電晶體陣 :基板的修補方法,適於對上述之薄膜電晶體陣列 的佟為一瑕疵電容,此薄膜電晶體陣列基板 括移除與瑕疵電容中的子上電極對應 極:對岸之rc ’以令瑕疵電容中的子上電 、τ愿之畫素電極電性絕緣。 1283繼 twf.doc/006 為達上述目的,本發明提出一種薄膜電晶體陣 列基板’主要係由-基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個晝素電極、多數個 共用配線’以及-上電極所構成4中,掃描配線 以及=貝料配線係配置於基板上,以區分出多個晝素 區域。薄膜電晶體係分別位於各晝素區域内,並且 藉由對應之掃描配線以及對應之資料配線驅動。晝 素電極係分別位於各晝素區域内,以鱼對声 電晶體電性連接。共用配線配置於基板上 個畫素電極之部分區域係位於對應之共用配線的上 方。上電極配置於每一個晝素電極以及對應之共用 配線之間,其中上電極係與晝素電極電性連接,且 適於與共用配線耦合形成多個電容,當其中至少一 個電谷為一瑕疵電容時,瑕疵電容中的上 對應之畫素電極電性絕緣,且瑕Γ此電;中 係與對應之共用配線相熔接。 為達上述目的,本發明提出一種薄膜電晶體陣 列基板,主要係由一基板、多個掃描配線、多個資 料配線、多個薄膜電晶體、多個畫素電極,以及上 電極所構成。其中,掃描配線以及資料配線係配置 於基板上’以區分出多個畫素區域。薄膜電晶體係 分別位於各畫素區域内,並且藉由對應之掃描配線 以及對應之資料配線驅動。晝素電極係分別位於各 晝素區域内,以與對應之薄膜電晶體電性連接,且 12 1283孤 f.doc/0〇6 每一個晝素電極之部分區域係位於對應之掃描配線 的上方。上電極配置於每一個晝素電極以及對應之 掃描配線之間,其中上電極係與晝素電極電性連接, 且適於與掃瞄配線耦合形成多個電容,當其中至少 一個電容為一瑕疵電容時,瑕疵電容中的上電極係 與對應之晝素電極電性絕緣,且瑕疵電容中的上電 極係與對應之掃描配線相熔接。 為達上述目的,本發明提出一種薄膜電晶體陣 列基板的修補方法,適於對一儲存電容在閘極上(Cst on gate)或儲存電容在共用配線(Cst on common)上之 薄膜電晶體陣列基板進行修補,其中基板上之每一 個晝素電極之部分區域係位於對應之一掃描配線或 一共用配線的上方,且每一個晝素電極以及對應之 掃描配線或共用配線之間配置有一上電極,且晝素 電極與上電極電性連接,當上電極與對應之掃描配 線或共用配線之間具有一粒子/破洞時,其所構成之 電容為一瑕疵電容,而此修補方法係先移除與瑕疵 電容中的上電極相對應之晝素電極的部分區域,以 使瑕疵電容中的上電極與對應之晝素電極電性絕 緣。接著,再將瑕疵電容中的上電極與對應之掃描 配線或共用配線相熔接。 由於本發明主要在於每個晝素電極與對應之共 用配線(或掃描配線)之間,配置由多個子上電極 所構成之圖案化上電極。當這些子上電極其中之一 13 f.doc/006 π、之共用配線(或掃描配線)之間具有一粒子 、’八所構成的電容為—瑕疲電容,本發明可藉由 移除此瑕疵電容中的子上雷極 丁上冤極上方之畫素電極的部 刀品3 ,使此瑕疵電容中的子上電極與對應之畫素 電極電性絕緣,進以避免儲存電容之上下電極因為 粒子或破洞而發生洩漏(leakage)的情形。 . 為讓本發明之上述和其他目的、特徵和優點能 更明顯易懂,下文特舉數個較佳實施例,並配合所 附圖式,作詳細說明如下。 【實施方式】 圖3繪示為依照本發明一較佳實施例薄膜電晶 體陣列基板的示意圖,而圖4繪示為根據圖3中之 薄膜電晶體陣列基板沿著剖面線B-B,所見之剖面 圖0 請參照圖3及圖4,本實施例之薄膜電晶體陣 列基板200主要係由一基板21〇、多個掃描配線22〇、 多個資料配線230、多個薄膜電晶體24〇、多個畫素 電極250、多數個共用配線260 (本圖僅繪示其一), 以及一圖案化上電極270所構成。 其中,掃描配線220以及資料配線230係配置 於基板210上,以區分出多個晝素區域212。薄膜 電晶體240係分別位於各晝素區域212内,並且藉 由對應之掃描配線220以及對應之資料配線230驅 動。晝素電極250係分別位於各畫素區域212内, 1283 繼 twf.doc/006 以與對應之薄膜電晶體240電性連接。共用配線260 配置於基板210上,且每一個晝素電極250之部分 區域係位於對應之共用配線260的上方。 圖案化上電極270配置於每一個畫素電極250 以及對應之共用配線260之間,且圖案化上電極270 與共用配線260之間配置有一介電層280,而圖案 化上電極270與晝素電極250之間配置有一介電層 290。值得注意的是,圖案化上電極270係由多數個 子上電極272 (本圖以兩個為例)所構成,且每一 個子上電極272的部分區域係分別與對應之晝素電 極250電性連接,例如是在每一個子上電極272上 方之介電層290開設接觸窗292,藉由接觸窗292 使每一個子上電極272分別與對應之晝素電極250 電性連接,因此子上電極272與對應之共用配線260 之間即構成一儲存電容(Cst)。 圖5繪示為圖3中的薄膜電晶體陣列基板經過 雷射修補之後的示意圖,而圖6繪示為圖5中的薄 膜電晶體陣列基板沿著C-C’剖面線的剖面示意圖。 請共同參閱圖5及圖6,當上述這些子上電極 272其中之一與對應之共用配線260之間具有一粒 子20 (或破洞)時,子上電極272a與共用配線260 之間會發生茂漏(leakage )的情形。如此一來,將 會導致晝素顯示異常,而使得顯示品質不佳。此時, 即需要對上述顯示異常的晝素進行修補的動作,其 15 1283盤一 修補方法主要係為移除與瑕疵電容中的子上電極 272a對應之晝素電極250的部分區域,以令瑕庇電 容中的子上電極272a與對應之晝素電極250電性絕 緣。 以本實施例而言,例如是將對應於瑕疵電容中 的子上電極272a上方之晝素電極250的部分區域移 除以形成一開口 252,其移除的方法例如是以雷射 移除的方式進行,且此開口 252位於瑕疵電容中的 子上電極272a與對應之畫素電極250所接觸的區域 周圍(即接觸窗292之周圍),藉由此開口 252使瑕 疲電容中的子上電極272a與對應之畫素電極250電 性絕緣。由上可知,經修補後之畫素電極25〇仍能 夠正常顯示,且不會受到修補製程的影響。 圖7繪示依照本發明一較佳實施例將共用配線與瑕疵 電谷中的子上電極電性連接的修補示意圖。在移除與瑕疵 電谷中的子上電極272a對應之晝素電極250的部分 區域,以使瑕疵電容中的子上電極272a與對應之畫 素電極250電性絕緣之後,更可將瑕疵電容中的子上 電極272a與對應之共用配線26〇相熔接(如標示a處),使 瑕疲電谷中的子上電極272a與對應之共用配線260等電 位、,以避免因粒子(或破洞)而發生洩漏的情形,而 上述熔接的方法例如是利用雷射溶接。 ,承上所述,以本實施例而言,瑕疵電容中的子上 電極272a與對應之共用配線26〇姆接的位置係位於接觸 16 I2833§33 3twf.doc/006 向下方。然、而,熟悉該項技術者庳知,熔接 之位置無而侷限於接觸窗292的下方,^ 將瑕疵電容中的子上電極272a與對庫之* 糸 ; L …祖, ” 丁應之共用配線260相熔 接的任何適當位置皆可。 圖8繪示依照本發明-較佳實施例針對粒子落於書 素電極與共用配線之間的修補示意圖。當上述之查,旦 極以及對應之共用配線之間具有一:子“ ^ Τ 2】 洞)時’本發明之修補方法更可移除對應於粒子其3〇 (或破洞)上方之晝素電極250的區域。以本實施 例而言,例如以雷射移除的方式形成一開口 254, 且開口 254暴露出該粒子30 (或破洞)。 圖9Α〜圖9D繪示為依照本發明另一較佳實施 例薄膜電晶體陣列基板的示意圖。本實施例之薄膜 電晶體陣列基板其主要結構大致與圖3所揭露之薄 膜電晶體陣列基板相同,而在此僅針對相異處進行 說明,本實施例之相異處主要在於形成畫素電極25〇 時,同時在每一個畫素電極250上開設一至多個開 口 256,此開口 256係位於每一個子接觸墊272與 對應之晝素電極250所接觸區域的周圍。其例如是 在每^一個子接觸藝272所對應之晝素電極250上形 成一直條狀開口 256 (如圖9Α)、兩直條狀開口 256 (如圖9Β)、或一 L型開口 256 (如圖9C)或一 υ 字型開口 256 (如圖9D)。由於在晝素電極250上 先形成了開口 256,當其中一個子上電極272與對 17 1283 繼1283383 13683twf.doc/006 IX. Description of the Invention: [Technical Field] The present invention relates to a TFT array substrate and a repair method thereof, and in particular to a storage capacitor Leaked thin film transistor array substrate and repair method thereof. [Prior Art] For the rapid advancement of the multimedia society, most of the benefits are due to the dramatic advancement of semiconductor components or display devices. In terms of displays, cathode ray tubes (CRTs) have always dominated the display market in recent years due to their excellent display quality and economy. However, for the environment in which most individuals operate the terminal/display device on the table, or from the perspective of environmental protection, if the energy saving trend is predicted, the cathode ray tube still has many problems due to space utilization and energy consumption. The need for light, thin, short, small, and low power consumption does not provide an effective solution. Therefore, Thin Film Transistor Liquid Crystal Display (TFT LCD), which has superior properties such as high enamel quality, good space utilization efficiency, low power consumption, and no radiation, has gradually become the mainstream of the market. A thin film transistor liquid crystal display (TFT LCD) is mainly composed of a thin film transistor array substrate, a color filter array substrate and a liquid crystal layer, wherein the thin film transistor array substrate is composed of a plurality of thin film transistors arranged in a row and Each thin film transistor is composed of a pixel electrode (pixel Electr〇de) equipped with 1283383 13683twf.doc/006. The thin film crystal system is used as a switching element of the liquid crystal display unit. In addition, in order to control individual pixel units, a specific pixel is usually selected through a scan line (Date line) and a data line (Date Hne), and by applying an appropriate operating voltage, the corresponding pixel is displayed. Display data. In addition, the above-mentioned partial surface of the halogen electrode is usually covered on the scan wiring or the common wiring (c〇mm〇n丨丨(10)), and the overlapped portion is used as the storage capacitor (Cst) to make the thin film electrically Each pixel in the crystal liquid crystal display can be normally displayed. It is worth noting that in the prior art, an upper electrode is disposed between each of the halogen electrodes and the corresponding shared wiring (or the scanning wiring) while the data wiring, the source and the drain are being fabricated, and The ferrite electrode is electrically connected to the upper electrode such that the upper electrode, the common wiring (or the % trace), and the dielectric layer between the upper electrode and the common wiring (or the scan wiring) form a metal-insulating-metal Storage capacity of the structure (Metal-Insulator_Metal Structure). 1 is a top view of a conventional thin film transistor array substrate, and FIG. 2 is a cross-sectional view of the thin film transistor array substrate according to the cross-sectional line A-A'. Referring to FIG. 1 and FIG. 2 together, the conventional thin film transistor array substrate 100 is mainly composed of a substrate 110, a plurality of scan lines 12A, a plurality of data lines 130, a plurality of thin film transistors 14A, and a plurality of pixel electrodes. 150. A plurality of common wirings 160 (only one of which is shown in the figure), 1283 views twf.doc/006, and a plurality of upper electrodes 170. The scanning wiring 120 and the data wiring 13 are disposed on the substrate 11A to distinguish the plurality of pixel regions 112. The thin film transistors 140 are respectively located in the respective pixel regions 112, and are driven by the corresponding scanning wirings 120 and the corresponding data wirings 13A. The halogen electrodes 150 are respectively located in the respective halogen regions 112 to be electrically connected to the corresponding thin film transistors 140. The common wiring 16〇 is disposed on the substrate 110, and a portion of each of the pixel electrodes 15A is located above the corresponding common wiring 16(). In addition, an upper electrode 17A is disposed between each of the halogen electrodes 15A and the corresponding common wiring 160, and a dielectric layer 18 is disposed between the upper electrode 17A and the corresponding common wiring 160 to maintain electrical isolation. . In addition, a dielectric layer 19 is disposed between the upper electrode 17A and the corresponding halogen electrode 150, and the dielectric layer 19 has a contact window 192, and the upper electrode 17 is correspondingly connected by the contact window 192. The pixel electrodes 150 are electrically connected. Referring to FIG. 2, a storage capacitor (Cst) is formed between the upper electrode 17A and the corresponding common wiring 160 for normal display of each pixel in the thin film transistor liquid crystal display. However, defects or other factors in the process may cause the partide 1 to fall into the dielectric layer 180 or cause a leakage of the capacitor due to the dielectric layer 18. As a result, the pixels will be displayed abnormally and the display quality will be poor. SUMMARY OF THE INVENTION Loc/006 The object of the present invention is to provide a thin film transistor array substrate and a repairing method thereof, which can avoid a situation in which a lower electrode of a storage capacitor is leaked due to particles. In order to achieve the above object, the present invention provides a thin film transistor array substrate, which is mainly composed of a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of halogen electrodes, a plurality of common lines, and a The patterned upper electrode is constructed. The scanning wiring and the data wiring are disposed on the substrate to distinguish a plurality of halogen regions. The thin film electro-crystal system is located in each pixel region and is driven by the corresponding scan wiring and corresponding data wiring. The halogen electrodes are respectively located in the respective pixel regions to be electrically connected to the corresponding thin film transistors. The common wiring is disposed on the substrate, and a portion of each of the pixel electrodes is located above the corresponding common wiring. The patterned upper electrode is disposed between each of the pixel electrodes and the corresponding common wiring, wherein the patterned upper electrode includes a plurality of sub-up electrodes, and a partial region of each of the sub-electrodes is respectively electrically connected to the corresponding halogen electrode Sexual connection. To achieve the above object, the present invention provides a thin film transistor array substrate, which is mainly composed of a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of halogen electrodes, and a second patterned upper electrode. Composition. The scanning wiring and the data wiring are disposed on the substrate to distinguish a plurality of pixel regions. The thin film 曰a system is located in each pixel area and is driven by the corresponding scan wiring and corresponding data wiring. The pixel electrode is divided into f.doc/006, which is located in each pixel region to be electrically connected to the corresponding thin film transistor, and the portion of the pixel electrode &amp; region is located above the corresponding scanning wiring. The patterned upper electrode is disposed between each of the pixel electrodes and one of the corresponding scan wires, wherein the patterned upper electrode includes a plurality of sub-up electrodes, and each of the sub-electrodes has a partial region and a corresponding pixel electrode Electrical connection. In order to achieve the above object, the present invention provides a thin film transistor array substrate, which mainly comprises a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of common lines, and a The patterned upper electrode is constructed. The scanning wiring and the data wiring are disposed on the substrate to distinguish a plurality of halogen regions. The thin film electro-crystal system is located in each pixel region and is driven by the corresponding scan wiring and corresponding data wiring. The halogen electrodes are respectively located in the respective pixel regions to be electrically connected to the corresponding thin film transistors. The common wiring is disposed on the substrate, and a portion of each of the pixel electrodes is located above the corresponding common wiring. The patterned upper electrode is disposed between each of the halogen electrodes and the corresponding common wiring, and the patterned upper electrode includes a plurality of sub-electrodes, wherein the sub-electrode is electrically connected to the halogen electrode, and is suitable for being combined with the common wiring. Forming a plurality of capacitors, wherein when at least one of the capacitors is a tantalum capacitor, the sub-electrode of the tantalum capacitor is electrically insulated from the corresponding pixel electrode, and the other sub-electrodes are partially connected to the corresponding pixel electrode Electrical connection. To achieve the above object, the present invention proposes a thin film transistor array 1283. The six-column substrate is mainly composed of a substrate, a plurality of scanning wires, a plurality of material wires, a plurality of thin film transistors, a plurality of pixel electrodes, and a patterned upper electrode. The scan wiring and the data distribution line are disposed on the substrate to distinguish a plurality of halogen regions. The thin film electro-crystal system is located in each pixel region and is driven by the corresponding scan wiring and corresponding data wiring. The halogen electrode layers are respectively located in the respective halogen regions to be electrically connected to the corresponding thin film transistors, and a part of each of the halogen electrodes is located above the corresponding scanning wiring. The patterned upper electrode is disposed between each of the pixel electrodes and one of the corresponding scan wires, wherein the patterned upper electrode includes a plurality of sub-electrodes, wherein the sub-electrode is electrically connected to the halogen and is adapted to The scan wiring is combined to form a plurality of capacitors. When at least one of the capacitors is a tantalum capacitor, the sub-electrode system in the tantalum valley is electrically insulated from the corresponding pixel electrode, and the partial regions of the other sub-electrodes are respectively Corresponding electrical connection. In order to achieve the above object, the present invention provides a thin film transistor array: a method for repairing a substrate, which is suitable for the above-mentioned thin film transistor array, which is a tantalum capacitor, and the thin film transistor array substrate includes a sub-substrate and a tantalum capacitor. The upper electrode corresponds to the pole: the rc of the opposite bank is electrically insulated by the pixel in the tantalum capacitor and the pixel electrode of the τ. 1283 Following twf.doc/006 In order to achieve the above object, the present invention provides a thin film transistor array substrate 'mainly consisting of a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of halogen electrodes, In the configuration 4 of the plurality of common wirings and the upper electrodes, the scanning wiring and the bead wiring are disposed on the substrate to distinguish the plurality of halogen regions. The thin film electro-crystal system is located in each of the pixel regions, and is driven by the corresponding scan wiring and corresponding data wiring. The halogen electrodes are located in the respective halogen regions, and the fish are electrically connected to the acoustic crystal. The common wiring is disposed on a portion of the substrate on which the plurality of pixel electrodes are located above the corresponding shared wiring. The upper electrode is disposed between each of the halogen electrodes and the corresponding common wiring, wherein the upper electrode is electrically connected to the halogen electrode, and is adapted to be coupled with the common wiring to form a plurality of capacitors, wherein at least one of the electric valleys is a stack In the case of a capacitor, the corresponding pixel electrode in the tantalum capacitor is electrically insulated and is electrically connected; the middle portion is fused to the corresponding common wiring. In order to achieve the above object, the present invention provides a thin film transistor array substrate mainly comprising a substrate, a plurality of scanning wires, a plurality of material wires, a plurality of thin film transistors, a plurality of pixel electrodes, and an upper electrode. Among them, the scanning wiring and the data wiring are disposed on the substrate to distinguish a plurality of pixel regions. The thin film electro-crystal system is located in each pixel region and is driven by the corresponding scan wiring and corresponding data wiring. The halogen electrodes are respectively located in the respective halogen regions to be electrically connected to the corresponding thin film transistors, and 12 1283 orphans f.doc/0〇6 each partial region of the halogen electrodes is located above the corresponding scanning wiring . The upper electrode is disposed between each of the pixel electrodes and the corresponding scan wire, wherein the upper electrode is electrically connected to the halogen electrode, and is adapted to be coupled with the scan wire to form a plurality of capacitors, wherein at least one of the capacitors is a turn In the case of a capacitor, the upper electrode of the tantalum capacitor is electrically insulated from the corresponding halogen electrode, and the upper electrode of the tantalum capacitor is welded to the corresponding scan wiring. In order to achieve the above object, the present invention provides a method for repairing a thin film transistor array substrate, which is suitable for a thin film transistor array substrate with a storage capacitor on a gate (Cst on gate) or a storage capacitor on a common wiring (Cst on common). Repairing, wherein a portion of each of the halogen electrodes on the substrate is located above a corresponding one of the scan lines or a common line, and an upper electrode is disposed between each of the pixel electrodes and the corresponding scan line or the common line. And the halogen electrode is electrically connected to the upper electrode. When there is a particle/hole between the upper electrode and the corresponding scanning wiring or the common wiring, the capacitance formed by the capacitor is a tantalum capacitor, and the repairing method is first removed. a partial region of the halogen electrode corresponding to the upper electrode of the tantalum capacitor to electrically insulate the upper electrode of the tantalum capacitor from the corresponding halogen electrode. Next, the upper electrode of the tantalum capacitor is welded to the corresponding scan wiring or the common wiring. Since the present invention mainly resides between each of the halogen electrodes and the corresponding common wiring (or scanning wiring), a patterned upper electrode composed of a plurality of sub-up electrodes is disposed. When one of these sub-electrodes 13 f.doc/006 π, the common wiring (or scan wiring) has a particle, and the capacitance of the 'eight is the 瑕 fatigue capacitance, the present invention can be removed by In the tantalum capacitor, the sub-electrode of the pixel electrode above the drain electrode is electrically insulated from the corresponding pixel electrode to avoid the upper electrode of the storage capacitor. A situation in which a leak occurs due to particles or holes. The above and other objects, features and advantages of the present invention will become more <RTIgt; 3 is a schematic view of a thin film transistor array substrate according to a preferred embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line BB of the thin film transistor array substrate of FIG. Referring to FIG. 3 and FIG. 4 , the thin film transistor array substrate 200 of the present embodiment mainly comprises a substrate 21 , a plurality of scan lines 22 , a plurality of data lines 230 , and a plurality of thin film transistors 24 , The pixel electrodes 250, a plurality of common wirings 260 (only one of which is shown in the figure), and a patterned upper electrode 270 are formed. The scan line 220 and the data line 230 are disposed on the substrate 210 to distinguish the plurality of halogen regions 212. The thin film transistor 240 is located in each of the pixel regions 212, and is driven by the corresponding scan wiring 220 and the corresponding data wiring 230. The halogen electrodes 250 are respectively located in the respective pixel regions 212, and 1283 is twf.doc/006 to be electrically connected to the corresponding thin film transistor 240. The common wiring 260 is disposed on the substrate 210, and a portion of each of the halogen electrodes 250 is located above the corresponding common wiring 260. The patterned upper electrode 270 is disposed between each of the pixel electrodes 250 and the corresponding common wiring 260, and a dielectric layer 280 is disposed between the patterned upper electrode 270 and the common wiring 260, and the upper electrode 270 and the halogen are patterned. A dielectric layer 290 is disposed between the electrodes 250. It should be noted that the patterned upper electrode 270 is composed of a plurality of sub-electrodes 272 (the figure is exemplified by two), and a partial region of each sub-upper electrode 272 is electrically connected to the corresponding halogen electrode 250, respectively. For example, the contact layer 292 is formed on the dielectric layer 290 above each of the sub-electrodes 272, and each sub-electrode 272 is electrically connected to the corresponding pixel electrode 250 by the contact window 292, so the sub-electrode Between the 272 and the corresponding shared wiring 260, a storage capacitor (Cst) is formed. 5 is a schematic view of the thin film transistor array substrate of FIG. 3 after laser repair, and FIG. 6 is a cross-sectional view of the thin film transistor array substrate of FIG. 5 taken along line C-C'. Referring to FIG. 5 and FIG. 6 together, when one of the sub-upper electrodes 272 has a particle 20 (or a hole) between the corresponding common wiring 260, the sub-electrode 272a and the common wiring 260 may occur. Leakage situation. As a result, the sputum display is abnormal and the display quality is poor. At this time, it is necessary to repair the above-described abnormal display of the element, and the 15 1283 disk-repair method mainly removes a partial region of the halogen electrode 250 corresponding to the sub-electrode 272a in the tantalum capacitor, so that The sub-upper electrode 272a in the capacitor is electrically insulated from the corresponding pixel electrode 250. In this embodiment, for example, a partial region corresponding to the halogen electrode 250 above the sub-electrode 272a in the tantalum capacitor is removed to form an opening 252, and the method of removing is, for example, laser-removed. The method is performed, and the opening 252 is located around the area where the sub-electrode 272a in the tantalum capacitor contacts the corresponding pixel electrode 250 (ie, around the contact window 292), by which the opening 252 causes the sub-capacitor The electrode 272a is electrically insulated from the corresponding pixel electrode 250. It can be seen from the above that the repaired pixel electrode 25 can still be displayed normally without being affected by the repair process. FIG. 7 is a schematic view showing the repair of electrically connecting a common wiring to a sub-electrode in a silicon valley according to a preferred embodiment of the present invention. After removing a partial region of the halogen electrode 250 corresponding to the sub-electrode 272a in the valley, so that the sub-electrode 272a in the tantalum capacitor is electrically insulated from the corresponding pixel electrode 250, the tantalum capacitor can be further The sub-electrode 272a is fused to the corresponding common wiring 26 (as indicated by a), so that the sub-electrode 272a in the 瑕 fatigue valley and the corresponding common wiring 260 are equipotential to avoid particles (or holes). In the case of a leak, the above-described method of welding is, for example, a laser fusion. As described above, in the present embodiment, the position where the sub-electrode 272a of the tantalum capacitor and the corresponding common wiring 26 are connected is located below the contact 16 I2833 § 33 3twf.doc/006. However, those skilled in the art know that the position of the fusion is not limited to the lower side of the contact window 292, and the sub-electrode 272a in the tantalum capacitor is opposite to the bank; L ... ancestor, "Ding Yingzhi Any suitable position where the common wiring 260 is fused may be provided. Figure 8 is a schematic view showing the repair of particles falling between the pixel electrode and the common wiring in accordance with the preferred embodiment of the present invention. When there is a sub-"^ Τ 2] hole between the common wirings, the repairing method of the present invention can remove the region corresponding to the halogen electrode 250 above the particles (or holes) of the particles. In the present embodiment, an opening 254 is formed, for example, by laser removal, and the opening 254 exposes the particles 30 (or holes). 9A-9D are schematic views of a thin film transistor array substrate according to another preferred embodiment of the present invention. The main structure of the thin film transistor array substrate of the present embodiment is substantially the same as that of the thin film transistor array substrate disclosed in FIG. 3, and is only described here for the difference. The difference between the embodiment is mainly to form a pixel electrode. At 25 ,, one or more openings 256 are formed in each of the pixel electrodes 250 at the same time. The openings 256 are located around the area where each of the sub-contact pads 272 is in contact with the corresponding halogen electrode 250. For example, a strip-shaped opening 256 (FIG. 9A), two straight strip openings 256 (FIG. 9A), or an L-shaped opening 256 are formed on each of the halogen electrodes 250 corresponding to each sub-contact 272. Figure 9C) or a 字-shaped opening 256 (Figure 9D). Since the opening 256 is formed first on the halogen electrode 250, when one of the sub-electrodes 272 and the pair 17 1283 follow

t,使此開口 256形成如同於圖 周圍之開口 252。本實施例中, 之部分區域的方式例如是利用雷 應之共用配線260 藉由移除畫素電極 開口 256的兩端連迫, 5環繞於接觸窗292周圍之開 移除畫素電極250 射移除。 此外,請繼續參閱圖9A〜圖9D,圖中 之開口 256 —部分設計於子上電極272的上方,而 其餘部分設計於子上電極272以外的區域。換句話 說,即將開口 256的涵蓋區域設計超出上電極272, 以使修補的製程能更為快速、簡便。當然,熟悉該 項技術者應知,本發明之開口 256的尺寸無1 需二二 限制。 圖10繪示為依照本發明另一較佳實施例薄膜 電晶體陣列基板的示意圖,而圖u為圖10中的薄 膜電晶體陣列基板經過雷射修補之後的示意圖。 本實施例之薄膜電晶體陣列基板其主要結構大 致與圖3所揭露之薄膜電晶體陣列基板相同,而在 此僅針對相異處進行說明,本實施例之相異處主要 在母一個畫素電極250下方之各個子上電極272間 更包括以一頸縮部274相連,而頸縮部274係用以 作為修補時的切割區。 當其中一個子上電極272與對應之共用配線 260之間具有一粒子20 (或破洞)時,子上電極272a 18 與共用配線260之間會發生洩漏(leakage )的情形。 此時,其修補方法為先移除與瑕疵電容中的子上電 極272a對應之晝素電極250的部分區域。接著,切 斷與瑕疵電容中的子上電極272a連接之頸縮部 274,以使瑕疵電容中的子上電極272a與對應之晝 素電極250電性絕緣。以本實施例而言,移除晝素 電極250的部分區域以形成一開口 252,此開口 252 位於瑕疵電容中的子上電極272a與畫素電極250所 接觸區域的周圍,且移除畫素電極250的部分區域 之方法例如是雷射移除,而切斷頸縮部274的方法 例如是雷射切割。從上可知,在切斷與瑕疵電容中 的子上電極272a連接之頸縮部274後,瑕疵電容中 的子上電極272a即與對應之畫素電極250電性絕 緣,進而達到修補的目的。 承上所述,上述之實施例皆針對儲存電容在 共用配線上(Cst on common)的架構舉例說明,然而 任何熟悉該項技藝者應知,本發明之修補方法並不 侷限於儲存電容在共用配線上的架構,亦可運用在 儲存電容在掃描配線(Cst on Gate)的架構上。 圖12〜圖13,繪示為以本發明之修補方法針 對儲存電容在掃描配線之架構的薄膜電晶體陣列基 板之修補後的示意圖。其中圖12及圖13中之薄膜 電晶體陣列基板為儲存電容在掃描配線上(Cst on Gate )之薄膜電晶體陣列基板,其主要結構大致與 19 1283 源 83twf.doc/006 圖5相同,故僅針對技術相異點進行詳細之說明如 下。 請參閱圖12,本實施例之儲存電容在掃描配線 之架構中,每一個畫素電極250的部分區域係延伸 至對應之掃描配線220的上方,而圖案化上電極270 配置於每一個晝素電極以及對應之掃描配線220之 間,其中圖案化上電極270包括多數個子上電極 272,而每一個畫素中的儲存電容係由子上電極272 與其下方之掃描配線220所構成。 請參閱圖13,圖案化上電極270同樣配置於每 一個晝素電極以及對應之掃描配線220之間,且圖 案化上電極270包括多數個子上電極272,而在每 一個晝素電極250下方之各個子上電極272間更包 括以一頸縮部274相連,此頸縮部274係用以作為 修補時的切割區。 無可避免的,當上述這些子上電極272其中之 一與對應之掃描配線220之間具有一粒子20或破洞 時,子上電極272a與共用配線260之間會發生洩漏 (leakage)的情形。此時,即需要對上述顯示異常 的晝素進行修補的動作,而其修補方法主要係為移 除與瑕疵電容中的子上電極272a對應之晝素電極 250的部分區域,以令瑕疵電容中的子上電極272a 與對應之晝素電極250電性絕緣。 請參閱圖12,以本實施例而言,其修補方法為 20 1283383 13683twf.doc/〇〇6 移除與瑕疵電容中的子上電極272a對應之畫素電極 250的部分區域,以形成一如同前述之實施例的開 口 252,藉由此開口 252使瑕疵電容中的子上電極 272a與對應之晝素電極25〇電性絕緣。本實施例中, 移除晝素電極250的部分區域之方式例如是雷射移 除。 明參閱圖13,以本實施例而言,其修補方法除 了移除與瑕疵電容中的子上電極272a對應之晝素電 極250的部分區域,以形成一如同前述之實施例的 開口 252,更包括切斷與瑕疵電容中的子上電極272&amp; 連接之頸縮部274,以使瑕疲電容中的子上電極272a 與對應之晝素電極250電性絕緣,而移除晝素電極 250的部分區域之方式例如是雷射移除,且切斷頸 縮部274之方法例如是雷射切割。 承上所述,在移除與瑕疵電容中的子上電極對 應之晝素電極的部分區域之後,更可將瑕疯電容中 的子上電極與其對應之掃描配線例如以雷射熔接的 方式電性連接。同樣地,若當晝素電極與其對應之 掃描配線具有一粒子(或破洞)時,更可以雷射移 除的方式移除對應於此粒子(或破洞)上方之晝素 電極的區域。再者,在形成晝素電極的同時,可先 在每一個晝素電極上開設一至多個如同前述圖9A〜 9D所揭露之開口,以便於進行後續雷射修補的動 作0 21 1283383 13683twf.doc/006 值得注意的是,本發明之修補方法除了可針對 上述具有圖案化上電極之薄膜電晶體陣列基板進行 修補之外,更可針對僅具有單一上電極之薄膜電晶 體陣列基板進行修補。 圍 〕、、曰不馮以本發明之修補方法針對習 知薄膜電晶體陣列基板之修補後的示意圖。請參閱 圖14 15,習知薄膜電晶體陣列基板1 〇〇主要在每 一,畫素電極150以及對應之共用配線16〇之間配 置單一上電極17〇,當任一上電極17〇與對應之此 用配線160之間具有一粒子1〇 (或破洞)時7亦; 利用本毛明之修補方法進行修補。本實施例之修補 方法主要先移除與瑕疵電容中的上電極Η如所對應 之旦素電極150的部分區域,以使瑕疵電容中的上 電極n〇a與對應之畫素電極15〇電性絕緣。接著將 =電容中的上電極17Ga與對應之共用配線16〇相 二,當然,熟習此項技術之人士可視瑕疵電容中 兄而決定是否將瑕疵電容中的上電極n〇a 與對應之共用配線16〇相熔接。 M 1 ^本實施例而言,例如是將對應於瑕疵電容中 以#成極l7()a上方之晝素電極15。的部分區域移除 = 152,其移除的方法例如是以雷射移 雷楠Jo :丁’且此開〇 152位於瑕疵電容中的上 (即接對應之晝素電極15G所接觸的區域周圍 (即接觸_ i92的周圍),藉由此開口 152使瑕疵電 22 I28m〇c/〇〇6 容中的亡電極170a與對應之晝素電極150電性絕 、味接著,例如是以雷射熔接之方式將瑕疵電容中 的上電極170a與對應之共用配線16〇相熔接(如桿 不B處),以使瑕疵電容中的上電極17〇&amp;與對應之 共用配線160成為等電位。 §然,當晝素電極150與對應之共用配線16〇 之間具有一粒子或破洞(圖未示)時,更可以雷射 移除的方式移除對應於此粒子或破洞上方之晝素電 極150的區域。 此外,請參閱圖16A〜16D,其繪示在習知薄 膜電晶體陣列基板之晝素電極上形成開口之示意 圖。為了使修補的製程能更為快速、簡便,習知的 薄膜電晶體陣列基板在形成晝素電極15〇時,亦可 同時開設一至多個開口 154,例如是一直條狀開口 154(如圖ι6Α)、兩直條狀開口 154 (如圖16B)、 或L型開口 154 (如圖16C )或一 字型開口 154 j如圖16D),這些開口 154與前述圖9A〜9D所揭 露之開口相同,在此即不贅述。 由上可知,習知薄膜電晶體陣列基板1〇〇,原 本藉由單一上電極170與對應之晝素電極150電性 ,接,而與對應之共用配線160之間構成一金屬_絕 、本-金屬結構(Metal-Insulator-Metal Structure)的儲 存電容,而當任一上電極17〇 (如上電極17〇a)與 對應之共用配線160之間具有粒子10(或破洞)時, 23 1283編 _06 本實施例可藉由移除與瑕疵電容中的上電極17〇a所 對應之晝素電極150的部分區域’以使瑕疵電容中 的上電極170a與對應之晝素電極150電性絕緣,並 將瑕疵電容中的上電極170a與對應之共用配線160 相熔接的方式,使晝素電極150與瑕疵電容中的上 電極170a之間構成一金屬-絕緣-畫素電極結構 (Metal-Insulator-ITO Structure)的儲存電容,進而 達到修補之目的。 值得注意的是,圖14〜15中之薄膜電晶體陣 列基板100是以儲存電容在共用配線(Cst on common) 上之基板舉例說明。當然,熟悉該項技術者應知, 本發明之修補方法亦可運用在習知儲存電容在閘極 上(Cst on gate)之基板,在此即不贅述。 另外,基於上述之概念,熟悉該項技術者應知, 本發明之薄膜電晶體陣列基板更可運用至一種多重 區域垂直排列型液晶顯示器(Multi-domain Vertical Alignment liquid crystal display,MVA-LCD )中。 此種液晶顯示器主要是將其中之畫素電極形成多數 條的溝槽(slit ),使兩基板間之電場方向改變,並 使兩基板間之液晶能以多區域平均的方式排列,進 而達到液晶顯示面板之廣視角目的。 $月參閱圖17 ’其繪tf為以本發明再一較佳實施 例運用在多重區域垂直排列型液晶顯示器之架構的 薄膜電晶體陣列基板示意圖。本實施例之薄膜電晶 24 128漏 twf.doc/006 體陣列基板300主要結構大致與圖1所揭露習知之 薄膜電晶體陣列基板相同,而在下文中僅針對相異 處進行說明。 在薄膜電晶體陣列基板300之每一個晝素電極 上350具有至少一第一溝槽352及至少一第二溝槽 354,第一溝槽352的延伸方向與第二溝槽354的延 伸方向不同,且例如是與掃描配線320、資料配線330 或共用配線360的延伸方向不同。此外,在形成第 一溝槽352與第二溝槽354之同時,將其中一第一 溝槽352與其對應之一第二溝槽354相連通,而上 電極370與對應之晝素電極350的電性連接處(即 接觸窗392處)例如是鄰近於此第一溝槽352與第 二溝槽354之相連通處356,且上電極370適於與 對應之共用配線360耦合形成一電容。 值得注意的是,當上電極370與對應之共用配 線360之間具有一粒子或破洞而使上電極370共用 配線360所構成之儲存電容成為一瑕疵電容時,則 需要進行修補。請參閱圖18,其繪示為以本發明之 修補方法運用在多重區域垂直排列型液晶顯示器之 架構的薄膜電晶體陣列基板之修補後的示意圖。此 修補方法係先移除此瑕疵電容中的上電極370所對 應之晝素電極350的一部分區域,此部分區域在本 實施例中係為上電極370與對應之晝素電極350之 電性連接處(即接觸窗392 )的周圍,以令瑕疵電 25 1283383 13683twf.doc/006 容中的上電極370與對應之畫素電極350電性絕緣。 換言之,即藉由移除覆蓋於上電極370上之較小面 積之晝素電極350的部分區域(即接觸窗392的周 圍),使瑕疵電容中的上電極370與對應之畫素電極 350電性絕緣。由於本實施例係移除覆蓋於上電極 370上之較小面積之晝素電極350的部分區域,因 此在修補後仍可維持較大的電容值。 接著,更可將此瑕疵電容中的上電極370與對 應之共用配線360相熔接,以使瑕疵電容中的上電 極370與對應之共用配線360成為等電位。同樣地, 熟習此項技術之人士可視瑕疵電容中的洩漏情況而 決定是否將瑕疵電容中的上電極370與對應之共用 配線360相熔接。 承上所述,原本藉由單一上電極370與對應之 畫素電極350電性連接,而與對應之共用配線360 之間構成一金屬_絕緣-金屬結構(MIM Structure ) 的儲存電容,當上電極370與對應之共用配線360 之間具有一粒子或破洞而使上電極370與共用配線 360所構成之儲存電容成為一瑕疵電容時,移除接 觸窗392周圍的晝素電極350,以使得上電極370 與晝素電極350電性絕緣,晝素電極350與瑕疵電 容中的上電極370之間構成一金屬-絕緣-晝素電極 結構(Mil Structure )的儲存電容,進而達到修補 之目的。 26 1283383 13683twf.doc/006 -上二i:施例中之薄臈電晶體陣列基板300, 50以及對應之共用配線360之 破洞時,本發明之修補方法同樣可 移除對應於粒子或破洞上方之畫素電極,以使 粒子或破洞與此畫素電極350電性絕緣。 综上所述,本發明之薄膜電晶體陣列基板及其 修補方法主要具有下列優點: /、 1·本發明之修補方法係可避免儲存電容之上下 C子或介電層破洞’而發生洩漏的情形, K用1生面。 2.本發明之薄膜電晶體陣列基板,其中圖案化 :亟可與同屬第二金屬層(M2 )的資料配線、汲 ^及源極一併形成,故在製造成本上並不會造成負 雖然本發明已以較佳實施例揭露如上,然其並 i:以限定本發明’任何熟習此技藝者,在不:離 =明之精神和範圍内,當可作些許之更動與潤飾, 2發明之保言蔓範圍當視後附之申請專利範圍所 界疋者為準。 【圖式簡單說明】 、圖1繪示為習知一種薄膜電晶體陣列基板之上 視圖。 圖2為根據圖i中的薄膜電晶體陣列基板沿著 剖面線A-A,所見之剖面圖。 27 1283 繼 f.doc/006 圖3繪示為依照本發明一較佳實施例薄膜電晶 體陣列基板的示意圖。 圖4緣示為根據圖3中之薄膜電晶體陣列基板 沿著剖面線B-B’所見之剖面圖。 圖5繪示為圖3中的薄膜電晶體陣列基板經過雷射修 補之後的示意圖。 圖6縿示為圖5中的薄膜電晶體陣列基板沿著C-C,剖 面線的剖面示意圖。 圖7繪示依照本發明一較佳實施例將共用配線與瑕疵 籲 電容中的子上電極電性連接的修補示意圖。 圖8繪示依照本發明一較佳實施例針對粒子落於畫素 電極與共用配線之間的修補示意圖。 圖9A〜圖9D繪示為依照本發明另一較佳實施例薄膜 電晶體陣列基板的示意圖。 圖10繪示為依照本發明另一較佳實施例薄膜電晶體陣 列基板的示意圖。 圖11為圖10中的薄膜電晶體陣列基板經過雷射修補 之後的示意圖。 圖12〜13繪示為以本發明之修補方法針對儲存電容在 掃描配線之架構的薄膜電晶體陣列基板之修補後的示意圖。 圖14〜15繪示為以本發明之修補方法針對習知薄膜電 晶體陣列基板之修補後的示意圖。 圖16A〜16D繪示在習知薄膜電晶體陣列基板之畫素 電極上形成開口之示意圖。 28 i283JM_6 圖17繪示為以本發明再一較佳實施例運用在多重區域 垂直排列型液晶顯示器之架構的薄膜電晶體陣列基板示意 圖。 圖18繪示為以本發明之修補方法運用在多重區域垂直 排列型液日日顯不為之架構的薄膜電晶體陣列基板之修補後的 示意圖。 【圖式標示說明】 10' 20、30·本4 100、200、300 :薄膜電晶體陣列基板 110、210 :基板 120、220、320 :掃描配線 130、230、330 :資料配線 140、240 :薄膜電晶體 150、250、350 :晝素電極 152 、 154 、 252 、 254 、 256 :開口 160、260、360 :共用配線 170、370 :上電極 180、280 :介電層 190、290 :介電層 192、292、392 :接觸窗 270 :圖案化上電極 272 :子上電極 272a:瑕疵電容中的子上電極 352 :第一溝槽 29 Ι28ϋ06 354 :第二溝槽 356 :連通處t, such opening 256 is formed as opening 252 around the figure. In this embodiment, the partial region is formed by, for example, utilizing Ray's shared wiring 260 by removing both ends of the pixel electrode opening 256, and 5 is surrounded by the open-removed pixel electrode 250 around the contact window 292. Remove. Further, referring to Figs. 9A to 9D, the opening 256 in the figure is partially designed above the sub-upper electrode 272, and the remaining portion is designed in a region other than the sub-electrode 272. In other words, the area of the opening 256 is designed to extend beyond the upper electrode 272 to make the repair process faster and easier. Of course, those skilled in the art will appreciate that the size of the opening 256 of the present invention does not require a two or two limit. 10 is a schematic view of a thin film transistor array substrate according to another preferred embodiment of the present invention, and FIG. 10 is a schematic view of the thin film transistor array substrate of FIG. 10 after laser repair. The main structure of the thin film transistor array substrate of the present embodiment is substantially the same as that of the thin film transistor array substrate disclosed in FIG. 3, and is only described here for the difference, and the difference in this embodiment is mainly in the mother pixel. Each of the sub-up electrodes 272 under the electrode 250 further includes a neck portion 274, and the neck portion 274 is used as a cutting area for repair. When one of the sub-electrodes 272 and the corresponding common wiring 260 have a particle 20 (or a hole), a leak occurs between the sub-electrode 272a 18 and the common wiring 260. At this time, the repairing method is to first remove a partial region of the halogen electrode 250 corresponding to the sub-electrode 272a in the tantalum capacitor. Next, the neck portion 274 connected to the sub-electrode 272a in the tantalum capacitor is cut to electrically insulate the sub-electrode 272a in the tantalum capacitor from the corresponding pixel electrode 250. In this embodiment, a partial region of the halogen electrode 250 is removed to form an opening 252 located around the region where the sub-electrode 272a in the tantalum capacitor contacts the pixel electrode 250, and the pixel is removed. The method of partial area of the electrode 250 is, for example, laser removal, and the method of cutting the neck portion 274 is, for example, laser cutting. As apparent from the above, after the neck portion 274 connected to the sub-electrode 272a in the tantalum capacitor is cut, the sub-electrode 272a in the tantalum capacitor is electrically insulated from the corresponding pixel electrode 250, thereby achieving the purpose of repair. As described above, the above embodiments are all exemplified for the architecture of the storage capacitor on the common wiring (Cst on common). However, anyone skilled in the art should know that the repairing method of the present invention is not limited to the storage capacitor sharing. The wiring structure can also be applied to the storage capacitor on the Cst on Gate architecture. 12 to FIG. 13 are schematic views showing the repair of the thin film transistor array substrate of the structure of the scan wiring by the repair method of the present invention. The thin film transistor array substrate in FIG. 12 and FIG. 13 is a thin film transistor array substrate with a storage capacitor on a scan line (Cst on Gate), and the main structure thereof is substantially the same as that of the 19 1283 source 83 twf.doc/006 FIG. A detailed description of the technical differences will be given below. Referring to FIG. 12, in the structure of the scan wiring of the present embodiment, a portion of each pixel electrode 250 extends over the corresponding scan line 220, and the patterned upper electrode 270 is disposed in each of the pixels. Between the electrodes and the corresponding scan lines 220, the patterned upper electrode 270 includes a plurality of sub-up electrodes 272, and the storage capacitors in each of the pixels are formed by the sub-up electrodes 272 and the scan lines 220 therebelow. Referring to FIG. 13, the patterned upper electrode 270 is also disposed between each of the pixel electrodes and the corresponding scan wiring 220, and the patterned upper electrode 270 includes a plurality of sub-up electrodes 272, and under each of the halogen electrodes 250 Each of the sub-upper electrodes 272 is further connected by a neck portion 274 which serves as a cutting area for repairing. Inevitably, when there is a particle 20 or a hole between one of the sub-upper electrodes 272 and the corresponding scanning wiring 220, a leakage occurs between the sub-electrode 272a and the common wiring 260. . At this time, it is necessary to repair the abnormality of the above-described display element, and the repairing method is mainly to remove a partial region of the halogen electrode 250 corresponding to the sub-electrode 272a in the tantalum capacitor, so that the tantalum capacitor is The sub-electrode 272a is electrically insulated from the corresponding halogen electrode 250. Referring to FIG. 12, in the embodiment, the repairing method is 20 1283383 13683 twf.doc/〇〇6, and a partial region of the pixel electrode 250 corresponding to the sub-electrode 272a in the tantalum capacitor is removed to form a The opening 252 of the foregoing embodiment, by means of the opening 252, electrically isolates the sub-upper electrode 272a in the tantalum capacitor from the corresponding pixel electrode 25A. In this embodiment, the manner in which a partial region of the halogen electrode 250 is removed is, for example, laser removal. Referring to FIG. 13, in the embodiment, the repairing method removes a partial region of the pixel electrode 250 corresponding to the sub-electrode 272a in the tantalum capacitor to form an opening 252 as in the foregoing embodiment. The invention includes cutting and connecting the necking portion 274 of the sub-electrode 272&amp; in the tantalum capacitor to electrically insulate the sub-electrode 272a in the fatigue capacitor from the corresponding halogen electrode 250, and remove the halogen electrode 250. The manner of the partial area is, for example, laser removal, and the method of cutting the neck portion 274 is, for example, laser cutting. According to the above, after removing a partial region of the halogen electrode corresponding to the sub-electrode in the tantalum capacitor, the sub-electrode in the mad capacitor and its corresponding scan wiring can be electrically connected, for example, by laser welding. Sexual connection. Similarly, if the halogen electrode has a particle (or a hole) in its corresponding scanning wiring, the region corresponding to the halogen electrode above the particle (or the hole) can be removed by laser removal. Furthermore, at the same time as the formation of the halogen electrode, one or more openings as disclosed in the above-mentioned FIGS. 9A to 9D may be opened on each of the halogen electrodes to facilitate the subsequent laser repairing operation. 0 21 1283383 13683twf.doc /006 It should be noted that the repairing method of the present invention can repair the thin film transistor array substrate having only a single upper electrode in addition to the above-mentioned thin film transistor array substrate having the patterned upper electrode. The repairing method of the present invention is directed to the repaired schematic of the conventional thin film transistor array substrate by the repair method of the present invention. Referring to FIG. 14 , a conventional thin film transistor array substrate 1 〇〇 is mainly provided with a single upper electrode 17 〇〇 between each of the pixel electrodes 150 and the corresponding common wiring 16 〇, when any upper electrode 17 〇 corresponds When there is a particle 1 〇 (or a hole) between the wires 160, the repair is performed by the repair method of the present invention. The repairing method of this embodiment mainly removes a partial region of the upper electrode, such as the corresponding denier electrode 150, in the tantalum capacitor, so that the upper electrode n〇a in the tantalum capacitor and the corresponding pixel electrode 15 are electrically charged. Sexual insulation. Then, the upper electrode 17Ga in the = capacitor is connected to the corresponding common wiring 16〇. Of course, those skilled in the art can determine whether to use the upper electrode n〇a in the tantalum capacitor and the corresponding common wiring by using the tantalum capacitor. 16〇 phase welding. M 1 ^ For the present embodiment, for example, it will correspond to the halogen electrode 15 above the tantalum capacitor with the # pole (7). The partial area is removed = 152, and the method of removing is, for example, a laser beam shifting Lei Nan Jo: Ding' and the opening 152 is located above the tantalum capacitor (ie, the area around the contact of the corresponding halogen electrode 15G) (ie, around the contact _i92), by means of the opening 152, the dead electrode 170a in the capacitor 22 I28m〇c/〇〇6 is electrically insulated from the corresponding halogen electrode 150, and the scent is followed, for example, by laser. In the welding method, the upper electrode 170a of the tantalum capacitor is welded to the corresponding common wiring 16 (if the rod is not B), so that the upper electrode 17〇&amp; in the tantalum capacitor and the corresponding common wiring 160 become equipotential. § However, when there is a particle or a hole (not shown) between the halogen electrode 150 and the corresponding shared wiring 16〇, the 对应 corresponding to the particle or the hole may be removed by laser removal. In addition, please refer to FIGS. 16A-16D, which are schematic diagrams showing the formation of openings on the pixel electrodes of the conventional thin film transistor array substrate. In order to make the repair process more rapid and simple, it is known. Thin film transistor array substrate in forming a halogen When the pole is 15 inches, one or more openings 154 may be opened at the same time, for example, a strip opening 154 (such as FIG. 6), two straight strip openings 154 (FIG. 16B), or an L-shaped opening 154 (FIG. 16C). Or the in-line opening 154 j is as shown in FIG. 16D), and the openings 154 are the same as those disclosed in the foregoing FIGS. 9A to 9D, and are not described herein. As can be seen from the above, the conventional thin film transistor array substrate 1 is originally electrically connected to the corresponding halogen electrode 150 by a single upper electrode 170, and forms a metal between the corresponding common wiring 160. a storage capacity of a metal structure (Metal-Insulator-Metal Structure), and when there is a particle 10 (or a hole) between any of the upper electrodes 17 (the upper electrode 17A) and the corresponding common wiring 160, 23 1283 _06 This embodiment can remove the upper portion 170a of the tantalum capacitor from the corresponding pixel electrode 150 by removing a partial region ' of the pixel electrode 150 corresponding to the upper electrode 17A of the tantalum capacitor Insulating, and welding the upper electrode 170a of the tantalum capacitor to the corresponding common wiring 160 to form a metal-insulating-pixel structure between the halogen electrode 150 and the upper electrode 170a of the tantalum capacitor (Metal- Insulator-ITO Structure) storage capacitors for repair purposes. It is to be noted that the thin film transistor array substrate 100 of Figs. 14 to 15 is exemplified by a substrate having a storage capacitor on a common wiring (Cst on common). Of course, those skilled in the art should be aware that the repairing method of the present invention can also be applied to a substrate having a conventional storage capacitor on a gate (Cst on gate), which will not be described herein. In addition, based on the above concept, those skilled in the art should be aware that the thin film transistor array substrate of the present invention can be applied to a multi-domain vertical alignment liquid crystal display (MVA-LCD). . The liquid crystal display mainly comprises a plurality of slits formed in the pixel electrodes, so that the direction of the electric field between the two substrates is changed, and the liquid crystals between the two substrates are arranged in a multi-region average manner, thereby achieving liquid crystal. The wide viewing angle of the display panel. Referring to Fig. 17', Fig. 17 is a schematic view showing a thin film transistor array substrate used in the structure of a multi-region vertical alignment type liquid crystal display according to still another preferred embodiment of the present invention. The main structure of the thin film transistor 24 128 twf.doc/006 body array substrate 300 of this embodiment is substantially the same as that of the conventional thin film transistor array substrate disclosed in FIG. 1, and will be described below only for the difference. On each of the halogen electrodes 350 of the thin film transistor array substrate 300, there are at least one first trench 352 and at least one second trench 354. The extending direction of the first trench 352 is different from the extending direction of the second trench 354. For example, it is different from the extending direction of the scanning wiring 320, the data wiring 330, or the common wiring 360. In addition, while forming the first trench 352 and the second trench 354, one of the first trenches 352 is in communication with one of the corresponding second trenches 354, and the upper electrode 370 and the corresponding germane electrode 350 are The electrical connection (ie, at the contact window 392) is, for example, adjacent to the junction 356 of the first trench 352 and the second trench 354, and the upper electrode 370 is adapted to couple with the corresponding common wiring 360 to form a capacitor. It should be noted that when there is a particle or a hole between the upper electrode 370 and the corresponding common line 360 and the storage capacitor formed by the upper electrode 370 sharing the wiring 360 becomes a tantalum capacitor, repair is required. Referring to Fig. 18, there is shown a schematic view of the repair of the thin film transistor array substrate used in the structure of the multi-region vertical alignment type liquid crystal display device by the repairing method of the present invention. The repairing method is to remove a portion of the surface of the pixel electrode 350 corresponding to the upper electrode 370 in the tantalum capacitor. The portion of the region is electrically connected to the corresponding electrode 350 in the embodiment. Around the contact (ie, the contact window 392), the upper electrode 370 in the cavity of the battery 25 1283383 13683 twf.doc/006 is electrically insulated from the corresponding pixel electrode 350. In other words, the upper electrode 370 in the tantalum capacitor and the corresponding pixel electrode 350 are electrically charged by removing a partial region of the halogen electrode 350 covering the smaller area of the upper electrode 370 (ie, the periphery of the contact window 392). Sexual insulation. Since this embodiment removes a partial area of the halogen electrode 350 covering a small area on the upper electrode 370, a large capacitance value can be maintained even after repair. Next, the upper electrode 370 of the tantalum capacitor can be fused to the corresponding common wiring 360 so that the upper electrode 370 of the tantalum capacitor and the corresponding common wiring 360 become equipotential. Similarly, those skilled in the art can determine whether the upper electrode 370 in the tantalum capacitor is fused to the corresponding shared wiring 360, depending on the leakage in the tantalum capacitor. As described above, the single upper electrode 370 is electrically connected to the corresponding pixel electrode 350, and the storage capacitor of the metal-insulation-metal structure (MIM Structure) is formed between the corresponding common wiring 360. When the electrode 370 and the corresponding common wiring 360 have a particle or a hole to make the storage capacitor formed by the upper electrode 370 and the common wiring 360 become a tantalum capacitor, the halogen electrode 350 around the contact window 392 is removed, so that The upper electrode 370 is electrically insulated from the halogen electrode 350, and the storage capacitor of the metal structure is formed between the halogen electrode 350 and the upper electrode 370 of the tantalum capacitor, thereby achieving the purpose of repairing. 26 1283383 13683twf.doc/006 -Upper i: When the thin germanium transistor array substrates 300, 50 and the corresponding common wiring 360 are broken in the embodiment, the repairing method of the present invention can also be removed corresponding to particles or broken A pixel electrode above the hole to electrically insulate the particles or holes from the pixel electrode 350. In summary, the thin film transistor array substrate and the repairing method thereof have the following advantages: /, 1. The repairing method of the present invention can avoid the leakage of the C capacitor or the dielectric layer above the storage capacitor. In the case, K uses 1 raw noodles. 2. The thin film transistor array substrate of the present invention, wherein the pattern: germanium can be formed together with the data wiring, the gate and the source of the second metal layer (M2), so that the manufacturing cost is not negative. Although the present invention has been disclosed in the above preferred embodiments, it is intended that the invention is not limited to the spirit and scope of the invention, and may be modified and retouched. The scope of the guarantor is subject to the scope of the patent application scope attached to it. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a top view of a conventional thin film transistor array substrate. Figure 2 is a cross-sectional view of the thin film transistor array substrate of Figure i taken along section line A-A. 27 1283 Following f.doc/006 FIG. 3 is a schematic diagram of a thin film transistor array substrate in accordance with a preferred embodiment of the present invention. Figure 4 is a cross-sectional view taken along line B-B' of the thin film transistor array substrate of Figure 3. FIG. 5 is a schematic view showing the thin film transistor array substrate of FIG. 3 after laser trimming. Figure 6 is a cross-sectional view showing the thin film transistor array substrate of Figure 5 taken along line C-C. FIG. 7 is a schematic view showing the repair of electrically connecting a common wiring and a sub-electrode in a capacitor according to a preferred embodiment of the present invention. FIG. 8 is a schematic view showing the repair of particles falling between a pixel electrode and a common wiring according to a preferred embodiment of the present invention. 9A-9D are schematic views of a thin film transistor array substrate in accordance with another preferred embodiment of the present invention. FIG. 10 is a schematic view showing a thin film transistor array substrate according to another preferred embodiment of the present invention. Figure 11 is a schematic view of the thin film transistor array substrate of Figure 10 after laser repair. 12 to 13 are schematic views showing the repair of the thin film transistor array substrate with the storage capacitor in the structure of the scan wiring by the repair method of the present invention. 14 to 15 are schematic views showing the repair of the conventional thin film transistor array substrate by the repairing method of the present invention. 16A to 16D are schematic views showing the formation of openings in the pixel electrodes of the conventional thin film transistor array substrate. 28 i283JM_6 Figure 17 is a schematic view showing a thin film transistor array substrate used in the structure of a multi-region vertical alignment type liquid crystal display according to still another preferred embodiment of the present invention. Fig. 18 is a schematic view showing the repair of a thin film transistor array substrate which is applied to a multi-region vertical alignment type liquid-discharging liquid crystal structure by the repairing method of the present invention. [Description of Patterns] 10' 20, 30· Ben 4 100, 200, 300: Thin Film Transistor Substrate 110, 210: Substrates 120, 220, 320: Scanning Wirings 130, 230, 330: Data Wiring 140, 240: Thin film transistors 150, 250, 350: halogen electrodes 152, 154, 252, 254, 256: openings 160, 260, 360: common wirings 170, 370: upper electrodes 180, 280: dielectric layers 190, 290: dielectric Layers 192, 292, 392: contact window 270: patterned upper electrode 272: sub-upper electrode 272a: sub-upper electrode 352 in tantalum capacitor: first trench 29 Ι 28 ϋ 06 354: second trench 356: junction

Claims (1)

I283^ld。· 十、申請專利範圍: 1·一種薄膜電晶體陣列基板,包括: 一基板; 多數個掃描配線,配置於該基板上; ^ 多數個資料配線,配置於該基板上,其中該些 掃描配線與該些資料配線係區分出多數個晝素區 域; ’、 夕數個薄膜電晶體,每一該些薄膜電晶體係位 於=晝素區域其中之一内,其中該些薄膜電晶體 係猎由該些掃描配線驅動; 數個晝素電極,每一該些晝素電極係位於該 ς 區域其中之一内,以與對應之該些薄膜電晶 體具中之一電性連接; 多數個共用配線,配置於該基板上,且每一該 素電極之部分區域係位於對應之該些共用配線 八Τ之一的上方;以及 及哕;化上電極’配置於每一該些畫素電極以 極;C盤,線其中之一之間,其中該圖案化上電 二^娀:八固子上電極’且每一該些子上電極的部 ^或係刀別與對應之該些晝素電極其中之一電性 列美^如 m利範圍第1項所述之薄膜電晶體陣 :7该些頸縮部係連接於該些子上電極其中之二 31 3twf.doc/006 1283383 13683 一圖案化上電極,配置於每一 及該些掃描配線其中之一之門甘士二極以 極包括多數個子上電極,且备一上電 分區域係分別與對摩之$此 =ϋ _的部 連接。 5了應之該些晝素電極其中之一電性 列基n申圍&amp;6項所述之薄膜電晶體陣 」1中4圖案化上電極更包括多數個頸縮 母一該些頸縮部係連接於該些子上電極其中之二 間。 &lt; 8.如巾請專利範圍第6項或第7項所述之薄膜 電晶體陣列基板,其巾該些晝素電極其巾之一更包 括至少一開口,且該開口位於每一該些子上電極的 部分區域周圍。 9·如申請專利範圍第8項所述之薄膜電晶體陣 列基板’其中該開口之形狀包括直條狀、L字型或 U字型。 1 〇·如申凊專利範圍第8項所述之薄膜電晶體陣 列基板,其中該開口之一部分位於每一該些子上電 極的上方,且該開口之其餘部分位於每一該些子上 電極以外的區域。 一 u·一種薄膜電晶體陣列基板,包括·· 一基板; 多數個掃描配線,配置於該基板上; 多數個資料配線,配置於該基板上,其中該些 掃描配線與該些資料配線係區分出多數個畫素^ 33 磁 wf.doc/006 域; 多數個薄膜電晶體,每一該些薄膜電晶體係位 ίϊί畫素,域其中之一内’其中該些薄臈電晶體 係藉由該些掃描配線驅動; f數個畫素電極’每一該些晝素電極係位於該 區域其中之一内,以與對應之該些薄臈電晶 體其中之一電性連接; 多數個共用配線,配置於該基板上,且每一該 2素電極之部分區域係位於對應之該些線 其中之一的上方;以及 ^ …二圖案化上電極,配置於每-該些晝素電極以 用配線其中之一之間,該圖案化上電極包 ΐίΓ:子上電極,其中該些子上電極係與該些晝 2極電性連接,且適於與該些共用配線其中:二 成ί數個電容’當其中至少-電容為-瑕疮 hi極;Γ電容中的子上電極係與對應之該些 =極其中之一電性絕緣,而其他該些子上電極 :二:域係分別與對應之該些畫素電極其中之- 陣列申利範圍第11項所述之薄膜電晶體 該此:用“::亥瑕疵電容中的子上電極與對應之 一 /、用配線其中之一相熔接。 1 3 ·如申凊專利範圍第1丨項成第 膜電晶體陣列基板,其中當每員4/此之薄 該4b J£用阶始甘 以二旦素電極以及 …、用配線其中之一之間具有一粒子/破洞時,該 34 1283383 13683twf.doc/006 些晝素電極其中之一上更包括一開口, ΐίίΓΓ洞之上方,以使該粒子/破洞與該些書 常電極其中之一電性絕緣。 一 陣列乂4板如申Λ專:範㈣U賴述之薄臈電晶體 部,兮圖案化上電極更包括多數個頸縮 &quot; 母该些頸縮部係連接於該瑕疵電容中的子 電極以外之該些子上電極其中之二之間。中的子上 陳列^;如巾請專利範圍第14項所述之薄膜電晶體 二此ϋ其中該瑕疲電容中的子上電極與對應之 “二/、用配線其中之一相熔接。 I6·如申請專利範圍第14項或第15項所述之薄 =體陣列基板,其中當每一該些晝素電極J 〔二/、用配線其中之一之間具有一粒子/破洞時,該 ς旦素電極其中之一上更包括一開口,且該開口位 二該粒子/破洞之上方,以使該粒子/破洞與該些晝 素電極其中之一電性絕緣。 ^一種薄膜電晶體陣列基板,包括: 一基板; 夕數個掃描配線,配置於該基板上; ^夕數個資料配線,配置於該基板上,其中該些 ^描配線與該些資料配線係區分出多數個畫素區 域, 、▲多數個薄膜電晶體,每一該些薄膜電晶體係位 ,士些晝素區域其中之一内,其中該些薄膜電晶體 係藉由該些掃描配線驅動; 35 I283m,〇.〇〇6 此* d固電極’每一該些晝素電極係位於該 雷D 一内’以與對應之該些薄膜電晶 體其中之-電性連接,且每—該些晝素電極之 區域係位於對應之該些掃描配線其中之一 以及 乃、 一圖案化上電極,配置於每一該些書 中之一之間,該圖案;上= =夕數個子上電極’其中該些子上電極係與該此佥 素電極電性連接’且適於與該些掃猫配線其中= 輕合形成多數個電容,當其中至少—該 瑕疲電容時’該瑕疲子上電極係與對應:該= 電性絕緣’而其他該些子上電極的ΐ 刀&amp;域係刀別與對應之該些晝素電極 連接。 τ &lt;电r生 陣列乂8板如申二專利乾圍第17項所述之薄膜電晶體 该些共用配線其中之一相熔接。 f應之 膜電曰19體,Λ产其气利範圍第17項或第18項所述之薄 板’其中當每-該些畫素電極以及 電之一之間具有一粒子/破洞時’該 上更包括一開口,且該開口位 辛/5之上方’以使該粒子/破洞與該些畫 素電極其中之一電性絕緣。 陣列n如申λ專利範圍第17項所述之薄膜電晶體 ㈣基板’其中該圖案化上電極更包括多數個頸縮 36 1283383 13683twf.doc/006 P母該些頭縮部係連接於該瑕疲電容中的子上 電極以外之該些子上電極其中之二之間。 如申請專利範圍第2〇項所述之薄膜電晶體 ,列基板,該職電容巾的子上電極與對應之該些 /、用配線其中之一相溶接。 22·如申請專利範圍第2〇項或第 二=陣列基板,其中當每一該些畫素電= I:::配線其中之一之間具有一粒子/破洞時,該 二二二極其中之一上更包括一開口,且該開σ位 破洞之上方,以使該粒子/破洞與該些畫 常電極,、中之一電性絕緣。 斜由iV*種,膜電日日日體陣㈣板的修補方法,適於 灵板圍第1項或第6項之薄膜電晶體陣列 基板進仃修補,當該些子上 其中之-或該些掃描配㈣中= r2^ 粒子/破洞時,其所形成之電容為一瑕 疵電谷’該修補方法包括: 素電;該,龜電容中的子上電極對應之該些晝 i1#之一的部分區域,以令該瑕疵電容中的 緣。—°對應之該些晝素電極其中之一電性絕 陣列美&amp; Μ申#Γ、^利範圍第23項所述之薄膜電晶體 方法,移除與該瑕疵電容中的子上 法包括雷射移除 其中之一的部分區域之方 37 I28md。祕 25·如申請專利範圍第23項所述之薄骐電晶體 陣列基板的修補方法,在移除與該瑕疵電容中的子 上電極對應之該些畫素電極其中之一的部分區域之 後,該修補方法更包括: 將該瑕疵電容中的子上電極與對應之該些共用 配線其中之一或該些掃描配線其中之一相熔接。 26·如申請專利範圍第25項所述之薄膜電晶體 陣列基板的修補方法,其中將該瑕疵電容中的子上 電極與對應之該些共用配線其中之—或該些掃描配 線其中之一相熔接之方法包括雷射熔接。 27·如申請專利範圍第23項或第25項所述之薄 膜電晶體陣列基板的修補方法,其中#該些畫素電 2其中之一與對應之該些共用配線其中之一或該肽 掃描配線其中之一之鬥且古 ^ 〆 ~ 修補方法更C 子/破洞時’該 β甘,除對應於該第二粒子/破洞上方之該歧畫素電 的區域,以使該第二粒子/翻;= 素電極其t之一電性絕緣。 一 陣列=如的!4專Λ範園Λ27項所述之薄膜電晶體 破洞上方2 除對應於該第二粒子/ 括雷射移除 素電極其中之一的區域之方法包 對申=補方法,適於 基板進行修補,當該電晶體陣列 印通二于上電極其中之一與對應之 38 13_〇6 該些共用配線其中之一或該些掃描配線其中之一之 間具有一第一粒子/破洞時,其所形成之電容為一瑕 ,疵電容,而該修補方法包括·· 移除與該瑕疵電容中的子上電極對應之該些金 素電極其中之一的部分區域;以及 一旦 切斷與該瑕疵電容中的子上電極連接之頸縮 部,以令該瑕疵電容中的子上電極與對應之該些畫 素電極其中之一電性絕緣。 30·如申清專利範圍第29項所述之薄膜電晶體 陣列基板的修補方法,移除與該瑕疵電容中的子上 電極對應之該些晝素電極其中之一的部分區域之方 法包括雷射移除。 3 1.如申明專利範圍第29項所述之薄膜電晶體 陣列基板的修補方法,切斷與該瑕疵電容中的子上 電極連接之頸縮部之方法包括雷射切割。 =2.如申請專利範圍帛29項所述之薄膜電晶體 歹1 土板的修補方法,其中切斷與該瑕疵電容中的 子上電極連接之頸縮部之後,該修補方法更包括: 將該瑕疵電容中的子上電極與對應之該些共用 配線其中之—或該些掃描配線其中之-相熔接。 陵mH·如申請專利範圍第32項所述之薄膜電晶體 彳土板的修補方法,其中將該瑕疵電容中的子上 對應之該些共用配線其中之一或該些掃描配 琛其中之一相熔接的方法包括雷射熔接。 34·如申請專利範圍第29項或第32項所述之薄 39 1283383 13683twf.doc/〇〇6 膜電晶體陣列基板的修補方法,其中當該些晝素電 ,其中之一與對應之該些共用配線其中之一或該些 知描配線其中之一之間具有一第二粒子/破洞時,該 修補方法更包括: 移除對應於該第二粒子/破洞上方之該些晝素電 極其中之一的區域,以使該第二粒子/破洞與^些晝 素電極其中之一電性絕緣。 35·如申請專利範圍第34項所述之薄膜電晶體 陣列基板的修補方法,其中移除對應於該第二粒子/ 破洞上方之該些畫素電極其中之一的區域之方法包 括雷射移除。 36·一種薄膜電晶體陣列基板,包括·· 一基板; 多數個掃描配線,配置於該基板上; 多數個資料配線,配置於該基板上,其中該些 掃描配線與該些資料配線係區分出多數個畫素區 域; ' 多數個薄膜電晶體,每一該些薄膜電晶體係位 於,些畫素區域其中之一内,其中該些薄膜電晶體 係藉由該些掃描配線驅動; 多數個晝素電極,每一該些畫素電極係位於該 些晝素區域其中之一内,以與對應之該些薄膜電晶 體其中之一電性連接; 多數個共用配線,配置於該基板上,且每一該 些畫素電極之部分區域係位於對應之該些共用配線 I28m doc/006 其中之一的上方;以及 it田% 極,配置於每一該些晝素電極以及該些 /、用配線其中之_ ^ ^ φ ^ , 間八中該上電極係與該些畫 八中之一電性連接,且適於與該些共用配線 二中ί一耦合形成一電容’當該電容為-瑕疵電容 甘瑕疵電谷中的上電極與對應之該些書素電極 其中之一電性絕緣。 一 37.如申凊專利範圍第36項所述之薄膜電晶體 陣列基板,其中該瑕疵電容中的上電極與對應之該 些共用配線其中之一相熔接。 38·如申請專利範圍第36項所述之薄膜電晶體 陣列基板,其中當每一該些晝素電極以及該些共用 配線其中之一之間具有一粒子/破洞時,該些畫素電 極其中之一上更包括一開口,且該開口位於該粒子/ 破洞之上方,以使該粒子/破洞與該些晝素電極其中 之一電性絕緣。 39·—種薄膜電晶體陣列基板,包括: 一基板; 多數個掃描配線,配置於該基板上; 多數個資料配線,配置於該基板上,其中該些 掃描配線與該些資料配線係區分出多數個畫素區 域; 一、 多數個薄膜電晶體,每一該些薄膜電晶體係位 於该些晝素區域其中之一内,其中該些薄膜電晶體 係藉由該些掃描配線驅動; 1283383 13683twf.doc/006 夕數個晝素電極’每一 歧書素區域ιφ夕^ 忑二|素電極係位於該 體i中之?二Ιί 以與對應之該些薄膜電晶 連接,且每-該些晝素電極之部分 时S ,、立於對應之該些掃描配線其中之一的上方; 以及 ’ 卢》;*; 極,配置於每一該些晝素電極以及該些 中之一之間,其中該上電極係與該些畫 ^10 ^之電性連接,且適於與該些共用配線 二之一耦合形成電容,當該電容為一瑕疵電容時, 该瑕庇電容巾的上電極與對應之該些晝素電極 之一電性絕緣。 /' 4〇·如申明專利範圍第39項所述之薄膜電晶體 陣列基板,其中該瑕疵電容中的上電極與對應之該 些掃描配線其中之一相熔接。 41·如申請專利範圍第39項所述之薄膜電晶體 陣列基板,其中當每一該些畫素電極以及該些共用 配線其中之一之間具有一粒子/破洞時,該些畫素電 極其中之一上更包括一開口,且該開口位於該粒子/ 破洞之上方,以使該粒子/破洞與該些晝素電極其中 之一電性絕緣。 42· —種薄膜電晶體陣列基板的修補方法,適於 對一儲存電容在閘極上(Cst cm gate)或儲存電容在共 用配線(Cst on common)上之薄膜電晶體陣列基板進 行修補’其中該基板上之每一晝素電極之部分區域 係位於對應之一掃描配線或一共用配線的上方,該 42 f.doc/006 里素電極以及對應之該掃描配線或該共用配線之間 置有,上電極’且該晝素電極與該上電極電性連 接,當該上電極與對應之該掃描配線或該共用配線 之間具有一第一粒子/破洞時,其所形成之電容為一 瑕疲電容,而該修補方法包括: 移除與該瑕疵電容中的上電極對應之該晝素電 - 極的部分區域,以使該瑕疵電容中的上電極與對應 之該晝素電極電性絕緣。 “ 43·如申請專利範圍第42項所述之薄膜電晶體 陣列基板的修補方法,其中在移除與該瑕疵電容中 的上電極對應之該晝素電極的部分區域之後,該修 補方法更包括: 將該瑕疵電容中的上電極與對應之該掃描配線 其中之一或該共用配線其中之一相熔接。 44·如申請專利範圍第42項所述之薄膜電晶體 陣列基板的修補方法,其中移除與該瑕疵電容中的 上電極對應之該晝素電極的部分區域的方法包括雷 射移除。 g ‘ 45·如申請專利範圍第43項所述之薄膜電晶體 陣列基板的修補方法,其中將該瑕疵電容中的上電 極與對應之該掃描配線其中之一或該共用配線其中 之一相熔接之方式包括雷射熔接。 46·如申請專利範圍第42項或第43項所述之薄 膜電晶體陣列基板的修補方法,其中當該晝素電極 以及該共用配線或掃描配線之間具有一第二粒子/破 43 1283¾¾ twf.doc/006 洞時,該修補方法更包括: 移除對應於該第二粒子/破洞上方之該晝 的區域,以使該第二粒子與該畫素電極電性絕緣。。 暖方二如申請專利範圍第46項所述之薄膜電晶體 陣列基板的修補方法,其中移除對應於該第二步Γ子 J洞上方之該晝素電極的區域之方法包括雷射移 48·種薄膜電晶體陣列基板,包括: 一基板; 多數個掃描配線,配置於該基板上,· 掃= 配線’配置^該基板上,其中該此 =描配線與該些資料配線係區分出多數個晝素區 二膜電晶體,每一該些薄臈電晶體係位 於遠些晝素區域其中之一内,其中該些薄膜 係藉由該些掃描配線驅動; 、曰曰 夕數個畫素電極,每一該此晝 些晝素區域其中之一内,以於該 至少-第= 母一該些畫素電極具有 :伸方向與該第二溝槽之延伸方向不同,且:曰一 溝槽與該第二溝槽相連通; μ 圭去丄數個共用配線,配置於該基板上,每一該些 =素電極之部分區域係位於對應 “ 中之一的上方,且卷一兮好舍主 一^、用配、银共 且母該些畫素電極之該第一溝槽 44 1283383 twf.doc/006 13683tv =第二溝槽之相連通處位於對應 其中之一的上方;以及 〆一乂、用配線 共用西置於每—該些晝素電極以及該些 分巴找係义 之間,且每一該些上電極的一部 S域係分別與對應之該㈣素電極其中之一電性 陣列Γ板如申』奢么利範圍第48項所述之薄膜電晶體 唁第些晝素電極之該第-溝槽與 ^第一溝槽之相連通處鄰近於每一該些上電極盥對 應之该些晝素電極其中之一的電性連接處。 50.—種薄臈電晶體陣列基板,包括·· 一基板; 多數個掃描配線,配置於該基板上; ^多數個資料配線,配置於該基板上’,其中該些 掃描配線與該些資料配線係區分出多數個畫素^ 夕數個薄膜電晶體,每一該些薄膜電晶體係位 於?些晝素區域其中之_内,其中該些薄膜電晶體 _ 係藉由談些掃描配線驅動; 多數個晝素電極,每一該些晝素電極係位於該 些晝素區域其中之—内,以與對應之該些薄膜電晶’ 體其中,一電性連接,其中每一該些畫素電極具有 至少一第一溝槽及至少一第二溝槽,該第一溝槽之 延伸方向與該第二溝槽之延伸方向不同,且該第一 溝槽與該第二溝槽相連通; 45 1283383 13683twf.doc/006 多數個共用配線,配置於該基板上,每一該些 畫素電極之部分區域係位於對應之該些共用配線其 中,了的上方,且每一該些畫素電極之該第一溝槽 與該第二溝槽之相連通處位於對應之該些共用配線 其中之一的上方;以及 上電極,配置於每一該些晝素電極以及該些 共用配線其中之—之間,且該上電極的—部分區域 係與對應之該些晝素電極其中之一電性連接,且適 於,該些共用配線其中之—耦合形成—電容,當該 ::J-瑕疵電容時,該瑕疵電容中的該上電極係 /、、Λ«之該些畫素電極其中之一的一部份區域電性 酿刻ms月專利範圍第Μ項所述之薄膜電晶體 中該瑕疵電容中的該上電極與對應之 該一共用配線其中之一相熔接。 障列專㈣㈣5G項所述之薄膜電晶體 ”其中當每一該些晝素電極以及該些 間具有一粒子/破洞時,該些ίΐ電 破; 更包括一開口,且該開口位於該粒子/ 之=緣以使該粒子/破洞與該些晝素電極其中 對申電㈣㈣基㈣修财法,適於 且Γΐ電極與對應之該些共用二= 有—第一粒子/破洞時,其所形成之電容為一 46 1283383 13o83twf.doc/006 瑕疵電容’而該修補方法包括: 去雷該瑕疵電容中的該上電極對應之該些畫 二二1,、中之一的一部分區域,該部分區域位於每 電極與對應之該些畫素電極其中之-之電 對應之ΐΓΓ:以令該瑕疵電容中的該上電極與 心、Μ二旦素電極其中之一電性絕緣。 陆U ϋ如中明專利範圍第53項所述之薄膜電晶體 陣列基板的修補方&amp;,移除與該贼f纟中的該上 :才=、之該些畫素電極其中之一的該部分區域之 方法包括雷射移除。 =5·如申請專利範圍第53項所述之薄膜電晶體 p歹1 土板的修補方法,在移除與該瑕疵電容中的該 上電極對應之該些晝素電極其中之—的該部分區域 之後’該修補方法更包括: 將該瑕疵電容中的該上電極與對應之該些乒 配線其中之一相熔接。 、 56·如申請專利範圍第55項所述之薄膜電晶體 陣列基板的修補方法,其中將該瑕疵電容中的該上 電極與對應之該些共用配線其中之一相熔接之方 包括雷射炼接。 ^ 57·如申請專利範圍第53項或第55項所述之薄 膜電晶體陣列基板的修補方法,其中當該些晝素電 極其中之一與對應之該些共用配線其中之一之間具 有一第一粒子/破洞時,該修補方法更包括: 移除對應於該第二粒子/破洞上方之該些晝素電 47 ί283^3 twf.d〇c/〇〇6 極其中之一的區域,以 素電極其中之一電性絕^該第二粒子/破洞與該些晝 . 申明專利範圍第57項所述之薄膜電曰P 陣列基板的修補方沐,1 χ 寻膘冤日日體 A、 _ 套其中移除對應於該第-初;/ 破洞上方之該些晝素電極其中之一的 七 括雷射移除。 时或之方法包 48I283^ld. · Ten, the scope of application for patents: 1. A thin film transistor array substrate, comprising: a substrate; a plurality of scanning wirings disposed on the substrate; ^ a plurality of data wirings disposed on the substrate, wherein the scanning wirings The data wiring system distinguishes a plurality of halogen regions; ', a plurality of thin film transistors, each of the thin film electro-crystal systems is located in one of the halogen regions, wherein the thin film electro-crystalline systems are hunted by the The plurality of halogen electrodes are disposed in one of the germanium regions to electrically connect with one of the corresponding thin film transistors; a plurality of common wirings, Disposed on the substrate, and a portion of each of the element electrodes is located above one of the corresponding common wiring bars; and a top electrode is disposed at each of the pixel electrodes; C disk, between one of the wires, wherein the patterned power-on electrode: the eight-electrode upper electrode 'and each of the upper electrode portions or the knives and the corresponding halogen electrodes It A thin film transistor array as described in item 1 of the invention, wherein the neck portions are connected to the sub-electrodes of the plurality of sub-electrodes 31 3 twf.doc/006 1283383 13683 on a pattern The electrode is disposed on each of the scanning wires and includes a plurality of sub-electrodes, and a power-on sub-area is respectively connected to the portion of the motor. 5, one of the halogen electrodes, one of the electric columns n, and the thin film transistor array of the above-mentioned 6th, the patterning upper electrode further includes a plurality of necking mothers, and the necking The ministry is connected to two of the sub-electrodes. 8. The thin film transistor array substrate of claim 6 or 7, wherein the one of the halogen electrodes further comprises at least one opening, and the opening is located in each of the Around the partial area of the upper electrode. 9. The thin film transistor array substrate of claim 8, wherein the shape of the opening comprises a straight strip shape, an L shape or a U shape. The thin film transistor array substrate of claim 8, wherein one of the openings is located above each of the sub-electrodes, and the remaining portion of the opening is located at each of the sub-electrodes Outside the area. A thin film transistor array substrate comprising: a substrate; a plurality of scanning wires disposed on the substrate; a plurality of data wires disposed on the substrate, wherein the scan wires are distinguished from the data wiring systems A plurality of pixels ^ 33 magnetic wf.doc / 006 domain; a plurality of thin film transistors, each of the thin film electro-crystal system bits, one of the domains in which the thin germanium crystal system The plurality of pixel electrodes are located in one of the regions to electrically connect with one of the corresponding thin transistors; a plurality of common wires are electrically driven; And disposed on the substrate, and a portion of each of the two electrodes is located above one of the corresponding lines; and two patterned upper electrodes are disposed on each of the halogen electrodes for use Between one of the wirings, the patterned upper electrode includes: a sub-electrode, wherein the sub-electrodes are electrically connected to the 昼2, and are adapted to share the wiring with: Capacitor Wherein at least - the capacitance is - hemorrhoids hi pole; the sub-electrode system in the tantalum capacitor is electrically insulated from one of the corresponding ones of the poles, and the other sub-electrodes: two: the domain system respectively corresponds to Some of the pixel electrodes - the thin film transistor described in the eleventh aspect of the array, is: fused with one of the sub-electrodes in the ":: 瑕疵 瑕疵 capacitance, and one of the wirings. 3 · For example, the first paragraph of the patent scope of the invention is a lithographic transistor array substrate, wherein each of the members is 4/4, and the 4b J is used as a secondary electrode and ... When there is a particle/hole, the 34 1283383 13683twf.doc/006 one of the halogen electrodes further includes an opening, ΐίίΓΓ above the hole, so that the particle/hole and the regular electrode of the book An electrical insulation. An array of 乂4 plates, such as Shen Hao: Fan (four) U Lai's thin 臈 臈 臈 臈 臈 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮 兮a sub-electrode in the capacitor other than the sub-electrodes of the sub-electrodes The display of the film is as described in claim 14. The sub-electrode of the fatigue capacitor is fused with one of the corresponding "second" wires. I6. The thin body array substrate according to claim 14 or 15, wherein when each of the halogen electrodes J has a particle/hole between one of the wires The one of the electrodes further includes an opening, and the opening is located above the particle/hole to electrically insulate the particle/hole from one of the halogen electrodes. A thin film transistor array substrate comprising: a substrate; a plurality of scanning wires arranged on the substrate; and a plurality of data wires arranged on the substrate, wherein the wires and the data wiring systems are Distinguishing a plurality of pixel regions, ▲ a plurality of thin film transistors, each of the thin film electro-crystal system positions, one of a plurality of thin crystal regions, wherein the thin film electro-crystalline systems are driven by the scan lines 35 I283m, 〇.〇〇6 The *d solid electrode 'each of the halogen electrodes is located within the ray D' to be electrically connected to the corresponding thin film transistors, and each - The regions of the halogen electrodes are located in one of the corresponding scan wires and a patterned upper electrode disposed between one of the books, the pattern; upper == singular sub-electrodes 'where the upper electrode lines are electrically connected to the halogen electrode' and are adapted to be lightly combined with the brush wires to form a plurality of capacitors, and at least - the fatigue capacitance Upper electrode system and corresponding: the = electric Insulation 'ΐ knife and the plurality of other sub-electrodes on the &amp; field lines respectively connected to the corresponding blade of the plurality of pixel electrodes day. τ &lt;Electronic R array 乂8 plate, such as the thin film transistor described in the second paragraph of the second patent, the common wiring is welded. f should be a membrane electrode 19 body, which produces a thin plate as described in item 17 or item 18 of the gas range 'where there is a particle/hole between each of the pixel electrodes and one of the electricity' The upper portion further includes an opening, and the opening is located above the octet /5 to electrically insulate the particle/hole from one of the pixel electrodes. Array n is a thin film transistor (four) substrate as described in claim 17 of the invention, wherein the patterned upper electrode further comprises a plurality of necks 36 1283383 13683 twf.doc/006 P mother, the heads are connected to the 瑕Between the sub-electrodes other than the sub-electrodes in the fatigue capacitor. The thin film transistor according to the second aspect of the invention, wherein the sub-electrode of the capacitor pad is in contact with one of the corresponding ones and the wiring. 22. If the patent application scope is the second item or the second = array substrate, wherein the two or two poles are formed when one of each of the pixel charges = I::: wiring has a particle/hole One of the openings further includes an opening, and the opening σ bit is above the hole to electrically insulate the particle/hole from one of the painted electrodes. The method of repairing the film by the iV*, the film electric day and the day array (four) plate, is suitable for the repair of the thin film transistor array substrate of the first or sixth item of the board, when these are - or When the scans are matched with (4) = r2^ particles/holes, the capacitance formed by the particles is a gas valley. The repair method includes: the gas is charged; the sub-electrodes in the turtle capacitor correspond to the 昼i1# Part of the area to make the edge of the tantalum capacitor. -° corresponds to one of the plurality of halogen electrodes, and the thin film transistor method described in item 23 of the invention, the method of removing and substituting the tantalum capacitor includes The laser removes the side of the partial area of one of the 37 I28md. The method for repairing a thin germanium transistor array substrate according to claim 23, after removing a partial region of one of the pixel electrodes corresponding to the sub-electrode in the tantalum capacitor, The repairing method further includes: fusing the sub-electrode in the tantalum capacitor with one of the corresponding common wires or one of the scan wires. The method of repairing a thin film transistor array substrate according to claim 25, wherein the sub-electrode in the tantalum capacitor and one of the corresponding common wirings or one of the scan wirings are The method of welding includes laser welding. The method for repairing a thin film transistor array substrate according to claim 23 or 25, wherein one of the pixels 2 and one of the shared wirings or the peptide are scanned Wiring one of the lines and the ancient ^ 〆 ~ repair method more C / hole when 'the beta Gan, except the area corresponding to the second particle / hole above the variegated electricity, so that the second Particle/turn; = one of the electrodes is electrically insulated. An array = such as! 4 specializes in the above-mentioned thin film transistor hole described in Item 27 of the Fan Park, 2 except for the area corresponding to the second particle / one of the laser-removing element electrodes The method is suitable for repairing a substrate, and when the transistor array is printed on one of the upper electrodes and one of the corresponding common wirings of the 38 13_〇6 or one of the scanning wirings, When a particle/hole is formed, the capacitance formed is a 瑕, tantalum capacitor, and the repairing method includes removing a partial region of one of the gold electrodes corresponding to the sub-electrode in the tantalum capacitor. And once the neck portion connected to the sub-electrode in the tantalum capacitor is cut off, so that the sub-electrode in the tantalum capacitor is electrically insulated from one of the corresponding pixel electrodes. 30. The method for repairing a thin film transistor array substrate according to claim 29, wherein the method of removing a partial region of one of the halogen electrodes corresponding to the sub-electrode in the tantalum capacitor comprises a thunder Shot removed. 3. The method of repairing a thin film transistor array substrate according to claim 29, wherein the method of cutting the neck portion connected to the sub-electrode in the tantalum capacitor comprises laser cutting. =2. The repair method of the thin film transistor 歹1 earth plate according to claim 29, wherein after the neck portion connected to the sub-electrode in the tantalum capacitor is cut, the repairing method further comprises: The sub-electrodes in the tantalum capacitor are fused to the corresponding ones of the common wirings or the scan wirings thereof. The method for repairing a thin film transistor earth slab according to claim 32, wherein one of the common wirings corresponding to the sub-capacitor of the tantalum capacitor or one of the scans is configured The method of phase welding includes laser welding. 34. A method for repairing a film transistor array substrate as described in claim 29 or claim 32, wherein when the halogens are electrically, one of them corresponds to When one of the shared wirings or one of the known wirings has a second particle/hole, the repairing method further includes: removing the halogens corresponding to the second particle/hole a region of one of the electrodes to electrically insulate the second particle/hole from one of the halogen electrodes. The method of repairing a thin film transistor array substrate according to claim 34, wherein the method of removing a region corresponding to one of the pixel electrodes above the second particle/hole includes a laser Remove. 36. A thin film transistor array substrate comprising: a substrate; a plurality of scan lines disposed on the substrate; a plurality of data lines disposed on the substrate, wherein the scan lines are distinguished from the data lines a plurality of pixel regions; 'a plurality of thin film transistors, each of which is located in one of the pixel regions, wherein the thin film electro-crystalline systems are driven by the scan lines; Each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors; a plurality of common wires are disposed on the substrate, and a portion of each of the pixel electrodes is located above one of the corresponding common wires I28m doc/006; and an it pole is disposed at each of the halogen electrodes and the wires Wherein _ ^ ^ φ ^ , the upper electrode is electrically connected to one of the eight electrodes, and is adapted to be coupled with the common wiring 2 to form a capacitor 'when the capacitor is - Gan flaw defect capacitor upper electrode electrically valley corresponding to the plurality of pixel electrodes wherein one book electrically insulating. The thin film transistor array substrate of claim 36, wherein the upper electrode of the tantalum capacitor is fused to one of the corresponding common wirings. 38. The thin film transistor array substrate of claim 36, wherein the pixel electrodes are provided when there is a particle/hole between each of the halogen electrodes and one of the common wirings. One of the openings further includes an opening, and the opening is located above the particle/hole to electrically insulate the particle/hole from one of the halogen electrodes. 39. A thin film transistor array substrate, comprising: a substrate; a plurality of scan lines disposed on the substrate; a plurality of data wires disposed on the substrate, wherein the scan wires are distinguished from the data wires a plurality of pixel regions; 1. a plurality of thin film transistors, each of the thin film electro-crystal systems being located in one of the halogen regions, wherein the thin film electro-crystalline systems are driven by the scan lines; 1283383 13683twf .doc/006 夕 昼 昼 ' ' 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 每一 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a portion of the halogen electrodes, S, standing above one of the corresponding scan wires; and a 'Lu'; *; a pole disposed between each of the halogen electrodes and one of the plurality of electrodes The upper electrode is electrically connected to the plurality of electrodes, and is adapted to be coupled to one of the common wirings to form a capacitor. When the capacitor is a tantalum capacitor, the upper electrode of the capacitor is sealed. And corresponding to these One of the electrodes is electrically insulated. The thin film transistor array substrate of claim 39, wherein the upper electrode of the tantalum capacitor is fused to one of the corresponding scan wires. The thin film transistor array substrate of claim 39, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the pixel electrodes One of the openings further includes an opening, and the opening is located above the particle/hole to electrically insulate the particle/hole from one of the halogen electrodes. 42. A method for repairing a thin film transistor array substrate, which is suitable for repairing a storage capacitor on a gate (Cst cm gate) or a storage capacitor on a common wiring (Cst on common) thin film transistor array substrate a portion of each of the pixel electrodes on the substrate is located above a corresponding one of the scan lines or a common line, and the 42 f.doc/006 lining electrode and the corresponding scan line or the common line are disposed between The upper electrode is electrically connected to the upper electrode, and when the upper electrode has a first particle/hole between the corresponding scan line or the common line, the capacitance formed is one The capacitor is repaired, and the repairing method includes: removing a partial region of the halogen electrode corresponding to the upper electrode of the tantalum capacitor, so that the upper electrode of the tantalum capacitor is electrically insulated from the corresponding pixel electrode . The repairing method of the thin film transistor array substrate of claim 42, wherein the repairing method further comprises after removing a partial region of the halogen electrode corresponding to the upper electrode of the tantalum capacitor The method of repairing a thin film transistor array substrate according to claim 42 of the invention, wherein the upper electrode of the tantalum capacitor is fused to one of the corresponding scan wires or one of the common wires. A method of removing a partial region of the pixel electrode corresponding to the upper electrode of the tantalum capacitor includes laser removal. g '45. A method for repairing a thin film transistor array substrate according to claim 43 of the patent application, The manner in which the upper electrode of the tantalum capacitor is fused to one of the corresponding scan wires or one of the common wires includes laser fusing. 46. As described in claim 42 or 43 A method for repairing a thin film transistor array substrate, wherein a second particle/breaking 43 12833⁄43⁄4 twf is present between the halogen electrode and the common wiring or the scanning wiring. In the case of doc/006, the repairing method further comprises: removing an area corresponding to the ridge above the second particle/hole to electrically insulate the second particle from the pixel electrode. The method for repairing a thin film transistor array substrate according to claim 46, wherein the method for removing a region corresponding to the pixel electrode above the second hole of the second step includes a laser beam 48. The crystal array substrate comprises: a substrate; a plurality of scanning wires disposed on the substrate, and a scan = wiring 'distribution ^ on the substrate, wherein the = wiring and the data wiring system distinguishes a plurality of pixel regions a two-film transistor, each of the thin germanium electro-crystal systems being located in one of the far-end halogen regions, wherein the thin films are driven by the scan lines; In the one of the plurality of pixel regions, the pixel electrodes have: the extending direction is different from the extending direction of the second groove, and: the first groove and the first Two grooves are connected; μ The common wiring is disposed on the substrate, and each of the regions of the plurality of electrodes is located above one of the corresponding ones, and the volume is a good one, and the pixels are combined with the silver and the mother. The first trench of the electrode 44 1283383 twf.doc/006 13683tv = the junction of the second trench is located above one of the corresponding ones; and the 共用 乂, with the wiring common west placed on each of the halogen electrodes And the sub-bars are found between the semantics, and each of the S-domains of the upper electrodes respectively corresponds to one of the (four)-electrode electrodes, and one of the electrical arrays, such as the singularity, the 48th item The thin film transistor is connected to the first trench and the first trench is adjacent to the electrical conductivity of one of the plurality of halogen electrodes corresponding to each of the upper electrodes Junction. 50. A thin germanium transistor array substrate, comprising: a substrate; a plurality of scan lines disposed on the substrate; ^ a plurality of data wires disposed on the substrate, wherein the scan wires and the data The wiring system distinguishes a plurality of pixels into a plurality of thin film transistors, and each of the thin film electro-crystal systems is located in a plurality of thin-film regions, wherein the thin-film transistors are driven by some scanning wiring a plurality of halogen electrodes, each of which is located in the plurality of halogen regions, and electrically connected to the corresponding thin film electro-crystals, wherein each of the plurality of electrodes The element electrode has at least one first trench and at least one second trench, the first trench extends in a different direction from the second trench, and the first trench is in communication with the second trench ; ; ; ; ; ; ; ; ; ; ; ; The first of the electrodes The intersection of the groove and the second groove is located above one of the corresponding common wires; and the upper electrode is disposed between each of the plurality of pixel electrodes and the common wires, and the a portion of the upper electrode is electrically connected to one of the corresponding halogen electrodes, and is adapted to: the common wiring is coupled to form a capacitor, and when the::J-瑕疵 capacitance, the a portion of one of the plurality of pixel electrodes of the upper electrode system /, Λ« in the capacitor is electrically brewed in the tantalum capacitor in the thin film transistor according to the above The upper electrode is fused to one of the corresponding common wirings. (4) (4) The thin film transistor according to item 5G, wherein when each of the halogen electrodes and the particles have a particle/hole, the electricity is broken; further comprising an opening, and the opening is located in the particle / = = edge to make the particle / hole and the halogen electrode which is applied to the Shen (4) (four) base (four) repair method, suitable for the electrode and the corresponding two of the two = have - the first particle / hole The capacitance formed is a 46 1283383 13o83twf.doc/006 tantalum capacitor' and the repairing method includes: removing the portion of the upper electrode corresponding to the upper electrode in the tantalum capacitor The partial region is located at each of the electrodes corresponding to the electric power of the corresponding pixel electrodes: the upper electrode of the tantalum capacitor is electrically insulated from one of the core and the diennial electrode. U ϋ 修补 修补 中 中 中 专利 专利 专利 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 薄膜 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除 移除Some areas include laser removal. =5·If you apply for The method for repairing a thin film transistor p歹1 earth plate according to Item 53 of the present invention, after removing the portion of the plurality of halogen electrodes corresponding to the upper electrode of the tantalum capacitor The method further includes: splicing the upper electrode of the tantalum capacitor with one of the corresponding ping-pong wires, wherein the method for repairing the thin film transistor array substrate according to claim 55, wherein The side of the tantalum capacitor that is fused to one of the corresponding common wirings includes laser refining. ^ 57. The thin film transistor array substrate of claim 53 or 55 The repairing method further includes: when a first particle/hole is formed between one of the halogen electrodes and one of the corresponding common wirings, the repairing method further comprises: removing the second particle corresponding to the second particle / The area above the hole is 47 ί283^3 twf.d〇c/〇〇6 one of the poles, one of the electrodes is electrically connected to the second particle/hole and the hole昼. Affirmation of the scope of patents 57 The repairing method of the thin film electric 曰P array substrate, 1 χ searching for the Japanese body A, _, which removes the seven corresponding ones of the halogen electrodes corresponding to the first and the first holes; Laser removal. Time or method package 48
TW93123443A 2004-04-23 2004-08-05 Thin film transistor array substrate and repairing method thereof TWI283383B (en)

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TW93123443A TWI283383B (en) 2004-04-23 2004-08-05 Thin film transistor array substrate and repairing method thereof
US10/904,042 US7221413B2 (en) 2004-08-05 2004-10-21 Thin film transistor array substrate and repairing method thereof
JP2005000568A JP2006047957A (en) 2004-08-05 2005-01-05 Thin film transistor array substrate and repairing method thereof
US11/695,056 US7349035B2 (en) 2004-08-05 2007-04-02 Thin film transistor array substrate having particular patterned electrode
US11/971,886 US7436466B2 (en) 2004-08-05 2008-01-09 Repairing method of a thin film transistor array substrate
US11/971,883 US7426006B2 (en) 2004-08-05 2008-01-09 Thin film transistor array substrate
US12/190,577 US7646446B2 (en) 2004-08-05 2008-08-12 Repairing method of a thin film transistor array substrate
US12/618,788 US7817240B2 (en) 2004-08-05 2009-11-16 Thin film transistor array substrate having particular pixel electrode and patterned upper electrode

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