1281260 15899twf.doc/006 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種主動元件的製造方法，且特別是 有關於薄膜電晶體的製造方法。 【先前技術】 現今社會多媒體技術相當發達，多半受惠於半導體元 件或顯示裝置的進步。就顯示器而言，具有高晝質、空間 利用效率佳、低雜功率、練射等優越特性之薄膜電晶 體液晶顯示器（Thin Film Transistor Liquid咖如此㈣， TFT-LCD)已逐漸成為市場之主流，使得薄膜電晶體被廣 泛的運用在薄膜電晶體液晶顯示器中。 -圖1繪不習知薄膜電晶體的剖面圖。請參考圖1，習 知薄膜電晶體1GG包括-基板11G、—閘極12G、一介電層 130、一通道層140、歐姆接觸層142、一源/沒極150與I ”電層160。其中’閘極12〇配置於基板11〇上，而介電 層130覆蓋住閘極120。此外，通道層14〇配置於間極12〇 上方區域之介電層13〇上。歐姆接觸層142配置於通道層 140上，而源/汲極15〇配置於通道層14〇上。另外，介二 層160配置於基板上，並覆蓋住源/汲極15〇。 屯 更詳細地說，源/汲極15〇係由一阻障層152、一 與—阻障層156所構成。其中，阻障層152配置於 =層154與歐姆接觸層142之間，而阻障们％配置於 V月豆層154上。值得注意的是，部分導體層154暴露於外。 就此種型％的源/汲極15〇的形成方式而言，在歐姆接 1281260 15899twf. doc/006 一弟四阻障層。其中，第三阻障層配置於基板上，而 導體層配置於第三阻障層上。第四阻障層覆蓋住第二導 層，且第三阻障層與第四阻障層包覆第二導體層。此 $三阻障層與第四阻障層之材質可以是銦、鉻、欽或 氮化物、鈦鎢合金、石夕化物金屬。另外，第二導體層的材 質可以是銅、鋁、金、銀或鎳。 曰 上述之薄膜電晶體更可以包括一歐姆接觸層，其 於通道層與源極/汲極之間。 〃 上述之第—阻障層與第二阻障層之材質可以是銷、 鉻、鈦或鈕等氮化物、鈦鎢合金、矽化物金屬。 ^述之第-導體層之材質可以是銅、紹、金、銀或錄。 土於上述目的或其他目的，本發明 體的製造方法，其包括下列步驟。首先，提供^^曰: =基板上形成—閘極。接著，在基板上形成-第-介ί ^覆蓋閘極與基板。然後，至少在閘極上方之第一介: °在基板上形成一第—阻障層以覆蓋i 部八!·二在第一阻障層上形成-第-導體層，接著， =σ二弟—導體層。在第一導體層與部分第一阻障層上 弟二阻障層。接著，移除部分第二阻障層，以形成 層Γ最|極j其中第一阻障層與第二阻障層包覆第一導體 曰 ，在源極/汲極上形成一第二介電層。 形成閘極之方法可以是在基板上形成一第三阻 -=卿妾者，在第三阻障層上形成一第二導體層，其中第 -w層暴露出部分第三阻障層。最後，在第三阻障層上 7129. The invention relates to a method of manufacturing an active device, and more particularly to a method of manufacturing a thin film transistor. [Prior Art] Today's social multimedia technology is quite developed, and most of them benefit from advances in semiconductor components or display devices. In terms of displays, thin film transistor liquid crystal displays (Thin Film Transistor Liquid Café (4), TFT-LCD) with superior properties such as high quality, good space utilization efficiency, low noise power, and practice have gradually become the mainstream of the market. The thin film transistor is widely used in a thin film transistor liquid crystal display. - Figure 1 depicts a cross-sectional view of a conventional thin film transistor. Referring to FIG. 1 , a conventional thin film transistor 1GG includes a substrate 11G, a gate 12G, a dielectric layer 130, a channel layer 140, an ohmic contact layer 142, a source/depolarizer 150, and an I" electrical layer 160. Wherein the gate 12 is disposed on the substrate 11 and the dielectric layer 130 covers the gate 120. Further, the channel layer 14 is disposed on the dielectric layer 13 of the region above the interlayer 12 。. The ohmic contact layer 142 It is disposed on the channel layer 140, and the source/drain 15〇 is disposed on the channel layer 14〇. In addition, the second layer 160 is disposed on the substrate and covers the source/drain 15〇. In more detail, the source The drain layer 15 is composed of a barrier layer 152 and a barrier layer 156. The barrier layer 152 is disposed between the layer 154 and the ohmic contact layer 142, and the barriers are disposed at V. On the mooncake layer 154. It is worth noting that part of the conductor layer 154 is exposed. In terms of the formation of this type of source/drain 15 ,, in the ohmic connection 1281260 15899 twf. doc/006 The third barrier layer is disposed on the substrate, and the conductor layer is disposed on the third barrier layer. The fourth barrier layer covers the second barrier And the third barrier layer and the fourth barrier layer cover the second conductor layer. The material of the third barrier layer and the fourth barrier layer may be indium, chromium, chin or nitride, titanium tungsten alloy, stone In addition, the material of the second conductor layer may be copper, aluminum, gold, silver or nickel. The above-mentioned thin film transistor may further comprise an ohmic contact layer between the channel layer and the source/drain 〃 The above-mentioned barrier layer and the second barrier layer may be made of a nitride such as a pin, a chrome, a titanium or a button, a titanium-tungsten alloy or a bismuth metal. The material of the first-conductor layer may be copper. Or the purpose of the above object or other objects, the method of manufacturing the body of the present invention, comprising the following steps. First, providing a gate electrode formed on the substrate. Then, forming on the substrate - the first - ί ^ cover the gate and the substrate. Then, at least the first layer above the gate: ° form a first barrier layer on the substrate to cover the i part eight! · two on the first barrier layer Forming a -first conductor layer, followed by a = σ 弟 - conductor layer. In the first conductor layer and a portion of the first barrier layer a second barrier layer. Then, a portion of the second barrier layer is removed to form a layer Γ | 极, wherein the first barrier layer and the second barrier layer cover the first conductor 曰 on the source/drain Forming a second dielectric layer. The method of forming the gate may be to form a third resistor on the substrate, and forming a second conductor layer on the third barrier layer, wherein the first-w layer is exposed Part of the third barrier layer. Finally, on the third barrier layer 7
1281260 15899twf.doc/006 形成-第四阻障層，以覆蓋第二導體層。 j之移除部分第—導體層的方 上述之移除部分第-乂疋蝕刻製程。 上述之在妒H ^ 可以是钱刻製程。 姆接觸層。更可崎通道層上形成-歐 啊日此外，在移除部分第一阻障層鱼部彳八^ 層後’更可以移除部分歐姆接觸層。另外，、移二^早 接觸層的妓可叹似彳餘。 雜七刀歐姆 後才本^先❹兩層轉層包㈣體層，然 Γ ==體Γ原子較不__層中。換 之通迢層的電性品質較為穩定。 易懂為ίίίΐ之上述和其他目的、特徵和優點能更明顯 ^丁 實施例，並配合所關式，作詳細說 明如下。 【實施方式】 长圖至2Ε繪不依照本發明實施例之薄膜電晶體製作 ML耘不思圖。請先參考圖2Α，本實施例之薄膜電晶體的製 造方法包括下列步驟。首先，提供—基板21()，並於基板 210上形成一閘極220。更詳細地說，形成閘極22〇的方法 可以是先在基板210上形成一阻障層222。然後，在部分 阻障層222上形成一導體層224。接著，在阻障層222上 形成一阻障層226 ’而阻障層222與阻障層226包覆導體 層224。此外’形成阻障層222與阻障層226的方法可以 是物理氣相沈積或化學氣相沉積製程。 1281260 15899twf.doc/006 然而，閘極220的結構並不限定於上述製程所形成。 ，例而言二形成閘極的方法可以是在基板上依序形成一阻 障層、-導體層與—阻障層。然後，對於上述製程所形成 之結構進行_製程’以形成閘極。此時，導體層係暴露 於外。1281260 15899twf.doc/006 Forms a fourth barrier layer to cover the second conductor layer. The portion of the first-to-conductor layer from which the portion of the conductor layer is removed is removed as described above. The above 妒H ^ can be a money engraving process. Contact layer. Further, the formation of the ohmic contact layer can be removed after the removal of a portion of the first barrier layer fish layer. In addition, the two layers of the early contact layer can be sighed. After the seven-knife ohms, this is the first two layers of the transfer layer (four) body layer, then Γ == body Γ atoms are not in the __ layer. The electrical quality of the overnight layer is relatively stable. The above and other objects, features and advantages of the invention will become more apparent. [Embodiment] The long view to the second embodiment of the thin film transistor according to the embodiment of the present invention is not considered. Referring first to Figure 2, the method of fabricating the thin film transistor of the present embodiment includes the following steps. First, a substrate 21 () is provided, and a gate 220 is formed on the substrate 210. In more detail, the method of forming the gate 22A may be to first form a barrier layer 222 on the substrate 210. Then, a conductor layer 224 is formed on the portion of the barrier layer 222. Next, a barrier layer 226' is formed on the barrier layer 222, and the barrier layer 222 and the barrier layer 226 are covered with the conductor layer 224. Further, the method of forming the barrier layer 222 and the barrier layer 226 may be a physical vapor deposition or a chemical vapor deposition process. 1281260 15899twf.doc/006 However, the structure of the gate 220 is not limited to the above process. For example, the method of forming the gate may be to sequentially form a barrier layer, a conductor layer and a barrier layer on the substrate. Then, the structure formed by the above process is subjected to "process" to form a gate. At this time, the conductor layer is exposed to the outside.
务明苓考圖2B，在基板21〇上形成一介電層230，以覆 蓋基板210與閘極22〇，而形成介電層23〇的方法可以是 化學氣相沉積製程。接著，在開極細上方區域之介電層 230上形成一通道層24〇，而形成通道層24〇的方法可以是 電漿增強型化學動目沉積製程。在本實施射，為了降低 =層24G之阻抗’在通道層24()上可以形成—歐姆接觸 層242，然而本實施例亦可不形成此歐姆接觸層。 “請參考圖2C’在基板210上形成一阻障層\52，以覆 盖住通道層24〇、_接則242及介電層23g之部份區 tti，在阻障層252上形成一導體層254，而形成導 體層254的方法可以是化學氣相沈積製程。隨後，移除部 ^之導體層254 ’而移除導體層254的方法可以是餘刻製 程。值得留意的是，由於阻障層252覆蓋住通道層細，、 因此在移除部分導體層254時，導體層254之金屬原子_ 苗導S考圖2D ’在基板210上形成—阻障層256，以覆 與部分之阻障層252。值得注意的是，導體 曰 可以疋具有傾角（Taper)結構，因此阻障層256將 1281260 15899twf.doc/〇〇6 具有較，的階梯覆蓋（coverage)效果。然而，導體層254 也可以是具有直角的結構（類似圖〗所示）。缺 部分阻障層252與部份阻障層256，以形成一源臟極 250 ’其中阻障層252與阻障層256包覆住導體層254。此 外，移除部分阻障層252與部份阻障層256的方式可以是 名虫刻製程。 、請苓考圖2E，移除部分歐姆接觸層242，以暴露出部 分通道層240，而部分歐姆接觸層242的方式可以是用蝕 刻衣私或疋反應性離子颠刻（ReactiveI〇nEtching)製程。 由於阻障層252與阻障層256包覆導體層254，因此在移 除部分歐姆接觸層242時，導體層254之原子污染通道層 240的情況能夠有所改善。在移除部分歐姆接觸層之 後，在基板210上形成一介電層26〇，以覆蓋住源極/汲極 250至此便兀成了薄膜電晶體2⑻之製作。對於薄膜電晶 體200的結構部分將詳述如後。 請繼續參考圖2E，薄膜電晶體2〇〇包括基板21〇、閘 極220、介電層230、通道層240、歐姆接觸層242、源極/ /及極250與介電層260。其中，閘極220配置於基板21〇 上。就本實施例而言，閘極220包括阻障層222、導體層 224與阻障層226,其中阻障層222配置於基板210上，而 阻障層222與阻障層226包覆住導體層224。此外，阻障 層222與阻障層226的材質可以是鉬、鉻、鈦或鈕等氮化 物、鈦鎢合金、矽化物金屬。另外，導體層224之材質可 以是銅、鋁、金、銀或鎳。Referring to Fig. 2B, a dielectric layer 230 is formed on the substrate 21 to cover the substrate 210 and the gate 22, and the dielectric layer 23 is formed by a chemical vapor deposition process. Next, a channel layer 24 is formed on the dielectric layer 230 in the upper region of the open region, and the channel layer 24 is formed by a plasma enhanced chemical moving deposition process. In the present embodiment, in order to reduce the impedance of the layer 24G, an ohmic contact layer 242 may be formed on the channel layer 24(), but this embodiment may not form the ohmic contact layer. "Please refer to FIG. 2C' to form a barrier layer \52 on the substrate 210 to cover the channel layer 24, the junction 242 and a portion of the dielectric layer 23g, forming a conductor on the barrier layer 252. The layer 254, and the method of forming the conductor layer 254 may be a chemical vapor deposition process. Subsequently, the method of removing the conductor layer 254' and removing the conductor layer 254 may be a remnant process. It is worth noting that due to resistance The barrier layer 252 covers the channel layer, so that when the portion of the conductor layer 254 is removed, the metal atom of the conductor layer 254 is formed on the substrate 210 to cover the portion 256. The barrier layer 252. It is worth noting that the conductor 曰 can have a taper structure, so the barrier layer 256 has a relatively large step coverage effect of 1281260 15899 twf.doc/〇〇6. However, the conductor layer 254 may also be a structure having a right angle (similar to the figure). A portion of the barrier layer 252 and a portion of the barrier layer 256 are missing to form a source drain 250' where the barrier layer 252 and the barrier layer 256 are covered. The conductor layer 254 is housed. In addition, a portion of the barrier layer 252 and a portion of the barrier layer 2 are removed. The manner of 56 may be a famous engraving process. Referring to FIG. 2E, a portion of the ohmic contact layer 242 is removed to expose a portion of the channel layer 240, and a portion of the ohmic contact layer 242 may be formed by etching or smearing The process of the reactive ion implantation process. Since the barrier layer 252 and the barrier layer 256 enclose the conductor layer 254, the atomic contamination of the channel layer 240 of the conductor layer 254 can be removed when a portion of the ohmic contact layer 242 is removed. There is an improvement. After removing a portion of the ohmic contact layer, a dielectric layer 26 is formed on the substrate 210 to cover the source/drain 250 until the thin film transistor 2 (8) is fabricated. The structural portion of 200 will be described in detail later. With continued reference to FIG. 2E, the thin film transistor 2 includes a substrate 21, a gate 220, a dielectric layer 230, a channel layer 240, an ohmic contact layer 242, a source//and The gate electrode 220 is disposed on the substrate 21 . The gate electrode 220 includes a barrier layer 222 , a conductor layer 224 and a barrier layer 226 , wherein the barrier layer 222 is included in the present embodiment. Disposed on the substrate 210, and the barrier layer 222 and the barrier layer The material of the barrier layer 222 and the barrier layer 226 may be a nitride such as molybdenum, chromium, titanium or a button, a titanium-tungsten alloy or a germanide metal. In addition, the material of the conductor layer 224 may be It is copper, aluminum, gold, silver or nickel.