1277038 九、發明說明： 【發明所屬之技術領域】 本發明係有關-種顯示面板，特別是關於—種具有時間多工驅動 電路的顯示面板及其驅動方法，且其亦可同時結合黑畫面插入（Biack image insertion)技術。 【先前技術】 液晶顯示器活用其薄型、輕量、低耗電力及不會帶來環境上的負 擔等的特性，在各應用領域中使用佔有率相當地高。一般液晶顯示器 通常係採駐動矩陣驅動電路來控軸示面板的作動，且隨著顯示技 術的蓬勃發展’如何提尚顯示品質與降低成本乃是目前業界所努力克 服之二大課題。 -般主動矩陣驅動電路之枝圖參第丨圖所示，在絲矩陣式液 晶顯示面板100中，每個畫素10具有一薄膜電晶體（TFT) 12作為開 關，其閘極連接至水平向的掃描線14，汲極連接至垂直向的資料線16， 而源極連接至液晶電極，如第i圖所示。顯示面板同一時間一次啟動 條水平掃描線14,以將該條線上的所有薄膜電晶體12打開，而經由 垂直資料線16送入資料信號至對應之畫素1〇中。接著關閉薄膜電晶 體12’直到下次再重新寫入信號，其間使得電荷保存在晝素電容μ上； 此時再啟動下一條掃描線，經由資料線輸入資料信號至對應畫素中,· 如此依序將整個晝面的資料信號寫入，再重新自第一條重新寫入信 中複數> 料線16係由資料驅動器20所驅動，複數掃描線μ 則由掃描驅動器22所驅動，如此即可控制主動矩陣式顯示面板中每一 個晝素10可根據輸入之資料信號作動而將影像顯示在顯示面板上。然 1277038 而此種同-列晝素中之每—晝素須分別對應—條資料線的電路設計存 麵資料線數量過多，導致所需之資料驅動器數量亦相對增多之問 通’不但會增加成本且太多㈣料線亦會降低顯示面板之開口率。 為改良上述缺點，f知另外提出—_ι晝素巾每二相鄰晝素 共用資料線之驅動祕’如第2 _示，其細變畫素與資料線之連 接關係’使同-列畫素中二相鄰晝素共用同—條資料線，以第2圖之 左畫素24與右畫素26為例，左晝素24與右晝素26係制連接至— 條資料線28，且左畫素24亦連接至第—掃描線％，而右畫素則同時 連接至第-掃描線30與第二掃描線32。其中，左晝素％係以薄膜電 晶體242作為控制之開關，薄膜電晶體撕之閘極電性連接至掃描線 30 ’源/汲極則分別電性連接至資料線28及一晝素電容244，使薄膜電 晶體242可根據該掃描、線30選擇性地導通，以自該資料線28傳送資 料域至左畫素24中；右晝素26係由薄膜電晶體262與264所控制， 該薄膜電晶體262的閘極係電性連接至掃描線3()，源/沒極則分別與薄 膜電晶體264之閘極及掃描、線32相連接，而薄膜電晶體264之源/沒 極係電性連接至資料線28與畫素電容266，使薄膜電晶體脱與撕 可根據該靠線30與32選擇性地導通，以自該資料線28傳送資料信 號至右畫素26中。 然而’上述利飼列二畫素共用資料線之電路設計雖然可以降低 成本並減少資料線與資料轉H數量，但在該二晝素巾侧使用至三 個薄膜電晶體’使其開口率仍無法有效提升；再加上左右畫素不對稱 1277038 設置’使付倾線二侧之畫素具有不同德人電壓，恐導致該二畫素 顯示的亮度不同所造成的奇偶線與閃爍的問題。 當然，除了降低成本與開口率之考量之外，為了提高液晶顯示器 之顯示品質’製造商更會運騎謂的插人黑晝面（Black inserti〇n) 之技術來使液晶顯示器的視覺效果更好，其係在相鄰的圖框與圖框之 間插入一黑畫面，使圖框與圖框的顏色變化看起來比較明顯，進而改 善畫面動態品質。目前插人黑畫面的方式通常不是採取適時的將背光 模組（Blacklight)關掉以顯現黑畫面，就是採用資料處理方式來插 入黑畫面；而目前以資料處理方式為主軸，其係將頻率提高一倍，一 半的時間餵入原本的畫素資料信號，另一半的時間使晝素變黑。然而， 要在相鄰的圖框與圖框之間插人—黑畫面，負責寫人f料信號的資料 驅動器之時脈頻率則必須因此增加一倍。若再配合前述共用資料線之 驅動電路設計，時脈頻率則會倍增到4倍，而此種高時脈頻率的資料 驅動器不但不容易製作且容易會發生對液晶晝素寫入時間不足的問題 等。 基於前述共用資料線之驅動電路設計雖然減少資料線與資料·驅動 用數量，但也因而增加薄膜電晶體的數量，導致開口率下降，頻 率提高一半’若要有黑晝面插入的效果，則頻率增加至4倍。有鐘於 此，本發明提出一種具有時間多工驅動電路的顯示面板，並可同時妹 合黑晝面插入技術，以改善存在於先前技術中之該等缺失。 、" 【發明内容】 本發明之主要目的係在提供一種具有時間多工驅動電路的顯示面 板及其驅動方法，其係利用同列相鄰之二畫素共用一條資料線的驅動 1277038 =且每嶋棚-網咖_，明 數目與開關數目，進而達到降低成本與增加開口率之功效者德之 本發明之另一目的係在提供一 板及1驅動方、"r ’、寺曰’夕工驅動電路的顯示面 板及…《方法，其係可_結合插人黑畫面技術，以便在不 脈頻率之:t提下提高齡畫面之動態。$質。 "時 本發明之再-目的係在提供―種具树間多工驅㈣路的顯 板’其係·最少的開關數目達到控制每個晝素作動之 高製程良率。 、’故可提 根據上述目的本發明提出一種具有時間多工驅動電路的顯示面 板’其係包括助垂直之魏條平行讀赠與轉線，其中包含有 一第-掃描線與-第二掃描線以及一第一資料線；並有一第一書素分 別與第-掃描線與第-資料線連接；—第二晝素係分別與第二掃描: 與第-晝素連接·，另有-第-開關設置於第一晝素中，並根據第一掃 描線之控制選擇性地自第一資料線傳送第一資料信號至第一書素以 及一第二_設置於第二晝素中’並根據第1線與第二掃描線之控 制而選擇性地自第一資料線傳送第二資料信號至第二佥素中 本發明更可配合上述之顯示面板提出1時間多工驅動，配合上 述之結構’首先致能第-掃描線與第二掃描線；再輪入第二資料作號 ^第-資料線，使第二資料信號輸人至第-晝素與第二晝素，、而^ 忐第二掃描線；接著輸入第一資料信號至第一掃描線， 吹,一 號輸入至第一晝素後即可失能第一掃描線’如此即完成：畫= 1277038 二畫素之驅動。以此類推，其餘像素亦依據此方式進行驅動。 上述之電路設計更可配合一插入黑晝面技術，以便在相鄰的圖框 與圖框之間插入黑晝面。 底下藉由具體實施例配合所附的圖式詳加說明，當更容易暸解本 發明之目的、技術内容、特點及其所達成之功效。 【實施方式】 本發明提出之一種具有時間多工驅動電路的顯示面板及其驅動方 法乃係利用同列相鄰之二畫素共用一條資料線的驅動方式，使相鄰二 畫素僅利用二個薄膜電晶體作為開關即可，以有效取代習知相鄰畫素 共用資料線需要三個電晶體開關，故可以同時減少資料線之數目與電 晶體開關數目’進而達到降低成本與增加開口率之功效者。此外，更 可配合插人黑畫面技術來提高顯示畫面之動態品質。 明參閱第3圖所不，圖所示，圖中顯示本發明之二相鄰畫素共用 資料線之驅動電路的部份示意圖，在此液晶齡面板上係設置有複數 條平行之掃赚S1〜Sm，以及複數條平行之f mD1〜Dm，且資料線 D1〜Dm係與該些掃描線sl〜Sms相垂直。在此係以第—資料線仍以 及第-掃描線S1、第二掃描線S2與第三掃描線S3以及其中之晝素4〇 至46為例來詳細說明本發明之精神。 如第3圖所不，在此顯示面板中，一第一畫素4〇係分別連接第— 掃描線S1與第-資料線D1，且第一畫素4G係由第一薄膜電晶體撕 所控制’以根據第-掃描、線S1之控制選擇性地自第一資料、線讥傳送 第-貝料㈣至第-晝素4〇。-第二晝素42係分別連接第二掃描線 1277038 S2與第一畫素40，其係由一第二薄膜電晶體422所控制，以根據第一 掃描線S1與第二掃描線S2之控制而選擇性地自第一資料線Di傳送第 二資料信號至第二晝素42。同樣地，一第三晝素44係分別連接第二掃 描線S2與第一資料線D1，且第三晝素40係由第三薄膜電晶體442所 控制’以根據第二掃描線S2之控制選擇性地自第一資料線di傳送第 三資料信號至第三晝素44。一第四畫素46係分別連接第三掃描線S3 與第三畫素44，其係由一第四薄膜電晶體462所控制，以根據第二掃 描線S2與第二掃描線S3之控制而選擇性地自第一資料線di傳送第四 1料#號至第四晝素46。其中，第一畫素40與第三晝素44係位於第 一資料線D1之左側，且第二畫素42與第四晝素46係位於第一資料線 D1之右側’且相鄰同列之第一畫素4〇與第二晝素42以及同列之第三 晝素44與第四晝素46係共用一條資料線D1即可。當然，第一晝素4〇、 第一畫素42、第三晝素44以及第四晝素46等與資料線D1之位置並不 1要^ 3 ®所示’亦可將第-畫素4G與第三晝素44置於第-資 線1之右側且第二晝素42與第四畫素46置於第一資料、線di之左 側等不同的實施態樣，只要第-畫素40與第二晝素42、第三晝素 / '、46為顯示面板上之同一列相鄰晝素’且皆共用一條資料 線即符合本發明之精神。 詳古之 ^•主 ° ，請再參第3圖所示，第一畫素40之作動係由第一薄膜電 _ 4〇2作為控制開關，第一薄膜電晶體402之閘極係電性連接至第 第一源/汲極與第二源/汲極則分別連接第一資料線D1與 1277038 第二晝素42之作動係由第 第-源/汲極以及第二源/沒極則分別電性連接至第一晝㈣中第一薄 膜電晶體402與第一書音雷令/…^1277038 IX. Description of the Invention: [Technical Field] The present invention relates to a display panel, and more particularly to a display panel having a time multiplex drive circuit and a driving method thereof, and can also be combined with a black screen insertion (Biack image insertion) technology. [Prior Art] The liquid crystal display utilizes its characteristics of thinness, light weight, low power consumption, and no environmental burden, and its use rate is quite high in various application fields. Generally, the liquid crystal display usually adopts the resident matrix driving circuit to control the operation of the axis display panel, and with the vigorous development of the display technology, how to improve the display quality and reduce the cost is the two major problems that the industry is currently trying to overcome. In the wire matrix type liquid crystal display panel 100, each pixel 10 has a thin film transistor (TFT) 12 as a switch whose gate is connected to a horizontal direction. The scan line 14 has a drain connected to the vertical data line 16 and a source connected to the liquid crystal electrode as shown in FIG. The display panel activates the horizontal scanning line 14 once at a time to open all of the thin film transistors 12 on the line, and feeds the data signal to the corresponding pixel 1 via the vertical data line 16. Then, the thin film transistor 12' is turned off until the next time the signal is rewritten, during which the charge is stored on the pixel capacitor μ; at this time, the next scan line is activated, and the data signal is input to the corresponding pixel via the data line, The data signals of the entire face are sequentially written, and then re-written from the first line to the complex number > the line 16 is driven by the data driver 20, and the plurality of scan lines μ are driven by the scan driver 22, Each of the pixels 10 in the active matrix display panel can be controlled to display the image on the display panel according to the input data signal. However, 1277038 and each of the same-successes must correspond to the number of circuit design data lines of the data line, which leads to a relatively large number of required data drivers. Cost and too much (four) the material line will also reduce the aperture ratio of the display panel. In order to improve the above shortcomings, f knows that the _ 昼 昼 巾 巾 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 每 如 如 如The two neighboring elements in the prime middle share the same data line. Take the left picture 24 and the right picture 26 of Fig. 2 as an example. The left arpeggio 24 and the right alum 26 system are connected to the data line 28, The left pixel 24 is also connected to the first scan line %, and the right pixel is simultaneously connected to the first scan line 30 and the second scan line 32. Among them, the left sputum% is controlled by the thin film transistor 242, and the gate of the thin film transistor is electrically connected to the scanning line 30'. The source/drain is electrically connected to the data line 28 and the halogen capacitor respectively. 244, the thin film transistor 242 can be selectively turned on according to the scan and line 30 to transmit the data field from the data line 28 to the left pixel 24; the right pixel 26 is controlled by the thin film transistors 262 and 264. The gate of the thin film transistor 262 is electrically connected to the scan line 3 (), and the source/no pole is respectively connected to the gate of the thin film transistor 264 and the scan and line 32, and the source of the thin film transistor 264 is The poles are electrically connected to the data line 28 and the pixel capacitor 266, so that the thin film transistor can be selectively turned on according to the lines 30 and 32 to transmit the data signal from the data line 28 to the right pixel 26 . However, the circuit design of the above-mentioned two-pixel shared data line can reduce the cost and reduce the number of data lines and data. However, the use of three thin-film transistors on the side of the two-tin fabrics makes the aperture ratio still Can not effectively improve; plus left and right pixel asymmetry 1277038 set 'to make the two sides of the tilt line have different German voltage, which may cause the parity of the two pixels to display the difference between the odd line and the flicker. Of course, in addition to reducing the cost and aperture ratio considerations, in order to improve the display quality of the liquid crystal display, the manufacturer will also use the technology of black inserting to make the liquid crystal display more visual. Well, it inserts a black picture between the adjacent frame and the frame, so that the color change of the frame and the frame looks more obvious, thereby improving the dynamic quality of the picture. At present, the method of inserting black screens is usually not to turn off the backlight module (Blacklight) to display the black screen, or to use the data processing method to insert the black screen. At present, the data processing method is the main axis, which increases the frequency. Double, half the time to feed the original pixel information signal, the other half of the time to make the halogen black. However, to insert a black-screen between adjacent frames and frames, the clock frequency of the data drive responsible for writing the human-fed signal must be doubled. If the driving circuit design of the shared data line is matched, the clock frequency is doubled to four times, and the data driver of the high clock frequency is not easy to manufacture and the problem of insufficient writing time for the liquid crystal element is likely to occur. Wait. The drive circuit design based on the aforementioned shared data line reduces the number of data lines, data, and driving, but also increases the number of thin film transistors, resulting in a decrease in aperture ratio and a half increase in frequency. The frequency is increased to 4 times. In view of the above, the present invention proposes a display panel having a time multiplex drive circuit, and can simultaneously incorporate a black box insertion technique to improve such defects existing in the prior art. SUMMARY OF THE INVENTION The main object of the present invention is to provide a display panel having a time multiplex drive circuit and a driving method thereof, which are driven by a pair of adjacent pixels of the same column to drive a data line 1277038 = and each嶋 - - 网 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The display panel of the Xigong drive circuit and the "method, which can be combined with the black screen technology, in order to improve the dynamics of the age picture without the frequency of the pulse. $Quality. " The re-invention of the present invention is to provide a display panel with a multi-drive (four) road between the trees. The minimum number of switches is to control the high process yield of each element. According to the above object, the present invention provides a display panel having a time multiplex drive circuit, which includes a vertical read parallel read and transfer line, and includes a first scan line and a second scan line. And a first data line; and a first book element is respectively connected to the first scan line and the first data line; - the second element is separately connected with the second scan: and the first element is connected to the first element, and another a switch is disposed in the first pixel, and selectively transmits the first data signal from the first data line to the first pixel and the second second to the second pixel according to the control of the first scan line Selectively transmitting the second data signal from the first data line to the second pixel according to the control of the first line and the second scan line. The present invention can further cooperate with the display panel to provide a one-time multiplex drive, in combination with the above The structure 'first enables the first scan line and the second scan line; then rounds the second data as the number ^ the first data line, so that the second data signal is input to the first and second elements, and ^忐 second scan line; then input the first data signal to the first scan Blowing, loss can enter a number to the first day of the first scan line can prime 'is now complete: Videos = 1,277,038 pixels of the two drive. By analogy, the remaining pixels are also driven in this way. The circuit design described above can be combined with an insertion black face technique to insert a black face between adjacent frames and frames. The purpose, technical contents, features, and effects achieved by the present invention will become more apparent from the detailed description of the embodiments and the accompanying drawings. [Embodiment] A display panel with a time multiplex drive circuit and a driving method thereof are provided by using a driving mode in which two adjacent pixels of the same column share a data line, so that two adjacent pixels are used only by two. The thin film transistor can be used as a switch, which effectively replaces the conventional adjacent pixel shared data line and requires three transistor switches, so that the number of data lines and the number of transistor switches can be reduced simultaneously, thereby reducing the cost and increasing the aperture ratio. Efficacy. In addition, it can be combined with black screen technology to improve the dynamic quality of the display. Referring to FIG. 3, the figure shows a partial schematic diagram of a driving circuit of a second adjacent pixel shared data line of the present invention. On the liquid crystal age panel, a plurality of parallel sweeps are provided. ~Sm, and a plurality of parallel f mD1~Dm, and the data lines D1~Dm are perpendicular to the scan lines sl~Sms. Here, the spirit of the present invention will be described in detail by taking the first data line and the first-scanning line S1, the second scanning line S2 and the third scanning line S3, and the elements 4〇 to 46 therein as an example. As shown in FIG. 3, in the display panel, a first pixel 4 is connected to the first scan line S1 and the first data line D1, respectively, and the first pixel 4G is stripped by the first thin film transistor. The control 'selects the first to the first material, the wire to the first material, and the fourth to the fourth element. The second halogen 42 is connected to the second scan line 1277038 S2 and the first pixel 40 respectively, which is controlled by a second thin film transistor 422 to be controlled according to the first scan line S1 and the second scan line S2. And selectively transmitting the second data signal from the first data line Di to the second halogen 42. Similarly, a third halogen 44 is connected to the second scan line S2 and the first data line D1, respectively, and the third halogen 40 is controlled by the third thin film transistor 442 to be controlled according to the second scan line S2. The third data signal is selectively transmitted from the first data line di to the third halogen 44. A fourth pixel 46 is connected to the third scan line S3 and the third pixel 44 respectively, and is controlled by a fourth thin film transistor 462 to be controlled according to the second scan line S2 and the second scan line S3. The fourth material ## to the fourth halogen 46 are selectively transmitted from the first data line di. The first pixel 40 and the third pixel 44 are located on the left side of the first data line D1, and the second pixel 42 and the fourth pixel 46 are located on the right side of the first data line D1 and adjacent to the same column. The first pixel 4〇 and the second halogen 42 and the third halogen 44 and the fourth halogen 46 in the same column may share one data line D1. Of course, the position of the first element 4, the first pixel 42, the third element 44, and the fourth element 46 is not the same as that of the data line D1. 4G and the third pixel 44 are placed on the right side of the first-line 1 and the second pixel 42 and the fourth pixel 46 are placed on the left side of the first data and the line di, as long as the first-pixel It is in accordance with the spirit of the present invention that 40 and the second halogen 42 and the third halogen/', 46 are the same adjacent pixels on the display panel and both share a data line. Detailed description of the ancient ^ ^ main °, please refer to Figure 3, the first pixel 40 actuation system from the first thin film electricity _ 4 〇 2 as a control switch, the first thin film transistor 402 gate electrical Connecting to the first source/drain and the second source/drain are respectively connected to the first data line D1 and 1277038, and the second element 42 is operated by the first source/drain and the second source/dip. Electrically connected to the first thin film transistor 402 in the first 昼 (4) and the first book rayling /...^
第一晝素電容404。 控制開關，第二薄膜電晶體422 1下動係由弟二薄膜電晶體422作為 之閘極係電性連接至第二掃描線S2， 444之間以及第四畫素電容464。 其中，上述之第-薄膜電晶體4〇2、第二薄膜電晶體422、第三薄 膜電晶體442以及第四薄膜電晶體姬可為p型場效電晶體或N型場 效電晶體。 在說明完第3圖之電路結構之後，滅說明其飾時序圖，請參 閱第4圖’其係掃描線S1、S2與S3之掃描線號及其對狀畫素4〇、 42、44與46之作動時序圖，請同時參第3圖及第4圖所示，此液晶顯 不面板中每-晝素之時間多玉驅動方法包括：在時間區段T1中，先致 能第一掃描線si與第二掃描線S2，以開啟第一薄膜電晶體402、第二 薄膜電晶體422與第三薄膜電晶體輸人第二資料信號至第一資料線 D1，此時第二資料信號會輪入至第一晝素電容4〇4、第二晝素電容424 1277038 與第三晝素電容464 ;再於時間區段T2中，失能第二掃描線s2，以關 閉第二薄膜電晶體422與第三薄膜電晶體442,並輸入第-資料信號至 第-掃描線D1 ’使第-資料信號寫人該第—晝素電容中而取代第二資 料#號。在時間區段T3時，則失能第一掃描線S1關閉第一薄膜開關 402 ’且致能第二掃描線S2與第三掃描線％，此時係開啟第三薄膜電 晶體442、第四薄膜電晶體462與第五薄膜電晶體482，以輸入第四資 料#號至第一資料線D1，使第四資料信號輸入至第三晝素電容444、 第四畫素電谷464與第五晝素電容484 ;再於時間區段T4中，失能第 二掃描線S3來關閉第四薄膜電晶體4的與薄膜第五電晶體仙2，以輪 入第二貝料^叙第—掃描線D1，使第三資料信號寫人至第三晝素電 谷444而取代第四資料信號；而後敎能第二掃描線％。以此類推， 即可控制此液晶顯示面板中之所有晝素產生作動。 田^上述之時間多工驅動方法更可同時配合一插入黑畫面技 術，以便在相鄰的_與圖框之間插人黑晝面，進而提高晝面動態品 明同時參考第3 ®及第5圖所示，當圖框為奇數酵時，控制奇 數列之旦素40、42、48、50 ' 56、58的電晶體可根獅描線S1〜S6 而依序開啟，使奇數狀晝素4G、42、m 58分別以上述之 時間多工驅動方法银入每個晝素本身相對所屬的電壓 ，並將偶數列之 旦素44、46、52、54餵入接近共通電壓v_之值，以使偶數列之晝素 44 46 52、54全部產生黑晝面。相對地，當圖框為偶數圖框時，控 12 1277038 制偶數列之晝素44、46、52、54的f晶體可根據掃描線S1〜S6而依 序開啟，使偶數列之畫素44、46、52 ' 54可藉由前述時間多工驅動方 法餵入每個晝素本身所屬之相對籠，縣奇數列之畫素仙、42、48、 50、56'58餵入接近共通電壓VeOT之值，如此亦可使奇數列之畫素4〇、 42、48 ' 50、56、58全部產生黑晝面。 再者除了第3圖之實施例之外，本發明更具有不同之實施例，The first halogen capacitor 404. The second thin film transistor 422 1 is electrically connected to the second scan lines S2, 444 and the fourth pixel capacitor 464 by the second thin film transistor 422 as a gate. The first thin film transistor 4〇2, the second thin film transistor 422, the third thin film transistor 442, and the fourth thin film transistor may be p-type field effect transistors or N-type field effect transistors. After explaining the circuit structure of Figure 3, the timing diagram of the decoration is described. Please refer to Figure 4, the scanning line numbers of the scanning lines S1, S2 and S3 and their opposite pixels 4〇, 42, 44 and For the timing diagram of 46, please refer to Fig. 3 and Fig. 4 at the same time. The multi-jade driving method for each time of the liquid crystal display panel includes: in the time segment T1, the first scan can be enabled first. The line si and the second scan line S2 are used to turn on the first thin film transistor 402, the second thin film transistor 422 and the third thin film transistor to input the second data signal to the first data line D1, and the second data signal is Rotating to the first halogen capacitor 4〇4, the second halogen capacitor 424 1277038 and the third halogen capacitor 464; in the time segment T2, disabling the second scan line s2 to turn off the second thin film transistor 422 and the third thin film transistor 442, and input the first-data signal to the first-scanning line D1', so that the first-data signal is written in the first-dimensional capacitor instead of the second data#. In the time segment T3, the disabled first scan line S1 turns off the first thin film switch 402' and enables the second scan line S2 and the third scan line %. At this time, the third thin film transistor 442 and the fourth are turned on. The thin film transistor 462 and the fifth thin film transistor 482 input the fourth data # to the first data line D1, and input the fourth data signal to the third pixel capacitor 444, the fourth pixel electric valley 464 and the fifth a halogen capacitor 484; in the time segment T4, the second scan line S3 is disabled to turn off the fourth transistor 4 of the thin film transistor 4 to turn into the second material. Line D1 causes the third data signal to be written to the third data channel 444 instead of the fourth data signal; and then the second scan line %. By analogy, all the elements in the liquid crystal display panel can be controlled to act. Tian ^ The above-mentioned time multiplex drive method can also be combined with a black screen technology to insert black enamel between adjacent _ and frame, thereby improving the dynamics of the 同时 surface while referring to the 3 ® and In the figure 5, when the frame is oddly fermented, the transistors controlling the odd-numbered elements 40, 42, 48, 50' 56, 58 can be sequentially turned on, so that the odd-numbered elements are sequentially turned on. 4G, 42 and m 58 are respectively silvered into the voltage corresponding to each halogen itself by the above-mentioned time multiplexing driving method, and the even-numbered deniers 44, 46, 52, 54 are fed to the value close to the common voltage v_. So that the even-numbered columns 44 46 52, 54 all produce black faces. In contrast, when the frame is an even frame, the f crystals of the cells 44, 46, 52, 54 of the 12 1277038 octave column can be sequentially turned on according to the scan lines S1 S S6, so that the even columns of pixels 44 46, 52 '54 can be fed into the relative cage of each element itself by the aforementioned time multiplex driving method, and the odd-numbered columns of the county, 42, 48, 50, 56'58 are fed close to the common voltage VeOT The value of this can also cause the odd-numbered pixels 4〇, 42, 48' 50, 56, 58 to all produce blackfaces. Furthermore, in addition to the embodiment of Figure 3, the present invention has more different embodiments.
只要其電路設計符合同列相鄰之二晝素共用—條資料線之原則即可。 請參閱第6圖所示’其與第3圖之差騎在於該第一畫素4〇與該第四 晝素46係位於資料線D1之右侧，而該第二畫素42與該第三晝素44 則位於資料線D1之左側；其餘之連接_與轉方式皆與第3圖之實 施例相同，故於此不再贅述。 练上所述，本發明主要係利用同列相鄰之二畫素共用一條資料線 的驅動方式且每個晝素僅彻—個開關來控制作動，關時減少資As long as the circuit design conforms to the principle of sharing the adjacent data in the same column, the data line can be used. Please refer to FIG. 6 'the difference between it and the third figure is that the first pixel 4〇 and the fourth pixel 46 are located on the right side of the data line D1, and the second pixel 42 and the first The triterpenoid 44 is located on the left side of the data line D1; the rest of the connection_and the rotation mode are the same as those in the embodiment of FIG. 3, and thus will not be described again. As described above, the present invention mainly utilizes a driving method in which a pair of adjacent pixels of the same column share a data line, and each element only controls the actuation by a single switch, and reduces the capital when the signal is closed.
料線之數目與關數目，進而翻降低成本與增加開口率之目的者。、 更可在不增加時脈頻率之前提下結合插人黑晝面技術來提高顯示畫面 之動態品質。 产^上所述之實為說明本發明之技術思想及特點，其目的 在使見、習此項技藝之人士能夠瞭解本發明之内容並 =限定本剌之專利_，即大凡依本個賴示之精神 籍化或修飾’仍應涵蓋在本發明之專利範圍内。 之均 【圖式簡單說明】 第1圖為一般主動矩陣驅動電路之示咅圖。 第2圖為習知面板於同—列晝素中二相鄰畫素共用資料線之驅動電路 13 1277038 示意圖。 第3圖為本發明之具有時間多工驅動電路的顯示面板之電路示意圖。 第4圖為本發明在驅動液晶顯示面板上之畫素作動的時序圖。 第5圖為本發明配合插入黑晝面技術在驅動液晶顯示面板上之畫素作 動的時序圖。 第6圖為本發明之另一實施例的電路示意圖 【主要元件符號說明】 12薄膜電晶體 16資料線 20貧料驅動裔 24左畫素 244晝素電容 28資料線 266畫素電容 32第二掃描線 404第一晝素電容 424第二晝素電容 444第三晝素電容 10畫素 14掃描線 18晝素電容 22掃描驅動器 242薄膜電晶體 26右晝素 262、264薄膜電晶體 30第一掃描線 40第一晝素 402第一薄膜電晶體 42第二晝素 422第二薄膜電晶體 44第三晝素 442第三薄膜電晶體 46第四畫素 14 1277038 462第四薄膜電晶體 464第四畫素電容 48第五畫素 482第五薄膜電晶體 484第五畫素電容 50、52、54、56、58 畫素 15The number of lines and the number of lines, which in turn reduces the cost and increase the aperture rate. It is also possible to improve the dynamic quality of the display screen by adding a black-faced technology before adding the clock frequency. The above description is based on the technical idea and the features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and to limit the patent of the present invention. The spirit of the invention or the modification 'should be covered by the patent of the present invention.均 [Simplified description of the drawing] Figure 1 is a schematic diagram of a general active matrix driving circuit. Figure 2 is a schematic diagram of the driving circuit 13 1277038 of the conventional adjacent common pixel shared data line in the same panel. 3 is a circuit diagram of a display panel with a time multiplex drive circuit of the present invention. Fig. 4 is a timing chart showing the operation of the pixels on the liquid crystal display panel of the present invention. Fig. 5 is a timing chart showing the operation of the pixel on the liquid crystal display panel in accordance with the technique of inserting the black mask in the present invention. Figure 6 is a circuit diagram of another embodiment of the present invention [main component symbol description] 12 thin film transistor 16 data line 20 poor material driven 24 left picture 244 昼 电容 capacitor 28 data line 266 pixel capacitor 32 second Scanning line 404 first halogen capacitor 424 second halogen capacitor 444 third halogen capacitor 10 pixel 14 scanning line 18 halogen capacitor 22 scanning driver 242 thin film transistor 26 right 昼 262, 264 thin film transistor 30 first Scanning line 40 first halogen 402 first thin film transistor 42 second halogen 422 second thin film transistor 44 third halogen 442 third thin film transistor 46 fourth pixel 14 1277038 462 fourth thin film transistor 464 Four pixel capacitor 48 fifth pixel 482 fifth thin film transistor 484 fifth pixel capacitor 50, 52, 54, 56, 58 pixel 15