TWI276032B - Active organic light emitting diode driving circuit - Google Patents
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1276032 — 五、發明說明(1) 【創作之領域】 主動ΐ ί日!係關於—種有機發光二極體元件,特別是-種 式右1 π ^叙光—極體元件驅動電路之架構,以改善主動 式有機發光二極體元件發光的均句度與對比。 【創作背景】 被動式矩陣有趟H、k 、 方式如# 一。 ’歲备先二極體顯示器面板的晝素與驅動 俨_ 一 = Ί Λ Λ圖^所不’一個典型的被動式矩陣有機發光二極 體顯不器100包含有客彻^ 列。兮链—w 士 夕们顯不晝素(p 1 xe 1) 1 6 0以陣列式排 α 该顯不為、有~并a次丨、丨> 丁向負料產生器ll〇(c〇lumndata generat〇r)與列向選擇產生器i2〇 (r〇w seiect generator )。在眚口仏 ^ ^ .、示才呆作上,每一列1 3 0 ( row 1 i ne )會 逐序開啟,而每一而,u _ 曰 素會同時依資料輸入佶打14(3 (column Hnes)之畫 干-由 食各Η 值大小而顯示亮度。在被動式矩陣顯 1說^ ^一個列開啟後結束後再接下一個列開啟, 資料產生器平行』IK,::列的畫素是先由不同行的 %入貝枓,然後在接下來的晝面時間 (,I rame time)仿:欠、、,以 說,被動式矩陣顯干°哭貝的— 輸入值而顯示晝面。換句話 的某一段時間是顯;:二::列晝素只在整個畫面時間中 乎在整個畫面時間中=趣而=動式矩陣顯示器則是幾 了间千都處於顯示晝面狀態。 ^ ,斤—门 Patent Ν0· 61573 56 )。在該專利 中,如弟二圖所示,爲 -+1276032 — V. Description of invention (1) [The field of creation] Active ΐ ί 日! About the structure of an organic light-emitting diode component, especially the right-hand type 1 π ^------ In order to improve the uniformity and contrast of the illumination of the active organic light-emitting diode element. [Creation background] The passive matrix has 趟H, k, and the way is #一.昼 岁 与 驱动 与 一 一 一 一 一 一 一 一 一 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个 一个兮 chain - w 士 夕 显 显 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( 〇lumndata generat〇r) and column selection generator i2〇(r〇w seiect generator). In the case of 眚口仏 ^ ^ ., the display is done, each column 1 3 0 ( row 1 i ne ) will be opened sequentially, and each, u _ 曰 会 will also be based on the data input beat 14 (3 ( Column Hnes) The painting is dry - the brightness is displayed by the value of each Η. In the passive matrix display 1 ^ ^ a column is opened and then the next column is opened, the data generator is parallel IK, :: column painting The prime is first entered into the shellfish by the different rows, and then in the next rame time (I rame time) imitation: owe,,, to say, the passive matrix is dry and dry, the input value is displayed. In other words, a certain period of time is obvious;: 2:: Lennon is only in the entire picture time in the entire picture time = interesting and = dynamic matrix display is a few thousand are in the display state ^ , 斤 - Door Patent Ν 0 · 61573 56 ). In this patent, as shown in the second figure, it is -+
,、、、員不旦素杀構包含一開關(s w i t c h )電,,,,,,,,,,,,,,,,,,,,,,,,,,,,
第4頁 1276032 五、發明說明(2) 晶體Μ1 2 3 0 ; —驅動電晶體Μ 2 2 4 0,一資料線2 1 〇 ( d a t a line),一選擇線220 (select line),一儲存電容cs 250 ’ 一電源供應Vdd 270 (power supply)以及一有機發 光二極體260 ( OLED )。在顯示面板的每一個晝素中,其 驅動電晶體M2的閘極到源極的起始電壓(thresh〇ld vo It age )若有不同,將導致通過〇LED的電流產生差異, 這種電流差異會導致面板晝素顯示亮度產生不均勻現象。 而這種因驅動電晶體閘極到源極的起始電壓不均,導致產 生驅動電流差異的現象的原因,大部分來自於電晶體製造 品質上控制不當所造成。 因電晶體起始電壓不同而使顯示畫面不均現象的改善 方面,已有習知專利之提出,如美國專利(U. S Patent No· 6229506 )。在該專利中,一種四個電晶體二個電容的 4T2C結構’可以補償每一晝素中驅動電晶體(drive transistor )的起始電壓以改善畫素的發光亮度均勻性。 如第三圖所示,該畫素架構有資料線310 ( data Hne ), 掃瞄線 320 (scan line),電源 Vdd 線 305,AZ 線 390 及 AZb 控制線395,四個電晶體33〇,34〇,37〇,350,自動歸零 (auto-zero)電容355及380與一個0LED 360。在這個晝素 架構中,相較於U.S Patent N0.6 1 57356,所增加的兩個 電晶體與一個電容,配合圖四的波形與驅動時序方式,是 可以補償驅動電晶體M2 340的起始電壓,以改善畫素的發 光不均勻情況。但是,由於所加進來的元件會在佈局中佔 據太多的空間’造成畫素發光開口率(aperture ratio)Page 4 1276032 V. Description of the invention (2) Crystal Μ 1 2 3 0 ; - Drive transistor Μ 2 2 4 0, a data line 2 1 〇 (data line), a select line 220 (select line), a storage capacitor Cs 250 ' A power supply Vdd 270 (power supply) and an organic light-emitting diode 260 (OLED). In each element of the display panel, if the gate-to-source starting voltage (thresh〇ld vo It age) of the driving transistor M2 is different, it will cause a difference in the current passing through the 〇LED, which is a current. Differences can cause unevenness in the brightness of the panel display. The reason why the initial voltage of the driving gate to the source is uneven, which causes a difference in driving current, is mostly caused by improper control of the quality of the transistor manufacturing. The improvement of the display unevenness due to the difference in the starting voltage of the transistor has been proposed by a conventional patent, such as U.S. Patent No. 6229506. In this patent, a 4T2C structure of two capacitors with two capacitors can compensate for the starting voltage of the drive transistor in each pixel to improve the uniformity of luminance of the pixels. As shown in the third figure, the pixel structure has a data line 310 (data Hne), a scan line 320 (scan line), a power supply Vdd line 305, an AZ line 390 and an AZb control line 395, and four transistors 33 〇. 34〇, 37〇, 350, auto-zero capacitors 355 and 380 with an 0LED 360. In this pixel structure, compared to US Patent N0.6 1 57356, the added two transistors and one capacitor, together with the waveform and drive timing of Figure 4, can compensate for the start of the drive transistor M2 340. Voltage to improve the uneven illumination of the pixels. However, since the added components will occupy too much space in the layout, the pixel aperture ratio is caused.
1276032 五、發明說明(3) 的喪失(loss)。更甚者,由於在執行自動歸零 (auto-zero)階段,有機發光二極體(〇LED )仍會有電流 通過而發光,而這個發光不是原本想要的,此會造成晝素 顯示對比的降低。 圖四是驅動圖三電路架構有關控制訊號AZ線、AZb 線、掃描線與資料線的時序圖。時序可分成自動歸零起始 電壓階段與資料寫入階段。在執行自動歸零階段前,M工 330,Μ3 370處於、、關〃狀態,Μ2 34〇與144 35〇處於 、、開’’狀態。此時,流經0LED之電流為前一個晝面時間之 電、流,,經過一短暫時間後,M1 330 '開,,,接著M3 37〇 此M 2 3 4 G的汲極與閘極接通其功能有如—個二 v,350、、『,因制2 340的間極電壓會升高 γ,_2電二二V厂接下㈣370會 容C2 355中,如此便完成的電起日始^壓資料被記錄在電 作。所以接下來資料寫人_\曰曰^起始電壓自動歸零動 體起始電壓的不同造成晝面不均的現I ’便不會顧2電晶 本發明的目的是提供一新太、土 ° 的開 均勻度,同時增加有機發光體^改善晝素發光的不 口率。 &體凡件在晝素中發光 本發明的另一目的是提 件顯示器以改善晝素發光對比的^ =的有機發光二極體元 創作之綜合說明1276032 V. Loss of invention (3). What's more, since the organic light-emitting diode (〇LED) still emits current through the auto-zero phase, the light is not originally intended, which causes the display of the pixel. The reduction. Figure 4 is a timing diagram of the control signal AZ line, AZb line, scan line and data line driving the circuit structure of Figure 3. The timing can be divided into an auto-zero start voltage phase and a data write phase. Before the automatic zeroing phase is executed, the M workers 330, Μ3 370 are in the state of "off", and the states of Μ2 34 〇 and 144 35 〇 are in the "open" state. At this time, the current flowing through the OLED is the electric current and current of the previous kneading time. After a short time, the M1 330 is turned on, and then the M3 37 is connected to the drain and the gate of the M 2 3 4 G. Its function is like - two v, 350,, ", because the interpole voltage of 2 340 will increase γ, _2 electric two or two V factory will be connected (four) 370 will accommodate C2 355, so the completion of the electricity start date ^ Pressure data is recorded in the electric work. Therefore, the next data writer _\曰曰^ initial voltage auto-zeroing the starting voltage of the moving body causes the unevenness of the surface. I will not care about the 2 crystal. The purpose of the invention is to provide a new, The uniformity of the soil °, while increasing the organic illuminant ^ improve the non-proportion of luminescence. & body parts illuminate in alizarin Another object of the present invention is to provide a comprehensive display of the organic light-emitting diode element of the ^= improving the contrast of the luminescence
1276032 五、發明說明(4) 上述之問題可以藉由下述之有機發光二極體元件晝素 架構而獲致改良。 —” 本發明是首先提出新的可均勻顯示之主動式有機發光 二極體驅動方式,在每個畫素設計採3個電晶體丨個電容的 3 T1 C架構’並加入額外的資料電容,此電容連接到發光畫 素’且該資料電容佈局的位置是在顯示面板晝素陣列區2 外。此外,每一晝素中的0LED元件,其陰極皆連接在一 起,且將其連接到Moc電晶體的一端,而m〇c電晶體的位置 也在顯示面板之外。藉著此一架構,畫素發光不均勻的問 題以及發光開口率問題均可獲得改善。 在另 貝^例中,在顯示面板外安排加上一個額外的 分流電晶體Mby與資料電容並聯,兩者均擺置於資料產生 态區(data generat〇r regi〇n ),加入Mby電晶體之功 能,主要功用為降低〇LED元件在自動儲存(aut〇-st〇re)起 始私壓P自&日守的電流,如此可以增加顯示面板晝素的顯示 對比。 本創作之其他目的及功能經配合下列圖示做進一步的 說明後將更為瞭解。 【實施例說明】 厂本有,主動式矩陣OLED 3T1C畫素架構50 0如圖五 f 了访Γq的ΐ晶體可用低溫多晶石夕(LTPS)薄膜電晶體或 /專膜電晶體實現。雖然一般的晝素架構是由1276032 V. INSTRUCTIONS (4) The above problems can be improved by the following organic light-emitting diode element halogen structure. —” The present invention first proposes a new active organic light-emitting diode driving method capable of uniform display, and adopts a 3 T1 C structure of 3 transistors and a capacitor in each pixel design and adds an additional data capacitor. The capacitor is connected to the luminescent pixel' and the location of the data capacitor layout is outside the display panel pixel array region 2. In addition, the OLED elements in each pixel have their cathodes connected together and connected to the Moc One end of the transistor, and the position of the m〇c transistor is also outside the display panel. With this architecture, the problem of uneven illumination of the pixels and the problem of the luminous aperture ratio can be improved. In another example, An additional shunt transistor Mby is arranged in parallel with the data capacitor in the outside of the display panel, both of which are placed in the data generation state region (data generat〇r regi〇n), and the function of the Mby transistor is added, and the main function is to reduce 〇LED components in the automatic storage (aut〇-st〇re) start private pressure P from & day guard current, which can increase the display contrast of the display panel. The other purposes and functions of this creation are matched with the following diagram It will be better understood after the further explanation. [Explanation of the embodiment] The factory has an active matrix OLED 3T1C pixel structure 50 0 as shown in Figure 5 f. The ΐ crystal of the ΐ ΐ crystal can be used for low temperature polycrystalline lithography (LTPS) film. Implemented in a transistor or / film transistor. Although the general halogen architecture is
1276032 五、發明說明(5) 薄膜電晶體及有機發光二極體元件構成,事實上在本發明 中電晶體用其他電晶體如M〇s也可以。 在圖五中3T1C晝素架構5 0 0包含三個PM0S電晶體530, 540 ’550,一儲存電容Cs 555,一 OLED 560 (有機發光二 極體元件)與一電晶體M〇c 565。掃瞄線520連接到電晶體 530的閘極,TW線590連接到電晶體550的閘極,資料線5 1〇 連接到電晶體550與530的汲極,電源供應vdd線505連接到 電晶體540的源極及儲存電容Cs 555的一端,而儲存電容 Cs的另一端連接到電晶體53〇的源極與電晶體54〇的閘極。 OLED 560的其中一端連接到電晶體54〇的汲極與電晶體55〇 的源極,OLED 560的另一端連接一匯集電晶體M〇c 565。 — 第六圖表示本發明3T1C畫素及顯示面板示意圖,在本 貫施例,在一條資料線上所有畫素中的電晶體53〇及電晶 體5j0的汲極,在本發明中將之連接到資料產生器區6〇8中 的資料電容Cd 602,且該資料電容Cd 6〇2佈局的位置是在 顯示面板畫素陣列區之外。此外,每一畫素中的叽⑽“^ 元件,其陰極皆連接在一起,且將其連接到M〇c電晶體565 的一端,而Moc電晶體565的位置也在顯示面板之外,而並 非在畫素陣列區内。 總結來說,顯示面板結構包含5個部份··資料產生器 區608位於晝素陣列外圍,選擇產生器52〇位於晝素陣列°^外 圍,tw控制線59〇位於晝素陣列外圍,M〇c電晶體565位於 畫素陣列外圍以及畫素陣列位於顯示面板中央。 第七圖是驅動圖六架構控制訊號的時序圖,圖中時序 1276032 五、發明說明(6) 可分為自動儲存起始電壓階段(aut〇_st〇re thresh〇ld voltage period )、掃瞄(資料輸入)與顯示階段。在自 動、^ 5起始電壓階段,scanl到scan N訊號會開始由 、、高” (Ml是關)接著變成、、低夕(Ml是開)。在1276032 V. DESCRIPTION OF THE INVENTION (5) A thin film transistor and an organic light emitting diode element are constructed. In fact, in the present invention, other transistors such as M〇s may be used for the transistor. In FIG. 5, the 3T1C halogen structure 500 includes three PMOS transistors 530, 540'550, a storage capacitor Cs 555, an OLED 560 (organic light emitting diode element) and a transistor M〇c 565. The scan line 520 is connected to the gate of the transistor 530, the TW line 590 is connected to the gate of the transistor 550, the data line 51 is connected to the drain of the transistors 550 and 530, and the power supply vdd line 505 is connected to the transistor. The source of 540 and one end of storage capacitor Cs 555, and the other end of storage capacitor Cs is connected to the source of transistor 53〇 and the gate of transistor 54〇. One end of the OLED 560 is connected to the drain of the transistor 54A and the source of the transistor 55A, and the other end of the OLED 560 is connected to a collecting transistor M〇c 565. - Figure 6 shows a schematic diagram of the 3T1C pixel and display panel of the present invention. In the present embodiment, the transistor 53A of all the pixels in one pixel and the drain of the transistor 5j0 are connected in the present invention. The data capacitance Cd 602 in the data generator area 6〇8, and the position of the data capacitance Cd 6〇2 layout is outside the display panel pixel array area. In addition, the 叽(10)"^ element in each pixel has its cathodes connected together and connected to one end of the M〇c transistor 565, and the position of the Moc transistor 565 is also outside the display panel. Not in the pixel array area. In summary, the display panel structure includes five parts. The data generator area 608 is located at the periphery of the pixel array, and the selection generator 52 is located at the periphery of the pixel array, and the tw control line 59 The 〇 is located on the periphery of the pixel array, and the M〇c transistor 565 is located at the periphery of the pixel array and the pixel array is located at the center of the display panel. The seventh figure is a timing diagram for driving the control signal of the figure six architecture, and the timing is 1276032. 6) can be divided into automatic storage start voltage phase (aut〇_st〇re thresh〇ld voltage period), scan (data input) and display phase. In the automatic, ^ 5 starting voltage phase, scanl to scan N signal It will start with, and high (Ml is off) and then become, and low eve (Ml is open). in
scanl,scan2,scan3,…scan N 是、、低〃的階段,TW 7〇5Λ號是先、、高’’接著、、低再變為、、高;而0C 707 訊號則是先、、低,,接著、、高夕;當TW 7〇5訊號是、、低, 且〇C 707訊號是、、低"的時候,電流將從Vdd 5〇5經過M2 540及0LED 560到達M〇c 565的汲極。因此,Cs電容555會 記錄一電壓值,該電壓值依M2 540與有機發光二極體元件 C^ED 560的特性而定。另一方面,等到Tw 7〇5訊號是 低 ’ oc訊號是、、高”的時候,Moc 565為、、關電流 不通,Cs 555會自動儲存m2 540的起始電壓。 至於在掃瞒(資料輸入)階段,掃描線循序由第一條 到第N條汛號由、、高〃到、、低〃的步驟中,資料訊號的變 化量會經由Cd 602,M1 530耦合到Cs 5 55,而且這個耦合 電壓會與原本儲在Cs 555上M2 540的起始電壓加成,而成 為真正的資料電壓訊號。當掃瞄所有的掃瞄線後就進入顯 示(display)階段,此時〇c 707訊號將由、、高"變為 、低// ,所以Moc 565將導通。因此所要的電流依照電晶 體Μ2源極到閘極的電麼差,由Vdd 5 0 5經Μ2 5 4 0到發光二 極體560而讓發光二極體560發光的比較均勻。如此,通過 0LED 560的電流將不會與M2 540的起始電壓相關,而將僅 與輸入的資料訊號有關。Scanl, scan2, scan3,...scan N is the stage of low and low, TW 7〇5 是 is first, high '', then low, then high, and 0C 707 is first, low ,, then, Gao Xi; when the TW 7〇5 signal is, low, and the 〇C 707 signal is, low ", the current will pass from Vdd 5〇5 through M2 540 and 0LED 560 to M〇c The bungee of 565. Therefore, the Cs capacitor 555 records a voltage value which depends on the characteristics of the M2 540 and the organic light emitting diode element C^ED 560. On the other hand, when the Tw 7〇5 signal is low ' oc signal is, high, Moc 565 is , and the current is off, Cs 555 will automatically store the starting voltage of m2 540. As for the broom (data In the input phase, the scanning line is sequentially changed from the first to the Nth apostrophe, the sorghum to the low squat, and the data signal change amount is coupled to the Cs 5 55 via Cd 602, M1 530, and This coupling voltage will be added to the initial voltage of M2 540 originally stored on Cs 555 to become the true data voltage signal. When all the scanning lines are scanned, it will enter the display phase, at this time 〇c 707 The signal will change from , , high "low, /, so Moc 565 will be turned on. Therefore, the required current depends on the difference between the source and the gate of the transistor ,2, from Vdd 5 0 5 to Μ 2 5 4 0 to the light. The diode 560 allows the light-emitting diode 560 to emit light more uniformly. Thus, the current through the 0 LED 560 will not be related to the initial voltage of the M2 540, but will only be related to the input data signal.
1276032 五、發明說明(7) 上述架構的優點是資料電容(data capacitor) 602 是位於資料產生器區608,而電晶體Moc 565也是位於晝素 陣列之外。透過這種安排將有效改善畫素開口率問題,更 甚者’本發明中整個晝素陣列配置將僅需掃瞄線520,資 料線510,Vdd線505及TW控制線590,如此配置可以簡化顯 示面板控制之複雜性。 在另一個較佳實施例中如第八圖、第九圖所示,畫素 架構與第五圖及第六圖是相類似的;唯一之差別在於在顯 示面板外安排加上一個額外的分流電晶體Mby808,其位置 是與資料電容Cd 602並聯並擺置於資料產生器區6〇8中。 加入Mby電晶體808之功能,主要是在自動儲存 (auto-store)起始電壓階段將較低壓的訊號經*Mby8〇8輸 入到OLED560的陽極,如此可以降低在自動儲存 (auto-store)起始電壓階段流經OLED560元件的電流,如 此可增加顯示面板晝素的顯示對比。 苐九圖是驅動圖八訊號的時序圖,圖中時序分成自動 儲存起始電壓階段、掃瞄(資料輸入)與顯示階段。在自 動儲存起始電壓階段,scan 1到scan N訊號會開始由 高” (Ml是關)接著變成、、低"(Ml是開)。在 scanl,scan2,scan3,…scan N 是、、低〃的階段,丁界 90 5訊號是先、、高,,接著、、低夕再變為、、高,/ ;而〇(: 9〇7 訊號則是先、、低”接著、、高” ,BY 909是、、高"然後 、、低接著、、高;當TW 90 5訊號是、、低"與9〇、7'訊號 疋低且BY 90 9為、、低的時候,將較低壓的資料訊號1276032 V. INSTRUCTIONS (7) The advantage of the above architecture is that the data capacitor 602 is located in the data generator area 608, and the transistor Moc 565 is also located outside the pixel array. Through this arrangement, the pixel aperture rate problem will be effectively improved. Even more, the entire pixel array configuration in the present invention will only require the scan line 520, the data line 510, the Vdd line 505 and the TW control line 590. The complexity of display panel control. In another preferred embodiment, as shown in the eighth and ninth diagrams, the pixel architecture is similar to the fifth and sixth diagrams; the only difference is that an additional shunt is placed outside the display panel. The transistor Mby 808 is placed in parallel with the data capacitor Cd 602 and placed in the data generator area 6〇8. The function of adding Mby transistor 808 is mainly to input the lower voltage signal through the *Mby8〇8 to the anode of OLED560 in the auto-store initial voltage stage, so that the auto-store can be reduced. The initial voltage phase flows through the current of the OLED 560 component, which increases the display contrast of the display panel pixels. The nine-figure diagram is a timing diagram for driving the eight signals. The timing is divided into automatic storage start voltage phase, scan (data input) and display phase. During the automatic storage start voltage phase, the scan 1 to scan N signals will start to be high (Ml is off) and then become, low " (Ml is on). In scanl, scan2, scan3, ... scan N is , In the low-lying stage, the Dingjie 90 5 signal is first, high, and then, low, and then changed to, high, /; and 〇 (: 9〇7 signal is first, low, then, high ", BY 909 is, high" and then, low, and high; when TW 90 5 signal is, low " and 9〇, 7' signal is low and BY 90 9 is, low, Lower pressure data signal
第10頁 1276032 五、發明說明(8) 經由Mby 808輸入到0LED560的陽極。因此,只有很小電流 經過OLED 560到達Moc 565的汲極。等到TW 905是 、、低” ’0C為 '、高’/ ’BY同時也是、'高夕,Moc 565與Mby 8 0 8為 關 電流不通’此時C s電容自動儲存Μ 2的起始電 壓。 雖 體也可 中 3T1C 1 050, 1 065, M2 540 償電晶 以 企圖具 同之創 應包括 然本發明前述圖示是採PM0S電晶體,事實上電晶 用NM0S電晶體,只是其相關的電壓是反相。在圖十 晝素架構1 0 0 0包含三個NM0S電晶體1 0 30,1 040 , 一儲存電容Cs 1 055,一 0LED 1 0 6 0與一電晶體Moc 圖十與圖五的最大差別是用NM〇s M2 1 040取代PM0S 及電晶體Moc位置的改變,另外,此結構可同時補 體M2 54 0及〇LED 1060的起始電壓值。 上所述者僅為用以解釋本創作之較佳實施例,並非 =Ϊ t創作作任何形式上之限制,是以,凡有在相 ,Γ1下所作有關本創作之任何修飾或變更,皆仍 在本創作意圖保護之範疇。Page 10 1276032 V. INSTRUCTIONS (8) Input to the anode of 0LED560 via Mby 808. Therefore, only a small current flows through the OLED 560 to the drain of the Moc 565. Wait until TW 905 is , low " '0C is ' , high ' / ' BY is also , ' Gao Xi , Moc 565 and Mby 8 0 8 is off current ' At this time C s capacitor automatically stores the starting voltage of Μ 2 Although the body can also be 3T1C 1 050, 1 065, M2 540 pays for the crystal in an attempt to have the same effect. However, the foregoing illustration of the invention is a PM0S transistor, in fact, the crystal is used for NM0S transistor, but its correlation The voltage is inverted. In the figure, the ten-dimensional structure 1 0 0 0 contains three NM0S transistors 1 0 30, 1 040, a storage capacitor Cs 1 055, an 0LED 1 0 6 0 with a transistor Moc The biggest difference in Figure 5 is to replace the PM0S and the change of the Moc position of the transistor with NM〇s M2 1 040. In addition, this structure can simultaneously complement the initial voltage values of M2 54 0 and 〇LED 1060. In order to explain the preferred embodiment of the present invention, it is not a limitation of any form of creation, that is, any modification or alteration relating to the creation made under the terms of the creation is still protected by the intention of the creation. category.
1276032 圖式簡單說明 第一圖被動式矩陣有機發光二極體顯示器。 第二圖2T1C畫素電路架構圖。 第三圖4T2C畫素電路架構圖。 第四圖4T2C驅動訊號時序圖。 第五圖本發明中3T1C畫素電路架構圖。 第六圖本發明中3T1C畫素及顯示面板示意圖。 第七圖本發明中3T1 C驅動訊號時序圖。 第八圖本發明驅動電路在資料產生器區加入額外的電晶體 與資料電容並聯的示意圖。 第九圖本發明驅動電路在資料產生器區加入額外的電晶體 後驅動訊號的時序圖。 第十圖本發明中3T1C畫素使用NM0S電晶體之電路架構圖。 【元件符號說明】 100 被動式矩陣有機發光二極體顯示器 110 行向資料產生器 120 列向選擇產生器 130 列線 14 0 行線 160 顯示晝素 210 資料線 22 0 選擇線1276032 Schematic description of the diagram The first figure is a passive matrix organic light-emitting diode display. The second figure 2T1C pixel circuit diagram. The third figure 4T2C pixel circuit diagram. The fourth figure 4T2C drive signal timing diagram. Fig. 5 is a diagram showing the circuit structure of the 3T1C pixel in the present invention. Fig. 6 is a schematic view showing a 3T1C pixel and a display panel in the present invention. Figure 7 is a timing diagram of the 3T1 C drive signal in the present invention. Figure 8 is a schematic diagram of the drive circuit of the present invention incorporating an additional transistor in parallel with the data capacitor in the data generator region. Figure 9 is a timing diagram of the driving signal of the driving circuit of the present invention after driving an additional transistor in the data generator area. The tenth figure shows the circuit structure diagram of the NM0S transistor in the 3T1C pixel of the present invention. [Component Symbol Description] 100 Passive Matrix Organic Light Emitting Diode Display 110 Row Data Generator 120 Column Direction Selector 130 Column Line 14 0 Line Line 160 Display Element 210 Data Line 22 0 Select Line
第12頁 1276032Page 12 1276032
第13頁 圖式簡單說明 230 開關電晶體 240 驅動電晶體 250 儲存電容 260 有機發光二極體(OLED) 270 電源供應 305 電源V d d線 310 資料線 320 掃瞄線 330 電晶體 340 電晶體 350 電晶體 355 自動歸零電容 360 有機發光二極體(OLED) 370 電晶體 380 自動歸零電容 400 4T2C晝素架構驅動訊號時序 500 3T1C畫素架構 505 電源供應 510 資料線 520 掃瞄線 530 電晶體 540 電晶體 550 電晶體 555 儲存電容 1276032 圖式簡單說明 560 有機發光二極體(OLED) 565 電晶體Μ 〇 c 590 TW線 600 3 Τ1 C晝素之顯不面板架構 602 資料電容 608 資料產生器 703 資料線 705 TW線 707 OC線 800 3T1C晝素之顯示面板架構 808 電晶體Mby 903 資料線 905 TW線 907 OC線 909 BY線 1000 3T1C晝素架構 1030 NMOS電晶體 1040 NMOS電晶體 1050 NMOS電晶體 1055 儲存電容 1060 有機發光二極體(OLED) 1065 電晶體MocPage 13 Simple Description 230 Switching Transistor 240 Driving Transistor 250 Storage Capacitor 260 Organic Light Emitting Diode (OLED) 270 Power Supply 305 Power Supply V dd Line 310 Data Line 320 Scan Line 330 Transistor 340 Transistor 350 Crystal 355 Auto Zero Capacitor 360 Organic Light Emitting Diode (OLED) 370 Transistor 380 Auto Zero Capacitor 400 4T2C Elementary Structure Drive Signal Timing 500 3T1C Pixel Architecture 505 Power Supply 510 Data Line 520 Scan Line 530 Transistor 540 Transistor 550 Transistor 555 Storage Capacitor 1276032 Illustrated Simple Description 560 Organic Light Emitting Diode (OLED) 565 Transistor Μ 〇c 590 TW Line 600 3 Τ1 C 昼 之 显 面板 面板 602 602 Data Capacitor 608 Data Generator 703 Data line 705 TW line 707 OC line 800 3T1C 昼 之 display panel architecture 808 transistor Mby 903 data line 905 TW line 907 OC line 909 BY line 1000 3T1C 昼 架构 architecture 1030 NMOS transistor 1040 NMOS transistor 1050 NMOS transistor 1055 Storage Capacitor 1060 Organic Light Emitting Diode (OLED) 1065 Transistor Moc
第14頁Page 14
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