TWI273694B - Fuse structure for a semiconductor device - Google Patents

Abstract

A fuse structure for a semiconductor device is provided. The fuse structure includes a fuse layer between the upper and lower insulating layers. The fuse layer is connected to the other metal layers through the via plugs. The fuse layer includes at least two separate blocks and at least a connecting block. For the current flowing through the separated blocks in a zig-zag path, of the fuse structure provides at least a fusing point or more than one fusing points. In this way, the negative impact of the single failed fuse can be reduced, thus increasing the reliability of the fuse structure. Also the damage to the devices adjacent to the fuse due to the heat generated by the current can be prevented because when the heat generated during the fuse blowing process will be conducted to the adjacent blocks to facilitate heat dissipation.

Description

1273694 V. INSTRUCTION DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to a fuse structure of a semiconductor element, and more particularly to a fuse structure having a plurality of blocks in a semiconductor element. [Prior Art] As the size continues to increase, the semiconductor element becomes more susceptible to defects or impurities in the germanium crystal. Failure of a single diode or transistor tends to constitute a defect in the entire wafer. To solve this problem, redundant circuits including connection fuses are often formed in semiconductor elements. If a circuit is found to be defective after the process, a fuse can be used to disable it and enable a redundant circuit. For memory components, the defective memory cell can reset a good memory cell at its address. Another reason to use fuses in integrated circuits is that control characters such as identification codes can be permanently programmed into the wafer. Usually, the fuse is formed by a polysilicon or a metal wire, but the fuse can be divided into a laser solution according to the way in which it is blown (b 1 〇w η ) into a circuit breaker (〇pe η ). The wire (L aserfuse) uses a laser to cut the dissolved wire with a laser beam, and an electron-dissolving wire (E 1 ectr ο nicfuse ), which is broken by an electric current through a blown or blown fuse; an electronic fuse It is mostly used in memory elements such as EEPROM, and laser fuses are mostly used in memory elements such as DRAM. For the design of the laser fuse, first, the uppermost layer of the general integrated circuit is covered with a protective layer of tantalum nitride, cerium oxide or both, and the fuse is melted by a laser. In the case of metal fuses, in order to avoid damage to the protective layer, the laser melting of the fuse usually requires an opening in the top layer, and the laser needs to be accurately aligned with the fuse without destroying other adjacent components, but

12111twf.ptd Page 8 1273694 V. INSTRUCTIONS (2) Yes, it is still often caused by the formation of pits and the like in the protective layer of the upper and lower layers due to excessive energy. In the case of a polycrystalline quartz wire, a voltage is applied and a sufficient current is applied to heat it and cause the fuse to rupture, but this technique requires a relatively large voltage. The fuse is melted; and as the size of the integrated circuit is gradually reduced, the voltage that can be supplied is also becoming smaller, so that a Si s layer is added to the smectite wire. And only need to add a sufficient voltage to cause the effect of the circuit breaker. The mechanism is to accelerate the electron migration by heating with electric current, which in turn causes the deuterated metal layer on the fuse to agglomerate with the polycrystalline silicon, causing the deuterated metal layer to melt and causing the polycrystalline germanium grains to grow again. The so-called blown fuse becomes an open circuit, which means that the fuse is actually broken, causing the fuse structure to be discontinuous (fracture) and being broken, or it may be that only the molten metal layer on the molten wire is dissolved. Or cause the post-burn resistance to increase to a relatively high level, and is considered as an open circuit. However, with the change of process conditions and voltage range, it is often found that there is still residual molten fuse after the voltage is blown, or the resistance is unstable after the fuse is blown, which affects the reliability of the component and reduces the overall efficiency. Electrical performance. In addition, the high heat generated when the fuse is supplied with current often causes overheating of other surrounding components and reduces component stability. Therefore, there is a need for a fuse structure that can be sintered at a low voltage, stable, and does not cause overheating to damage surrounding components.

12111twf.ptd Page 9 1273694 V. SUMMARY OF THE INVENTION (3) SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-blocked filament structure in a semiconductor device, which increases the possible melting point of the fuse structure and avoids The high failure rate of the single melting point without breaking the circuit improves the reliability of the fuse structure. Another object of the present invention is to provide a fuse structure which can be sintered in a relatively low voltage/current in an electron transport mode, which can improve the stability of the fuse structure. According to a preferred embodiment of the present invention, there is provided a fuse structure formed in a semiconductor device or an integrated circuit, the fuse structure comprising: a first insulating layer formed on a semiconductor substrate; and a fuse layer Formed on the first insulating layer, wherein the fuse layer has a plurality of blocks and a plurality of connecting blocks, wherein any one of the connecting blocks is connected to two adjacent blocks, and each block is divided by Each of the connecting blocks is connected to each other and is not connected to each other; a second insulating layer is formed on the fuse layer, wherein the second insulating layer comprises a plurality of via plugs; and a first top metal layer is formed And connecting to the interlayer plugs on the second insulating layer; and a second top metal layer formed on the second insulating layer to be connected to the interlayer plugs. The following examples will be described in detail with reference to the accompanying drawings, which are to be understood by those skilled in the art, and may be modified without departing from the spirit and scope of the invention. Limitation of the invention, the scope of protection of the invention is defined only by the scope of the patent application. Figure 1 is a schematic cross-sectional view of a fuse structure, which will be described below.

12111twf.ptd Page 10 1273694 V. INSTRUCTION DESCRIPTION (4) FIG. 1 shows a fuse structure 10 and its associated manufacturing process, wherein the fuse structure 10 is formed in a semiconductor component or in an integrated circuit. It is formed on a semiconductor substrate 100, and the substrate 100 further includes a semiconductor element (not shown) formed therein. Next, an insulating layer 110 is formed over the substrate 100. In accordance with a preferred embodiment, the lower insulating layer 110 includes an oxide layer, such as a tantalum oxide layer or a combination of spin-on glass layers. Then, a fuse layer 120 is formed on the lower insulating layer 110. Generally, the fuse layer 1 20 may be a composite layer of a polycrystalline germanium compound and a metal germanium compound, and the metal germanium compound includes a stone of titanium, a stone of a ceremonial nickel, or a crushed metal, or a metal layer or a metal alloy layer, the metal comprises titanium, tungsten, aluminum or copper, and the thickness of the fuse layer 120 can be adjusted; in fact, the resistivity of the fuse layer in the present invention can be changed by its material, length, Adjust by width or thickness. In general, the fuse layer has a higher resistivity than other metal lines and interconnects as an ideal fuse structure. Then, an upper insulating layer 130 is formed to cover the fuse layer 120, and the upper insulating layer 130 includes an oxide layer, such as a combination of a hafnium oxide layer or a spin-on glass layer. Next, a photoresist layer (not shown) is formed and the lithography process is used as a mask to define the location of the vias 135. The number and size of the vias can be determined according to the actual design and heat dissipation requirements. A plurality of via holes 1 3 5 are located in the upper insulating layer 130, for connecting the subsequently formed top metal pad layers 150, 160 and the fuse layer 120. Next, after removing a portion of the upper insulating layer 130 that is not covered by the photoresist layer, a via plug 1404 is formed in the via hole 135. The position of the via hole can be adjusted for good heat dissipation. The method of forming a via plug includes forming a metal layer filling the via hole by sputtering (not shown)

12111twf.ptd Page 11 1273694 V. Inventive Note (5)), and then remove the excess metal layer by etchback process to form a via plug. Then, a first top metal pad layer 〇5 〇 and a second top metal pad layer 160 are formed on the upper insulating layer 130 and the via plug 〇4〇. When a current is applied to the first top metal pad layer 5, current flows through the via, plugs 140 into the fuse layer 120, and then passes through the via plug 4 to conduct the second The top metal pad is 160°; and the current can also be reversed, looking at the design of the semiconductor component. Figure 2 is a top view of the fuse layer. The fuse layer 120 has a narrow width between the two sides, that is, two wide areas including 1 2 2 a, 1 2 2 b and A narrower area between them is 1 2 4 . For example, the first top metal pad layer 150 can be electrically connected to the wider region 122a ′ via the via plug 14 而 and the second top metal pad layer 16 经由 can be via the via plug 1 400 Electrically connected to a wider area 1 2 2 b; when the current (indicated by the dashed arrow) flows from the wider area 1 2 2 a to the wider area 122b via the narrower area 丨 24 4 therebetween, due to the narrower area 124 The area is relatively small, resulting in a higher current density per unit area. However, if the opposite direction of the current flows from the wider region 1 2 2 b to the wider region 1 2 2 a via the narrower region 1 2 4 therebetween, the current density per unit area of the narrow region 1 2 4 is similarly obtained. Higher. Therefore, with respect to the wider regions 122a, 122b at both ends, the narrow portion 1 2 4 can be regarded as a narrow channel with a high resistance, so that a current density is increased in this region. The local temperature is increased, and the electron migration in the local region is accelerated. The local region is also the melting point. Therefore, the narrow portion of the spinning layer 1 2 0 will burn and break, or after the local region is blown. The resistance is increased to a degree that causes an electrical disconnection. Wider area

12111twf.ptd Page 12 1273694 V. INSTRUCTIONS (6) The ratio of the width of the 1 2 2 a, 1 2 2 b and its relatively narrow portion 1 2 4 should be adjusted so that electron migration occurs and the components can be visually matched. It is adjusted as needed to burn the current. Similarly, the length of the narrower portion 1 24 (the distance between the wider regions 1 2 2 a and 1 2 2 b) should be adjusted depending on the heat dissipation buffer and should be adjusted to cause electron transfer. Preferably, the distance between the wider regions is greater than or equal to 0.8 microns. Due to the shape design of the above fuse layer, only a relatively small current (preferably less than 〇 · 1 A ) or voltage is required to burn a portion of the fuse. The fuse structure of this shape is sintered in the electron transfer mode, but the fuse structure is not broken. The present invention develops a fuse structure having multiple blocks that avoids overheating without increasing the overall fuse structure resistance. In a preferred embodiment, the fuse structure is formed in a semiconductor component or in an integrated circuit, and the cross-sectional structure and manufacturing process of the fuse structure are substantially the same as those shown in FIG. 1, but the fuse structure is The design includes a multi-block fuse layer, and Figure 3 is a top view of a filament layer in the wire structure formed in accordance with another preferred embodiment. As shown in FIG. 3, the lyophilized layer 300 has a plurality of blocks, including a first block 301, a second block 320, a third block 330, and a fourth block 340. Connecting the first block and the first block of the second block 315, connecting the second block to the second block of the third block, and connecting the third block and the fourth block One of the third joining blocks 335. The second block 320 and the third block 3 3 0 are located between the first block 3 0 and the fourth block 3 4 0 , and the second block 320 is adjacent to the first block 310 and the third block 330 . Near the fourth block 340, and each

12111twf.ptd Page 13 1273694 V. INSTRUCTIONS (7) The & blocks are not connected to each other except for the connection blocks. Preferably, the via plug is connected to the surrounding block of the fuse layer 3 〇 . For example, the first top metal pad 150 of the L's diagram can be electrically connected to the first region 3 1 0 via the via plug 140 , and the second top metal pad 160 can be plugged via the via 140 is electrically connected to the fourth region 340. When the current is passed in, the flow path of the current (indicated by the dashed arrow) is from the first block 310 through the first connecting block 315, to the second block 320, and then through the second connecting block 3 25 to the third. Block 3 3 0, and then flows to the fourth block 340 via the third connecting block 335; since the areas of the first, second and third connecting blocks 315, 325, 335 are farther than the first connected The second, third, and fourth blocks are narrow, resulting in higher current density per unit area. Therefore, as compared with the wider blocks 3 丨〇, 3 2 〇, 3 3 〇, 0 ', the connection blocks 3 1 5, 3 2 5, 3 3 5 with narrow connections therebetween are regarded as a local impedance. The narrow channel makes the current density passing through the connecting block increase, and the local temperature increases to stabilize the portion of the blown fuse and the electric resistance becomes high, and the local region is also called the melting point. On the other hand, if the current is reversed from the fourth block 34 0 to the first block 31 by the respective blocks therebetween, the unit area of the narrow connection block 315, 325, and 335 is similarly passed. The current density is higher and a so-called melting point is formed. It _ - another # + In the preferred embodiment, the fuse structure can also be formed in a half-conductor, in a device or in an integrated circuit, and the cross-sectional structure and manufacturing process of the fuse structure and the first Figure The illustration is substantially the same, but the fuse structure is designed to include a multi-block fuse layer, and FIG. 4 is a top view of a filament layer in the filament structure formed in accordance with another preferred embodiment. Such as the first

12111twf.ptd Page 14 1273694 V. Inventive Description (8) As shown in Figure 4, the fuse layer 400 has multiple blocks, including a first block 410, a second block 420, and a third region. Block 430, a fourth block 440, a fifth block 450, and a first connection block 415 connecting one of the first block and the second block, and a second block connecting the second block and the third block. The linking block 425 connects the third block and the third block block 435 of the fourth block, and connects the fourth block and the fourth block block 445 of the fifth block. The second block 420, the third block 430 and the fourth block 440 are located between the first block 410 and the fifth block 450, and the second block 420 is adjacent to the first block 410 and the third block. 4 3 0 is between the second block 4 2 0 and the fourth block 44 0 , and the fourth block 440 is close to the fifth block 450 , and each block is connected with each other except for each connected block. Not connected. When the current is passed in, the flow path of the current (indicated by the dashed arrow) is from the first block 410 through the first connecting block 415, to the second block 42 0 and then through the second connecting block 42 5 to the third. Block 4 3 0, then flows to the fourth block 440 via the third connection block 43 5, and then flows to the fifth block 4 5 0 by the fourth connection block 445; due to the first and second The areas of the third and fourth connecting blocks 415, 425, 435, 445 are much smaller than the first, second, second, fourth and fifth blocks to which they are connected, resulting in a unit area thereof. The current density passed is higher. Therefore, relative to the wider blocks 4丨〇, 4 2 0, 4 3 0, 44 0 and 4500, the connecting blocks 41 5 , 425 , 435 and 445 with narrow connections therebetween can be regarded as one The high-impedance narrow channel makes the current density passing through the connecting block increase, and the local temperature increases to stabilize the portion of the blown fuse and the electric resistance becomes high, and the local region is also called a soaking point. And if the current is reversed from the fifth block 450 to the blocks between them

12111twf.ptd

Page 15

1273694 V. INSTRUCTION DESCRIPTION (9) When flowing to the first block 4 1 0, similarly, the current density per unit area passing through the narrow connection blocks 415, 425, 435, and 445 is relatively high, and is formed. The so-called melting point. The width ratio of the wider block to its adjacent narrower junction block should be adjusted to allow electron migration to occur and can be adjusted to match the required blow current required by the component. Similarly, the length of the connected block (the distance between adjacent blocks) should be adjusted according to the heat dissipation buffer and should be adjusted to cause electron transfer. Therefore, compared with the design of FIG. 2, the fuse layer 300 of this embodiment and the solution layer 400 of another embodiment have a plurality of mutually separated blocks and a plurality of connections therebetween. a block, which causes the current flow path to become longer and longer, and has a plurality of burning melting points in the connecting block; since the resistance becomes high to some extent as long as any one of the plurality of burning melting points in the fuse structure is blown, Can cause an open circuit to interrupt the electrical. The shape of the fuse layer is designed to not only require a relatively small current/voltage to blow a local region of the fuse, but also because the fuse structure has a plurality of melting points, which can reduce the failure rate of the fuse structure. Because as long as any one of the plurality of burning melting points becomes an open circuit, the fuse structure is broken, so that the resistance is not stable after a certain partial region is not completely blown (that is, the value is not as high as expected), so that the fuse structure is still Keep the path and affect the overall electrical performance of the component. However, the number or arrangement of the blocks or the joint blocks, or the materials and processes of the fuse structure in the present invention are not limited to the number or related position or material or manufacturing method described in the preferred embodiment, but may be Designed in accordance with the electrical requirements of the actual component or the applicable integrated circuit, as known in the art of the present invention

12111twf.ptd Page 16 1273694 V. INSTRUCTIONS (ίο) Complete with appropriate skills. In addition, the high heat generated when the fuse is supplied with current often causes overheating of other surrounding components and reduces component stability. However, since the fuse layer of the embodiment of the present invention has a plurality of mutually separated blocks, the current flow path needs to be moved back through the connected connection block, and passes through different blocks of different areas; when the area is narrow When the connected block has a high current density and has overheating, the wider area of the connected block can evenly distribute the heat to help dissipate heat. Therefore, the fuse structure of the present invention has a plurality of mutually separated blocks and a plurality of connecting blocks connected therebetween, thereby causing currents to move back into the flow in the fuse structure, and the current flow path is moved back through the blocks, and The burning melting point of a plurality of positions in the connecting block not only reduces the negative influence caused by the residual molten fuse, but also improves the reliability of the fuse structure, further improves the heat dissipation rate and avoids overheating, and reduces the surrounding components. The risk of overheating can increase the margin of the process. The scope of the present invention is defined by the scope of the appended claims.

12111twf.ptd Page 17 1273694 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a fuse structure. Figure 2 is a top view of a fuse layer of a fuse structure. Figure 3 is a top plan view of a fuse layer of a fuse structure in accordance with a preferred embodiment of the present invention. Figure 4 is a top plan view of a fuse layer of a fuse structure in accordance with another preferred embodiment of the present invention. Description of the drawings: 1 0 ·•Fuse structure 1 00: Substrate 1 1 0 : Lower insulating layer 1 2 0 : Fuse layer 122a, 122b: Wide area 1 2 4 : Narrow area 1 3 0 : Upper Insulation layer 1 3 5 ··Interlayer hole 1 4 0 : Interlayer plug 1 5 0 : First top metal pad layer 1 6 0 : Second top metal pad layer 3 0 0, 4 0 0 : Fuse structure 3 1 0, 4 1 0 : the first block 3 1 5, 4 1 5 : the first link block 3 2 0, 4 2 0 : the second block 325, 425: the second link block

12111twf.ptd Page 18 1273694 Schematic description 330, 430 · Third block 335, 425: Third link block 340, 440: Fourth block 435: Fourth link block 4 5 0 ·· Block 5 ill Page 19

Claims (1)

1273694 6. Patent application scope 1 1. A fuse for a semiconductor component, comprising: a first insulating layer formed on a semiconductor substrate; a fuse layer formed on the first insulating layer, wherein the fuse layer is The method includes a plurality of blocks, including a first block, a second block, a third block, a fourth block, and a first link block connecting the first block and the second block, and connecting a second connection block of the second block and the third block, and a third connection block connecting the third block and the fourth block, wherein the second block and the third block are located at the first block Between the block and the fourth block, the second block is close to the first block, and the third block is close to the fourth block, and the blocks are not connected to each other except that the connected blocks are connected. The width of any of the connection blocks is less than the width of any of the blocks; a second insulating layer is formed on the fuse layer, wherein the second insulating layer comprises a plurality of via plugs; a first top metal a layer formed on the second insulating layer and connected to the via plugs, wherein the The top metal layer is transparently connected to the first block of the fuse layer through the via plug; and a second top metal layer is formed on the second insulating layer and the vias The plugs are connected, wherein the second top metal layer is electrically connected to the fourth block of the fuse layer through the via plugs. 2. The fuse of the semiconductor device of claim 1, wherein the wire layer comprises at least a polycrystalline layer and a metal compound layer. 3. The fuse of the semiconductor device according to claim 2, wherein the metal ruthenium compound is selected from the group consisting of titanium telluride, cobalt telluride, nickel telluride or lithiated platinum. The invention relates to a fuse of a semiconductor component according to claim 1, wherein the lysate layer comprises at least one polycrystalline layer. 5. The fuse of the semiconductor device of claim 1, wherein the fuse layer comprises at least one metal layer. 6. The fuse of a semiconductor device according to claim 5, wherein the metal is selected from the group consisting of titanium, tungsten, aluminum and copper. 7. The fuse of a semiconductor device according to claim 1, wherein the wire layer comprises at least one metal alloy layer. 8. The fuse of the semiconductor element according to claim 7, wherein the metal used in the metal alloy is selected from the group consisting of titanium, tungsten, aluminum and copper. 9. The fuse of the semiconductor device of claim 1, wherein the first insulating layer comprises at least a hafnium oxide layer. The fuse of the semiconductor device of claim 1, wherein the second insulating layer comprises at least a hafnium oxide layer. The fuse of the semiconductor device of claim 1, wherein the first top metal layer comprises at least one metal layer, and the metal is selected from the group consisting of titanium, tungsten, aluminum and copper. 1 2. The fuse of the semiconductor device according to claim 1, wherein the second top metal layer comprises at least one metal layer, and the metal is selected from the group consisting of titanium, tungsten, aluminum and copper. . A fuse of a semiconductor device, comprising: a first insulating layer formed on a semiconductor substrate; a fuse layer formed on the first insulating layer, wherein the fuse layer 12111twf.ptd Page 21 1273694 VI. The patent application scope has a plurality of blocks and a plurality of connected blocks, wherein any one of the connected blocks is connected to two adjacent blocks, and each block is divided into blocks. Outside of the connection, they are not connected to each other, and the width of any of the connection blocks is smaller than the width of any of the blocks; a second insulation layer is formed on the fuse layer, wherein the second insulation layer comprises a plurality of a first plug metal layer formed on the second insulating layer to be connected to the via plugs; and a second top metal layer formed on the second insulating layer These interlayer plugs are connected. The fuse of the semiconductor device of claim 13, wherein the fuse layer comprises at least a polysilicon layer and a metal ruthenium compound layer. The fuse of the semiconductor device of claim 14, wherein the metal ruthenium compound is selected from the group consisting of titanium telluride, cobalt telluride, nickel telluride or platinum telluride. The fuse of the semiconductor device of claim 13, wherein the fuse layer comprises at least one polysilicon layer. The fuse of the semiconductor device of claim 13, wherein the fuse layer comprises at least one metal layer. The fuse of the semiconductor element according to claim 17, wherein the metal is selected from the group consisting of titanium, tungsten, aluminum and copper. The fuse of the semiconductor device of claim 13, wherein the lyotropic layer comprises at least one metal alloy layer. 2 0. The fuse of the semiconductor component according to claim 19, 12111twf.ptd Page 22 1273694 VI. Scope of Application The metal used in the metal alloy is selected from the group consisting of titanium, tungsten, aluminum and copper. The fuse of the semiconductor device of claim 13, wherein the first insulating layer comprises at least a tantalum oxide layer. The fuse of the semiconductor device of claim 13, wherein the second insulating layer comprises at least a tantalum oxide layer. The fuse of the semiconductor device of claim 13, wherein the first top metal layer comprises at least one metal layer, and the metal is selected from the group consisting of titanium, tungsten, aluminum and copper. . 2. The fuse of the semiconductor device of claim 13, wherein the second top metal layer comprises at least one metal layer, and the metal is selected from the group consisting of titanium, tungsten, aluminum, and copper. . A fuse of a semiconductor component, comprising: a first insulating layer formed on a substrate; a fuse layer formed on the first insulating layer, wherein the fuse layer has at least two And the at least one connecting block, wherein the connecting block connects the two blocks, and the two blocks are not connected to each other except that the connecting blocks are connected, and the width of the connecting block is smaller than a width of any of the blocks, and the length of the connecting block is not less than 0.8 μm; a second insulating layer is formed on the fuse layer, wherein the second insulating layer comprises a plurality of via plugs, The via plugs are connected to the two blocks of the fuse layer, and a first top metal layer is formed on the second insulating layer to be connected to the via plugs; 12111twf.ptd Page 23 1273694 VI. Patent Application A second top metal layer is formed on the second insulating layer to be connected to the via plugs. The fuse of the semiconductor device of claim 25, wherein the fuse layer comprises at least a polysilicon layer and a metal ruthenium compound layer. 2. The fuse of the semiconductor device of claim 25, wherein the fuse layer comprises at least one polysilicon layer. 2. The fuse of the semiconductor device of claim 25, wherein the fuse layer comprises at least one metal layer. 12111twf.ptd第24页