TWI273428B - Integrated PC card host controller for the detection and operation of a plurality of expansion cards - Google Patents

Integrated PC card host controller for the detection and operation of a plurality of expansion cards Download PDF

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Publication number
TWI273428B
TWI273428B TW91121167A TW91121167A TWI273428B TW I273428 B TWI273428 B TW I273428B TW 91121167 A TW91121167 A TW 91121167A TW 91121167 A TW91121167 A TW 91121167A TW I273428 B TWI273428 B TW I273428B
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Taiwan
Prior art keywords
card
controller
logic circuit
expansion
flash media
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TW91121167A
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Chinese (zh)
Inventor
Yishao Max Huang
Sterling Du
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O2Micro Int Ltd
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Priority claimed from US10/047,419 external-priority patent/US6718274B2/en
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Publication of TWI273428B publication Critical patent/TWI273428B/en

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Abstract

A controller includes a plurality of readers for reading an associated plurality of expansion cards and for controlling operation of such expansion cards, wherein at least one of the plurality of readers is a flash media reader. A method for controlling the operation of at least one expansion card with an integrated controller having a plurality of readers includes detecting the presence of at least one expansion card, and enabling selected reader of the integrated controller associated with at least one expansion card. Another method of writing data to read only memory in an integrated controller includes unlocking the read only memory, writing information into the read only memory, and locking the read only memory to prevent otherwise unintentional or unauthorized writing to the read only memory is also provided.

Description

1273428 九、發明說明: 【發明所屬之技術領域】 本發明申請案係2000年3月28日申請之第09/536,578號美 國專利申請案之部份繼續申清案’該案之教示内容併供本 案以為參考。 本發明係關於一種用於檢測及操作一張或是多張的擴充 卡的整合性控制器。更特別是’本發明是一種用於檢測及 操作PC卡(如16位元PCMCIA卡與32位元CardBus卡等)、智 慧卡、以及快閃媒體卡的整合性控制器。本發明之特定公 用程式可提供適用於如膝上型電腦等等的行動計算裝置之 整合性控制器,然在此亦可顧及其他公用程式。 【先前技術】 隨著以電子型態來替代傳統面對面與紙張基礎方式的身 分辨識作業逐漸普遍,關於安全與隱私需求自然也就與日 倶增。全球網際網路的出現與企業裡網路快速擴充以供顧 客與供應廠商可自防火牆外部存取該網路,在在都加深了 對於以公錄技㈣基礎的解決方案需求。數種由該公錄技 術所致能之服務種類之範例為於公眾網路上的安全㈣通 ^、確保影像完整性及私密性之數位簽章,與客戶㈣服 器(以及其反向)的認證作業。 智慧卡為該款公鑰基礎設施中之關鍵元件,而微軟公司 正將其整合於Windows(視窗)平臺内,此因智慧卡可強化如 客戶認證、登錄鱼安全雷工杰 /、 卩件等等的僅使用軟體之解決 方案。智慧卡基本上為一公 A鑰涊證及其相關鑰匙的聚合 1273428 點,因為其可提供用以保護私鑰與其他型式之個人資訊之 抗擾式儲存;將對涉及到認證、數位簽章和自系統另端但 實「無須知悉」而行的鑰匙交換,並與安全性密切相關之 計算作業予以隔離進行;並且可提供位於工作場所、家中 或是攜帶型等諸電腦之間的機密性與其他私密性資訊的可 攜能力c> 據指出智慧卡將可為Windows平臺内之整合元件,因為 备慧卡將能夠促進新款的應用服務,即正如同之前滑鼠與 CD-ROM首次被整合於個人電腦(PC)内一般。各種應用、卡 片與讀卡機等之間的不相容問題,一直是造成智慧卡在歐 洲地區以外成長緩慢的主要原因。不同廠商產品之間的相 互作業能力,確係促使消費者對智慧卡足可廣泛接受,並 且可讓業界開始於其企業體中配發運用的必要條件。。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 This case is considered as a reference. The present invention relates to an integrated controller for detecting and operating one or more expansion cards. More particularly, the present invention is an integrated controller for detecting and operating PC cards (e.g., 16-bit PCMCIA cards and 32-bit CardBus cards, etc.), smart cards, and flash media cards. The particular utility of the present invention can provide an integrated controller for mobile computing devices such as laptops and the like, although other utilities can be considered herein. [Prior Art] As the identification of the face-to-face and paper-based methods of electronic form is becoming more common, the demand for security and privacy naturally increases. The emergence of the global Internet and the rapid expansion of the network in the enterprise for customers and suppliers to access the network from outside the firewall have deepened the demand for solutions based on the public record technology. Examples of several types of services enabled by this technology are the security on the public network (4), the digital signature to ensure image integrity and privacy, and the client (four) server (and its reverse). Certification work. The smart card is a key component in the public key infrastructure, and Microsoft is integrating it into the Windows (Windows) platform, which can be enhanced by smart cards such as customer authentication, login fish security, Lei Gongjie, and other components. A software-only solution. The smart card is basically a converged 1273428 point of a public A key certificate and its related keys, because it can provide anti-interference storage to protect the private key and other types of personal information; it will be related to authentication, digital signature Key exchanges from the other end of the system but "no need to know" and isolated from the security-related calculations; and provide confidentiality between computers in the workplace, at home or portable Portability with other private information c> It is pointed out that the smart card will be an integrated component in the Windows platform, because the backup card will be able to promote the new application service, just as the mouse and CD-ROM were integrated for the first time. Generally in a personal computer (PC). The incompatibility between applications, cards and card readers has been the main reason for the slow growth of smart cards outside of Europe. The ability to interoperate between different vendors' products does encourage consumers to be widely accepted for smart cards, and allows the industry to begin to allocate the necessary conditions for its use in its corporate body.

ISO 7816, EMV及 GSM 為倡導智慧卡與讀卡機等之間的相互作業能力,「國際標 準組織(ISO)」對接觸型積體電路卡片發展出18〇 7816標 準。該等規格係聚焦於在諸實體、電氣與資料鏈結協定層 級之間的相互運作能力。而在1996年,Europay、MasterCard 與VISA(EMV)定義出一項產業特定性之智慧卡規格,其中 採行該ISO 7816標準,並且定義了某些另外的資料型態與 編碼規則以供金融服務業應用。歐洲電信產業界亦採取該 ISO 7816標準,以作為其「全球行動通訊系統(GSM)」智慧 卡規格,應用於行動電話用戶的辨識與認證方面。 所有該等規格(ISO 7816、EMV與GSM)發展雖為正確方 1273428 向,然各項卻仍係過於低階或屬特定應用,而未獲廣大業 界支援。而如與裝置無關之APIs、發展工具與資源分享等 應用相互作業能力之課題,仍未於這些規格之任一内深加 探討。 PC/SC工作群組 該PC/SC(個人電腦/智慧卡)工作群組係於西元1996年5 月由各主要PC與智慧卡廠商:Groupe Bull、ISO 7816, EMV and GSM In order to promote the interoperability between smart cards and card readers, the International Standards Organization (ISO) developed the 18〇 7816 standard for contact-type integrated circuit cards. These specifications focus on the interoperability between physical, electrical and data link agreement levels. In 1996, Europay, MasterCard and VISA (EMV) defined an industry-specific smart card specification that adopted the ISO 7816 standard and defined certain additional data types and coding rules for financial services. Industry application. The European telecommunications industry has also adopted the ISO 7816 standard as its "Global System for Mobile Communications (GSM)" smart card specification for the identification and authentication of mobile phone users. All of these specifications (ISO 7816, EMV and GSM) are in the right direction, but they are still too low-level or specific applications, and are not supported by the industry. The issues of interoperability, such as device-independent APIs, development tools, and resource sharing, have not been explored in any of these specifications. PC/SC Working Group The PC/SC (Personal Computer/Smart Card) Working Group was established in May 1996 by major PC and smart card vendors: Groupe Bull.

Hewlett-Packard、Microsoft、Schlumberger 與 SiemensHewlett-Packard, Microsoft, Schlumberger and Siemens

Nixdorf等所共同成立。該工作群組之主要焦點係在於發展 足可解決前述相互作業能力的規格。該些PC/SC規格係基於 ISO 7816標準,並且與EMV和GSM兩者特定產業性規格相 容。藉由該PC/SC工作群組參與廠商的努力,諸規格確已獲 廣大業界支持,並具強烈意願於未來將該等規格移植至與 標準無關之系統上。 在其奠基並初次發表該等規格之後,陸續尚有多家廠商 加入該PC/SC工作群組。新的成員包括Gemplus、IBM、Sun Microsystems、Toshiba以及 Verifone 〇 微軟公司(Micro so ft)的作法 微軟公司(Microsoft)的作法則包括下列方式: •用以介接智慧卡讀卡機、智慧卡與PC的標準模型; •用以啟動智慧卡相關應用之與裝置無關的API; •合宜之軟體開發工具; •與視窗(Windows)及視窗NT(Windows NT)平臺整合。 具備有讀卡機和智慧卡與PC之間介面之標準模型,可提 1273428 供各製造商之卡片與讀卡機產品間的相互作業能力。諸項 與裝置無關之API可將目前以及未來的各式實作差異,與應 用程式發展人員相隔離。藉由避免掉由於底層硬體更改而 造成的應用程式過時問題,該裝置無關性亦可因而降低軟 體發展成本。 目前最普遍用以介接某智慧卡於筆記型電腦的方法是利 用PCMCIA第II型智慧卡讀/寫機(如圖丨)。目前,該款 PCMCIA智慧卡讀卡機可由例如像是Nixdorf et al. The main focus of this work group is to develop specifications that address the aforementioned interoperability. These PC/SC specifications are based on the ISO 7816 standard and are compatible with specific industry specifications for both EMV and GSM. With the participation of the PC/SC working group in the efforts of the vendors, the specifications have been supported by the industry and have a strong willingness to migrate these specifications to standards-independent systems in the future. After the foundation and initial publication of these specifications, several vendors have joined the PC/SC working group. New members include Gemplus, IBM, Sun Microsystems, Toshiba, and Verifone and Microsoft Microsystems. Microsoft's practices include the following: • Used to interface smart card readers, smart cards and Standard model for PC; • Device-independent API for launching smart card-related applications; • Appropriate software development tools; • Integration with Windows (Windows) and Windows NT (Windows NT) platforms. With a standard model of the interface between the card reader and the smart card and the PC, the 1273428 is available for interoperability between card and card reader products from various manufacturers. The device-independent API isolates current and future implementation differences from application developers. By avoiding application obsolescence caused by underlying hardware changes, device independence can also reduce software development costs. At present, the most common method for interfacing a smart card to a notebook computer is to use a PCMCIA Type II smart card reader/writer (as shown in Fig. 。). Currently, the PCMCIA smart card reader can be, for example, like

Techn〇1〇gies等多家公司所購得。 这種智慧卡讀卡機的終端使用者售價一般約為15〇美元左 右。該讀卡機的成本佔整體性安全解決方案内之主要部 分。圖1中的配接器卡104描述該傳統式智慧卡讀卡機的各 個主要功能區塊。智慧卡讀卡機中的PCICi機介面區塊可 提供電子式介面給PC卡連接器1〇6 ,其接著會連接到pc卡 控制102。另可提供額外的邏輯以控制該智慧卡與軟體應 用程式間的互動作用。然而如同前述,本項解決方案有顯 著的單元成本,因而對於大量移往智慧卡相容性方面來 說’即成為較不具吸引力的選擇項目。 所以,即需要提供一種足可提供諸項PC卡、智慧卡與被 動式兔慧卡配接器作業能力的整合性主機控制器。此外, 亦需要提供一種可替代現存的主機板架構式PC卡主機控制 器,而無需重新加工或設計該主機板之整合性主機控制器。 【發明内容】 符合本發明之一控制器包括多個用來讀取相關聯之多個 1273428 擴充卡以及用於控制操作相關聯之多個擴充卡之操作的多 個讀取器,多個讀取器中至少有一個是快閃媒體讀取器。 此控制器亦可包括至少一個智慧卡讀取器及至少一個pc卡 讀取器》此控制器亦可包括多個快閃媒體讀取器,且更被 配置以響應一輸入信號,其指示從多個快閃媒體讀取器中 所選出之快閃媒體讀取器,而致能選出之快閃媒體讀取 器。一被配置以接受來自至少一個擴充卡之數位資訊的個 人電腦(PC)亦可包括符合本發明之控制器。 一種符合本發明以具有多個讀取器之整合控制器來控制 至J 一個擴充卡之操作的方法包括:檢測至少一個擴充卡 之存在;並致能與該至少一個擴充卡相關連並自該整合控 制益選出的一讀取器。檢測步驟更包括利用傳統PC卡規格 之信號線檢測一擴充卡之存在,該檢測步驟包括··判斷第 一卡和第二卡檢測信號線之信號狀態;判斷第一卡和第二 卡電壓選擇信號線之信號狀態;判斷該第一 測信號線、或該第一及/或第二卡電壓選擇信號是= 由PC卡信號規格保留之信號狀態;Α判斷一預定未使用之 PC卡信號線之信號狀態,其與該保留信號狀態有關。 另一種寫入資料至符合本發明之整合控制器内之唯讀記 憶體的寫入方法包括:打開唯讀記憶體;將資訊寫入唯讀 :憶體;及鎖住唯讀記憶體以避免其他不小心或未認 資訊寫入其中。 y對於熟捻本項技藝之人士而言,應立可知悉後文之詳細 月雖參酌諸較佳具體實施例與其使用方法,然本發明卻 1273428 並非侷限於該等較佳具體實施例與其使用方法。恰反之, 本發明具寬廣範圍,且僅依隨附之申請專利範圍所限。 【實施方式】 圖2描述一被動式智慧卡配接器與智慧卡係如何介接於 某主機控制器的系統層級方塊圖。該控制器丨〇係整合於某 例如像是膝上型PC的PC平臺内。例如,該PC可為如圖般組 態’該控制器10進行作業以檢測並控制某一或多個插入於 該插槽A 12及/或插错B 14的擴充裝置卡。應可明暸本發明 之控制β 10係以適當之邏輯調適,以驅動PC卡以及智慧 卡。該PC系統一般含有一處理器26與資料匯流排2〇。「北橋」 邏輯24提供處理器26與該匯流排20間的通訊。本發明控制 器10亦類似地適於與該匯流排20間進行通訊。本例中,該 匯流排20係屬一週邊控制器介面(pci)匯流排,然其他型式 之匯流排技術亦適於併入該控制器邏輯内。接著圖中另一 「南橋」邏輯22 ’可提供作為外部之匯流排通訊,例如像 早期之裝置(如ISA匯流排架構)等等。該南橋與北橋邏輯皆 屬業界廣所眾知。Power 1C晶片28可對PC卡連接器上諸接 腳提供正確之電壓(由插入於插槽A或插槽B的卡片型式所 判斷)。一旦偵測到該卡片型式(根據如圖5中的pc卡定義表 所判斷’參閱後文),該晶片28即對該款型式之卡片提供適 當的電壓。 在一具體實施例中,本發明可提供被動式智慧卡配接器 18 ’其係經設定為被插入插槽a 12或插槽B 14上,其再經 没疋為PC卡型式Ι/ΙΙ/ΙΠ型的插槽介面。本具體實施例之被 I273428 動式配接器18包括有適當的連接器84與被動電路%。經插 入至該被動式智慧卡配接器18的智慧卡16亦可含有一實體 接觸點88,以便介接於該配接器上的實體連接器料。該配 接器與該智慧卡的接腳佈置84與88,係遵照智慧卡規格所 述,例如像是與PC/SC相容之智慧卡規格,其符合18〇7816 電氣規格與T=〇, T=1協定。本具體實施例中,採用該配 接器18可提供智慧卡可讀性與作業性,而無須重新加工% 外殼方得容納該特定智慧卡插槽。另外,pC也可包含如圖2 所示之智慧卡插槽14,。當然,在該替代性具體實施例中,# 可於該插槽14’之内提供電路86,與連接器84,。 現參考圖3,此為整合控制器1〇之細部方塊圖,顯示出智 慧卡檢測與操作的邏輯部分。該例中,控制器1〇包括智慧 卡感測邏輯30A與30B、智慧卡多工器(Μυχ)邏輯32八與 32Β、智慧卡讀卡機邏輯34Α與34Β以及介面邏輯36Α與 36Β 〇 應注意該圖3中,僅繪示出相關於該智慧卡與被動式智慧 卡配接器檢測與作業能力部分的邏輯,並應瞭解該控制器 _ 10尚包括額外的邏輯(未圖示),以進行傳統式的pc卡檢測 與操作。傳統式的PC卡控制器會利用一組卡片檢測接腳 CD1與CD2,以及一組電壓感測接腳VS1與VS2,來檢測插入 插槽中的卡片型式。該等接腳(相對參考於接地)之間的耦接 組合,可向適當的邏輯指出何種型式之卡片被插入插槽 中。例如,如圖5中之列表顯示,該等接腳CD1、CD2、VS1 與VS2之間的麵接組合’可判斷出插入插槽中的卡片係1 $ •12- 1273428 位元PCMCIA卡片或是32位元CardBus卡片。此外,如該表 中所示,該組合亦可判斷出某特定型式卡片的驅動電壓。 例如,3.3V、5V、X.XV以及Υ·Υν。在圖5最後兩列中所列 出之CD1、CD2、VS1與VS2的組合係保留於pc卡規格中。Techn〇1〇gies and other companies have purchased it. End users of such smart card readers typically sell for about $15. The cost of this reader is a major part of the overall security solution. The adapter card 104 of Figure 1 depicts the various major functional blocks of the conventional smart card reader. The PCICi machine interface block in the smart card reader provides an electronic interface to the PC Card connector 1〇6, which in turn is connected to the PC Card Control 102. Additional logic is provided to control the interaction between the smart card and the software application. However, as mentioned above, this solution has significant unit cost and thus becomes a less attractive option for a large number of moves to smart card compatibility. Therefore, it is necessary to provide an integrated host controller capable of providing various PC card, smart card and passive rabbit smart card adapters. In addition, there is a need to provide an integrated host controller that replaces the existing motherboard-architecture PC card host controller without reworking or designing the motherboard. SUMMARY OF THE INVENTION A controller in accordance with the present invention includes a plurality of readers for reading the associated plurality of 1273428 expansion cards and for controlling the operation of the plurality of expansion cards associated with the operation, multiple reads At least one of the extractors is a flash media reader. The controller can also include at least one smart card reader and at least one pc card reader. The controller can also include a plurality of flash media readers, and is further configured to respond to an input signal indicating A flash media reader selected from a plurality of flash media readers, and a selected flash media reader is enabled. A personal computer (PC) configured to accept digital information from at least one expansion card may also include a controller in accordance with the present invention. A method for controlling operation of an expansion card to an integrated controller having multiple readers in accordance with the present invention includes: detecting the presence of at least one expansion card; and enabling association with the at least one expansion card A reader controlled by the integrated control. The detecting step further comprises detecting the presence of an expansion card by using a signal line of a conventional PC card specification, the detecting step comprising: determining a signal state of the first card and the second card detecting signal line; determining the first card and the second card voltage selection Signal state of the signal line; determining that the first measurement signal line, or the first and/or second card voltage selection signal is = a signal state retained by the PC card signal specification; and determining a predetermined unused PC card signal line The signal state, which is related to the state of the reserved signal. Another method of writing read data to a read-only memory in an integrated controller in accordance with the present invention includes: opening a read-only memory; writing information to a read-only memory; and locking the read-only memory to avoid Other careless or unrecognized information is written to it. y For those skilled in the art, it should be understood that the detailed description of the following is a reference to preferred embodiments and methods of use thereof, but the invention is not limited to the preferred embodiments and uses thereof. method. Rather, the invention is to be construed broadly and limited only by the scope of the appended claims. [Embodiment] FIG. 2 illustrates a system level block diagram of how a passive smart card adapter and a smart card system are interfaced to a host controller. The controller is integrated into a PC platform such as a laptop PC. For example, the PC can be configured as shown in the figure 'The controller 10 is operative to detect and control one or more of the expansion device cards inserted into the slot A 12 and/or the wrong B 14 . It should be understood that the control beta 10 of the present invention is suitably adapted to drive the PC card and the smart card. The PC system typically includes a processor 26 and a data bus. The "North Bridge" logic 24 provides communication between the processor 26 and the busbar 20. The controller 10 of the present invention is also similarly adapted to communicate with the busbar 20. In this example, the busbar 20 is a peripheral controller interface (pci) busbar, although other types of busbar technology are also suitable for incorporation into the controller logic. Next, another "South Bridge" logic 22' can be provided as an external bus communication, such as an early device (such as an ISA bus architecture). The South Bridge and North Bridge logic are well known in the industry. The Power 1C chip 28 provides the correct voltage to the pins on the PC card connector (as judged by the card type inserted in slot A or slot B). Once the card type is detected (as judged by the pc card definition table in Fig. 5), the wafer 28 provides the appropriate voltage for the card of the type. In one embodiment, the present invention can provide a passive smart card adapter 18' that is configured to be inserted into slot a 12 or slot B 14 and that is no longer a PC card type Ι/ΙΙ/ A simple slot interface. The I273428 dynamic adapter 18 of the present embodiment includes a suitable connector 84 and passive circuit %. The smart card 16 inserted into the passive smart card adapter 18 can also include a physical contact 88 for interfacing with the physical connector material on the adapter. The adapters and the smart card's pin arrangements 84 and 88 are as described in the smart card specification, such as a smart card specification compatible with PC/SC, which complies with the 18〇7816 electrical specification and T=〇, T=1 agreement. In this embodiment, the adapter 18 is used to provide smart card readability and workability without having to rework the outer casing to accommodate the particular smart card slot. In addition, the pC may also include the smart card slot 14 as shown in FIG. Of course, in this alternative embodiment, # can provide circuitry 86, and connector 84, within the slot 14'. Referring now to Figure 3, this is a detailed block diagram of the integrated controller 1 showing the logical portion of the smart card detection and operation. In this example, the controller 1 includes smart card sensing logic 30A and 30B, smart card multiplexer (Μυχ) logic 32 8 and 32, smart card reader logic 34Α and 34Β, and interface logic 36Α and 36Β. In FIG. 3, only the logic related to the detection and operation capability portion of the smart card and the passive smart card adapter is shown, and it should be understood that the controller 10 further includes additional logic (not shown) for performing Traditional PC card detection and operation. The conventional PC card controller uses a set of card detection pins CD1 and CD2, and a set of voltage sensing pins VS1 and VS2 to detect the card type inserted into the slot. The combination of couplings between the pins (relative to ground) allows the appropriate logic to indicate which type of card is inserted into the slot. For example, as shown in the list in FIG. 5, the face-to-face combination between the pins CD1, CD2, VS1 and VS2 can determine the card system 1 $•12-1273428 bit PCMCIA card inserted into the slot or 32-bit CardBus card. In addition, as shown in the table, the combination can also determine the driving voltage of a particular type of card. For example, 3.3V, 5V, X.XV, and Υ·Υν. The combination of CD1, CD2, VS1 and VS2 listed in the last two columns of Figure 5 is retained in the pc card specification.

本發明使用該等保留的CD卜CD2、VS1與VS2之組合其中之 一’辅以一額外之狀態變化信號STSCHG,來指明某智慧卡 是否確已插入該插槽内(以直接方式,或透過某配接器)。本 發明如使用該狀態變化信號為較佳,因該信號在傳統式PC 卡檢測過程裡並未被使用,而僅於當該卡片型式為已知時 _ 才被使用。 如此,一方面說來,可將如圖3的智慧卡感測邏輯3〇八視 為一種可判斷出該插入插槽中卡片型式的狀態機器。為此 目的,並請參閱圖4,描述如圖3智慧卡感測邏輯3〇A之狀態 機器表現。如圖4所示,該智慧卡感測邏輯3〇A可接受、 CD2、VS卜VS2與狀態變化(分別標示為4〇、42、44、46以 及48)作為其輸入。按照如圖5之CD1、CD2、VS1與VS2保留 佈置方式,再加上該額外的狀態變化信號,該狀態機器3〇a # 即可判斷出一適當邏輯32A,供與該給定型式之卡片進行通 訊。譬如說,該CD卜CD2、VS卜VS2某些組合(如圖5所示), 可指明該插入插槽中的卡片如不為16位元PC卡,則即是32 位元CardBus PC卡。按此,該狀態機器30A即針對某給定卡 片型式來啟動適當邏輯50或52。亦應注意也可利用該四個 接腳的組合,來判斷出該插入插槽中卡片的特定電壓。再 延伸傳統式PC卡控制器的能力,本發明亦可監視該 -13- 1273428 STSCHG接腳’以判斷插入插槽者係為智慧卡或是被動式智 慧卡配接器,並且同樣地可啟動適當的邏輯54以便與如圖3 所示之智慧卡邏輯32A進行通訊。為判斷CD卜CD2、VS1、 VS2與STSCHG狀態,該卡片感測邏輯3〇a可於所選出之某 一或多個對外接腳上,產生例如像是脈衝列信號,並且藉 對某一或多個其他的接腳來監視該信號(相對於接地),而判 斷該插入插槽中的卡片型式。 根據圖5之表格所示,該卡片感測邏輯3〇a與30B可操作 來檢測係智慧卡或是被動式智慧卡配接器以及PC卡。如圖5 所示的接腳佈置方式係依PC卡規格所設計,並為該些信號 線的傳統佈置方式。卡片辨識是由欄1—4,即CD2、CD1、 VS2與VS1的電壓值所判斷。智慧卡以及被動式智慧卡配接 器的檢測作業,兩者均藉由利用該些經保留之接腳組合, 附以使用例如像是該STSCHG信號線的額外接腳而操作 之。圖7B中之列表即總結該項概念。該表中顯示用以檢測 PC卡、智慧卡與被動式智慧卡配接器卡的接腳。智慧卡或 被動式智慧卡配接器檢測作業的信號欄裡,包括為CD1、 CD2、VS1與VS2所保留的各個區域其中之一,即如圖5列表 内最後兩列所示。應注意雖然諸圖所描述者係使用信號線 STSCHG(其係由傳統式PC卡規格所提供),不過本發明一般 仍可適於PC卡規格裡任何在卡片檢測過程中並未使用到的 接腳。換言之,就由時間的觀點來說,在卡片檢測過程中, PC卡規格裡某些信號線仍屬未加使用。本發明利用某一(或 多個)該等信號線,併同於該些既經保留的CD1、CD2、VS1 -14· 1273428 與VS2組合,以進行智慧卡或被動式智慧卡配接器檢測作 業。如此,圖式裡僅係表現出眾多關於一額外信號接腳可 作為智慧卡檢測作業之應用範例的其中一些。 圖6中之流程圖60說明卡片型式檢測處理程序。為簡化起 見,用以檢測並操作PC卡、智慧卡或被動式智慧卡配接器 卡之各項相對應邏輯(即如圖2、3所示)的參考編號即加省 略。起初,檢測邏輯檢測是否出現CD1、CD2、VS1、VS2 與STSCHG 62。如否,或是並非可用,則會假定並無卡片 插入插槽,因而卡片檢測信號(CD1與CD2)是否被阻斷64。 當卡片插入後,該檢測邏輯監視CD1或CD2的負緣觸發66。 根據該P C卡規格可判斷是否出現卡片。一旦檢測到卡片, 本發明之檢測邏輯即切動(toggle)CDl、CD2、VS1、VS2與 STSCHG以判斷被插入之卡片型態68。而上述之切動,可以 是脈衝列信號或是其他切動信號方式的型式。該檢測邏輯 係依照下述方式對該些CD1、CD2、VS1、VS2與STSCHG進 行輪詢。首先,該邏輯判斷VS1與CD2是否接地70。如否, 如圖5中之表格所示,則可得知經插入者為16位元PCMCIA 卡或是32位元Card Bus卡。如是,則該邏輯判斷VS2與CD1 是否互接74。如否,如圖5中之表格所示,則同樣可得知該 插入者為16位元卡或是32位元Card Bus卡76。如是,則判 斷CD1與STSCHG是否互接78,則可判斷智慧卡或被動式智 慧卡配接器是否存在。於82判斷是該被動式智慧卡配接器 插入該插槽中或是一智慧卡直接插入該智慧卡插槽中。 本發明另一特點為提供一種可與現有之PC卡控制器邏輯 1273428 直接整合之的整合控制器10。傳統式PC卡控制器邏輯係屬 1C包裝式,直接固接(mount)於主機板上,具有208支接腳, 而各接腳又係經由PC卡規格所指配。而另一特點為提供一 種控制器10,可直接替代傳統式控制器而無須將接腳佈置 重新設定、增加額外的接腳組態、更動主機板或是改變所 需加工製程。為此,並參酌圖7A之表,本發明控制器10包 含有可相容傳統既存之介面卡信號以及智慧卡信號。如該 表内所示,用以介接傳統式16與32位元卡片之相同接腳(最 左欄)可用以介接本發明之智慧卡。故即無需增加額外之接 腳。再度參考圖3,如經檢測出現某智慧卡插入插槽中,則 邏輯30A或3 0B會與邏輯34A或34B相互通訊並加以致能,藉 以致能智慧卡可讀性。該邏輯34A和34B可致能插槽多工器 邏輯32A或32B,以便讓插槽(A或B)可與Cardbus/PCI控制器 邏輯36A或36B彼此通訊,而其又得與PCI匯流排20通訊(透 過PCI介面3 8)。應即知悉本發明之邏輯30A、30B、34A和 34B可直接介接於該多工器邏輯32A和32B,並利用傳統式 PC卡通訊協定而與匯流排介面控制器36A和36B相互通 訊。如係傳統式卡片插入該插槽中(插槽A或B),則併合入 該控制器10之内的傳統式邏輯(未圖示),可啟動該多工器 32A和32B,而且利用傳統式PC卡通訊協定與該匯流排介面 控制器36A和36B相互通訊。 為促使直接與傳統式PC卡邏輯組相整合,本發明控制某 預先設定數目之預定接腳,以便與智慧卡進行通訊。例如, 如圖7A所示,接腳17、51、58、47、32、接地(GND)、18、 1273428 ι 扇 16與40 ’即如Pc卡規格所標定,係由本發明用以操作智慧 卡兩者。因此,控制器10即無須額外接腳來進行智 慧卡運作。在作業上,一旦檢測到該智慧卡(如前文並參酌 圖3-6),邏輯34A或34B對於圖7A中所示之%卡接腳運作重 新加以指配’以提供智慧卡可讀性。該項信號指配作業, 如圖7A之中該智慧卡「信號(signal)」攔所示,係針對讀 取智慧卡時所需之信號。 ° 該表與圖7A係包含作為本發明控制器】〇内用以操作pc 卡所需之查核表。同樣地,圖5與圖7]8内的列表亦係包含作籲 為控制器10内作為查核表,用以檢測pc卡及智慧卡。為此, 並將邏輯30A與30B視為狀態機器(如圖4所示),該狀態機器 可將輸入信號與該圖5與圖7B内的查核表加以比較,以便將 適當的邏輯耦接至該卡片。 對於熟稔本項技藝之人士,應即可認知該CD卜CD2、VS1 與VS2分別包含卡片檢測與電壓選定信號,即如傳統式 卡規格中所標定。在圖5、7八與7;8的列表以及圖6的流程圖 裡,用於這些信號線的命名法可包含如Cm #、cD2 #、VS1鲁 #、VS2#等,而其皆為傳統式信號線路之正式名稱。然而, 使用該CD1、CD2、VS1與VS2作為其正式名稱之簡稱且交互 應用實屬極為明顯易見。 故顯然地,本發明即可提供一種整合式智慧卡控制器與 智慧卡檢測程序,且足可滿足本文所述之目標與宗旨。對 於A稳本項技藝之人士,應可明悉可對該者進行修飾之。 例如,本發明雖係藉參酌於智慧卡檢測與操作而加描述, -17- 1273428 本發明確亦等同適用於檢測與操The present invention uses one of the reserved CDs CD2, VS1 and VS2, together with an additional state change signal STSCHG, to indicate whether a smart card has indeed been inserted into the slot (either directly or through An adapter). It is preferred that the state change signal is used as the signal is not used in the conventional PC card detection process, but only when the card type is known. Thus, on the one hand, the smart card sensing logic of FIG. 3 can be regarded as a state machine that can determine the card type inserted in the slot. For this purpose, and referring to Figure 4, the state of the smart card sensing logic 3〇A as shown in Figure 3 is described. As shown in Figure 4, the smart card sensing logic 3〇A accepts, CD2, VSb VS2 and state changes (labeled 4〇, 42, 44, 46, and 48, respectively) as their inputs. According to the CD1, CD2, VS1 and VS2 reservation arrangement as shown in FIG. 5, plus the additional state change signal, the state machine 3〇a # can determine an appropriate logic 32A for the card of the given type. Communicate. For example, some combinations of the CD, CD2, and VS2 (as shown in FIG. 5) indicate that the card inserted in the slot is not a 16-bit PC card, that is, a 32-bit CardBus PC card. In accordance with this, the state machine 30A activates the appropriate logic 50 or 52 for a given card type. It should also be noted that the combination of the four pins can also be used to determine the specific voltage of the card inserted into the slot. Further extending the capabilities of the conventional PC card controller, the present invention can also monitor the-13-1273428 STSCHG pin 'to determine whether the slot is a smart card or a passive smart card adapter, and the same can be activated properly Logic 54 to communicate with smart card logic 32A as shown in FIG. To determine the CD CD2, VS1, VS2 and STSCHG states, the card sensing logic 3a can generate, for example, a pulse train signal on one or more selected external pins, and borrow a pair or A plurality of other pins monitor the signal (relative to ground) and determine the card type inserted into the slot. As shown in the table of Figure 5, the card sensing logics 3a and 30B are operable to detect a smart card or a passive smart card adapter and a PC card. The pin arrangement shown in Figure 5 is designed according to the PC card specifications and is the traditional arrangement of these signal lines. Card identification is determined by the voltage values of columns 1-4, namely CD2, CD1, VS2 and VS1. The smart card and the passive smart card adapter detection operation are both operated by utilizing the reserved pin combinations, using additional pins such as, for example, the STSCHG signal line. The list in Figure 7B summarizes the concept. The table shows the pins used to detect the PC Card, Smart Card and Passive Smart Card Adapter Card. The signal bar of the smart card or passive smart card adapter detection operation includes one of the areas reserved for CD1, CD2, VS1 and VS2, as shown in the last two columns in the list in Figure 5. It should be noted that although the figures are described using the signal line STSCHG (which is provided by conventional PC card specifications), the present invention is generally applicable to any of the PC card specifications that are not used during card detection. foot. In other words, from a time point of view, during the card detection process, some of the signal lines in the PC card specification are still unused. The present invention utilizes one or more of the signal lines and combines the reserved CD1, CD2, VS1 -14· 1273428 with VS2 for smart card or passive smart card adapter inspection . As such, the diagram only shows a number of examples of an additional signal pin that can be used as a smart card detection application. A flowchart 60 in Fig. 6 illustrates a card type detection processing program. For the sake of simplicity, the reference numbers for detecting and operating the corresponding logic of the PC Card, Smart Card or Passive Smart Card Adapter Card (ie, as shown in Figures 2 and 3) are omitted. Initially, the detection logic detects the presence of CD1, CD2, VS1, VS2 and STSCHG 62. If not, or not available, it is assumed that no card is inserted into the slot and the card detection signals (CD1 and CD2) are blocked 64. The detection logic monitors the negative edge trigger 66 of CD1 or CD2 when the card is inserted. According to the P C card specification, it can be judged whether or not a card appears. Once the card is detected, the detection logic of the present invention toggles CD1, CD2, VS1, VS2, and STSCHG to determine the inserted card type 68. The above-mentioned cut can be a pulse train signal or other type of cut signal method. The detection logic polls CD1, CD2, VS1, VS2 and STSCHG in the following manner. First, the logic determines if VS1 and CD2 are grounded 70. If not, as shown in the table in Figure 5, it can be known that the interpolator is a 16-bit PCMCIA card or a 32-bit Card Bus card. If so, the logic determines if VS2 and CD1 are interconnected 74. If not, as shown in the table in Fig. 5, it is also known that the inserter is a 16-bit card or a 32-bit Card Bus card 76. If yes, it is determined whether CD1 and STSCHG are connected to each other 78, and it can be judged whether the smart card or the passive smart card adapter exists. It is determined at 82 that the passive smart card adapter is inserted into the slot or a smart card is directly inserted into the smart card slot. Another feature of the present invention is to provide an integrated controller 10 that can be directly integrated with existing PC Card Controller Logic 1273428. The traditional PC card controller logic is 1C packaged, directly mounted on the motherboard, with 208 pins, and each pin is assigned via PC card specifications. Another feature is the provision of a controller 10 that can directly replace a conventional controller without having to reset the pin arrangement, add additional pin configurations, change the motherboard, or change the desired processing. To this end, and in conjunction with the table of Figure 7A, the controller 10 of the present invention contains compatible interface card signals and smart card signals that are compatible with conventional ones. As shown in the table, the same pins (leftmost column) for interfacing conventional 16- and 32-bit cards can be used to interface with the smart card of the present invention. Therefore, there is no need to add extra pins. Referring again to Figure 3, if a smart card insertion slot is detected, logic 30A or 30B will communicate with and be enabled with logic 34A or 34B to enable smart card readability. The logic 34A and 34B can enable the slot multiplexer logic 32A or 32B to allow the slot (A or B) to communicate with the Cardbus/PCI controller logic 36A or 36B, which in turn is associated with the PCI bus 20 Communication (via PCI interface 3 8). It should be understood that the logic 30A, 30B, 34A, and 34B of the present invention can interface directly with the multiplexer logic 32A and 32B and communicate with the bus interface controllers 36A and 36B using conventional PC card communication protocols. If a conventional card is inserted into the slot (slot A or B), the conventional logic (not shown) incorporated into the controller 10 can be used to activate the multiplexers 32A and 32B, and utilize conventional The PC Card protocol communicates with the bus interface controllers 36A and 36B. To facilitate direct integration with a conventional PC Card logical group, the present invention controls a predetermined number of predetermined pins to communicate with the smart card. For example, as shown in FIG. 7A, the pins 17, 51, 58, 47, 32, ground (GND), 18, 1273428 ι fans 16 and 40' are calibrated as in the Pc card specification, and are used by the present invention to operate the smart card. Both. Therefore, the controller 10 does not require an additional pin for the smart card operation. In operation, once the smart card is detected (as previously described and considered in Figures 3-6), logic 34A or 34B is reassigned to the % card pin operation shown in Figure 7A to provide smart card readability. The signal assignment operation, as shown in the smart card "signal" in Figure 7A, is for the signal required to read the smart card. ° This table and Figure 7A contain the checklist required to operate the pc card as a controller of the present invention. Similarly, the list in Fig. 5 and Fig. 7] 8 is also included in the controller 10 as a checklist for detecting the pc card and the smart card. To this end, and to treat logic 30A and 30B as state machines (as shown in Figure 4), the state machine can compare the input signals to the look-up tables in Figures 5 and 7B to couple the appropriate logic to The card. For those skilled in the art, it should be recognized that the CD, VS1 and VS2 contain card detection and voltage selection signals, respectively, as specified in the conventional card specifications. In the list of Figures 5, 7 and 7; 8 and the flow chart of Figure 6, the nomenclature for these signal lines may include, for example, Cm #, cD2 #, VS1Lu#, VS2#, etc., all of which are conventional The official name of the signal line. However, the use of the CD1, CD2, VS1 and VS2 as short names for their official names and interactive applications is extremely obvious. Therefore, it is apparent that the present invention can provide an integrated smart card controller and smart card detection program, which can satisfy the goals and objectives described herein. For those who have a stable skill in this project, it should be understood that the person can be modified. For example, although the present invention is described by reference to smart card detection and operation, -17-1273428 the present invention is equally applicable to detection and operation.

如先前所指出地,本發明雖然首先敘述係參考智慧卡與 然除了傳統式PC卡之外, 作任何形式擴充卡。另亦 PC卡之檢測及操作, 才呆作。譬如,在另一 tAs previously indicated, the present invention first describes any form of expansion card in addition to a conventional PC card with reference to a smart card. In addition, the detection and operation of the PC card only stayed. For example, in another t

F ’但其一樣適用於種種擴充卡之檢測與 一依據本發明之實施例中,一控制器1 〇 A 亦可適於檢測或操作一個或多個快閃媒體卡。 快閃媒體卡可用於許多"數位設備"且具有各式各樣的形 狀、能力、以及儲存容量。譬如數位電視攝錄影機、數位 相機、可攜式音樂播放器、個人數位行動助理(PDA)、或其馨 他在各式快閃媒體卡上儲存數位資訊之類似”數位產品,,。 快閃媒體卡之一些型式包括SmartMediaTM 、F' is equally applicable to the detection of various expansion cards. In an embodiment in accordance with the invention, a controller 1A can also be adapted to detect or operate one or more flash media cards. Flash media cards can be used in many "digital devices" and come in a wide variety of shapes, capabilities, and storage capacities. For example, digital TV camcorders, digital cameras, portable music players, personal digital assistants (PDAs), or similar "digital products" that store digital information on various flash media cards, Some types of flash media cards include SmartMediaTM,

CompactFlash™、及 MemoryStick® 卡。為了 轉換這些送達 與來自PC之儲存的數位資訊,需利用各式快閃媒體讀取器。 如同先前描述之智慧卡的例子並參考圖1,一種介接快閃 媒體卡與PC之標準方法係利用相關之對應具有專用連接器 之特定快閃媒體卡的外部讀取器/寫入器。譬如,一 •18- 1273428CompactFlashTM, and MemoryStick® cards. In order to convert these digital messages to and from the storage of the PC, various flash media readers are required. As with the previously described example of a smart card and with reference to Figure 1, a standard method of interfacing a flash media card with a PC utilizes an external reader/writer associated with a particular flash media card having a dedicated connector. For example, one • 18-1273428

MemoryStick.^閃媒體卡可具有自己的 容快閃讀取器。此使得各式數位產品之使用者必須購買與 利用獨立快閃媒體讀取器以傳送至及來自PC之數位資訊。 另外,各讀取器典型上亦利用其自身之特定ASIC來與各不 同快閃媒體卡介接。此標準解決辦法典型上需求多種快閃 媒體讀取器、多種ASIC、以及用於各快閃媒體卡之專用連 接器。有些快閃媒體讀取器可讀取兩種以上不同之快閃媒 體卡。 有利地,如圖8 A所繪示,一依據本發明之控制器丨〇 a包 鲁 括一或多個快閃媒體讀取器804_1、804-2、......804-n等用 於讀取及控制相關之多個快閃媒體卡。這使得一整合控制 器10A能控制相關之多個快閃媒體卡。具有多個快閃媒體讀 取器804-1、804-2、......8〇4-n之整合控制器i〇A亦允許省略The MemoryStick.^ flash media card can have its own fast flash reader. This allows users of all types of digital products to purchase and utilize discrete flash media readers for digital information transmitted to and from the PC. In addition, each reader typically also utilizes its own specific ASIC to interface with various flash media cards. This standard solution typically requires multiple flash media readers, multiple ASICs, and dedicated connectors for each flash media card. Some flash media readers can read more than two different flash cards. Advantageously, as shown in FIG. 8A, a controller 丨〇a according to the present invention includes one or more flash media readers 804_1, 804-2, ... 804-n, etc. Used to read and control related flash media cards. This allows an integrated controller 10A to control the associated plurality of flash media cards. The integrated controller i〇A with multiple flash media readers 804-1, 804-2, ... 8〇4-n also allows omission

特定需具備相關ASIC及專用連接器如之前詳述之外部快閃 媒體讀取器。另外。相同整合控制器1 〇 A可裝備有檢測與控 制裝置,以檢測及控制PC卡(16位元PCMCIA卡及32位元 CardBus卡)以及前述之智慧卡。 H 控制器10A可響應一經輸入路徑803傳送至控制器10A之 輸入彳s號。輸入L號可指示一特定擴充卡,且此控制器可 更基於輸入信號而作用以致能及/或除能各種快閃媒體讀 取器804-1、804_2、......804-n,稍後將更完整描述。 控制器10A亦可允許自諸多快閃媒體讀取器、 804-2、·····804-n中選出一讀取器以做個別測試。譬如,一 個別測试彳§號可經測斌路控8〇7搞接至輸入路徑$,甘指 -19- 1273428 明將被測試之選定讀取器。在此情況下,目標讀取器可被 致能供測試用。 跳到圖8B,經輸入路徑8〇3傳送之輸入信號亦可基於一特 定快閃媒體卡810及對應插槽8〇5。插槽805可更耦接至一相 關PC之主機板。譬如,插槽805可為一配置以僅接受一如 Memory Stick⑧快閃媒體卡之特定卡810的Memory Stick®。 一旦MemoryStick.^閃媒體卡耦接至插槽8〇5,輸入信號便 指示該特定卡之存在。熟習此技藝者瞭解各式各樣根據檢 測擴充卡810之存在而觸發輸入信號之方法。 另外,在空間或其他條件允許之情況下,控制器1〇A亦可 耦接至多個插槽,該多個插槽更連接至相關PC之主機板。 三種範例插槽806-1、806-2、806-3緣於圖8C。一些插槽 806_1、806-2可進一步被配置以接受相關之擴充卡8〇8-1、 808-2。輸入信號於是可響應該等插槽806-1、806-2以指示 當一個或多個該等插槽已被其相關擴充卡8〇8-:1、808-2所佔 用。譬如’ 一插槽806_ 1可被配置以接受一 MemoryStick®快 閃媒體卡’而另一插槽806-2可被配置以接受SmartMedia⑧ 快閃媒體卡。若一 MemoryStick®快閃媒體卡插入一插槽 806-1,響應此條件之一輸入信號經由輸入路徑8Q3傳送到 控制器10A以指示控制器10A該卡之存在。再一次,熟習此 技藝者瞭解各式各樣檢測在一插槽中實際存在之卡的不同 方法。 另外,另一插槽806-3可為一標準PC卡型Ι/Π/ΙΠ介面。此 類介面可接受一種被動配接器811,其進一步可接受多種擴 1273428 充卡808-3。如前所詳述,此類配接器811可更包括一智慧 卡插槽以接受一智慧卡。其他種類被動配接器811可適用於 相同PC卡介面且接受快閃媒體卡,例如:一 MemoryStick® 配接器可接受一 MemoryStick®卡並連接至一標準PC卡型 式介面。 跳到圖9,一更詳細之方塊圖繪示整合控制器i〇A之示範 具體實施例。如圖所繪,一 PC卡(16位元PCMCIA卡及32位 元CardBus卡)、或更接受一智慧卡或快閃媒體卡之一被動 配接器可被耦接至插槽904或906。PC卡及智慧卡之檢測及 _ 操作能力相似於參考圖3-7之前述。控制器10A亦可包括許 多快閃媒體邏輯910、912、914及暫存器以控制快閃媒體卡 與主機系統之連接。例如,此類邏輯電路可供以讀取Specific ASICs and dedicated connectors are required for the external flash media reader as detailed above. Also. The same integrated controller 1 〇 A can be equipped with detection and control devices to detect and control PC cards (16-bit PCMCIA cards and 32-bit CardBus cards) and the aforementioned smart cards. The H controller 10A can respond to the input 彳s number transmitted to the controller 10A via the input path 803. The input L number may indicate a particular expansion card, and the controller may act on the basis of the input signal to enable and/or disable various flash media readers 804-1, 804_2, ... 804-n. , which will be described more fully later. Controller 10A may also allow a reader to be selected from a number of flash media readers, 804-2, ..... 804-n for individual testing. For example, an individual test 彳§ number can be connected to the input path $ via the test terminal 8〇7, and the finger -19-1273428 will be selected for the selected reader. In this case, the target reader can be enabled for testing. Jumping to Figure 8B, the input signal transmitted via input path 8〇3 can also be based on a particular flash media card 810 and corresponding slot 8〇5. The slot 805 can be further coupled to a motherboard of a related PC. For example, the slot 805 can be a Memory Stick® configured to accept only a particular card 810 such as a Memory Stick 8 flash media card. Once the MemoryStick.^ flash media card is coupled to slot 8〇5, the input signal indicates the presence of that particular card. Those skilled in the art will appreciate a wide variety of methods for triggering an input signal based on the presence of the test expansion card 810. In addition, the controller 1A can also be coupled to a plurality of slots, which are more connected to the motherboard of the associated PC, where space or other conditions permit. The three example slots 806-1, 806-2, 806-3 are due to Figure 8C. Some slots 806_1, 806-2 may be further configured to accept associated expansion cards 8〇8-1, 808-2. The input signal can then respond to the slots 806-1, 806-2 to indicate when one or more of the slots have been occupied by their associated expansion cards 8〇8-:1, 808-2. For example, 'one slot 806_1 can be configured to accept one MemoryStick® flash media card' and another slot 806-2 can be configured to accept a SmartMedia8 flash media card. If a MemoryStick® flash media card is inserted into a slot 806-1, an input signal is transmitted to the controller 10A via the input path 8Q3 in response to this condition to indicate the presence of the card by the controller 10A. Once again, those skilled in the art are aware of the various ways in which various cards that actually exist in a slot are detected. In addition, the other slot 806-3 can be a standard PC card type Ι / Π / ΙΠ interface. Such an interface can accept a passive adapter 811 that can further accept a variety of expansions of the 1273428 charging card 808-3. As previously detailed, such adapter 811 can further include a smart card slot to accept a smart card. Other types of passive adapters 811 can be used on the same PC card interface and accept flash media cards. For example, a MemoryStick® adapter accepts a MemoryStick® card and connects to a standard PC Card type interface. Turning to Figure 9, a more detailed block diagram illustrates an exemplary embodiment of an integrated controller i〇A. As depicted, a PC card (a 16-bit PCMCIA card and a 32-bit CardBus card), or a passive card that accepts a smart card or flash media card, can be coupled to slot 904 or 906. The detection and _ operation capabilities of PC cards and smart cards are similar to those described above with reference to Figures 3-7. Controller 10A may also include a number of flash media logics 910, 912, 914 and registers to control the connection of the flash media card to the host system. For example, such logic is available for reading

SmartMediaTM、CompactFlashTM、及 MemoryStick®卡。 一符合本發明之控制器10A亦可被配置以致能所選出之 讀取器及除能其他讀取器。更有利地,此允許節省電源及 簡化整合控制器10A之操作。另外,其亦允許所選出之讀取 器被個別地測试’如先前詳細敛述者。 為了致能特定快閃媒體讀取器,可利用一整合控制器1〇 外部之一 SEEPROM。此SEEPROM可在系統電源開啟時載 入資料資訊至唯讀組態暫存器。此資料資訊可包括許多不 同的資訊,諸如PC製造商資訊及系統組態指令,其包括指 示欲被致能及欲被除能的讀取器之資訊。 一較佳的致能特定快閃媒體讀取器之方法可包含軟體, 其根據在輸入路徑8〇3上傳送之輸入信號,規劃整合控制器 • 21 · 1273428 10A内之媒體暫存器908。為了實現這個目的,媒體暫存器 908 ’尤其是•’插槽需求(socket-on-demand)’’暫存器,可使用 可能另外儲存於外部SEEPROM之值來規劃。暫存器之規劃 可在一特定狀態發生,例如:一&quot;電源開啟”重置狀態、或 發生在其他以下描述之時間。 以圖10為例’流程圖1 〇〇〇繪示資料如何在某特定狀態期 間被寫入至暫存器,譬如一”電源開啟,,之狀態。在第一步 驟1002啟動”電源開啟”狀態,其產生一重置功能。此時, 如步驟1004所指示’&quot;插槽需求(s〇eket-on-demand)&quot;暫存器 進入可規劃狀態。下個步驟1 〇〇6中,一符合本發明之軟體 排程(routine)將資料寫入暫存器。此資料可包括可能另存於 SEEPROM中之客戶特定0EM資料。此資料亦可包括如更早 而詳細說明之在檢測或選擇擴充卡上之資訊。 接著’ 一鎖住功能在1 〇〇8被致動以避免後續不小心地或 未經授權之寫入至暫存器中。一鎖住功能可為一預定單一 鎖住(one-lock)位元、一預定讀/寫鎖住串列、或一預定資料 鎖住型樣(pattern)。此後,該&quot;插槽需求”暫存器變成&quot;唯讀,, 暫存器1010。 跳到圖11,該&quot;插槽需求&quot;暫存器保持在唯讀狀態11〇2直 至電源開啟”重置功能被再度啟動,或直至,,開鎖,,功能被致 月b 1104。一開鎖功能可包括一預定開鎖位元、一預定讀/寫 串列、或一預定資料開鎖位元串列。 在致此開鎖功能後,符合本發明之軟體在下個步驟 中將貝料寫入暫存器。譬如,—個三位元資料序列可用於 -22· 1273428 提供指令至該控制器以致能或除能某些快閃媒體讀取器。 -個&quot;000”串列可除能所有快閃讀取器’而一&quot;〇〇1&quot;串列可致 此一特定快閃媒體讀取器。該快閃媒體讀取器可被致能以 響應-測試信號或在-特定插槽内之特定快閃媒體卡之檢 測。之後,如_前描述之步驟,—鎖住功能被致能1108 =防止非期望之資料寫人暫存器中。因此&quot;插槽需求&quot;暫存 器變成&quot;唯讀&quot;暫存器1110。 此處已描述之具體例,其實僅是利用到本發明之部分幾 個例子而已,且僅是以繪示舉例之例用而已,並無限制之參 意。明顯的料落於本發明範圍之其他許多實施例可被熟 稔本項技藝之人士所體會到,而它們皆不脫出本發明之精 神與範疇。 【圖式簡單說明】 經後纂詳細說明並參酌载繪之隨附圖式,本發明其他各 項特性與優點即屬明顯易瞭,其内相仿編號意表近似元 件,而其中: φ 圖1為描述一供PC應用之併合有智慧卡作業能力的傳統 式解決方案方塊圖; 圖2為本發明整合性智慧卡讀卡機之系統層級方塊圖; 圖3為本發明整合性智慧卡讀卡機之細部方塊圖; 圖4為本發明整合性智慧卡讀卡機之狀態機器方塊圖; 圖5為傳統式pc卡檢測與電壓感測接腳佈置方式列表,以 及本發明控制器所使用之智慧卡檢測接腳佈置的範例; 圖6為本發明示範性智慧卡與被動式智慧卡讀卡機配接 -23- 1273428 檢測法則之流程圖; 圖7A與7B為描述顯示傳統式pCMCIA指配之功能性接 腳’與其分別應用於智慧卡介面及檢測方面的諸項表列; 圖8A繪示另一依據本發明之具體實施例,其繪示了一具 有一個或多個響應一輸入信號之快閃媒體讀取器的控制 器; 圖8B繪示一基於一特定插槽產生圖8八之輸入信號的方 法,該插槽接受一特定之擴充卡; 圖8C繪示另一產生基於多個插槽產生圖8A之輸入信號⑩ 的方法; 圖9係闡示另一示範控制器具體實施例之更詳細方塊 圖,其係一具有兩個快閃媒體讀取器與兩個PC卡型ι/ΙΙ/ΙΠ 蜇插槽介面者; 圖1 〇係一示範流程圖,其闡示一當控制器在,,電源開啟,, 狀態下用以規劃資料至一控制器内之一唯讀記憶體的方 法;以及 圖11係一示範流程圖,其闡示一當控制器不在,,電源開啟 ® ’’狀態下用以規劃資料至一控制器内的一唯讀記憶體的方 法0 【主要元件符號說明】 ίο、10Α 12、14、14f 16 18 控制器 插槽 智慧卡處理器 智慧卡配接器 -24- 1273428 20 資料匯流排 22 南橋邏輯 24 北橋邏輯 26 處理器 28 Power 1C 晶片 30A、30B 智慧卡感測邏輯 32A、32B 智慧卡多工器邏輯 34A、34B 智慧卡讀卡機邏輯 36A、36B 匯流排介面控制器/介面邏輯 38 週邊控制器介面(PCI)介面 40 、 42 、 44 ' 46 、 48 接腳/輸入 50 、 52 、 54 邏輯 60 卡片型式檢測程序 62-83 卡片型式檢測程序之步驟 84、841 連接器 86 ^ 86f 被動電路 88 實體接觸點 102 主機控制器/PC卡控制器 104 配接器卡 106 &gt; 108 PC卡連接器 803 輸入路徑 804-1、804-2〜804-n 快閃媒體讀取器 805 &gt; 904 、 906 插槽 806-1〜806-3 插槽 -25- 1273428 807 測試路徑 808-1 〜808-3 擴充卡 810 快閃媒體 811 被動配接 908、 913 暫存器 910 &gt; 912 、 914 快閃媒體 1000 流程圖 1002-1010 步驟 1102-1110 步驟 卡 器 邏輯SmartMediaTM, CompactFlashTM, and MemoryStick® cards. A controller 10A in accordance with the present invention can also be configured to enable selected readers and other readers. More advantageously, this allows for power savings and simplifies the operation of the integrated controller 10A. In addition, it also allows the selected readers to be individually tested&apos; as previously detailed. In order to enable a particular flash media reader, an integrated controller 1 〇 external one of the SEEPROMs can be utilized. This SEEPROM can load data information into the read-only configuration register when the system power is turned on. This information may include a number of different information, such as PC manufacturer information and system configuration instructions, including information indicating the readers to be enabled and intended to be disabled. A preferred method of enabling a particular flash media reader can include a software that plans to integrate the media register 908 within the controller 21 </ RTI> 1273428 10A based on the input signals transmitted on the input path 〇3. To accomplish this, the media register 908&apos;, especially the &apos;socket-on-demand&apos; register, can be programmed with values that may otherwise be stored in the external SEEPROM. The plan of the scratchpad can occur in a specific state, for example: a &quot;power on" reset state, or at other times described below. Take Figure 10 as an example 'flowchart 1 〇〇〇 how the data is A particular state is written to the scratchpad, such as a "power on," state. In the first step 1002, the "power on" state is initiated, which generates a reset function. At this point, as indicated by step 1004, the &apos;slot demand (s〇eket-on-demand)&quot; register enters the planable state. In the next step 1 〇〇6, a software schedule in accordance with the present invention writes data to the scratchpad. This information may include customer-specific 0EM data that may be stored in the SEEPROM. This information may also include information on testing or selecting an expansion card as described earlier. The 'lock-on' function is then activated at 1 〇〇 8 to avoid subsequent accidental or unauthorized writes to the scratchpad. A lock function can be a predetermined one-lock bit, a predetermined read/write lock sequence, or a predetermined data lock pattern. Thereafter, the &quot;slot requirement&quot; register becomes &quot;read only,, register 1010. Jump to Figure 11, the &quot;slot requirement&quot; register remains in read-only state 11〇2 until power Turn on the "Reset function is restarted, or until, unlock, the function is caused by the month b 1104. An unlocking function can include a predetermined unlock bit, a predetermined read/write string, or a predetermined data unlock bit string. After this unlocking function, the software according to the present invention writes the batting to the register in the next step. For example, a three-bit data sequence can be used for -22· 1273428 to provide instructions to the controller to enable or disable certain flash media readers. - A &quot;000" string can be used to disable all flash readers and a &quot;〇〇1&quot; serial can cause this particular flash media reader. The flash media reader can be caused Can be detected in response-test signals or specific flash media cards in a particular slot. Afterwards, as described in the previous steps, the lock function is enabled 1108 = prevent undesired data from being written to the scratchpad Therefore, the &quot;slot requirement&quot; register becomes &quot;read only&quot; register 1110. The specific examples described herein are only a few examples of the use of the present invention, and only The present invention is not limited by the examples, and many other embodiments that are apparent to those skilled in the art can be appreciated by those skilled in the art without departing from the invention. Spirit and Category. [Simple Description of the Drawings] The other features and advantages of the present invention are apparently exemplified by the detailed description of the drawings and the accompanying drawings, which are similar to the components, and wherein: φ Figure 1 is a description of a smart card for PC applications. Figure 2 is a block diagram of the system of the integrated smart card reader of the present invention; Figure 3 is a detailed block diagram of the integrated smart card reader of the present invention; FIG. 5 is a diagram showing a state machine block diagram of a conventional smart card reader; FIG. 5 is a diagram showing a conventional PC card detection and voltage sensing pin arrangement manner, and an example of a smart card detection pin arrangement used by the controller of the present invention; The exemplary smart card of the present invention is coupled with a passive smart card reader. A flow chart of the detection rule of the -23- 1273428; FIGS. 7A and 7B are diagrams for describing the functional pins of the conventional pCMCIA assignment and are respectively applied to the smart card interface. And FIG. 8A illustrates another embodiment of the present invention, which illustrates a controller having one or more flash media readers responsive to an input signal; FIG. 8B A method for generating an input signal of FIG. 8A based on a specific slot, the slot accepting a specific expansion card; FIG. 8C illustrates another method of generating the input signal 10 of FIG. 8A based on a plurality of slots;Figure 9 is a more detailed block diagram illustrating another exemplary embodiment of a controller having two flash media readers and two PC card type ΙΙ/ΙΙ/蜇 介 slots; Figure 1 An exemplary flow chart illustrating a method for planning data to a read-only memory in a controller when the controller is in power-on state; and FIG. 11 is an exemplary flowchart, It illustrates a method for planning data to a read-only memory in a controller when the controller is not in the power-on state. [Main component symbol description] ίο, 10Α 12, 14, 14f 16 18 Controller Slot Smart Card Processor Smart Card Adapter-24- 1273428 20 Data Bus 22 South Bridge Logic 24 North Bridge Logic 26 Processor 28 Power 1C Chip 30A, 30B Smart Card Sense Logic 32A, 32B Smart Card Multiplex Logic 34A, 34B Smart Card Reader Logic 36A, 36B Bus Interface Controller / Interface Logic 38 Peripheral Controller Interface (PCI) Interface 40, 42 , 44 ' 46 , 48 Pin / Input 50 , 52 , 54 Logic 60 card type Test Procedure 62-83 Steps for Card Type Detection Procedures 84, 841 Connector 86 ^ 86f Passive Circuit 88 Physical Contact Point 102 Host Controller / PC Card Controller 104 Adapter Card 106 &gt; 108 PC Card Connector 803 Input Path 804-1, 804-2~804-n Flash Media Reader 805 &gt; 904, 906 Slots 806-1~806-3 Slot-25- 1273428 807 Test Path 806-1 ~ 808-3 Expansion Card 810 Flash Media 811 Passive Patching 908, 913 Register 910 &gt; 912, 914 Flash Media 1000 Flowchart 1002-1010 Step 1102-1110 Step Card Logic

•26-•26-

Claims (1)

I273428 十、申請專利範圍: 夕個擴充卡及用以控制該等相關聯之多個擴充卡 的多個讀取器,其中該等多個讀取器中至少有一個為伊 閃媒體讀取器。 '' 、 2. 如申請專利範圍第W之控制器’其中該等多個讀取器更 包括至少一個智慧卡讀取器以及至少-個PC卡讀取器 3. ^請專利範圍第!項之控制器’其中該等多個擴充°卡係 仗包含PC卡、智慧卡、以及快閃媒體卡之群組所選出。 4. 如申睛專利範圍第j項之控制器,其中該等多個讀取器包 括多個快閃媒體讀取器,且該控制器係配置以響應一輸 入信號’其指示從該等快間媒體讀取器中所選出的一個 快閃媒體讀取器,以致能該選出的快閃媒體讀取器。 5. 如申請專利範圍第4項之控制器,其中該控制器進一步配 置以除能該等多個十夬閃媒體讀取器中之所有其他快閃媒 體讀取器。 ' 6· —種具有整合PC卡能力之個人電腦,其用來接受來自耦 接於該個人電腦之至少一個擴充卡的數位資訊,其包含: 一個控制器,其包含多個用來讀取相關聯之多個擴充卡及 用來控制該等相關聯之多個擴充卡之操作的多個讀取 Γ八中該荨夕個凟取器中至少一個為一快閃媒體讀取 器。 ' 如申請專利範圍第6項之個人電腦,其中該等多個讀取器 進一步包括至少一智慧卡讀取器及至少一個pc卡讀取 103980-940926.doc 1273428 器。 8·如申請專利範圍第6項之個人電腦,其中該等多個擴充卡 係從包含PC卡、智慧卡、以及快閃媒體卡之群組所選出。 9·如申請專利範圍第6項之個人電腦,其中該等多個讀取器 匕括夕個快閃媒體讀取器,且該控制器係配置以響應一 輸入信號,其指示從該等快閃媒體讀取器中所選出的一 個快閃媒體讀取器,以致能該選出的快閃媒體讀取器。 10·如申請專利範圍第9項之個人電腦,其中該控制器進一步 配置以除能該等多個快閃媒體讀取器中之所有其他快閃 媒體讀取器。 11 ·如申請專利範圍第6項之個人電腦,其中該至少一個擴充 卡係一預定快閃媒體卡,其藉由插入該個人電腦之一插 槽而麵接至該個人電腦,該插槽係配置以接受該預定快 閃媒體卡,且該輸入信號係依據該預定快閃媒體卡插入 該插槽之狀態來決定。 12 · —種控制至少一個擴充卡之操作的方法,其中係以一具 有多個讀取器之整合控制器來控制該擴充卡之操作,該 4讀取器包括至少一個快閃記憶體讀取器,該方法包含: 檢測該至少一個擴充卡之存在;及 致能與該至少一値擴充卡相關聯並自該整合控制器選 出的一讀取器。 13·如申請專利範圍第12項之方法,其中該檢測步驟檢測至 少一個快閃媒體卡之存在。 14·如申請專利範圍第12項之方法,其更包含除能該整合控 103980-940926.doc 1273428 15. 16. 17. 18. 19. 20. 制器之所有其他未選出的讀取器的步驟。 如申請專利範圍第12項之方法,其中該致能步驟包含: 解除該整合控制器内之唯讀記憶體的鎖定狀態;及 根據該檢測步驟之結果,將資料寫入該唯讀記憶體以 指出欲致能之讀取器。 如申請專利範圍第15項之方法,其中該致能步驟更包含: 鎖住°亥唯5貝§己憶體以避免疏忽或未經許可寫入至該唯 讀記憶體。 如申請專利範圍第12項之方法,其中該檢測步驟包括利 用傳統PC卡規格信號線檢測該擴充卡的存在,其包含: 判斷第一和第二卡檢測信號線之信號狀態; 判斷第一和第二電壓選擇信號線之信號狀態; 判斷該第及/或第二卡檢測信號線、或該第一及/或第 一電壓選擇信號線是否包含一種pc卡信號規格保留之一 信號狀態;及 判斷一預定未使用之PC卡信號線之信號狀態,其與該 保留信號狀態相關。 如申請專利範圍第17項之方法,其更包含下列步驟: 藉由判斷該第一卡檢測信號和該第二電壓選擇信號是 否結合在一起,來判斷一智慧卡之存在。 如申請專利範圍第17項之方法,其中判斷該等信號線之 該等^號狀態之步驟包含以—預定輸人信號輪詢該等信 號線以及量測一輸出信號。 如申请專利範圍第17項之方法,其中該檢測步驟依據一 103980-940926.doc 1273428 陕閃媒體卡是否存在於一相關聯插槽内來檢測該快閃媒 體卡之存在。 21. 22. 23. 24. 25. 26. 一種用於檢測與操作智慧卡之系統,其包含: 一用於容納一智慧卡之插槽;及 一整合控制器,其包含用於檢測該智慧卡之第一邏輯 電路組、一藉由該第一邏輯電路組致能以操作該智慧卡 之第二邏輯電路組、由該第一及第二邏輯電路組致能以 利用傳統PC卡通訊協定提供該智慧卡與一匯流排介面控 制器間之通訊功能之多工器邏輯電路。 如申請專利範圍第21項之系統,其更包含: 一用於容納一 PC卡之第二插槽; 該整合控制器更包含檢測並操作該PC卡之邏輯電路, 該邏輯電路致能該多工器邏輯電路以利用該傳統PC卡通 訊協定在該PC卡與該匯流排介面控制器間提供通訊功 能。 如申請專利範圍第21項之系統,該整合控制器更包含一 匯流排介面以允許該匯流排介面控制器可與一匯流排通 訊。 如申請專利範圍第23項之系統,其中該匯流排包含一個 週邊控制器介面匯流排,且該匯流排介面控制器包含週 邊控制器介面匯流排和傳統PC卡通訊協定。 如申請專利範圍第22項之系統,其中該Pc卡係由CardBus 卡或PCMCIA卡之群組中選出。 一種用於檢測和操作多個擴充卡之方法,包含以下步驟: 103980-940926.doc 1273428 檢測一卡是否插入一卡插槽; 使用傳統PC卡信號線判斷該卡之型式; 當已判斷出卡之型式時,致能智慧卡讀取器邏輯電路 或傳統PC卡讀取器邏輯電路;及 致能一多工器邏輯電路以利用傳統PC卡通訊協定提供 该卡與一匯流排介面控制器間之通訊功能。 27·如申請專利範圍第26項之方法,該判斷卡之型式之步驟 更包含以下步驟: 判斷第一和第二卡檢測信號線之信號狀態; 判斷第一和第二電壓選擇信號線之信號狀態; 判斷該第一及/或第二卡檢測信號線或該第一及/或第 二電壓選擇信號線是否包含一 PC卡信號規格保留之信號 狀態; 判斷在PC卡檢測期間未用到之PC卡信號線的信號狀 態;及 依據該第一及/或第二卡檢測信號線、及/或該第一及/ 或弟二電壓選擇信號線、及/或該未使用之PC卡信號線的 信號狀態判斷符合該PC卡規格之擴充卡的存在及/或符 合該PC卡規格以外之規格之擴充卡的存在。 2 8 ·如申請專利範圍第2 6項之方法,其更包含以下步驟: 使用該匯流排介面控制器介接該卡至一匯流排,以於 該匯流排與該卡之間提供通訊功能。 29· —種用於檢測與操作多個擴充卡之系統,其包含: 一第一插槽,其用以容納一符合PC卡規格之第一擴充 103980-940926.doc 1273428 卡; 一第二插槽,其用以容納一第二擴充卡,其符合一該 pc卡規格以外之一規格;以及 一整合控制器,其包含用以檢測與操作該第一擴充卡 之第一邏輯電路組、用以檢測與操作該第二擴充卡之第 一邏輯電路組及由該第一及/或第二邏輯電路組致能以利 用傳統PC卡通訊協定來提供該第一及/或第二擴充卡及 一匯流排介面控制器間之通訊功能的多工器邏輯電路。 3 0·如申請專利範圍第29項之系統,其中該第一卡包含一 CardBus 卡。 3 1 ·如申請專利範圍第29項之系統,其中該第二卡包含一智 慧卡。 32·如申請專利範圍第29項之系統,該整合控制器更包含一 匯流排介面以允許該匯流排介面控制器與一匯流排通 訊。 33·如申請專利範圍第32項之系統,其中該匯流排包含一個 週邊控制器介面匯流排,且該匯流排介面控制器包含週 邊控制器介面匯流排以及傳統PC卡通訊協定。 34·如申請專利範圍第29項之系統,其中該第二邏輯電路組 利用傳統PC卡信號線檢測該第二卡。 35. —種用於讀取多個擴充卡之整合控制器,其包含: 用於檢測和操作一第一擴充卡之第一邏輯電路組; 用於檢測與操作一第二擴充卡之第二邏輯電路組;以及 由該第一及/或第二邏輯電路組致能以利用傳統PC卡 103980-940926.doc 1273428 通訊協定於該第一及/或第二擴充卡與一匯流排介面控制 器間提供通訊功能的多工器邏輯電路。 36. —種用於讀取智慧卡之整合控制器,其包含: 一用於檢測該智慧卡之第一邏輯電路組、一由該第一 邏輯電路組致能以操作該智慧卡之第二邏輯電路組、由 該第一和第二邏輯電路組致能以利用傳統PC卡通訊協定 於該智慧卡與一匯流排介面控制器間提供通訊功能的多 工器邏輯電路。 3 7·如申請專利範圍第36項之控制器,其中該第一邏輯電路 組利用傳統PC卡信號線檢測該智慧卡。 3 8·如申請專利範圍第36項之控制器,其更包含供檢測且操 作一 PC卡的PC卡邏輯電路,該PC卡邏輯電路致能該多工 器邏輯電路以利用該傳統PC卡通訊協定提供該PC卡和該 匯流排介面控制器之間的通訊功能。 39_如申請專利範圍第36項之控制器,其更包含一匯流排介 面以允許該匯流排介面控制器與一匯流排通訊。 40·如申請專利範圍第39項之控制器,其中該匯流排包含一 個週邊控制器介面匯流排,且該匯流排介面控制器包含 週邊控制器介面匯流排與傳統PC卡通訊協定。 103980-940926.docI273428 X. Patent Application Range: An expansion card and a plurality of readers for controlling the plurality of associated expansion cards, wherein at least one of the plurality of readers is an Iflash media reader . '', 2. For a controller of the patent scope W, wherein the plurality of readers further includes at least one smart card reader and at least one PC card reader. 3. Please patent scope! The controller of the item 'where the plurality of expansion cards are selected from the group consisting of a PC card, a smart card, and a flash media card. 4. The controller of claim j, wherein the plurality of readers comprise a plurality of flash media readers, and the controller is configured to respond to an input signal 'the indication thereof from the fast A flash media reader selected in the intermediate media reader to enable the selected flash media reader. 5. The controller of claim 4, wherein the controller is further configured to disable all other flash media readers of the plurality of ten flash media readers. a personal computer having an integrated PC card capability for receiving digital information from at least one expansion card coupled to the personal computer, comprising: a controller comprising a plurality of At least one of the plurality of expansion cards and the plurality of readings for controlling the operations of the plurality of associated expansion cards are at least one of the flash media readers. A personal computer as claimed in claim 6, wherein the plurality of readers further comprises at least one smart card reader and at least one pc card reading 103980-940926.doc 1273428. 8. A personal computer as claimed in claim 6, wherein the plurality of expansion cards are selected from the group consisting of a PC card, a smart card, and a flash media card. 9. The personal computer of claim 6, wherein the plurality of readers comprise a flash media reader, and the controller is configured to respond to an input signal indicating that it is from the fast A flash media reader selected in the flash media reader to enable the selected flash media reader. 10. The personal computer of claim 9, wherein the controller is further configured to disable all other flash media readers of the plurality of flash media readers. 11. The personal computer of claim 6, wherein the at least one expansion card is a predetermined flash media card that is connected to the personal computer by inserting into a slot of the personal computer, the slot system Configuring to accept the predetermined flash media card, and the input signal is determined according to a state in which the predetermined flash media card is inserted into the slot. 12. A method of controlling operation of at least one expansion card, wherein the operation of the expansion card is controlled by an integrated controller having a plurality of readers, the 4 reader comprising at least one flash memory read The method includes: detecting the presence of the at least one expansion card; and enabling a reader associated with the at least one expansion card and selected from the integrated controller. 13. The method of claim 12, wherein the detecting step detects the presence of at least one flash media card. 14. The method of claim 12, which further comprises the incorporation of the integrated control 103980-940926.doc 1273428 15. 16. 17. 18. 19. 20. All other unselected readers of the device step. The method of claim 12, wherein the enabling step comprises: releasing a locked state of the read-only memory in the integrated controller; and writing data to the read-only memory according to the result of the detecting step Point out the reader that you want to enable. The method of claim 15, wherein the enabling step further comprises: locking the hexadecimal hexagram to avoid inadvertent or unauthorized writing to the readable memory. The method of claim 12, wherein the detecting step comprises detecting the presence of the expansion card by using a conventional PC card specification signal line, comprising: determining a signal state of the first and second card detection signal lines; determining the first sum a signal state of the second voltage selection signal line; determining whether the first and/or second card detection signal lines, or the first and/or first voltage selection signal lines comprise a signal state of one of the pc card signal specifications; and A signal state of a predetermined unused PC card signal line is determined, which is related to the state of the reserved signal. The method of claim 17, further comprising the step of: determining the presence of a smart card by determining whether the first card detection signal and the second voltage selection signal are combined. The method of claim 17, wherein the step of determining the states of the signal lines comprises polling the signal lines with a predetermined input signal and measuring an output signal. The method of claim 17, wherein the detecting step is based on a 103980-940926.doc 1273428 whether the flash media card is present in an associated slot to detect the presence of the flash media card. 21. 22. 23. 24. 25. 26. A system for detecting and operating a smart card, comprising: a slot for accommodating a smart card; and an integrated controller for detecting the wisdom a first logic circuit group of the card, a second logic circuit group enabled by the first logic circuit group to operate the smart card, enabled by the first and second logic circuit groups to utilize a conventional PC card communication protocol A multiplexer logic circuit that provides communication between the smart card and a bus interface controller. The system of claim 21, further comprising: a second slot for accommodating a PC card; the integrated controller further comprising logic circuitry for detecting and operating the PC card, the logic circuit enabling The worker logic circuit provides communication between the PC card and the bus interface controller by using the conventional PC card communication protocol. For example, in the system of claim 21, the integrated controller further includes a bus interface to allow the bus interface controller to communicate with a bus. The system of claim 23, wherein the bus includes a peripheral controller interface bus, and the bus interface controller includes a peripheral controller interface bus and a conventional PC card communication protocol. The system of claim 22, wherein the Pc card is selected from the group consisting of a CardBus card or a PCMCIA card. A method for detecting and operating a plurality of expansion cards, comprising the following steps: 103980-940926.doc 1273428 Detecting whether a card is inserted into a card slot; determining the type of the card using a conventional PC card signal line; In the form of a smart card reader logic circuit or a conventional PC card reader logic circuit; and enabling a multiplexer logic circuit to provide the card and a bus interface controller using a conventional PC card protocol Communication function. 27. The method of claim 26, wherein the step of determining the type of the card further comprises the steps of: determining a signal state of the first and second card detection signal lines; and determining signals of the first and second voltage selection signal lines a state of determining whether the first and/or second card detection signal line or the first and/or second voltage selection signal line includes a signal state retained by a PC card signal specification; determining that the PC card is not used during the detection period a signal state of the PC card signal line; and the first and/or second card detection signal line, and/or the first and/or second voltage selection signal line, and/or the unused PC card signal line The signal status determines the presence of an expansion card that conforms to the PC card specification and/or the presence of an expansion card that conforms to specifications other than the PC card specification. 2 8 · The method of claim 26, further comprising the step of: using the bus interface controller to interface the card to a busbar to provide a communication function between the busbar and the card. 29. A system for detecting and operating a plurality of expansion cards, comprising: a first slot for accommodating a first expansion 103980-940926.doc 1273428 card conforming to a PC card specification; a second insertion a slot for accommodating a second expansion card conforming to a specification other than the pc card specification; and an integrated controller including a first logic circuit group for detecting and operating the first expansion card, Providing the first and/or second expansion cards and the first and/or second logic circuit groups to detect and operate the first and/or second expansion circuit cards to provide the first and/or second expansion cards and A multiplexer logic circuit for communication functions between bus interface controllers. 3 0. The system of claim 29, wherein the first card comprises a CardBus card. 3 1 The system of claim 29, wherein the second card comprises a smart card. 32. The system of claim 29, wherein the integrated controller further comprises a bus interface to allow the bus interface controller to communicate with a bus. 33. The system of claim 32, wherein the bus includes a peripheral controller interface bus, and the bus interface controller includes a peripheral controller interface bus and a conventional PC card protocol. 34. The system of claim 29, wherein the second logic circuit group detects the second card using a conventional PC card signal line. 35. An integrated controller for reading a plurality of expansion cards, comprising: a first logic circuit group for detecting and operating a first expansion card; and a second for detecting and operating a second expansion card And the first and/or second logic circuit group is enabled to utilize the conventional PC card 103980-940926.doc 1273428 communication protocol for the first and/or second expansion card and a bus interface controller A multiplexer logic circuit that provides communication functions. 36. An integrated controller for reading a smart card, comprising: a first logic circuit group for detecting the smart card, and a second enabled by the first logic circuit group to operate the smart card A logic circuit group, a multiplexer logic circuit enabled by the first and second logic circuit groups to provide a communication function between the smart card and a bus interface controller using a conventional PC card communication protocol. 3 7. The controller of claim 36, wherein the first logic circuit group detects the smart card using a conventional PC card signal line. 3 8. The controller of claim 36, further comprising a PC card logic circuit for detecting and operating a PC card, the PC card logic circuit enabling the multiplexer logic circuit to utilize the conventional PC card communication The agreement provides communication between the PC card and the bus interface controller. 39. The controller of claim 36, further comprising a bus interface to allow the bus interface controller to communicate with a bus. 40. The controller of claim 39, wherein the bus includes a peripheral controller interface bus, and the bus interface controller includes a peripheral controller interface bus and a conventional PC card communication protocol. 103980-940926.doc
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI475380B (en) * 2013-01-18 2015-03-01 Giga Byte Tech Co Ltd Inspection fixture and inspection system for expansion card, and inspection method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI475380B (en) * 2013-01-18 2015-03-01 Giga Byte Tech Co Ltd Inspection fixture and inspection system for expansion card, and inspection method thereof

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