doc/006 127 狐. 九、發明說明: 【發明所屬之技術領域】 本發明是關於一種用於薄膜液晶顯示器(thin-film transistor liquid crystal display,簡稱為 TFT LCD )的共同 電壓(common voltage)修正電路與方法,且特別是關於一種 用於修正交流(alternating current,簡稱為AC)調變的共 同電壓的修正電路與方法。 【先前技術】 一般的薄膜液晶顯示器的晝素(pixel)都包括薄膜電晶 體、儲存電容、以及液晶電容。如果以金屬絕緣層半導體 (metal-insulator semiconductor,簡稱為 MIS)結構做為儲 存電容,可以減少製程光罩數,降低製造成本。 美國專利US 6392623號提出,在金屬絕緣層半導體 形成儲存電谷的結構中,於儲存電容一端所接的共同電極 (common electrode)與液晶電容一端所接的相對電極 (counter electrode)上,分別施加不同準位的驅動電壓,可 以改善主動矩陣式薄膜液晶顯示器(aetive脱咏恤_胞 transistor liquid Crystal display,簡稱為 AMTFT LCD)的灰 階(gray scale)因為先天製程因素造成的不準確現象。然 而,―其共同電壓是固定的負電壓。 使用AC的共同電壓,可以降低源極驅動電路(source ddw integrated circuit)輸出電壓的振幅^ 功卞/肖耗如果&上述的美國專利训⑽]⑵號的發明, 應用於使用ac共同電壓的_液晶冑貞示面板(恤_版 1271氣。· transistor liquid crystal display panel) .. 閉時的灰階電壓錯誤,造成顯示品質不f 「辑笔_體關 【發明内容】 又 本發明的目的是在提供-種朗f壓修正 用AC共同電壓降低源極驅動電路輪 _电路,可使 功率消耗,並且維持灰階電Μ正確,進二幅,減少 本發明的另一目的是提供—稽妓 菩晝面品質。 以使請s結構的儲存電容,以 =本,並且維持儲存電容内的電荷數正心 正電路’ -種共_修 生器輪出共同電厣。、蛋曾帝々异电路。共同電壓產 壓,提供於屮+厂土 开屯路根據—預設電壓盥J£同带 容的共=電其壓中至=,的每-畫素二 上述每-晝素的 ^包味共同電壓皆為交流電壓。 電壓。輪出電壓金對電極上亦電性連接於共同 外,共同電壓減去輸出:等而且振幅相同,此 上述之共同雷茂饮土荨於預扠電壓的絕對值。 為負電堡,輪出電ί等二::二,—實施例中’預設電壓 上述之,、同琶壓加上預設電壓。 為正_,心;=正電路’在-實施例中,預設電壓 素的錯存電路,在—實施例中,每一個書 白為金屬絕緣層半導體結構。 — 127Doc/006 127 Fox. IX. Description of the Invention: [Technical Field] The present invention relates to a common voltage correction for a thin-film transistor liquid crystal display (TFT LCD) Circuits and methods, and more particularly to a correction circuit and method for correcting a common voltage of alternating current (AC) modulation. [Prior Art] The pixels of a general thin film liquid crystal display include a thin film transistor, a storage capacitor, and a liquid crystal capacitor. If a metal-insulator semiconductor (MIS) structure is used as the storage capacitor, the number of process masks can be reduced and the manufacturing cost can be reduced. US Pat. The driving voltage of different levels can improve the inaccuracy caused by the innate process factors of the gray scale of the active matrix thin film liquid crystal display (AMTFT LCD). However, its common voltage is a fixed negative voltage. By using the common voltage of the AC, the amplitude of the output voltage of the source ddw integrated circuit can be reduced. ^ The power consumption of the source ddw integrated circuit is the same as the invention of the above-mentioned U.S. Patent No. (10)] (2), which is applied to the common voltage using ac. _ LCD display panel (shirt_1271 gas. · transistor liquid crystal display panel) .. closed gray scale voltage error, resulting in display quality is not f "Pen pen _ body off [invention content] and the purpose of the present invention Is to provide - a kind of lang f pressure correction AC common voltage reduction source drive circuit wheel _ circuit, can make power consumption, and maintain gray scale power Μ correct, into two, reduce the other purpose of the present invention is to provide The quality of the 妓 昼 昼 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 请 请 请 s s s s s s s s s s s s s s s s s s s s s s s s Circuit. Common voltage production pressure, provided in the 屮+ factory soil opening road according to the preset voltage 盥J£ the same as the total capacity of the electricity = the voltage in the pressure to =, each of the two pixels per per 昼 ^ The common voltage for the package is the AC voltage. The voltage of the turn-off voltage is also electrically connected to the common electrode, the common voltage minus the output: etc. and the amplitude is the same, and the above common Lemma drinking soil is at the absolute value of the pre-cross voltage. Electricity ί et al. 2:: 2, in the embodiment, 'preset voltage is the above, and the same voltage is applied to the preset voltage. Positive _, heart; = positive circuit 'in the embodiment, preset voltage numerator In the embodiment, each of the books is a metal-insulator semiconductor structure. — 127
Wf. doc/〇〇6 從另 規點來看,本發明另提出一種 出電;預設_與-共同電壓== 電極。复中,’ ^的母—晝素的儲存電容的共同 畫素的液晶電與共同電壓皆為交流電壓。每一個 出電璧與共二==極上亦電性連接於共同電壓。輸 電壓減去輪出二二目立同步而且振幅相同。最後,共同 枚去輸出電壓等於預設電壓的絕對值。 壓修之健實侧麟,本發暇崎過預設電 二共同電壓做為輪出電壓,將其輪出=辛又: 交流電m,而、、 口此輸出電壓與共同電壓同為 ° mis 同電壓以降低源極驅動電二;同時使用AC共 耗。甘曰輸出電堡的振幅,減少功率消 冇數正减 階f壓正確,進轉持儲存電容内的電 何數正確,以確保晝面品質。 為省本明之上迭和其他目的、特徵和優點能更明顯 ===她難編’並配合所附圖式, 【實施方式】 ,下说明睛芩照圖i,圖J為根據於本發明第一實施 例的薄膜液晶顯示器1()()的部分電路示意圖。目i的電路 〇括、原極驅動笔路§D、閘極驅動電路(gate driver integmted circuit) GD、薄膜液晶顯示面板pL、以及運算電路1〇1。 7 •12 7 1 ^i^^〇twf.doc/00i 本實施例的共同電壓修正電路包括 驅動電路SD。 運#电路1〇1以及源極 雖然圖1的薄膜液晶顯示 實際上可以包括任意數量的全 ,、、、、日不6個晝素, 素PIX包括薄膜電晶體Q1、旦儲存?:厂^ CLC。其中薄膜電晶體Q1 ^ S、以及液晶電容 ^ GD,卿㈣電性 存電容Cs有-端電性連接 二=動电路犯。儲 電極她以⑽她⑽’另^:曰曰脰…也就是晝素 =出端0T。最後,液晶電容 電極QS,另-㈣紐連接縣板 =0η⑽她),以電性連接共同電壓: 例虽中’母-個晝素的儲存電容c 體結構。 名丨疋孟屬、乡巴緣層丰導 妙不2?PIX為例’在薄膜電晶體Q1關閉時,為了唯 =_示,必須維持儲存電容CS以及液晶ί容 兩者的電容值不變的情況下,也^ 要、准持Μ存電谷Cs以及液晶電容CLC的跨壓不變。在^ 同_v_是交流_。為了使儲存電容i ^不、交,運异電路⑻的輸出M VOT必須和 屋Vcom的相位同步而且振幅相同。 包 nfr7制上述目標,本#施侧運算€路1G1會接收 預设電lVp與制 VeQm,並根_設電壓、= 同電M VC0m’提供輸出電壓ν〇τ至薄膜液晶顯示器j⑻ 8 1271囉 0twf.doc/006 的母一個晝素的儲存電容Cs。其中,輸出電壓v〇T與共同 電壓Vcom皆為交流電壓。每一個晝素的液晶電容CLC亦 電性連接於共同電壓Vcom。輸出電壓V0T與共同電壓 Vcom的相位同步而且振幅相同,而且共同電壓Vc〇m減 去輸出電壓V0T等於預設電壓_Vp的絕對值。 在本貝施例中’共同電壓Vc〇m是由源極驅動電路SD 所提供。預設電壓-Vp為負電壓,所以輸出電壓ν〇τ等於 共同電壓Vcom加上預設電壓_Vp。至於預設電壓_Vp的數 值則是根據先前的美國專利us 6392623號而來。也就是 況,預叹電壓-Vp等於-Vpmax_Vdmax,其中_Vpmax為源 極=電路SD輸丨至每-個晝素的最低電壓,而Vdmax 為將每一個晝素的儲存電容Cs的空乏區(depletion layer) 維持在最大寬度所需的電壓。 、,了將共同電壓Vcom加上預設電壓_vp,本實施例 的運算電路101是一個以運算放大器(operational amplifler) 〇p^冓成的正相加法電路。如圖1所示,運算電路ιοί包括 運^r放大态QP以及四個電阻器(resistor) R。其中,運算放 大為〇P以其輸出端(output terminal)電性連接於運算電路 101的輪出端〇T。第一個電阻器R電性連接於運算放大器 μ 一的輪出ir而與反相輸入端(inverting㈣说化加㈣)之間。 f二個T阻11R的第―端電性連接於運算放大器〇p的反 而,第二端接地。第三個電阻器R電性連接於運算 间帝:〇1> 的正相輸入端(n〇n_inverting inPut terminal)與共 5Vc〇m之間。最後,第四個電阻器r則電性連接於 9 -12716¾ 0twf.doc/〇〇6 運算放大器op的正相於 算放大器構成的=二而與預設電壓_vp之間。以運 的細節就不在此^ a路在剌上極為普遍,進一步 與二=;動電 ,轉電路GD輸出的高低準位,* % 的最高健最健。在本實 二帝/、,屯壓Vcom是在5V與〇V的區間擺動,而輸 例=夂ν°»Τ ί共同電壓Vc°m加上預設電壓-Vp(在本實施 圖;不mL果,所以是在_7v與-i2v的區間擺動。由 "、看出’輪出電壓與共同電壓V_的相位同 步,而且振幅相同。 乂下"兒明本發明的第二實施例。請參照圖3,圖3為 :豕於本發明第二實施例的薄膜液晶顯示器·的部分ς f不思圖。薄膜液晶顯示器300包括源極驅動電路SD、= 虽驅動迅路GD、薄膜液晶顯示面板pL、運算電路、 丄及、/、,包£產生态302。本實施例的共同電壓修正恭 匕括運算電路301以及共同電壓產生器3〇2。 免 如圖3所示,在這個實施例中,共同電壓 共同電壓產生ϋ 302所提供,而不是來自祕驅動= SD。此外,本實施例的預設電壓Vp為正電壓,=略 V〇t等於共同電壓Vcom減去預設電壓Vp。本實施梵屢 设電壓Vp和上-個實施例的預設電壓數值相同,值$予真 相反。也就是說本實施例的預設電壓% 負 -(-vpmax)+Vdmax,其中_Vpmax為源極驅動電路 嗎1出 6絞 〇〇twf.doc/006 6絞 〇〇twf.doc/006 儲 至,一個晝素的最低電壓,而Vdmax為將每一個晝 存包谷的空乏區維持在最大寬度所需的電壓。 如圖3所示,為了將共同電壓減去預設電壓 p,本貫施例的運算電路301是一個以運算放大器〇p為 :心的減法電路,包括運算放大器op以及四個電阻器r。 二^運异放大益0P以其輸出端電性連接於運算電路301Wf. doc/〇〇6 From another point of view, the present invention further proposes a power-off; preset_and-common voltage== electrodes. In the middle, the common pixel of the storage capacitor of the ^^ is the AC voltage and the common voltage. Each of the power outlets is electrically connected to a common voltage with a total of two == poles. The output voltage is subtracted from the turn-off and the second amplitude is synchronized and the amplitude is the same. Finally, the common output voltage is equal to the absolute value of the preset voltage. The solid side of the pressure repair, the hairpin of the original power supply of the two common voltages as the turn-off voltage, turn it out = Xin: AC, and the output voltage of the port is the same as the common voltage. The voltage is used to lower the source drive power; at the same time, AC is used. Ganzi output the amplitude of the electric castle, reduce the power consumption, reduce the number of steps, and correct the voltage. The number of electricity in the storage capacitor is correct to ensure the quality of the surface. In order to save the above, other purposes, features and advantages can be more obvious === she is difficult to edit' and cooperate with the drawing, [embodiment], the following description of the eye i, Figure J is based on the present invention A partial circuit diagram of the thin film liquid crystal display 1 () of the first embodiment. The circuit of the item i includes the gate drive § D, the gate driver integmted circuit GD, the thin film liquid crystal display panel pL, and the arithmetic circuit 1〇1. 7 • 12 7 1 ^i^^〇twf.doc/00i The common voltage correction circuit of this embodiment includes a drive circuit SD.运#电路1〇1 and source Although the thin film liquid crystal display of Figure 1 can actually include any number of all, ,,, and day, not only six elements, the PIX including the thin film transistor Q1, storage? : Factory ^ CLC. Among them, the thin film transistor Q1 ^ S, and the liquid crystal capacitor ^ GD, the Qing (four) electrical storage capacitor Cs have - terminal electrical connection two = dynamic circuit. She stored the electrode with (10) her (10)' another ^: 曰曰脰... that is, 昼素 = OUT 0T. Finally, the liquid crystal capacitor electrode QS, the other - (four) button is connected to the county board =0 η (10) her), electrically connected to the common voltage: for example, the 'mother-one halogen storage capacitor c body structure. The name of Mt. Meng, the border of the township is not good? PIX is an example. When the thin film transistor Q1 is turned off, in order to show only the capacitance value of the storage capacitor CS and the liquid crystal must be maintained. In the case of the same, the cross-voltage of the liquid crystal capacitor Cs and the liquid crystal capacitor CLC are unchanged. In ^ Same as _v_ is AC_. In order to make the storage capacitor i ^ not, the output M VOT of the different circuit (8) must be synchronized with the phase of the house Vcom and the amplitude is the same. Package nfr7 system to achieve the above objectives, this #施 side calculation road 1G1 will receive the preset power lVp and system VeQm, and root _ set voltage, = same power M VC0m 'provide the output voltage ν 〇 τ to the thin film liquid crystal display j (8) 8 1271 啰The storage capacitor Cs of a parent of 0twf.doc/006. The output voltage v 〇 T and the common voltage Vcom are both AC voltages. Each of the pixel liquid crystal capacitors CLC is also electrically connected to the common voltage Vcom. The output voltage V0T is synchronized with the phase of the common voltage Vcom and has the same amplitude, and the common voltage Vc 〇 m minus the output voltage V0T is equal to the absolute value of the preset voltage _Vp. In the present embodiment, the common voltage Vc〇m is provided by the source drive circuit SD. The preset voltage -Vp is a negative voltage, so the output voltage ν 〇 τ is equal to the common voltage Vcom plus the preset voltage _Vp. As for the value of the preset voltage _Vp, it is based on the prior U.S. Patent No. 6,392,623. In other words, the pre-sighing voltage -Vp is equal to -Vpmax_Vdmax, where _Vpmax is the source=circuit SD is transmitted to the lowest voltage of each element, and Vdmax is the depletion region of the storage capacitor Cs of each element ( Depletion layer) The voltage required to maintain the maximum width. The common voltage Vcom is added to the preset voltage _vp, and the arithmetic circuit 101 of the present embodiment is a positive phase adding circuit which is formed by an operational amplifier (operational amplifier). As shown in FIG. 1, the arithmetic circuit ιοί includes a power amplification QP and four resistors R. The operation amplification is 〇P electrically connected to the output terminal 的T of the arithmetic circuit 101 by its output terminal. The first resistor R is electrically connected between the output φ of the operational amplifier μ1 and the inverting input terminal (inverting (4)). f The first end of the two T resistors 11R is electrically connected to the operational amplifier 〇p, and the second terminal is grounded. The third resistor R is electrically connected between the non-inverting input terminal (n〇n_inverting inPut terminal) and the total of 5Vc〇m. Finally, the fourth resistor r is electrically connected between the positive phase of the operational amplifier op of the 9-127163⁄4 0twf.doc/〇〇6 and the predetermined voltage _vp. The details of the operation are not here. The road is extremely common, and further with the second =; the power and electricity, the circuit GD output high and low level, *% of the highest health and health. In this real second Emperor /,, rolling Vcom is swinging in the range of 5V and 〇V, and the input example = 夂ν°»Τ ί common voltage Vc°m plus the preset voltage -Vp (in this embodiment; mL fruit, so it is in the interval of _7v and -i2v. It is seen by ", that the 'rounding voltage is synchronized with the phase of the common voltage V_, and the amplitude is the same. 乂下"Children's second implementation of the present invention For example, please refer to FIG. 3. FIG. 3 is a partial view of a thin film liquid crystal display according to a second embodiment of the present invention. The thin film liquid crystal display 300 includes a source driving circuit SD, = driving a fast circuit GD, The thin film liquid crystal display panel pL, the arithmetic circuit, the 丄, and /, the generating state 302. The common voltage correction of the present embodiment includes the arithmetic circuit 301 and the common voltage generator 3〇2. In this embodiment, the common voltage common voltage is generated by ϋ 302 instead of the secret drive = SD. Furthermore, the preset voltage Vp of the present embodiment is a positive voltage, = slightly V 〇 t is equal to the common voltage Vcom minus the pre- Set the voltage Vp. This embodiment implements the voltage Vp and the preset voltage value of the previous embodiment. The value of $ is reversed. That is to say, the preset voltage % of this embodiment is negative - (-vpmax) + Vdmax, where _Vpmax is the source drive circuit. 1 out of 6 twisted twf.doc/006 6 twisted 〇twf.doc/006 is stored, the lowest voltage of a halogen, and Vdmax is the voltage required to maintain the depletion region of each buffer valley at the maximum width. As shown in Figure 3, in order to subtract the common voltage The voltage p is set. The arithmetic circuit 301 of the present embodiment is a subtraction circuit with an operational amplifier 〇p as a heart, including an operational amplifier op and four resistors r. Connected to the arithmetic circuit 301
的。第一個電阻器R電性連接於運算放大器OP 相輸入端之間。第二個電阻器R電性連接於 ;哭it的反相輸入端與預設電壓Vp之間。第三個 :裔电性連接於運算放大器〇p的正 放大$ OP的正相輸人端,第二端接地。上述的 常知細具有通 :、电路可達到相同效果,例如同樣 之間:有同樣的;應關電路的輸嶋和細 提出發明除了上述的共同電塵修正電路之外,也 Η應的共同糕修正方法。而本方 電壓修正電路的實施例中已經有充二; 1271· Otwf.doc/006 的例所述,本發明是以經過預設電屋侈正 谷,同時將共同電摩輸出至4 h母至京的姑存電 出母一晝素的液晶電容。由於葙 固讀,因此輸出電壓與 J於預 壓,而且相位同步,振幅也相 /、、电監。為乂流電 節省製程光罩數,降低戶二以士可使用MB結構以 以F,低源極驅動電路輸出電壓 、肖of. The first resistor R is electrically connected between the op amp OP phase inputs. The second resistor R is electrically connected to; the inverting input of the crying is between the preset voltage Vp. The third one is electrically connected to the positive phase of the op amp 〇p, which is the positive phase of the OP, and the second terminal is grounded. The above-mentioned conventional knowledge has the same effect: the circuit can achieve the same effect, for example, the same: there is the same; the circuit of the off circuit and the fine invention should be combined with the common electric dust correction circuit described above. Cake correction method. In the embodiment of the voltage correction circuit of the present invention, there is already a charge; according to the example of 1271· Otwf.doc/006, the present invention is to output the common electric motorcycle to the 4 h mother through the preset electric house. To Beijing, the power of the mother and the mother of a liquid crystal capacitor. Since 葙 solid reading, the output voltage and J are pre-compressed, and the phase is synchronized, and the amplitude is also /, and the electric power is monitored. Save the number of process masks for turbulence, reduce the use of MB structure to reduce the output voltage of the low source drive circuit,
;能維=電叫進而犧存=内;數; 確,以確保晝面品質。 包何數正 雖然本發明已以較佳實施例揭露如上, 限定本發明,任付孰羽+从一 I …、,、亚非用以 =不W 1壬仃热自此技蟄者,在不脫離 和乾圍内,當可作些許之更動侧,因此本;日=申 範圍當視後附之申請專·_界定者本U之保護 【圖式簡單說明】Can be dimensioned = electric call and then sacrifice = inside; number; indeed, to ensure the quality of the noodles. Although the present invention has been disclosed in the preferred embodiments as above, the present invention is limited to the use of I 孰 羽 + from an I ..., , , , , , , , , , , , , , , , , , , Do not leave and dry, when you can make some changes to the side, so this; day = the scope of the application is attached to the application of the application _ defined by the protection of the U [simplified description]
圖1為根據於本發明第— 部分電路示意圖。 圖2為根據於本發明第_ 驅動信號時序圖。 實施例的薄膜液晶顯示器的 實施例的_液晶顯示器的 圖3為根據於本發明 部分電路示意圖。 第二實施例的薄膜液晶顯示器的 【主要元件符號說明】 100、 300 · >專膜液晶顯示器 101、 301 ··運算電路 302 :共同電墨產生器 12 ^ ^^^0twf.doc/006BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view of a circuit according to the first part of the present invention. Fig. 2 is a timing chart of the _th drive signal according to the present invention. Fig. 3 of the liquid crystal display of the embodiment of the thin film liquid crystal display of the embodiment is a schematic view of a part of the circuit according to the present invention. [Summary of main component symbols] of the thin film liquid crystal display of the second embodiment 100, 300 · > Special film liquid crystal display 101, 301 ·· Operation circuit 302: Common ink generator 12 ^ ^^^0twf.doc/006
Clc ·液晶電容Clc · Liquid crystal capacitor
Cs:儲存電容 GD :閘極驅動電路 0P :運算放大器 0T :運算電路的輸出端 PIX :薄膜液晶顯示面板的晝素 PL :薄膜液晶顯示面板 Q1 :薄膜電晶體 • QS :薄膜電晶體的源極 R :電阻器 SD :源極驅動電路 Vcom :共同電壓 VcomH :共同電壓的最高準位 VcomL:共同電壓的最低準位 VGH:閘極驅動電路的輸出高準位 Vgl:閘極驅動電路的輸出低準位 _ VOT:運算電路的輸出電壓 -Vp、Vp :預設電壓 13Cs: storage capacitor GD: gate drive circuit 0P: operational amplifier 0T: output terminal of arithmetic circuit PIX: pixel LCD of thin film liquid crystal display panel: thin film liquid crystal display panel Q1: thin film transistor • QS: source of thin film transistor R: Resistor SD: source drive circuit Vcom: common voltage VcomH: the highest level of common voltage VcomL: the lowest level of the common voltage VGH: the output high level of the gate drive circuit Vgl: the output of the gate drive circuit is low Level _ VOT: Output voltage of the operation circuit -Vp, Vp: preset voltage 13