TWI271607B - Power-supply circuit for adjusting output voltage - Google Patents
Power-supply circuit for adjusting output voltage Download PDFInfo
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- TWI271607B TWI271607B TW94128487A TW94128487A TWI271607B TW I271607 B TWI271607 B TW I271607B TW 94128487 A TW94128487 A TW 94128487A TW 94128487 A TW94128487 A TW 94128487A TW I271607 B TWI271607 B TW I271607B
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1271607 九、發明說明: 【發明所屬之技術領域】 本發明涉及-種電腦主機板上之輪出可調穩壓電源電路。 【先前技術】 主機板設計中,電源電路之設計至關重要,它會直 到整個主機板之品質。爲了適應更多需求,必須不 機板電源電路進行優化或者開發出新電源電路。兄韦王 印蒼考第-圖’爲習知一種穩壓電源電路卜包括一敕 ii10,其具有調整端11、輸人端12友輸出端13,該輸入端ί ft電壓Vm’ ;該輸出端!域接有一負載γ ’該負載心’之 f二端?地;在該輸出端13和地之間與負載Rl·並聯連接有電 ;;t ^ ’該節點電壓作爲負載&,之參考電壓 ,。其中’可透過調節電剛,、R2,之阻值,或其中任一兩 ^^^阻112,之阻值來提供合適參考電壓Vref,至負載R,Γ 阻R1’、R2’分壓提供給負難L,之電壓v〇該^ 歷Vref丨之關係如公式所示: 〜,亏私1271607 IX. INSTRUCTIONS: [Technical Field] The present invention relates to a wheel-out adjustable power supply circuit on a computer motherboard. [Prior Art] In the motherboard design, the design of the power supply circuit is critical, and it will go straight to the quality of the entire motherboard. In order to accommodate more demand, it is necessary to optimize the power supply circuit or develop a new power supply circuit. Xiong Wei Wang Yin Cang Kao Di - Figure 'for a known kind of a regulated power supply circuit, including a ii ii10, it has an adjustment terminal 11, the input terminal 12 friend output terminal 13, the input terminal ί ft voltage Vm'; the output! Is the domain connected to a load γ 'the load heart' of the two ends of the f? Ground; there is electricity connected in parallel with the load R1· between the output terminal 13 and the ground; t ^ ' the node voltage is used as the reference voltage of the load & Wherein 'the voltage can be adjusted by adjusting the resistance of the electric energy, R2, or any of the two resistors 112, to provide a suitable reference voltage Vref, to the load R, the resistance R1', R2' partial pressure provides Give the negative D, the voltage v〇 the relationship of the Vref丨 as shown in the formula: ~, deficit
Vout’=Vref,*(1+ Ri,/ 幻》) 入端12接收輸入電壓vin,爲3.3v時,該調 壓穩定在某至該輸出端13 ’使該輸出端13之電 内,電路1輸入電腕範圍 調時,上述,咐求職電壓簡 【發明内容】 ϋίίϋ在?ΐ供—雜出可織壓電源電路。 分壓電路别該調包括一調整電路及一取樣 門正私路具有调整端、輸入端及輪出端,該輸入 1271607 端接收一輸入電壓,該輪 該負載之電虔爲輪出電$出^^「負載,且該輸出端提供給 一第二電阻,該樣分壓電路包括—第-電阻及 間,該輪出端之輸出弟二電阻串接於該輸出端和地之 整端,兮二八^出一經該取樣分壓電路分壓後回授至μ 一開關電晶體及—第-η$日ί—,::相電阻、一第 一端分聯該第-^^^日日體’相三電阻、第四電阻之 電阻、第四電阻之另電阻間之串聯節點相連,該第三 第二端分別接地,苴第_媸你^關^4Ba肢、弟二開關電晶體之 第三電阻、細雜^來控制該 足電路對不同置之輸出電壓,靈活滿 【實施方式】 電源^發明較佳實施方式之輸出可調穩壓 91、二路,、匕括一调整電路20,該調整電路20具有調整端 入端22及輸出端23,該輸人端22接收—輸人電壓Vin, 連接-負載Rl ’且該輸出端23提供給該負載&之 輸出电昼Vout’該輸出可調穩壓電源電路還包括一取樣 j电路30,該取樣分壓電路3〇爲該輸出電壓v〇ut提供一參考 =^Vref ’該輸出端23之輸出電壓乂〇讲透過該取樣分壓電路邳 为壓後回授至該調整端21。 #蒼照第二圖,本發8月中該調整電路2〇由場效電晶體和雙 f性接面電晶體構成,在本實施方式巾該場效電晶體爲^^通道 3,型MOS ( Metal-Oxide Semiconductor,金屬氧化物半導體) 屯晶體Q1,該雙極性接面電晶體爲NPN型電晶體q2。該河〇3 電晶體Q1之汲極作爲輸入端22,其連接輸入電壓vin,該輸入 電壓Vin爲3.3V,該M0S電晶體Q1之源極作爲輸出端23,該輸 1271607 MOS電晶卿〇Γ之pfRL之—端,該負載〜之另一端接地。該 連,^曰^門々々與該雙極性接面電晶體Q2之集極相 -“帝壓壓爲V ’該節點透過一限流電阻尺連接至 壓,該調整電路2G阳糾2集極之工作電 電源電路在提供穩;S㈡可使該輸出可調― 含矸处丨#德二,輸出电壓乂0加之狀況下,使輸入電壓Vin ί調電晶體Q2之射極接地,其基極作爲 -筮壓電路30包括一第一電細、-第二電阻汜、 一第四電阻R4、一第一開關電晶體Q3及-第 ,=地之間°該第三電_、第四電阻以之^分別Ϊ ^一 =阻^該第二電_間之串聯節點相連,該第三電 ϋί 2_之另—端分別與該第—開關電晶體Q3、第 = 之第一端相連,該第-開關電晶體Q3、第二 ί第;別接地,其第三端作爲—組控制訊 虎在本貫施方式中該第一開關電晶體Φ、第 二開關电晶體—Q4爲Ν通道空乏型M〇s電晶體,且該第一開關 =iiQ3、第二開關電晶體^之第一端 '第二端及第三端分 別對應M0S電晶體之;:及極、祕及閘極。該第一電阻幻和第 二電阻R2間之串聯節點連接至該雙極性接面電晶體Q2之基 極’該串聯節點電壓作爲該輸出可調穩壓電源之參考電壓 Vref ’該取樣分壓電路30爲輸出電壓v〇ut提供該參考電壓 Vref,該調整電路20根據該取樣分壓電路3〇所提供之來考電壓 Vref透過該調整端21來穩定該輸出端23之輸出電壓乂^说。 本奄明笔路之兩控制汛號輸入端31、32透過接收電腦主機 板上腦03R控制晶片(圖未示出)所發出之四組 “11,,、“1〇”、‘加,、“⑽”,可産生四組固定電壓 l27l6〇7 中“1”代表高電平訊號,“〇,,代 匕二,電晶體Q4之.刀V別“低電平,:】:曰體?阻 ί ,該㈣剛t電^ 係,該等電阻與該第二電阻^串、^;=_爲並聯關 電路之輪出電壓V〇ut爲:_輸出可調穩壓電源 R2 Λΐ||Λ3||Λ4Vout'=Vref,*(1+ Ri,/ 幻幻) When the input terminal 12 receives the input voltage vin, which is 3.3v, the voltage regulation is stabilized at some output to the output terminal 13' to make the output terminal 13 1 input electric wrist range adjustment, the above, 咐 job search voltage [invention] ϋ ϋ ϋ ϋ 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 可 可 可 可 可 可The voltage divider circuit includes an adjustment circuit and a sampling gate positive and negative circuit having an adjustment end, an input end and a wheel output end. The input 1271607 end receives an input voltage, and the load of the load is the wheel output power. Output ^^ "load, and the output is provided to a second resistor, the voltage divider circuit includes - a first-resistance and a gap, and the output of the round-out terminal is connected in series with the output terminal and the ground After the voltage divider circuit is divided, the voltage is fed back to the μ-switch transistor and the -n$$日-,:: phase resistor, a first end is connected to the first -^ ^^ 日日体's phase three resistance, the resistance of the fourth resistor, and the series connection between the other resistors of the fourth resistor, the third and second ends are respectively grounded, 苴第_媸你^关^4Ba limb, brother two The third resistor and the fine transistor of the switch transistor are used to control the output voltage of the foot circuit to be different. [Embodiment] Power supply ^ Invention The output of the preferred embodiment is adjustable, 91, 2, and An adjustment circuit 20 having an adjustment terminal 22 and an output 23, the input terminal 22 receiving - input voltage Vin Connecting the load R1' and the output terminal 23 is supplied to the output & output voltage Vout'. The output adjustable power supply circuit further includes a sampling circuit 30, and the sampling voltage dividing circuit 3 is the output The voltage v〇ut provides a reference =^Vref 'the output voltage of the output terminal 乂〇 is transmitted back to the adjustment terminal 21 through the sampling voltage dividing circuit #. #苍照第二图,本发8 In the middle of the month, the adjustment circuit 2 is composed of a field effect transistor and a double-f-type junction transistor. In the embodiment, the field effect transistor is a ^3 channel, a type MOS (Metal-Oxide Semiconductor)屯 crystal Q1, the bipolar junction transistor is an NPN type transistor q2. The drain of the Helium 3 transistor Q1 serves as an input terminal 22, which is connected to an input voltage vin, the input voltage Vin is 3.3V, the MOS The source of the transistor Q1 serves as the output terminal 23, and the other end of the load is connected to the other end of the pfRL of the 1271607 MOS transistor. The connection, the gate and the bipolar junction are electrically connected. The collector phase of the crystal Q2 - "the pressure of the emperor is V ', the node is connected to the pressure through a current limiting resistor, the adjustment The whole circuit 2G positive correction 2 collector working electric power circuit provides stability; S (2) can make the output adjustable - including 矸 丨 德 #德二, output voltage 乂 0 plus, make the input voltage Vin 调 adjust the transistor Q2 The emitter is grounded, and the base as the -voltage circuit 30 includes a first electric thin, a second resistor 汜, a fourth resistor R4, a first switching transistor Q3, and a -, ground-to-ground The third electric _, the fourth electric resistance is connected to the series node of the second electric _, and the other end of the third electric ϋ ί 2_ is respectively connected with the first switching transistor Q3 The first end of the first switch is connected to the first switch transistor Q3 and the second switch; the third end is used as a group control device. The second switching transistor—Q4 is a Ν channel depletion M〇s transistor, and the first switch=iiQ3, the first end of the second switching transistor ^the second end and the third end respectively correspond to the MOS transistor; : and extreme, secret and gate. a series node between the first resistor and the second resistor R2 is connected to a base of the bipolar junction transistor Q2. The series node voltage is used as a reference voltage Vref of the output adjustable power supply. The circuit 30 provides the reference voltage Vref for the output voltage v〇ut, and the adjustment circuit 20 stabilizes the output voltage of the output terminal 23 according to the reference voltage Vref provided by the sampling voltage dividing circuit 3〇. Say. The two control apostrophes input terminals 31 and 32 of the present invention pass through the four groups of "11,," "1", "plus," issued by the brain 03R control chip (not shown) on the receiving computer motherboard. "(10)", can generate four sets of fixed voltage l27l6〇7 "1" stands for high level signal, "〇,, 匕2, transistor Q4. Knife V" low level, :]: 曰? Resisting, the (four) just t electric system, the resistance and the second resistance ^ string, ^; = _ is the parallel circuit off the voltage V 〇 ut is: _ output adjustable power supply R2 Λΐ | | Λ3||Λ4
Vout = Vref*(i + 電曰控^晶片發出控制訊號“10”時,該第-開關 % 電晶體Q4之汲極與源極間爲高阻狀 兩端呈現開路狀態’則該第—電随卜第二電二、 該取樣分壓電細之分壓,射該第-電阻R1與 Θ輸出可调穩壓電源電路之輸出電壓v〇m爲:Vout = Vref*(i + 曰 曰 ^ 晶片 晶片 晶片 发出 发出 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片With the second electric power, the sampling is divided into piezoelectric partial pressure, and the output voltage v〇m of the first-resistor R1 and the Θ output adjustable regulated power supply circuit is:
Vout = Vref*(i + —及2、 季) 當IP8203R控制晶片發出控制訊號“ 〇1,,時 開關電晶體Q3截止’其汲極與源極間爲高阻狀態,該第Λ =R3兩端呈現開路狀態’該第二開關電晶體Q4導通,^極 ,出低電平第四電刪呈現接地狀態,則該第二電阻 R1、第二電阻R2、第四電随4參與了取樣分壓電路3〇之分塵, 10 1271607 ρ阻R綱,Vout = Vref*(i + — and 2, quarter) When the IP8203R control chip sends a control signal “〇1, the switching transistor Q3 is turned off” and its drain and source are in a high-impedance state, the third Λ=R3 The second open circuit transistor Q4 is turned on, and the second switch transistor Q4 is turned on, and the second resistor R1, the second resistor R2, and the fourth power participate in the sampling point. The pressure circuit 3 is divided into dust, 10 1271607 ρ resistance R,
Vout = Vref*(l + —Vout = Vref*(l + —
Rl\\R4} 當IP8203R控制晶片發出控制訊號“〇〇” ,關電晶體Q3、第二開關電晶體⑼分別截止,該第—; ^曰體(^3、第二開關電晶體q4分別爲高阻狀態,則該 ^ $、弟四電阻R4兩端呈現開路狀態,則該第一 =R2參與了取樣分壓電路3〇之分壓,該第一電阻触^ ϋΙΪ2:4㈣騎_触可觸壓電源魏之輸出電 V〇ut = Vref*(i + ^ 分/電^組浦赠,該取樣 弘路曰k释°哀弟二电阻R3、弟四電阻R4參與分壓,去 號之狀態確定時則該第三電阻R3與該«四電阻似中i 之電阻也就確定。本發明輸出可觸壓電源電路工作 J· L載1^瞬間變大,使該輪出可調穩壓電源之輸出電壓 Γ〇2間敎’經參與分壓之電阻分壓後使該參考電壓Vref也 曰目二二大’錢極性接面電晶體Q2導通能力增強,該腿㉙ 和該雙極性接面電晶體Q2間之節點電壓ν減小引起該 ^日$體(51之閘極與源極間之電壓降低,則該廳5電晶體 H通能力減則起其麵降上升,從而導致觀QS電晶體 5 $壓下降’從而將先前所變大之輸出賴VGut調整至 =rl穩定時之電漫值。反之,當該負載化瞬間變小,則該 輸出可調穩塵電源電路之輸出電麼vout經由參與分麼之電阻 分壓後將該參考電㈣ef峨雜雙雛接面電晶體吸後,則Rl\\R4} When the IP8203R control chip sends a control signal "〇〇", the off transistor Q3 and the second switch transistor (9) are respectively turned off, the first - ^ body (^3, the second switch transistor q4 are In the high-resistance state, the ^4 and the fourth resistor R4 are open-circuited at both ends, and the first=R2 participates in the voltage division of the sampling voltage dividing circuit 3, and the first resistance touches ϋΙΪ2:4 (four) riding-touch Touchable power supply Wei's output power V〇ut = Vref*(i + ^ points / electricity ^ group Pu gift, the sampling Hong Road 曰 k release ° mourning brother two resistors R3, brother four resistors R4 participate in the partial pressure, to the number When the state is determined, the resistance of the third resistor R3 and the «four-resistance-like i is also determined. The output of the touch-control power supply circuit of the present invention is J·L-loaded 1^ instantaneously becomes large, so that the wheel is stable and stable. The output voltage of the voltage source is between Γ〇2 and 敎'. After the voltage divider of the voltage divider is divided, the reference voltage Vref is also greatly enhanced. The magnetic polarity junction transistor Q2 conductance is enhanced, the leg 29 and the bipolar The node voltage ν between the junction transistors Q2 is reduced to cause the voltage of the gate (the gate and the source of 51) to decrease, and the Hall 5 transistor H-pass capability is reduced. As its surface rises, it causes the QS transistor to drop 5', thus adjusting the previously larger output VGut to the electric divergence when =rl is stable. Conversely, when the load is instantaneously small, then The output power of the output adjustable dust power circuit is vout, and the reference electric (four) ef mixed double-connected crystal is sucked after being divided by the resistance of the participating power.
II 1271607 該MOS電晶體Q1和該雙極性接面電晶體q2間之節點電壓v增 大,使該MOS電晶體Q1導通能力增強,引起其管壓降^降,曰 從而導致該MOS電晶體Q1源極之電壓上升,從而穩定了該 出電壓Vout〇 〜 以則 本實施例中該輸入電壓Vin爲3.3V,該驅動電厣Vd爲12v 時,透過上述本發明電路之幾個計算公式,可知本發明電路之 兩控制訊號輸入端31、32每接收一組控制訊號,就産生一個輸 出電壓Vout,在本實施例中透過選取合適電阻參數,該取樣分 壓電路30在接收四組控制訊號時産生四個以固定 化之輸出電壓Vout,具體如幻、所示,若需要調整電壓 、交化1大小,可再選取合適電阻參數。II 1271607 The node voltage v between the MOS transistor Q1 and the bipolar junction transistor q2 is increased, so that the conduction capability of the MOS transistor Q1 is enhanced, causing the tube voltage drop to fall, thereby causing the MOS transistor Q1. The voltage of the source rises, thereby stabilizing the output voltage Vout〇~. In the embodiment, the input voltage Vin is 3.3V, and when the driving voltage Vd is 12v, it is known that several calculation formulas of the circuit of the present invention are used. Each of the two control signal input terminals 31, 32 of the circuit of the present invention generates an output voltage Vout for each group of control signals. In the embodiment, the sampling voltage dividing circuit 30 receives four sets of control signals by selecting appropriate resistance parameters. When the four output voltages Vout are generated, as shown in the figure, if the voltage needs to be adjusted and the size of the cross is 1 , the appropriate resistance parameters can be selected.
J^__ _? sy 至制訊號輸I入端接收控制訊^比對表 控制訊號輸入端31控制號輸入端32~~1 ^~ 0 適去發0整電路2 0可爲不同數目之場效電晶體以 方;=爲如各 = 二 可由場效電晶難魏ΐ接ΓΪ二:^:^ t方式設置,還 蓋二在所作之等效修飾或變化,皆應涵 、圖式簡單說明】 Ϊ—圖係習知技術中穩壓電源電路圖。 弟二圖係本發日月較佳實施方式之輸出可觸壓電源電路 12 1271607 圖。 【主要元件符號說明】 [習知] 穩壓電源電路 1 調整晶片 10 調整端 11 輸入端 12 輸出端 13 分壓電阻 Rl,、R2, 負載 Rl [本發明] 調整電路 20 調整端 21 輸入端 22 輸出‘ 23 MOS電晶體 Ql 雙極性接面電晶體Q2 取樣分壓電路 30 第一電阻 R1 第二電阻 R2 第三電阻 R3 第四電阻 R4 限流電阻 R 負載 Rl 第一開關電晶體 Q3 控制訊號輸入端 3卜32 第二開關電晶體 Q4J^__ _? sy to the signal input I receive the control signal ^ comparison table control signal input 31 control number input 32~~1 ^~ 0 suitable to send 0 complete circuit 2 0 can be a different number of fields The effect of the transistor is square; = for each = two can be field effect electric crystal difficult Wei Wei contact two: ^: ^ t way, also cover the equivalent modification or change in the two, should be culvert, simple Description] Ϊ—The system of the regulated power supply in the conventional technology. The second figure is the output of the preferred embodiment of the present invention, which can be used to touch the power supply circuit 12 1271607. [Main component symbol description] [Practical] Regulated power supply circuit 1 Adjusting wafer 10 Adjusting terminal 11 Input terminal 12 Output terminal 13 Voltage dividing resistor Rl, R2, Load Rl [Invention] Adjustment circuit 20 Adjustment terminal 21 Input terminal 22 Output ' 23 MOS transistor Ql bipolar junction transistor Q2 sampling divider circuit 30 first resistor R1 second resistor R2 third resistor R3 fourth resistor R4 current limiting resistor R load Rl first switching transistor Q3 control signal Input terminal 3 32 second switching transistor Q4
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CN102694456A (en) * | 2011-03-24 | 2012-09-26 | 鸿富锦精密工业(深圳)有限公司 | Circuit capable of carrying out automatic switching of driving voltage |
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