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Application filed by Taiwan Semiconductor MfgfiledCriticalTaiwan Semiconductor Mfg
Priority to TW90126318ApriorityCriticalpatent/TWI266416B/en
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Publication of TWI266416BpublicationCriticalpatent/TWI266416B/en
The present invention provides a mask read-only-memory, comprising first and second buried N-type doped layers, which are parallel with each other; first and second contact windows respectively corresponding to the first and second doped layer; and a gate perpendicular to the doped layers. The first buried N-type doped layer has a first end which extends to a peripheral circuit zone formed therein the first contact window. The second buried N-type doped layer has a second end which also extends to the peripheral circuit zone formed therein the second contact window. The first end of the first buried N-type doped layer and a first end of the second buried N-type doped layer are located at the same side, while a second end of the first buried N-type doped layer and the second end of the second N-type doped layer are located at the same side.