TWI256807B - Transmission clock control method for TDM data over ethernet - Google Patents

Transmission clock control method for TDM data over ethernet

Info

Publication number
TWI256807B
TWI256807B TW93103683A TW93103683A TWI256807B TW I256807 B TWI256807 B TW I256807B TW 93103683 A TW93103683 A TW 93103683A TW 93103683 A TW93103683 A TW 93103683A TW I256807 B TWI256807 B TW I256807B
Authority
TW
Taiwan
Prior art keywords
tdm
ethernet
transmission time
tdm data
data over
Prior art date
Application number
TW93103683A
Other languages
Chinese (zh)
Other versions
TW200529608A (en
Inventor
Shu-Hsin Chang
Jeffrey Liu
Shu-Kang Tseng
Original Assignee
Ind Tech Res Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ind Tech Res Inst filed Critical Ind Tech Res Inst
Priority to TW93103683A priority Critical patent/TWI256807B/en
Publication of TW200529608A publication Critical patent/TW200529608A/en
Application granted granted Critical
Publication of TWI256807B publication Critical patent/TWI256807B/en

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Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The present invention provides a transmission clock control method for TDM data over Ethernet. The method employs a reference transmission time as the reference time spent in the transmission of TDM data via an Ethernet network in a TDMoE system. The reference transmission time is long enough for handling Ethernet packets with various delays. The method checks if there exists an error between the reference transmission time and the actual time spent in the packet transmission via the Ethernet network every predetermined period, and adjusts the TDM clock of the destination side according to the error. When the buffer of the destination side gets empty, the method also calculates a new reference transmission time for performing above check subsequently. By applying the method, which also takes Ethernet packet delay into consideration, a buffer with proper size is used and the TDM clock of the destination side is adjusted, thereby eliminating the TDM clock jitter of the source side.
TW93103683A 2004-02-17 2004-02-17 Transmission clock control method for TDM data over ethernet TWI256807B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93103683A TWI256807B (en) 2004-02-17 2004-02-17 Transmission clock control method for TDM data over ethernet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW93103683A TWI256807B (en) 2004-02-17 2004-02-17 Transmission clock control method for TDM data over ethernet

Publications (2)

Publication Number Publication Date
TW200529608A TW200529608A (en) 2005-09-01
TWI256807B true TWI256807B (en) 2006-06-11

Family

ID=37614784

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93103683A TWI256807B (en) 2004-02-17 2004-02-17 Transmission clock control method for TDM data over ethernet

Country Status (1)

Country Link
TW (1) TWI256807B (en)

Also Published As

Publication number Publication date
TW200529608A (en) 2005-09-01

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees