1252472 九、發明說明： 【發明所屬之技術領域】 本發明係相關於辆機，尤指-種應用於光碟機之中以產生尋 執誤差訊號的裝置以及相關方法。 【先前技術】 在光碟機系統中，伺服控制系統必須藉由尋執誤差訊號 (tracking_rsignal，TE)的辅助，來動態地控制讀取頭上之雷 射二極體所輸出的雷射光照射於_片的執道上。而習知技術有 -種作法’是以光學讀取頭上的域·_測自辆片所反射 出之光束來產生$複數個類比訊號，再透過類比數位轉換器， 以特定的轉率賴概侧比職賴為概個姆應的數位 訊號，接'T_依齡減她健號來產生錬蝴工作所需 的尋執誤差訊號。 然而’尋執誤魏號的品質實際上會與類比數位轉換器所使用 的取樣率相關’若僅依獅定的取樣轉將類比訊號轉換為數位 afl號則在存取光碟片上不同執道時或存取條件改變的情況下， 所產生出的雜誤差訊號品質常常就會有相當的落差。 1252472 除此之外，習知技術的作法一般是依據光感測器所感測產生的 四個電訊號A、B、C、D來產生出所需的尋軌誤差訊號（例如固 疋以A、B訊號之間的相位差減去c、D訊號之間的相位差來得出 哥執誤差訊號TE)。然而，光感測器所感測出的A、6訊號及其 間之相位差、以及光感測器所感測出的C、D訊號及其間之相位 差，並非於任何情形之下均包含有同等重要性的尋軌誤差資訊， 而當上述二者之一所包含有的尋執誤差資訊較另一者來得明顯之 時，單純將兩者相加所產生之尋執誤差訊號並不能被視為是尋軌 誤差資訊的最佳代表訊號。 【發明内容】 因此本發_目的之―，在於提供—種可在產生雜誤差訊號 的過程中，動態地調整類比數位轉換器所使用之取樣率的裝置， 以解決習知技術所面臨的問題。 本發明揭露了-細來產生_尋執誤差訊號之裝置，其包含 有.-類比數位轉換模組’其接收經由存取—辆片所產生之複 數個類比職，絲據—轉率分聰該麵比訊賴換為複數 個數位訊號；-頻率控制模組，耗接於該類比數位轉換模組，用 來依據該魏位峨婦該轉率；以及—訊舰賴組，減 於該類比數轉換歡，时依_魏德號來產生該尋執誤 1252472 差訊?虎。 本發明亦揭露-種絲產生—雜誤差訊號之方法，其步驟包 含有··接收經由存取一光碟片所產生之複數個類比訊號，並根據 取樣率分別將該些類比訊號轉換為複數個數位訊號；依據該些 數位Λ號H棘樣率；以及依據該些數位訊號產生該尋軌誤 差訊號。 此外，本發明還揭露一種用來產生一尋執誤差訊號之裝置，其 包含有：一類比數位轉換模組，其接收經由存取一光碟片所產生 之複數個類比訊號，並根據一取樣率分別將該些類比訊號轉換為 複數個數位釩號，一頻率控制模組，麵接於該類比數位轉換模組， 用來依據該些數位訊號調整該取樣率；一訊號產生模組，耦接於 該類比數位轉換模組，用來依據該些數位訊號來產生一第一及一 第二候選尋執誤差訊號，·一品質檢測模組，耦接於該訊號產生模 組，用來檢測該第一及/或該第二候選尋執誤差訊號之品質，·以 及一訊號合成模組，麵接於該訊號產生模組以及該品質檢測模 組，该sfl號合成模組係受該品質檢测模組所控制，用來選擇性地 依據該第一及/或該第二候選尋執誤差訊號來產生一該尋軌誤差 訊號。 1252472 【實施方式】 第1圖係為本發明之一實施例的示意圖。本實施例的裝置可設 置於-光碟機中，用來產生一尋軌誤差訊號TE，其包含有一光感 測模組、一類比數位轉換模組、一頻率控制模組15〇、以及一訊號 產生模組。该光感測模組包含有一第一光感測器112與一第二光 感測器114，用來依據—光碟片所反射出之光束分別產生出一第一 類比訊號A與一第二類比訊號B。而類比訊號A、B可先經由交 流躺合電容、等化H、低通濾波器隸置處理之後，再輸入至該 犬員比數位轉換模組，其包含有一第一類比數位轉換器I。與一第 二類比數位轉換器124,用來以一取樣率l/Ts麵比訊號A、B 分別轉換成一第一數位訊號AO與-第二數位訊號B0 (其中，取 樣率Ι/Ts係為第1目中所示之時脈訊號CLK，之頻率）。該訊號產 生杈組包含有-延遲模組（由—第—延遲鍊132與—第二延遲鍊 134所組成）、一第三數位邏輯模組14〇、以及一充電泵,用來 依據數位訊號AG、BG來產生尋軌誤差訊號TE。而圖示中編號嶋 的實線框縣本實施彳狀裝置的數位電路部分，其健據一頻率 轉換模組180 (其可為—鎖相迴路）所提供之時脈訊號clk，進行 運作換句活.兒’日守脈訊號CLK,的頻率即為數位電路部分湖的 “作頻率（亦即第-、第二類比數位轉換器122、124所使用之取 樣率）。而頻率控制模組⑼可以控制頻率轉換模組⑽，以動態 地改讀H虎CLK’的頻率，如此一來，類比數位轉換器122、 1252472 124即可以較佳的取樣率l/Ts進行類比至數位的轉換工作。 於本實施例中，延遲鍊132係用來將數位訊號A0延遲Ts、2Ts、 3Ts的時間以分別產生一第一延遲訊號A1、一第二延遲訊號A2、 以及一第三延遲訊號A3 ;至於延遲鍊134則用來將數位訊號bo 延遲Ts、2Ts、3Ts的時間以分別產生一第四延遲訊號b卜一第五 延遲訊號B2、以及一第六延遲訊號B3。而數位邏輯模組140係依 據數位訊號AO、B0以及延遲訊號A2、B2來產生一充電訊號up 與一放電七號DOWN’充電泵則依據充電訊號up與放電訊號 DOWN產生尋執誤差訊號TE。 本貫施例的數位訊號AO、B0以及延遲訊號Al、A2、A3、B1、 B2、B3皆為具有單一位元的數位訊號。對於數位邏輯模組14〇而 言，若其接收到的四個訊號AO、BO、A2、B2中有一訊號之值易 於其他二汛號之值時，數位邏輯模組14〇即可判斷出類比訊號A、 B之間存在相立上的差異，此時其可透過充電訊號顶或放電訊號 DOWN來調整尋執誤差訊號TE的準位。更明雜說，觀號八〇 的值異於減A2、BG、B2的辦，献在減B2的值異於訊號 AO、A2、B0的值時，數位邏輯模組14〇可觸發充電訊號现，以 透過充電1170 _升尋執誤差峨TE神位；婦在訊號a2 的值異於減AG、BG、B2的_，献在訊號BG的值異於訊號 1252472 AO A2、B2的值時’數位邏輯模組14〇則可觸發放電訊號d〇wn， 以透過充電泵170來調降尋執誤差訊號TE的準位。在本實施例 中，數位邏輯模組140可以依據記錄有以上所描述之條件的一真 值表來進行運作。 第2圖係為第1圖中之頻率控制模組15〇的一實施例示意圖， 其包δ有一弟一檢測模組（由一第一數位邏輯模組312和一第一 包絡產生單元322所組成）與一第二檢測模組（由一第二數位邏 輯模組314和一第二包絡產生單元324所組成）。該第一檢測模組 係用來依據第一、第二數位訊號Α0、Β0以及，第一、第四延遲訊 號Al、Β1來產生一第一檢測值TEL一env ;該第二檢測模組則用 來依據第一、第二數位訊號AO、B0以及第三、第六延遲訊號A3、 B3來產生一第二檢測值TER_ env ° 數位邏輯模組312的運作方式與前述之數位邏輯模組14〇大致 相同，其係於Α0、Β0、A卜B1中有一訊號之值易於其他三訊號 之值時，觸發第一控制訊號UPL或第二控制訊號DOWNL。更明 確地說，在訊號A0的值異於訊號Al、BO、B1的值時，或是在訊 號B1的值異於訊號AO、A卜B0的值時，數位邏輯模組312會觸 發控制訊號UPL ;至於在訊號A1的值異於訊號AO、BO、B1的 值時，或是在訊號B0的值異於訊號A〇、Ah B1的值時，數位邏 1252472 輯模組312則會觸發控制訊號D〇。 若使用控制訊號UPL與控制訊號！)0WNL來控制一額外的充 電泵，職充電泵亦會產生類似於尋執誤差訊號TE軌號孤， 包絡產生單兀322的功用即在於依據控制訊號肌與控制訊號 DOWNL來產生出可能的訊號TEL的包絡值（_ι〇ρ)、亦即第 -檢測值TEL_env。第3圖所示係為第2圖中之包絡產生單元奶 的-實施例示麵，其包含有—上下計數^ (up/d__ter) 410、一第一降頻器（decimator) 420、一第一暫存器 43〇、一第一 加法器、一絕對值電路450、一第二加法器460、-乘法器47〇、 -第二暫存器48〇、以及一第二降頻器彻。由於第3圖所示之裝 置的運作方式係馳習此項技術者所能輕腾解的，故在此不多 做头述。至於包絡產生單元324，其功能則類似於包絡產生單元 322 ’組成架構亦可如第3圖所示，然而本發明並不以此為限。 在第一檢測值TEL一eiw大於第二檢測值TER_env的情形下， 表示若提升第1圖中之數位電路部分16G的操作頻率i/Ts (亦即 提升時脈· CLK，的鮮），即可增進㈣述之訊號產生模組所 產生之尋軌誤差訊號TE的品#，故此時第2圖中的頻率控制單元 33〇會觸發—第五控制訊號sup，以透過第ι圖中的頻率轉換模組 則來提升時脈訊號CLK，的醉；至於在第一檢測值皿⑽小 1252472 於苐二檢測值TER_env的情形下，表示若降低第1圖中之數位電 路部分160的操作頻率i/Ts，即可增進由前述之訊號產生模組所 產生之尋執誤差訊號TE的品質，故此時第2圖中的頻率控制單元 33〇會觸發一第六控制訊號DOWNS，以透過第1圖中的頻率轉換 模組180來降低時脈訊號CLK，的頻率。 晴注意，在第1圖所示的實施例中，輸入至類比數位轉換器122 以及類比數位轉換器124的電訊號分別是光碟機中之光感測器所 修 感測得出的A訊號以及B訊號，實際上，這兩個電訊號亦可以分 別是光感測器所感測得出的C訊號以及D訊號，或分別是（A+C ) 訊號與（B+D)訊號，這些都是可能的實施方式。除此之外，本 發明的裝置與相關方法亦可以配合2004年9月於中華民國所申請 之專利案件「用於光碟機中產生尋軌誤差訊號的裝置」（申請號為 93129140) —併使用。亦即，除了動態調整類比數位轉換器所使 用的取樣率之外，並依據A訊號與B訊號來產生一第一候選尋軌春 誤差訊號TEAB，以及依據C訊號與D訊號來產生一第二候選尋 軌誤魏號TECD，再使用額外的品質檢測模組（此部分請參考 $述之申明案），來判斷第一、第二候選尋執誤差訊號· 刀別的口口質，以依據第一、第二候選尋執誤差訊號TEAB、TECD 來產生最終所需的尋軌誤差訊號TE。 12 1252472 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範 圍所做之均等變化與料’皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖為本發明之裝置的—實闕的示意圖。 第2圖為第1圖中之頻率控制模組的一實施例示意圖。 第3圖為第2圖中之第一包絡產生單元的一實施例示意圖。1252472 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to a vehicle, and more particularly to an apparatus for use in an optical disc drive to generate a seek error signal and related methods. [Prior Art] In the optical disk drive system, the servo control system must dynamically control the laser light output from the laser diode on the read head to illuminate the _ slice by the aid of the tracking error signal (tracking_rsignal, TE). On the way. However, the conventional technique has a method of generating a plurality of analog signals by measuring the light beam reflected from the field on the optical pickup head, and then transmitting the analog signal through the analog digital converter. The side is more than the responsibility of the digital signal, and the 'T_ age is reduced by her health number to generate the search error signal required for the work. However, the quality of the search for the Wei number is actually related to the sampling rate used by the analog digital converter. If the analog signal is only converted to the digital afl number according to the lion's sampling, then the disc is different on the access disc. In the case where the access conditions are changed, the quality of the generated error signal often has a considerable drop. 1252472 In addition, the conventional techniques generally generate the required tracking error signals according to the four electrical signals A, B, C, and D generated by the optical sensor (for example, the solid state is A, The phase difference between the B signals minus the phase difference between the c and D signals yields the interference error signal TE). However, the A and 6 signals sensed by the photosensor and the phase difference between them, and the C and D signals sensed by the photosensor and the phase difference between them are not equally important under any circumstances. Sexual tracking error information, and when the search error information contained in one of the above is more obvious than the other, the search error signal generated by simply adding the two cannot be regarded as The best representative signal for tracking error information. SUMMARY OF THE INVENTION Therefore, the present invention provides a device for dynamically adjusting the sampling rate used by an analog-to-digital converter in the process of generating a mis-error signal to solve the problems faced by the prior art. . The present invention discloses a device for generating a _ seek error signal, which comprises an analog-like digital conversion module, which receives a plurality of analog jobs generated by accessing a slice, and has a conversion rate. The surface is replaced by a plurality of digital signals; the frequency control module is consumed by the analog digital conversion module, and is used to determine the conversion rate according to the Weiwei wife; and - the ship-to-ship group is reduced by the analogy Conversion of joy, when the _ Wei De number to generate the search error 1252452, the news? Tiger. The invention also discloses a method for generating a noise error signal, the step comprising: receiving a plurality of analog signals generated by accessing an optical disk, and converting the analog signals into a plurality of signals according to a sampling rate. a digital signal; based on the digital apostrophes H thorn rate; and generating the tracking error signal based on the digital signals. In addition, the present invention also discloses an apparatus for generating a seek error signal, comprising: an analog-to-digital conversion module that receives a plurality of analog signals generated by accessing an optical disc, and according to a sampling rate Converting the analog signals into a plurality of digital vanadium numbers, and a frequency control module is connected to the analog digital conversion module for adjusting the sampling rate according to the digital signals; a signal generating module coupled The analog-to-digital conversion module is configured to generate a first candidate and a second candidate seek error signal according to the digital signals. A quality detection module is coupled to the signal generation module for detecting the The quality of the first and/or the second candidate seek error signal, and a signal synthesis module, which is connected to the signal generation module and the quality detection module, and the sfl number synthesis module is subjected to the quality inspection The measurement module is configured to selectively generate a tracking error signal according to the first and/or the second candidate seek error signals. 1252472 [Embodiment] Fig. 1 is a schematic view showing an embodiment of the present invention. The apparatus of this embodiment may be disposed in an optical disc drive for generating a tracking error signal TE, which includes a light sensing module, an analog digital conversion module, a frequency control module 15A, and a signal. Generate modules. The light sensing module includes a first photo sensor 112 and a second photo sensor 114 for generating a first analog signal A and a second analog color according to the light beams reflected by the optical disc. Signal B. The analog signals A and B can be first processed by the AC-receiving capacitor, the equalized H, and the low-pass filter, and then input to the dog-ratio digital conversion module, which includes a first analog-to-digital converter I. And a second analog-to-digital converter 124 for converting a first digital signal AO and a second digital signal B0 with a sampling rate l/Ts plane ratio signals A and B (wherein the sampling rate Ι/Ts is The frequency of the clock signal CLK shown in the first item). The signal generating group includes a delay module (consisting of - a delay chain 132 and a second delay chain 134), a third digit logic module 14A, and a charge pump for relying on the digital signal The AG and BG generate a tracking error signal TE. In the figure, the solid-line frame of the number 嶋 is implemented in the digital circuit portion of the device, and the clock signal clk provided by the frequency conversion module 180 (which can be a phase-locked circuit) is operated. The frequency of the sentence CLK is the “frequency of the lake part of the digital circuit (that is, the sampling rate used by the first and second analog-to-digital converters 122 and 124). The frequency control module (9) The frequency conversion module (10) can be controlled to dynamically read the frequency of the H tiger CLK', so that the analog digital converter 122, 1252472 124 can perform the analog to digital conversion operation with a better sampling rate l/Ts. In this embodiment, the delay chain 132 is configured to delay the digital signal A0 by Ts, 2Ts, and 3Ts to generate a first delay signal A1, a second delay signal A2, and a third delay signal A3, respectively; The delay chain 134 is used to delay the digital signal bo by Ts, 2Ts, and 3Ts to generate a fourth delay signal b, a fifth delay signal B2, and a sixth delay signal B3. The digital logic module 140 According to the digital signal AO, B0 The delay signals A2 and B2 generate a charging signal up and a discharge seventh DOWN' charging pump generate a seek error signal TE according to the charging signal up and the discharging signal DOWN. The digital signals AO, B0 and the delay signal A1 of the present embodiment , A2, A3, B1, B2, B3 are all digital signals with a single bit. For the digital logic module 14〇, if there is a signal value of the four signals AO, BO, A2, B2 received by it When the value of the other two nicknames is easy, the digital logic module 14 can determine that there is a difference between the analog signals A and B. At this time, the search error can be adjusted through the charging signal top or the discharge signal DOWN. The level of the signal TE. It is more complicated to say that the value of the observation number is different from the reduction of A2, BG, B2, and the digital logic module 14 is provided when the value of the subtraction B2 is different from the value of the signals AO, A2, B0. 〇 can trigger the charging signal to pass the charging 1170 _ liter search error 峨 TE god position; the value of the woman in the signal a2 is different from the _, AG, BG, B2 _, the value of the signal BG is different from the signal 1252472 AO A2 When the value of B2 is 'digital logic module 14〇, the discharge signal d〇wn can be triggered to pass the charge The electric pump 170 adjusts the level of the seek error signal TE. In this embodiment, the digital logic module 140 can operate according to a truth table that records the conditions described above. 1 is a schematic diagram of an embodiment of a frequency control module 15A, wherein the package δ has a detection module (composed of a first digital logic module 312 and a first envelope generation unit 322) and a second The detecting module is composed of a second digital logic module 314 and a second envelope generating unit 324. The first detecting module is configured to use the first and second digital signals Α0, Β0, and the first The fourth delay signal A1, Β1 generates a first detection value TEL_env; the second detection module is used to generate the first and second digital signals AO, B0 and the third and sixth delay signals A3, B3. A second detection value TER_env is generated. The digital logic module 312 operates in substantially the same manner as the digital logic module 14 ,. The value of one signal in Α0, Β0, Ab B1 is easy to be the value of the other three signals. Triggering the first control signal UPL or the second control signal DOW NL. More specifically, when the value of the signal A0 is different from the value of the signal A1, BO, B1, or when the value of the signal B1 is different from the value of the signal AO, A, B0, the digital logic module 312 triggers the control signal. UPL; When the value of signal A1 is different from the value of signal AO, BO, B1, or when the value of signal B0 is different from the value of signal A〇, Ah B1, the digital logic 1252522 module 312 will trigger the control. Signal D〇. If you use the control signal UPL and control signal! 0WNL to control an additional charge pump, the charge pump will also produce a similar to the seek error signal TE track number, the function of the envelope generation unit 322 is to generate a possible signal according to the control signal muscle and the control signal DOWNL The envelope value of TEL (_ι〇ρ), that is, the first detected value TEL_env. Figure 3 is an embodiment of the envelope generating unit milk in Fig. 2, which includes an up-down count (up/d__ter) 410, a first decimator 420, and a first The register 43A, a first adder, an absolute value circuit 450, a second adder 460, a multiplier 47A, a second register 48A, and a second down converter are provided. Since the operation of the device shown in Fig. 3 is a solution to the skill of the art, it is not mentioned here. As for the envelope generation unit 324, the function is similar to that of the envelope generation unit 322'. The architecture can also be as shown in Fig. 3, but the invention is not limited thereto. In the case where the first detected value TEL_eiw is greater than the second detected value TER_env, it means that if the operating frequency i/Ts of the digital circuit portion 16G in FIG. 1 is raised (that is, the boosting clock CLK is fresh), The product of the tracking error signal TE generated by the signal generating module described in (4) can be enhanced, so that the frequency control unit 33 in FIG. 2 triggers the fifth control signal sup to transmit the frequency in the first figure. The conversion module is used to increase the drunk of the clock signal CLK. As for the case where the first detection value (10) is small 1252472 and the second detection value TER_env, it means that if the operation frequency of the digital circuit portion 160 in the first figure is lowered i /Ts, the quality of the seek error signal TE generated by the foregoing signal generating module can be improved. Therefore, the frequency control unit 33 in FIG. 2 triggers a sixth control signal DOWNS to transmit the first image. The frequency conversion module 180 is used to reduce the frequency of the clock signal CLK. Note that in the embodiment shown in FIG. 1, the electrical signals input to the analog-to-digital converter 122 and the analog-to-digital converter 124 are the A signals sensed by the optical sensors in the optical disc drive, respectively. B signal, in fact, these two signals can also be the C signal and the D signal sensed by the light sensor, or the (A+C) signal and the (B+D) signal, respectively. Possible implementation. In addition, the device and related method of the present invention can also be used in conjunction with the patent case "Application for generating tracking error signals in an optical disk drive" (application number 93129140) applied for in the Republic of China in September 2004. . That is, in addition to dynamically adjusting the sampling rate used by the analog-to-digital converter, a first candidate tracking spring error signal TEAB is generated according to the A signal and the B signal, and a second is generated according to the C signal and the D signal. Candidate tracking error number TECD, and then use the additional quality detection module (refer to the description of the description in this section) to determine the quality of the first and second candidate search error signals. The first and second candidate seek error signals TEAB, TECD generate the final desired tracking error signal TE. 12 1252472 The above description is only the preferred embodiment of the present invention, and all changes and materials made in accordance with the scope of the present invention should be within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of the apparatus of the present invention. FIG. 2 is a schematic diagram of an embodiment of the frequency control module in FIG. 1. Fig. 3 is a view showing an embodiment of the first envelope generating unit in Fig. 2.
【主要元件符號說明】[Main component symbol description]
112 、 114 光感測器 122 、 124 類比數位轉換器 132 、 134 延遲鍊 140、312、314 數位邏輯模組 150 頻率控制模組 160 數位電路部分 170 充電泵 180 頻率轉換模組 322、324 包絡產生單元 330 頻率控制單元 410 上下計數器 420、490 降頻器 13 1252472 430 440 450 470 480 暫存器 460 加法器 絕對值電路 乘法器112, 114 optical sensor 122, 124 analog digital converter 132, 134 delay chain 140, 312, 314 digital logic module 150 frequency control module 160 digital circuit portion 170 charging pump 180 frequency conversion module 322, 324 envelope generation Unit 330 Frequency Control Unit 410 Up and down counter 420, 490 Downconverter 13 1252472 430 440 450 470 480 Register 460 Adder absolute value circuit multiplier
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