TWI251421B - Synchronization data detection unit and method - Google Patents

Abstract

A synchronization data detecting unit is provided in a communication system for detecting predetermined synchronization data. The synchronization data are sent in a transmission frame in a communication signal of the communication system. The synchronization data include a sequence of identical binary symbols which are transmitted after scrambling. The synchronization data detection unit comprises a descrambler for descrambling the received communication and for producing an output data sequence having multi-level signal values. The multi-level signal values of the descrambler output are smoothed in a filter unit. The smoothed signal is compared with a predetermined threshold value. If the smoothed signal exceeds the predefined threshold value, a detection of said synchronized data is indicated.

Description

I hang 1421, ninth, invention description: [Technical field of the invention] The present invention relates to a synchronous data detecting unit and method for detecting a predetermined synchronization data, and in particular to a wireless local area network (WLAN) , Wireless local areanetw〇rk) The connector and receiving method in the communication system. [Prior Art] In a communication system such as a wireless local area network (WLAN) system, it is important that the receiver is synchronized with the transmitter, so that the message can be successfully transferred between the transmitter and the receiver. A wireless local area network system is a flexible data communication system that can be implemented as an extension or alternative to a wired area network. WLAN systems use radio or infrared technology to transmit and receive data through the air to minimize the need for cables. Therefore, the WLAN system combines data connectivity and user mobility. Most of the WLAN systems use spread spectrum technology, which is used to make broadband RF technology developed in reliable and secure communication systems. The spread spectrum technology is designed to achieve a balance between bandwidth efficiency and reliability, integration and security. Two types of spread spectrum wireless systems that are frequently used are frequency hoping and direct sequence (Direc1: Seq[uence). In the direct sequence spread spectrum technology system, the spread spectrum is completed by encoding each data bit with a character code and a symbol having a higher frequency and a higher information bit rate. The resulting "spreading frequency" signal is distributed over a large frequency I' which will result in a relatively low power spectral density, making other communication systems 92326 倐正1^1421 '. l system will be transmitted this direct sequence show Interference from the device of the frequency signal. Straight. The sequence spread spectrum technology application is a pseudo random noise character code for both the transmitter and the receiver to spread the data. The character code includes a +ch (chlp) of the string of the information bit to be transmitted multiplied (or performed, mutually exclusive or "logical"). Many wireless networks conform to the application's known Barker character code uEEE〇nstitute 〇f and Electronics Engineers, 802.11 specification to encode and spread the data. The Barker character code includes a series of 11 small pulses that are predetermined. A full list of Barker character codes is transmitted during the time period in which the characters containing the information are taken. To allow for higher data transfer rates, the IEEE 8〇2 u specification extends to IEEE802·1 lb. In addition to the 11-bit Barkerian small pulse, the IEEE802.Ub specification uses an 8-bit Complementary Code Keying (CCK) algorithm with a high data rate. Applying a more sophisticated modulation technique, including Quadrature Phase Shift Keying (QPSK), the data transmission rate can be improved to be higher than the character rate. According to this modulation technique, each element is represented by a higher number of the phase of the moon. Thus, the transmitter produces two signals, the first signal being called the "in-phase (丨) signal or the "丨 channel", and the second ^ is called the sinusoidal carrier of the 9-degree phase shift at the same frequency. The "orthogonal phase" (0) signal or nQ channel, the IEEE802.11 specification using the direct sequence spread spectrum technique applies the training preamble (trai η 1 ng preambl e) to train Receiver-to-transmitter transmission. Each transmitted data message includes a subsequent correction of 92326 ΡΚΪ4ΙΪ 襕=2:=code. The pre-code includes - synchronous class 设 设 设 收 收 收 收 同步 同步 同步 同步 。 。 。 。 : Code length: Two options have been defined, namely a long preamble and a short: short: a system with two 7'm.1 (four) grids must support the long preposition: tone or 1: silly This specification is used to improve the efficiency of the network's total processing power when transmitting special data such as sounds. The long-term and the horse's synchronous block includes 128 bits! The block block includes 56 bits. The synchronization symbol is measured synchronously and the internal clock of the connection (4) is The symbol in the bit is set up to establish a fixed reference time frame to decode the section of the transmission frame structure after the preamble is connected: the preamble transmission of the synchronous shelf The purpose of the pre-order 7" in each news (4) is to continuously monitor the input of the preamble

Heed ^ has _ to the preamble. The boundary of the continuous Bark symbol is determined, and the forward transmission timing of the symbol is synchronized with . Shi Hai receives the processing schedule of A. According to the timing deviation between the preamble _ and the symbol = and the processing schedule of the 1 continuation module, the rounding signal 'synchronizes with the processing schedule of the receiver. : Please refer to the figure!, which shows a pre-measurement in a communication signal. The preamble detection step 101 is performed after the step (10) of receiving the communication signal and after further processing the communication signal, particularly the decoding step (10). w The structure of the Ma Yuan Debt 2 is shown in Figure 2. Including the same as the 92326 amendment 7 13⁄4 Supplement:::::::2:: · : .丨 ‘, "'>"·. - - V: : Outside...? .........................-,, the phase only i and the phase component of the received communication signal 201 is input to the code and code detection The test is 200.纟 Within the preamble debt detector 2, the received communication signal 2G1 first turns to the despreader (4) m, and is specifically a Barker matched filter (10)F, Barkermatched filter). The signal of the spread spectrum is input to the demodulation transformer (丨D leg) 2〇5 to demodulate the despread communication signal. The demodulated signal includes a sequence of the received bit sequence "clear" decision order, that is, each data value of the demodulated signal is two possible binary values. | Measure the bit stream after the intersection to detect the pre-defined preamble data. 3, use a correlator (correiat〇r) to detect the preamble. The Hai correlation is essentially one of the preamble sequences that match the ferris. When the β刖 code is present, the correlator produces an output with a large value. When the value of the correlation exceeds a predefined threshold, it can be declared that the preamble is formally detected. After detecting the preamble, the communication signal is demodulated and input to a (descrambler, DDS). One example of the stencil code used in the prior art is shown in Figure 3. According to a predefined decoding principle, the input k number 3 〇 1 a is input to delay blocks 304 and 305 representing delays in units of several units. The delayed signal is fed back and combined using a multiplier or EXOR gate 306. The output signal is fed back to the input signal 3 〇 lb and combined using the Song method or the EXqr gate 303 to produce a decoded output signal 302. " Synchronous data detection unit still has several problems. One of the problems is that the Λ 卩 卩 卩 低 低 低 , , , 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 同步 923 923 923 923 1 received within the communication signal. When there is no real preamble present, the noise may also produce a turn-out mark that exceeds one of the thresholds. SUMMARY OF THE INVENTION J θ ^ ° ^ The present invention provides an improved sync_unit and method that is less prone to generate errors in detecting pre-defined sync data. In the λ-known example, a synchronous data detecting unit for detecting and measuring the predetermined synchronization data in the transmission frame in the communication signal is provided in the communication system. (The synchronization data includes a series of identical binary symbols that are encoded and transmitted. The synchronous data detection unit includes a coded data source to decode the received Shihai communication # number and generate and right clients. There is an output data string of the "depreciation value". The multi-channel threshold value is input to the filtering device to output the output of ^ ^ ^ ^ ^ ^ ^ T w T 1 <"" a threshold device. The threshold device compares the subsequent == and a predetermined threshold. If the output of the chopper device exceeds the threshold, the threshold device indicates the synchronization number κ & In the example, a synchronous data detection unit for extracting the predetermined data in the transmission frame in the communication k number, and the synchronization data is included in the communication system. The synchronization data includes a series of A and no. The same two transmissions of the flat code Jun transmission and the output data string of the 妾^ ^ ^ 八有夕路k唬 value. μ 夕路 k 5虎值系 input to a 滹# a core wave The state is to smooth the wheel of the decoder. After smoothing, the signal is input to - Dn, Gu Zhuang +, τ, ,, 比1乂. 忒Comparative state compares the ferry, the money output and the established threshold. If the chopper device 9232() amends this 9

"After exceeding the established threshold, the comparator indicates the debt, and the synchronization is detected. In yet another embodiment, a method for receiving the same data in the communication system is provided. The predetermined synchronization data is included in The communication signal is transmitted within the communication signal. The synchronization data includes a series of the same one of the first coded transmissions. The decoded communication signal is generated to generate a series of signals.

Road number 43⁄4. Witch, 'take two gentry A I / monthlyize the multi-output signal value; and compare the flat signal with the established 11PP # °. Limit. If the smoothed signal does not exceed the predetermined threshold value, it means that the synchronization data is detected. The above and other objects, features, and advantages of the present invention will become more apparent and obvious. The following detailed description of the preferred embodiments and the accompanying drawings are set forth below. [Embodiment] Embodiments of the present invention will now be described with reference to the drawings. Referring now to the drawings, and in particular to FIG. 4, FIG. 4 illustrates a synchronizing unit for _synchronizing data, particularly a pre-defined g-horse, as described herein. The architecture shown in FIG. 4 includes a synchronous data preparation module 4A and a synchronization module 4()3. The synchronous data transversal module 400 detects a unique code' and also provides a timing offset between a symbol arrival time and the processing time of the subsequent module. The symbol synchronizer 4 G 3 will use the timing offset information to synchronize the data stream to the processing time. The synchronous data detection module 4 〇 〇 includes the following modules: Barker matched filtering. . (BMF, Barker matched fi Iter) module 4〇4, differential BPSK demodulation transformer (DEM) module 405 and software decoder (s〇n descramb) er, 92326 amend this 10 transcript. '" ^ - 4

.—...................... ' ‘ I SDS) module 406. The modules, that is to say MF, DM and S]) S form a non-coordinated (iicm-coherent) receiver. In even, the synchronous data detection module 400 includes a comb filter (c(10)b fUter, (3)F) module 4〇7 to smooth the output of the decoder. To evaluate the smoothed data to detect the pre-determined uranium code data, the synchronous data detection module 4 (10) includes a threshold controller 408. Details of the above modules will be described below. The Barker matched filter module 4〇4 receives the communication signal 4〇1 input to the synchronous data detection module 400, and calculates a correlation between the Barker sequence and the sampled value of the input_signal. The Bark character code includes u small pulses, and the order of the 11 small pulses is "〇1〇〇1〇〇〇111" or, +1, -1, +1, + 1 ? -1 5 +1 ^ +1 ^ +1 5 , -lf, (non-return-to~zero ^ does not return to zero, NRZ), where the leftmost small pulse is output first. A complete Bark code sequence is received during the period occupied by the symbol containing the information. Therefore, if the symbol rate is IMbaud, the basic small pulse rate of the 1H@ small pulse of the Barker sequence is 11 MHz. By using the UMHz small pulse rate signal, the spectrum occupied by the transmitted signal becomes eleven times larger. In the Xin-Example, the Barker sequence extends from 11 samples to 22 samples because of the input sampling rate of 22 MSPS. This can be achieved by adding 〇 to the original elements of the Barker sequence. The I channel and the input sampling system of the Q channel are associated with the Barker sequence, respectively. The composite correlation sampling is calculated at each composite input sample. This is implemented by the "slldingiind〇w" algorithm known in the art. Eight... The despread communication signal is input to the demodulator module 92326 to correct the original 1⁄4赖5〇 one. In the embodiment, the demodulator module 405 is a differential BPSK demodulation transformer. The a I is in Fig. 5 and Fig. 6 of Fig. 1, which shows the mode of the decoder module 4 〇 β. The decoder module 406 can be implemented as a software decoder capable of outputting multiple = fetches. Relative to the digital demodulator, it is decoded in software. . Internal σΡ, the multiple-valued input signal is not subject to "clear" binary processing' but the decoded output values are ranked along the expected binary value. 士=Other embodiments described herein In the middle, "half-software (half-sofd is used to decode the demodulated signal, j-software" is an example of the architecture of the W group 500. It is shown in Figures 5 and 6. The difference between the software coder and the software decoder is that the input/send part of the internal/lower part of the decoder "5 〇 4 to 5 () 6 of the input letter (four) - is two (four)" 7 input The other part of the signal 5Glb is maintained as a multi-value signal. In the decoder module 5A of Fig. 5, the received input signal is input to the carry-up portion 503 to input the multi-value input. The value is converted to a binary value. The decoder module 500 is configured according to a predefined polynomial, such as 1 + xa + xb, i ^ ^ ^ 1 =. The delayed signal is multiplied by a multiplication method. The device or the gate is fed back and adds a two-round signal to produce a decoded round. As shown in Figure β, the =5 04 and 505 include a plurality of 1-bit scratchpads 6〇ι to _, each temporary storage is a time delay representing one unit. Twins, R, and the company's 5 + + software decoder output along the expected The two-valued-column-soft symbol (such as Bucha. (4)., the 5th figure and the 6th figure of the semi-software decoder have the advantage that the 4 mesh provides more than the conventional software decoder. The hard output of the road output sampling requires a substantial savings of 12,125,421. When receiving preamble data, all software or semi-software decoders will have the same symbol for the multiple output samples. In the effect of the random error within the round-robin sample value, the round-robin sample value is averaged by the comb filter mode and 4 0 7 。. The embodiment of the wood T1-filter is shown in Figure 7 and In Fig. 8, / Now, referring to Fig. 7, the input real number and imaginary data symbol 701 are input to multiplier 705 and weighted by weight 。. The weighted signal is = = delay element 7 〇 4 and The adder 7〇3 is added to the delayed feedback output signal 702. The feedback is given The delayed feedback signal is also weighted by a weight 趴6 using a multiplier 7〇6 before the output signal is added to the input signal. According to a particular embodiment, the input data symbol 7〇1 is multiplied by a multiplier 705. The fixed point equivalent value of 0.2, and the delayed ''average'' value provided by the delay element 7〇4 is multiplied by the fixed point equivalent of 〇 8. Although the algorithm of this embodiment is respectively Referring to the weights of 0.2 and 0.8, it is known that the weighting algorithm can use the various weight combinations _W2 to achieve the same effect. The noise reduction effect of the input sample value 7〇1 can be achieved. It is enhanced by reducing the weight, the value of A, and increasing the value of I. In contrast, the correctness of receiving data symbols in time can be enhanced by increasing the value of the first weight ^ and decreasing the value of the second weight W2. Another embodiment of a prismatic filter architecture is shown in FIG. The outputs of the comb filter, which are not shown, represent the average of n small pulse samples separated by u or 22 samples (depending on the applied input sampling rate). As is known to those skilled in the art, the average number of samples can be adjusted to 92326.] 3 1251421 When set to achieve the noise reduction effect of the foot dog. When the number of (4) is increased, the noise will be reduced more effectively. In the particular example of this embodiment, the average amplitude of the equally sampled fresh phase in-phase channel 1 and the quadrature phase pass is independently calculated. This can be implemented in the specific embodiment by implementing the following formula: fQ(k) = 冬 Winter (々-22/·) The output of the decoder when the ‘Buck sequence is taken, as described above. The output of the waver fl and fQ will be used to determine whether the current code is currently being connected. In the _example, the relationship between the two output values is offset by the difference of the frequency deviation of the 6H L. · S(kT)-f, (kT) + fQ(kT) The values 'and fi and the average value of the output of the 杈-shaped filter representing the respective channels. Figure 8 of the retrospective tea test' comb filter, the wave device 800 includes a plurality of delay elements 804, an adder 8〇3 And the deciphering private recognition method M 805. The input decoder output 8 01 {d, input to the addition cry mq 忐 is 803 ya and is further input to the first component on the side of each complete phase. The output of the component_=addition 5803 is sub-inputted to the input of the lower delay component 8G4. The adder 8〇3 receives n input signals that are both meta-synchronized and hit into the number of turns, The input, δ/Γ is concatenated and input to the divider 8Q5. The number of rounds and the associated number lW of the delay element 804 are set according to the above considerations. The divider 92326 corrects the 14th: plus "state 8." The sum provided by 3 is normalized. Sub. == How to decode the internal code of the preamble in the input communication signal ^嶋, she (four) is soft In order to reduce the random error in the smoothing of the output system after the processing of the ( code (step 9G2), the details of the operation performed by comparing the combing rights are shown in the step-by-step method. In Fig. 1G, "u" s (half +_ shows the respective comb shape; the sum of the filter two) is in the code search period with a predefined threshold T h = meaning = step 1002. When the output of the comb chopper is greater than the pre-defective product limit value Th, it can be regarded as the pre-coded preamble (step 3)' and the preamble pre-measurement operation enters, The preamble ready tester will remain in this state, but (4) whether the output of the decoder will be larger after taking two small decisions. After reading the other two sample values, the The limit controller will = confirm the comparison result, that is, determine whether after the symbol duration: the peak of the decoder reappears. The output of the comb ferrite before explicitly claiming that the preamble has been measured. The number of times greater than the pre-defined threshold Th must exceed the specified number of times (steps 1〇〇4,1〇〇5) When the result of the comparator in step 1 (10) 2 has been confirmed for a predetermined number of times ^, then the π latched state is entered (in the case where the preamble has been detected). In a square, Τ κ It is 15, that is, it must be confirmed that the preamble has been detected 5 times. 幻326倐巴太 i Y : I know that this artist can use any other number of times to achieve phase & Said, between 10 and 20 times. According to the IEEE802. lib specification of wireless LAN, the threshold control cry 4〇8 can be used to detect long and short preambles. Because the two preambles are not The corpse has a difference in the long-term production of °°, and the binary value of the preamble sequence is also different.

Corresponding thresholds of the binary preamble values are respectively used to separate the preambles. Λ -月丨J According to the wireless L A Ν specification, the detection of the long and short preambles can be detected. The preamble detection operation applies a first threshold T h 1 and a second threshold τ h 2 . According to the expected decoding "vector round-value + 1/-1, the two thresholds differ only in the sign of positive and negative. 乂In step 11〇2 or step 1107, long or short is detected first. After the code is set, steps 11〇3_11〇6 or steps 1(10)-(1)k "reliability check" are repeatedly performed for each preamble. The long or short preamble on the side cannot be confirmed in a certain loop of the confirmation loop formed by the step 1103_1106 of the long preamble confirmation operation or the step 1108-1111 of the short preamble confirmation operation. The comparator jumps back to step 11〇1. After the preamble has been detected and confirmed, and the timing offset between the payment arrival time and the symbol processing time in the next data module is known, the child delivery synchronizer module 4〇3 will release the data. Enable symbol release to match symbol processing. According to the above embodiments, the decision result of each of the transmitted symbols is that the output of the demodulator is shifted to the output of the comb filter. According to a special trick, the 'example' uses a semi-soft decoder, which includes 92326 to correct the L. imm \ .....7 ....,.. v 祓 1 1 兀The binaryization operation is introduced into the "delay path" of the decoder of the width register. The output of the semi-soft decoder is arranged in the order of the I coded by the expected value of +1 (by the sent).

One of the code S) or -1 (the short preamble consisting of the sent 〇) is a series of soft S numbers. The above embodiments provide more reliable and improved preamble detection capabilities without increasing hardware complexity. By shifting the preamble + to the subsequent processing stage, the preamble detection of each of the above embodiments reduces the occurrence rate of the preamble or the erroneously measured preamble. The present invention has been disclosed in the above-described preferred embodiments, and is not intended to limit the present invention. Any one skilled in the art can make some modifications and refinements without departing from the spirit of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. [Simple diagram of the diagram] The f1 diagram is a flow chart showing the preamble detection process; the second diagram is a block diagram showing the preamble detector before detecting the preamble in the communication signal; 3 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图The block diagram of the architecture of the semi-soft version 1 ι〇ί1:) decoding module included in the architecture as shown in FIG. 4; the decoding module shown in the figure 6 Block diagram of a more detailed embodiment; 92326, the eighth embodiment of the chopper module in the architecture shown in FIG. 4 is a filter module in the architecture shown in FIG. Block diagram of another architecture of the group; FIG. 9 is a flow chart showing the processing flow of the preamble detection process; FIG. 10 is a flow chart showing the process of comparing the threshold value of the predetermined synchronization data in the communication signal And, Figure 11 is a flow chart showing a more detailed threshold comparison process for detecting two different preambles in a communication signal. [Main component symbol description] 2 0 0 preamble detector 204 despreader 3 0 0 decoder 302, 702 output signal 304, 305 delay block 401 communication signal 201 communication signal 205 demodulation transformer 301, 301a , 301b input signal 303, 306 EXOR gate

400 Synchronous Data Detection Module 4 0 3 Synchronization Module 404 Buck Matched Filter (BMF) Module 405 Differential BPSK Demodulation Transformer (DEM) Module 406 Software Decoder (SDS) Module 4〇7 Comb Filter (c〇F) module 408 threshold controller 500 decoder module 501a, 501b input signal 503 binary portion 504, 505 delay portion 601, 602, 603, 604, 605, 606 temporary storage 701 data symbol 703, 803 adder 92326 correction of this 18

One-to-one... Κ5Λ421 704,804 delay element 800 comb filter 8 0 5 divider 7 0 5,7 0 6 multiplier 801 decoder output

92326 倐 iL too

Claims (1)

421 ^, the scope of application for patents, in the communication system for detecting the synchronization data in the transmission frame of the communication signal, the synchronization data detection unit, the synchronization data includes a series of the first two encoding and transmission a carry symbol, the synchronous data detecting unit includes: 夕泽码益, to decode the received communication signal and the output data symbol generated and having multiple signal values; 滤波 filtering, to smooth the decoded Outputting data symbols; and a thresholding device to compare the smoothed output and threshold values of the filtering device, if the output of the filtering device exceeds the predetermined threshold, the "Xuan's threshold device indicates the synchronization data" Detecting and measuring results. In the synchronous data side unit described in the first item of the patent scope, the coder in the basin includes: /, a binary digitizing part, and the received multi-channel input carry signal; π佚战-, 隹I璲&quot The file 'delayes the carry signal according to a predefined decoding rule; and the first output::=:: multiplies the multiple input signal by the carry signal of the delayed portion, and outputs the decoded signal . The synchronous data is described in item 2 of the second paragraph, wherein ^ does not include a plurality of delay regions and at least one of the different portions is merged according to a predefined decoding rule: the delayed binary signal is not asked. And the synchronous data detecting unit as described in claim 2, wherein 92326 corrects the plurality of delay registers, and each delay register has a width of one bit. 5. The synchronous data detecting unit of claim 1 wherein the decoded signal output has a width of at least two bits. 6. The synchronous data unit described in the patent application scope, wherein the ° Xuan 'wave device is a comb filter. 7. ^ The synchronous data unit described in claim 6 of the patent scope, wherein the comb The shape filter includes a predetermined number of identical delay portions to sequentially delay the received round-in signal; and set 'to accumulate the output signals of the respective delay portions and the inscribed signal. H ^ Li Fan (4) Synchronous data system as described in 7; = Consider, including the normalization device, dividing the accumulated result by the number of accumulated signals. 9) If the patent application scope item 7 each of the delay parts includes a series connection =! Data 崎 元 疋 疋 疋 。 。 ί ί ί ί ί ί ί ί ί ί 如 如 如 如 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 岣 数据 数据 数据 数据 数据 数据 数据 数据 数据 数据 数据 数据 数据Fan Yi said in item 7 that the comb filter includes at least 9 delay parts, and the synchronous data detection unit described in the patent scope is the same as the two. , which is faster than after ^ have (four) # (10) product When the _ threshold is exceeded, the _ result y of the synchronization data is indicated. 92326 Amendment 21 125 er 1 13 · The cumulative result of the predetermined quantity in the synchronous data detecting unit described in the claim (4) Is the number between 5 and 2g. M. The synchronous data detection unit according to claim 13 of the patent application, wherein the subsequent cumulative result of the predetermined quantity is greater than 丨〇. The synchronization data_unit, wherein: the threshold device provides at least two threshold values to distinguish and extract synchronization data of different lengths within the communication signal. · 16. As described in claim 15 (4) a synchronization data (4) unit, wherein the threshold device includes a first threshold value for detecting a longer length of the synchronization data and a second threshold value for detecting the synchronization data having a shorter length. The synchronous data detecting unit described in 帛16: wherein the first threshold and the second threshold have the same absolute value but different positive and negative signs. Η · as described in claim 1 a synchronous data detecting unit, wherein the Xuantong system applies a direct sequence spread spectrum transmission method to transmit the communication signal, and the synchronous data detecting unit further includes: a despreading unit for despreading the received frequency a communication signal; and a demodulation unit for demodulating the communication signal of the de-spreading frequency. 19. The synchronous data detecting unit according to claim 1, wherein the communication system is a wireless area network. Road (WLAN) system. 20· A wireless local area network receiver including the same number of ships, ^, ♦ 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 Kind to use in the synchronization of the number of synchronization. The synchronous data debt measuring unit of the transmission frame in the communication signal is not detected, and the same binary symbol of the synchronous data packet is transmitted, and the synchronization number (four) is obtained by decoding. The communication signal is a multi-channel signal, and the data symbol is rotated; the generated output data symbol has a skin = smoothed; and the smoothed output of the chopper device is compared with the field. If the output of the filter does not exceed the predetermined value, the comparator indicates the fine result of the synchronization data. (10) 2 2 · If the synchronous data detection unit described in the 21st paragraph of the patent application scope, the decoder includes: /, , and the digitization part, converting the received multiple input signals into two a carry apostrophe; a delay portion, according to a predefined decoding rule bit signal; and a battle μ-multiplication portion, multiplying the multi-channel input signal by the delta-Hour carry signal that is rotated by the delay portion, And output the decoded signal. 23. The synchronous data debt measuring unit of claim 21, wherein the signal output of the zebra code has a width of at least two bits. 24. The synchronous data extracting unit described in claim 21, wherein the 6 hai's wave is a comb shape; the wave filter. 25. The synchronous data detection unit according to claim 21, wherein the comparator is configured to indicate the synchronization after determining that the subsequent cumulative result of the predetermined number exceeds the 92326 revision 23 Λ indefinite s°° limit value. Data detection result 26. For example, please refer to the synchronous data detection unit described in item 21 of the patent scope. The hole π system applies a direct sequence spread spectrum transmission mode "communication signal, and the synchronization data_unit is more _:, the noon spread frequency unit, to despread the received communication signal, demodulation unit, The communication is based on the demodulation and de-spreading of the communication and the synchronous data detection unit of the 27.1 patent application scope, the δ 逋 逋 system system wireless local area network (WLAN) system. - a wireless local area network receiver including a measurement unit according to claim 21 of the patent application. I data is succinct 29. A predetermined method for transmitting a transmission frame in a communication signal, the synchronization data includes a series of First hexadecimal symbol, the method comprises the following steps: ... the step of the code data received by the code signal outputting the data sequence; 1 generating the multiplexed signal smoothing the decoded work # ^ And the step of the multi-signal value of the post-red number, the step of comparing the multi-signal value of the smoothed signal, and if the 疋^ a b ± If the § number exceeds the established value, then the generation The method of synchronizing the data is inferred. The method of the data of the (four) step described in Item 29 of the patent (4), wherein the decoding step comprises the following steps: the multiple steps received; - Knowing that 仏唬4 is replaced by a binary signal, 92326 佟正太多多 ί 杂 延迟 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据 根据And the step of rotating the decoded signal. 31 • The method of detecting and measuring the predetermined synchronization (4) as described in claim 30, wherein the step of delaying the binary signal comprises the following steps: step of delaying the signal And the stepping pain according to the predetermined decoding rule = the extended money binary signal and the other delayed late binary signal 32. As described in claim 29, the predetermined value = the smoothing step will be received Confidence after the decoding 33. The square of the predetermined synchronization data described in Item 32 of the application scope includes the following steps: · The input signals received in sequence by multiple delays; Delay signal part And the input signal; output the accumulated signal by & · 3 41 Γ Γ Γ 范围 $ 3 3 3 3 3 3 3 3 3 3 3 3 3 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测 侦测In addition to the number of accumulated apostrophes, it is normalized. 35. The method for detecting established synchronization data as described in claim 29, wherein the comparison step further comprises the following steps: after the decision = 3 After the threshold reaches the established number of attacks, it refers to: the step of synchronizing the data. μ 92326 Amendment 1251421 6. The method for detecting the established synchronization data as described in claim 35, wherein the comparison step further includes the following steps: · a first threshold that is more than a 5 累积 cumulative 杲 and a synchronous data for detecting a longer length; and a comparison between the accumulated result and a second threshold for detecting a shorter length of the synchronized data. 37. A method of detecting a predetermined synchronization data as described in claim 36, wherein the first threshold and the second threshold have the same absolute value but different positive and negative signs. The method for detecting a predetermined synchronization data as described in claim 29, wherein the transmission of the communication signal uses a direct sequence spread spectrum transmission side j, and the communication signal is despread and decoded before decoding. 39. The method of receiving a communication signal in a communication system, the method comprising the root: the step of detecting synchronization data by the method described in claim 29 of the patent. 92326 佟 FL too IN OUT 匕· • j IN (first 13⁄4) (first n 301 301ο T 305 1.........................._+ Delay 1 Delay 2 ~301b 302 L. 30: .OUT Figure 3 (previous technique) I face 21 1------------------------------1 Figure 4 Figure 5 •OUT Figure 6 1251421 Wide IN OUT 匕 -J Figure 8 ri2§U2f~ Year and month repair ( , positive replacement page preamble detection (return) Figure 9 The 10th seventh, the designated representative map (1) The designated representative circle of the case is: (2) The simple symbol of the symbol of the representative figure Figure 4〇〇 Synchronous data detection module 401 communication signal 403 synchronization module 404 Barker matched filter (BMF) module 405 differential BPSK demodulation transformer (10) M) module 406 software decoder (sds) module 407 comb filter (COF) module 408 threshold controller eight, the case When there is a chemical formula, please reveal the section that best shows the characteristics of the invention. This case is not represented by the chemical formula 92326.