TWI243472B - Voltage generator and method for generating stable voltage - Google Patents

Voltage generator and method for generating stable voltage Download PDF

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TWI243472B
TWI243472B TW93102964A TW93102964A TWI243472B TW I243472 B TWI243472 B TW I243472B TW 93102964 A TW93102964 A TW 93102964A TW 93102964 A TW93102964 A TW 93102964A TW I243472 B TWI243472 B TW I243472B
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voltage
output voltage
generator
input voltage
signal
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TW93102964A
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Chinese (zh)
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TW200527653A (en
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Min-Chung Chou
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Elite Semiconductor Esmt
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Abstract

A voltage generator for generating stable voltage is described. The voltage generator includes a voltage dividing circuit, a first differential amplifier, a second differential amplifier, a first switch, and a second switch. When the first input voltage is lower than the reference input voltage, the first output voltage signal is at high state, so that the generator output voltage increases. When the second input voltage is higher than the reference input voltage, the second output voltage signal is at high state, so that the generator output voltage decreases. Thus, the generator output voltage is a substantially stable voltage.

Description

1243472 玖、發明說明 【發明所屬之技術領域】 本發明是有關於一種電壓彦味 以及提供一穩定電壓 特別是有關於—種在《電路内產生-穩定雷 壓的電壓產生器以及提供此穩定電壓的方法。 【先前技術】 的電路當中,各種電子元件必須處於適當的偏 =狀=方能使電子元件產生應有的功能。例如一個電晶 體,s使用於放大功能時,必須操作於線性區。要提供— 適當的偏壓,需要具備-個穩定的電壓源或是電流源。’、 近來由於電子工業的發展,能容納大量晶體的積體電 路越來越普遍。隨著製程技術的進步,積體電路内 几件的尺寸也越來越小。t電子元件的尺寸變卜電子_ 件所需要的偏壓值也變小。因此,產生固定電壓源的電: 產生電路其輸出電壓值以及電壓變化的幅度必須隨著製裎 技術以及電子元件的尺寸而改變。此電壓產生電路不心 能產生所需的電壓* ’並且要能夠維持輪出電壓在—個穩 定的位準’方能使積體電路内的電子元件操作在正確的摔 作點上。 Ws 所以,如何在一個積體電路之内,製作一個符合小尺 寸電子元件偏壓需求的穩定電壓源,且巧妙地調 壓的電壓值,是工業界非常迫切需要的。 ,出軍 1243472 【發明内容】 源 本發明的目的是在提供一 種電壓產生器 ’能提供一電壓 w本發明的另一目的是在提供一種電壓產生器,此電壓產 生器能夠設定一第一輸入電壓、一 ^ 弟一輸入電壓以及一夂 考輸入電壓,使得產生器輪 夕 供-穩定電壓源。 Μ纟^的_之内提 …本發明的再-目的是在提供一種電壓產生器,用於一 β己憶體裝置之預燒測試電路中 始:在正常模式能夠提供位元 線預充電電壓以及電容板電壓, 牡頂;疋測试模式時能關閉。 2據本:明之目的’提出一種電壓產生器,用於產生 斤貝貝上知疋之電壓”匕電壓產生器包括一分壓電路、一 第一差動放大器、一第二矣說说 抑 一 一差動放大态、一第一切換器以及 一弟二切換器。 …路依據-參考高電壓以及一產生器輸出電壓產 =-輸入電塵以及一第二輸入電壓…參考高電壓 :於苐-輸入電壓,第一輸入電壓高於第二輸入電壓,且 第二輸入電壓高於產生器輸出電壓。 β第一差動放大器依據一參考輸入電壓以及第一輸入電 壓產生第-輸出電壓訊號H動放Α器依據參考輸入 電壓0及第二輸入電壓產生一第二輸出電壓訊號。 σ當第一輸出電壓訊號為高電位時,第一切換器對產生 器輸出電壓提供一高電壓源。當第二輸出電壓訊號為高電 位時,第二切換器對產生器輸出電壓提供一低電壓源。 1243472 其中¥弟一輸入電塵低於夫去μ 雷声替声於-,i低於茶考輸入電壓時,第-輸出 電二讯唬處於尚電位狀態使得該 ^ ^ X ^ _ 屋生為輸出電屬增加。當 弟一輸入電壓兩於參考輸入 於古雪你收…处 弟一輸出電壓訊號處 於问電位狀恶使得產生器輸出電壓降低。 根據本發明之目的,亦 ^ ^ lL ^ 出種產生一實質上穩定之 電£的方法,此方法包括下列 據一參考高電壓以及一產生 ψ /分Μ電路依 應以及輸出電壓產生-第-輸入電 ^ ^ ^ ^ ,、參考咼電壓高於第一輸入電 屋,第-輸入電壓高於該第二輸入電 高於產生器輸出電壓。 第一輸入電屋 接著,一第一差動放大器 一鈐入雷厭方a… 據參考輸入電壓以及第 月—第一輪出電壓訊號。接著, 放大器依據參考輸入電麼以及第二輸入 上差二 :電壓訊號。當第一輸出電壓訊號為高第= 訊號為高電位時,一第:::換::壓源。當第二輸出電廢 低電覆源。 、㈣產生器輸出電·提供一 當第-輸入電壓低於該參考輪入電壓時,第 壓訊號處於高電位狀能梯^曰方a 狗出電 门电位狀恶使侍產生器輸出電一 輸入電壓高於參考輸入電壓 田弟一 電位狀態使得產生器輸出„降:::出電=號處於高 麼為一實質上穩定之《。错此,產生器輪出電 3因為此電星產生器能依據第一輸入電壓、第 壓以及麥考輸入電壓決定產 勒入電 為輸出電塵之電壓值之範 7 1243472 圍,所以此電壓產生器能產生一實質上穩定 一 為在傳送第-輸出電壓訊號以及第二輸出二=之:因 中能加入-第-模式切換電路以及 虎之逆徑 木一挺式切換雷跋, 所以電壓產生器在正常模式能夠提供位元線電 及電容板電壓,在預燒測試模式時能關閉。、電堡以 【實施方式】 笛二二=示本發明之電壓產生器之方塊圖。請參昭 弟1A圖,電壓產生器ι〇〇包括一分壓電路^、: 差動放大器1〇4、一第二差動放大 — 弟一 以及一第二切換器11〇。 卜切換器108 分壓電路102依據-參考高電壓116以及 出電壓462產生一第一輸入電麼112 :輸 ^ 久弟一輸入電壓 114。,、中參考高電壓116高於第—輸人電壓112,第 入電壓m高於第二輸人電壓114,第二輸人電壓114高: 產生器輸出電壓462。 ' 第一差動放大器1〇4依據參考輸入電壓122以及第一 輸入電S U2I生第一輸出電壓訊號118。第二差動放大: 1〇6依據參考輸入電麼122以及第二輸入電遷ιΐ4產生第二 輸出電壓訊號120。 一 當第一輸出電壓訊號118為高電位時,第一切換器 對產生器輸出電壓462提供一高電壓源123。當第二輪出電 塵訊號120為高電位時,第二切換器、11〇對產生器輸出電壓 462提供一低電壓源124。 1243472 當第一輸入電壓112低於參考輸入带 — 輪出電壓訊號118處於高電位狀能 电i 吟’第- 增加。入雷^ 產生器輸出電壓462 輸出二 4高於參考輸入電壓122時,第二 降低。 门电位狀恶使侍產生器輸出電壓462 弟1B圖繪示本發明之電壓產 圖。在太+ 又电壓產生為之較佳實施例之電路 ㈡在本實施例中,第一切換器Μ1243472 发明 Description of the invention [Technical field to which the invention belongs] The present invention relates to a voltage and a stable voltage, and in particular to a voltage generator that generates a stable lightning voltage in a circuit and provides the stable voltage. Methods. [Prior art] In the circuit, various electronic components must be in a proper state to enable the electronic components to have their proper functions. For example, when an electric crystal is used in the amplification function, it must be operated in the linear region. To provide—a proper bias, a stable voltage or current source is required. Recently, due to the development of the electronics industry, integrated circuits that can accommodate a large number of crystals are becoming more common. With the progress of process technology, the size of several pieces in integrated circuits has also become smaller and smaller. The size of the electronic component changes, and the required bias value of the electronic component also becomes smaller. Therefore, to generate electricity from a fixed voltage source: The output voltage of the generating circuit and the magnitude of the voltage change must be changed according to the manufacturing technology and the size of the electronic components. This voltage generating circuit is not capable of generating the required voltage * 'and it must be able to maintain the wheel-out voltage at a stable level' so that the electronic components in the integrated circuit can operate at the correct drop point. Ws Therefore, in a integrated circuit, how to make a stable voltage source that meets the bias requirements of small-sized electronic components, and smartly adjust the voltage value is very urgently needed in the industry. [Abstract] The purpose of the present invention is to provide a voltage generator that can provide a voltage. Another object of the present invention is to provide a voltage generator that can set a first input. The voltage, input voltage, and input voltage make the generator a stable voltage source. Within the _ of Μ… ^ ... The purpose of the present invention is to provide a voltage generator for a burn-in test circuit of a beta memory device: in a normal mode, a bit line precharge voltage can be provided. And the voltage of the capacitor plate, the top; 疋 can be turned off in the test mode. 2 According to the book: the purpose of the 'propose a voltage generator for generating the voltage on the jinbei'. The voltage generator includes a voltage divider circuit, a first differential amplifier, a second amplifier One differential amplifier state, one first switch and one two switch.… Road basis-reference high voltage and a generator output voltage production =-input dust and a second input voltage ... reference high voltage: Yu苐 -input voltage, the first input voltage is higher than the second input voltage, and the second input voltage is higher than the generator output voltage. Β The first differential amplifier generates a first output voltage signal according to a reference input voltage and the first input voltage. The H dynamic amplifier A generates a second output voltage signal according to the reference input voltage 0 and the second input voltage. Σ When the first output voltage signal is high, the first switch provides a high voltage source to the generator output voltage. When the second output voltage signal is high, the second switcher provides a low voltage source to the generator output voltage. 1243472 Among them, the input of the younger one is lower than that of the husband and the thunder sounds at-, i is low When the input voltage is measured in the tea test, the second-output electrical signal is in a still-potential state, which makes the ^ ^ X ^ _ yuppie increase for the output electrical genus. When the input voltage of the younger one is two than the reference input, you receive it in Gu Xue ... According to the purpose of the present invention, a method for generating a substantially stable electricity is also provided. The method includes the following reference high voltage and a Generate ψ / minute M circuit response and output voltage generation-the first input voltage ^ ^ ^ ^, the reference voltage is higher than the first input voltage, the first input voltage is higher than the second input voltage higher than the generator output Voltage. The first input electrical house. Then, a first differential amplifier enters the thunder line a ... according to the reference input voltage and the first-round output voltage signal. Then, the amplifier is based on the reference input voltage and the second input. Upper difference 2: voltage signal. When the first output voltage signal is high and the signal is high, the first ::: change :: voltage source. When the second output is electrical waste, the low power source is covered. Electricity · Provide one When the first input voltage is lower than the reference wheel-in voltage, the first voltage signal is at a high potential energy ladder. The potential state makes the generator output „fall ::: power on = is it high that it is a substantially stable”. Wrong, the generator wheel powers out 3 because this electric star generator can determine the range of the voltage value of the output electric dust by the input voltage, voltage and McCaw input voltage range 7 1243472, so this voltage produces The device can generate a substantially stable one for transmitting the first-output voltage signal and the second output. Two of them: Because the -first-mode switching circuit and the tiger's reverse path can be used to switch thunderbolts, the voltage is generated. The device can provide bit line electricity and capacitor plate voltage in normal mode, and can be turned off in burn-in test mode. 、 Electric Fort [Embodiment] Di Er 22 = shows the block diagram of the voltage generator of the present invention. Please refer to Fig. 1A. The voltage generator ι〇〇 includes a voltage divider circuit ^: a differential amplifier 104, a second differential amplifier — a first one, and a second switcher 110. The switch 108 divides the voltage circuit 102 according to the reference high voltage 116 and the output voltage 462 to generate a first input power 112: Input ^ Jidi an input voltage 114. The middle reference high voltage 116 is higher than the first input voltage 112, the first input voltage m is higher than the second input voltage 114, and the second input voltage 114 is high: the generator output voltage 462. 'The first differential amplifier 104 generates a first output voltage signal 118 based on the reference input voltage 122 and the first input voltage S U2I. Second differential amplification: 106 generates a second output voltage signal 120 according to the reference input circuit 122 and the second input circuit 迁 4. -When the first output voltage signal 118 is high, the first switch provides a high voltage source 123 to the generator output voltage 462. When the second-round power dust signal 120 is high, the second switcher 110 provides a low voltage source 124 to the generator output voltage 462. 1243472 When the first input voltage 112 is lower than the reference input band — the output voltage signal 118 is at a high potential state. When the lightning output voltage 462 of the generator Ⅱ is higher than the reference input voltage 122, the second decreases. The gate-like evil causes the generator output voltage 462. Figure 1B shows the voltage output of the present invention. The circuit is the preferred embodiment in which voltage is too high. In this embodiment, the first switch M

雷曰鱗,ν ^ 牛1幻术成,疋一個MOS 玉曰曰體126。第二切換器η〇舉 酽 … 牛1幻术口兒,疋一個MOS電晶 餸128。弟一切換器1〇8 Μ . 第^^ 及MUS電日日體126之閘極連接於 弟一輪出電壓訊號118。第一切換 乐切換為1〇8之MOS電晶體126 之〉及極連接到高電壓源123。 第一切換器108之MOS雷曰駚1 之M〇S電日日體126之源極連接到第二 切換斋110之MOS電晶體128之、方朽唾 菔8之,及極。弟二切換器110之 M〇S電晶體128之閘極連接到第二輸出電麼訊號12〇。第 -切換,m t M0S電晶體128之源極連接到低電壓源 124 °第二切換器110之MOS電晶體128之汲極連接到產 生器輸出電壓462。 清參考第1B圖,第一模式切換電路13〇介於第一差動 放大器UM和第一切換器' 1〇8之間。第一模式切換電路BO 接收預燒測試模式訊號,WBI 464,以及WBIN 134,其中 WBIN134是WBI 464的相反訊號。 八 第二模式切換電路132置於第二差動放大器1〇6以及 第二切換n ii〇m式㈣電路132接收預燒測試 模式訊號’ WBI 464,以及WBIN 134。 1243472 第—模式切換電路13〇以及第__ 提供切換的選摆…θ 式切換電路132能 、擇,決疋疋否提供產生器輸出電壓462。舉 當此電壓產生器丨。。用於一 DRAM的預燒測試電 :’產生器輸_ 462在正常模式能提供一電容板電 =一記憶體單元中的儲存電容,在預燒測試模式時,電 #生益1〇0能經由一預燒測試模式訊號WBI 464來切斷 輸出電壓訊號118以及第二輸出電壓訊號120,使得預Lei Yue scales, ν ^ Niu 1 magic surgery into a MOS jade Yue body 126. The second switch η〇 lifts…… a MOS transistor 餸 128. Brother 1 switcher 108M. The gate of the ^^ and MUS electric sun body 126 is connected to Brother 1 output voltage signal 118. The first switch is a MOS transistor 126 of 108 which is connected to the high voltage source 123. The source of the MOS thunder 駚 1 of the first switch 108 is connected to the source of the MOS electric sun body 126 of the first switch 108, the MOS transistor 128 of the second switch 110, the square electrode 唾 8, and the pole. The gate of the MOS transistor 128 of the second switch 110 is connected to the second output signal 120. The first-switch, the source of the m tMOS transistor 128 is connected to a low voltage source 124 ° the drain of the MOS transistor 128 of the second switch 110 is connected to the generator output voltage 462. Referring to Fig. 1B, the first mode switching circuit 13o is interposed between the first differential amplifier UM and the first switch '108. The first mode switching circuit BO receives the burn-in test mode signal, WBI 464, and WBIN 134, where WBIN134 is the opposite signal of WBI 464. 8 The second mode switching circuit 132 is placed in the second differential amplifier 106 and the second switching n iim type circuit 132 receives the burn-in test mode signal ′ WBI 464 and WBIN 134. 1243472 The first-mode switching circuit 13o and the __ provide the selected pendulum ... The θ-type switching circuit 132 can, select, and never provide the generator output voltage 462. For example, this voltage generator 丨. . Burn-in test electricity for a DRAM: 'Generator Input_ 462 can provide a capacitor plate electricity in a normal mode = a storage capacitor in a memory unit. In the burn-in test mode, electricity # 生 益 1〇0 can A burn-in test mode signal WBI 464 is used to cut off the output voltage signal 118 and the second output voltage signal 120, so that

疋測試電壓能經由測試腳位129強迫輸人至記憶體單元中 的儲存電容,以對該儲存電容進行加壓。疋 The test voltage can be forcibly input to the storage capacitor in the memory unit through the test pin 129 to pressurize the storage capacitor.

:當予員燒測試模式訊號WBI 464致能日夺,第一模式切換 電路130將第一輸出電壓訊號118切斷到第一切換器副 、^路第一模式切換電路132將第二輸出電壓訊號12〇 切斷到第二切換電路110的通路。當預燒測試模式訊號wbi 4 6 4失能時,第一模式切換電路丨3 〇將第一輸出電壓訊號1工8 連接至第一切換裔1 〇8。第二模式切換電路i 將第二輸出 電壓訊號120連接至第二切換器11〇。 當正常模式時,預燒測試模式訊號WBI 464處於低電 位狀態。差動放大器1〇4和106皆為啟動狀態。差動放大 态104具有PMOS主動負載136、PMOS電晶體140以及 142、NMOS輸入埠、NMOS電晶體144以及146。 差動放大器106具有NMOS主動負載138、NMOS電晶 體148以及150、PMOS輸入埠、pm〇s電晶體152以及154。 電阻R1 156、R2 158以及R3 160構成一個分壓電路1〇2, 其中分壓電路102連接至參考高電壓116以及產生器輸出電 10 1243472 壓462。分壓電路102用於產生第一輸入電壓ιΐ2以 輸入電壓U4。舉例來說,參考輸入電壓i22是由一能隙: 壓參考(band-gap vo丨tage reference)而產生的參考輸二直: 電壓。參考輸人電® 122的值高於或等於參考高電二: When the burn-in test mode signal WBI 464 is enabled, the first mode switching circuit 130 cuts off the first output voltage signal 118 to the first switch pair, and the first mode switching circuit 132 cuts the second output voltage. The signal 12o cuts off the path to the second switching circuit 110. When the burn-in test mode signal wbi 4 6 4 is disabled, the first mode switching circuit 丨 3 〇 connects the first output voltage signal 1 to 8 to the first switching source 108. The second mode switching circuit i connects the second output voltage signal 120 to the second switch 110. When in normal mode, the burn-in test mode signal WBI 464 is in a low level. The differential amplifiers 104 and 106 are both activated. The differential amplification state 104 has a PMOS active load 136, PMOS transistors 140 and 142, an NMOS input port, and NMOS transistors 144 and 146. The differential amplifier 106 includes an NMOS active load 138, NMOS transistors 148 and 150, a PMOS input port, and pMOS transistors 152 and 154. The resistors R1 156, R2 158, and R3 160 form a voltage divider circuit 102. The voltage divider circuit 102 is connected to the reference high voltage 116 and the generator output voltage 10 1243472 voltage 462. The voltage dividing circuit 102 is used to generate a first input voltage i2 to input a voltage U4. For example, the reference input voltage i22 is a reference input voltage generated by a band-gap votage reference. The value of Reference Electricity® 122 is higher than or equal to Reference Electricity II

的一半。 WHalf. W

義好的範圍内不會供應或導出電流給產生器輸出電壓 462。此範圍為 當第一輸入電壓U2比參考輸入電壓122低的時候, 第一輸出電壓訊號118位準上升以開啟M〇s電晶體126, 並由高電壓源123供應電流給產生器輸出電壓462。當第二 輸入電壓114高於參考輸入電壓122時,第二輸出電壓訊號 120位準上升以開啟MOS電晶體128,且電流由產生器^ 出電壓462導出到低電壓源124。電壓產生器1〇〇在一個= VCC-(VCC-Vref)*(Rl+R2 + R3)/Ri<VEQ<vcc.(vcc Vr ef)*(Rl+R2 + R3)/(Rl+R2)The defined range will not supply or source current to the generator output voltage 462. This range is when the first input voltage U2 is lower than the reference input voltage 122, the first output voltage signal 118 level rises to turn on the Mos transistor 126, and a current is supplied from the high voltage source 123 to the generator output voltage 462 . When the second input voltage 114 is higher than the reference input voltage 122, the second output voltage signal rises at 120 level to turn on the MOS transistor 128, and the current is derived from the generator ^ output voltage 462 to the low voltage source 124. Voltage generator 100 in one = VCC- (VCC-Vref) * (Rl + R2 + R3) / Ri < VEQ < vcc. (Vcc Vr ef) * (Rl + R2 + R3) / (Rl + R2)

其中VCC舉例來說,是參考高電壓116; Vref是參考 輸入電壓122; R1 156、R2 158以及R3 16〇是分壓電路ι〇2 之電阻。 在上述方程式中,沒有包含製程或元件之參數,所以 電壓產生器1 0 0不依製程而改變。在預燒測試模式中, MOS電晶體126以及128由WBI 464關閉,其中WBI 464 處於高電位狀態。產生器輪出電壓462由測試腳位1 29 強迫輸入。 綜上所述,因為此電壓產生器能依據第一輸入電壓 11 1243472 m、第二輸入電麼114以及參考輸入電壓i22決定產生哭 =電壓Γ之電壓值之範圍,所以此電壓產生器崎 貝貝上%疋之電壓。又因為在傳送第一輸出電廢訊 就U8以及第二輸出電壓訊號12〇之途裎中能加入—第一模 :切換電路13〇以及一第二模式切換電路132,所以電麼產 為⑽在正常模式能夠提供位元線預充電電心及電容 板電壓,在預燒測試模式時能關閉。 雖然本發明已以一較佳實施例揭露如上,然其並非用 =限定本發明’任何熟習此技藝者,在不脫離本發明之精 砷:_,當可作各種之更動與潤,,因此本發明之保 3蔓乾圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 g為讓本發明之上述和其他目的、特徵、和優點能更明 -貝易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: =1 A圖繪示本發明之電壓產生器之方塊圖;以及 第1B圖繪示本發明之電壓產生器之較佳實施例之電路 【几件代表符號簡單說明】 100 :電壓產生器 102··分壓電路 104.第一差動放大器1〇6 :第二差動放大器 :第一切換器 110 :第二切換器 12 1243472 112:第一輸入電壓 114:第二輸入電壓 11 6 ··參考高電壓 11 8 ··第一輸出電壓訊號 120 :第二輸出電壓訊號 122 :參考輸入電壓 123 :高電壓源 124 :低電壓源 126、128 : MOS電晶體 129 :測試腳位Among them, VCC is the reference high voltage 116; Vref is the reference input voltage 122; R1 156, R2 158, and R3 16〇 are the resistors of the voltage dividing circuit ι〇2. In the above equation, there is no process or component parameter included, so the voltage generator 100 does not change depending on the process. In the burn-in test mode, the MOS transistors 126 and 128 are turned off by the WBI 464, where the WBI 464 is in a high potential state. The generator turn-out voltage 462 is forcibly input by the test pin 1 29. In summary, because this voltage generator can determine the range of the voltage value of cry = voltage Γ according to the first input voltage 11 1243472 m, the second input voltage 114, and the reference input voltage i22, this voltage generator Voltage on% 疋. And because it can be added in the way of transmitting the first output electrical waste signal to U8 and the second output voltage signal 120, the first mode: the switching circuit 13 and the second mode switching circuit 132, so the electrical output is ⑽ It can provide bit line pre-charging core and capacitor voltage in normal mode, and can be turned off in burn-in test mode. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention to anyone who is familiar with the art without departing from the essence of the present invention: _, when various changes and modifications can be made, so The warranty 3 of the present invention shall be subject to the definition in the scope of the attached patent application. [Brief description of the drawings] g In order to make the above and other objects, features, and advantages of the present invention clearer and easier to understand, a preferred embodiment is given below in conjunction with the accompanying drawings to make a detailed description as follows: = 1 A shows a block diagram of the voltage generator of the present invention; and FIG. 1B shows a circuit of a preferred embodiment of the voltage generator of the present invention. [Simplified description of several representative symbols] 100: Voltage generator 102 · Voltage divider circuit 104. First differential amplifier 106: second differential amplifier: first switch 110: second switch 12 1243472 112: first input voltage 114: second input voltage 11 6 Reference high voltage 11 8 ·· First output voltage signal 120: Second output voltage signal 122: Reference input voltage 123: High voltage source 124: Low voltage source 126, 128: MOS transistor 129: Test pin

130 :第一模式切換電路 132 :第二模式切換電路 134 : WBIN 136 : PMOS 主動負載 138 : NMOS主動負載 140、142 : PMOS 電晶體 144、146 : NMOS 電晶體 148、150 : NMOS 電晶體 152、154 : PMOS 電晶體 1 5 6 :電阻 1 5 8 :電阻130: first mode switching circuit 132: second mode switching circuit 134: WBIN 136: PMOS active load 138: NMOS active load 140, 142: PMOS transistor 144, 146: NMOS transistor 148, 150: NMOS transistor 152, 154: PMOS transistor 1 5 6: resistance 1 5 8: resistance

160 :電阻 462 :產生器輸出電壓160: resistance 462: generator output voltage

464 :預燒測試模式訊號,WBI 13464: Burn-in test mode signal, WBI 13

Claims (1)

1243472 拾、申請專利範圍 1 · 一種電壓產生器,用於產生一實質上穩定之命 壓,該電壓產生器至少包含: 包 一分壓電路,依據一參考高電壓以及一產生器輪出電 壓產生一第一輸入電壓以及_第二輸入電壓,其中該參考 高電壓高於該第一輸入電壓,該第一輸入電壓高於該第二 輸入電壓,该第二輸入電壓高於該產生器輸出電壓; 一第一差動放大器,依據一參考輸入電壓以及該第一 輸入電壓產生一第一輸出電壓訊號; 第一差動放大器,依據該參考輸入電壓以及該第二 輸入電壓產生一第二輸出電壓訊號; 第一切換器,當該第一輸出電壓訊號為高電位時, 該第一切換器對該產生器輸出電壓提供一高電壓源;以 及 > a 一第二切換器,當該第二輸出電壓訊號為高電位時, 5亥第一切換器對該產生器輸出電壓提供一低電壓源; 其中當該第一輸入電壓低於該參考輸入電壓,該第一 輸出電壓訊號處於高電位狀態使得該產生器輸出電壓增 加;以及 ”田《亥第—輸入電壓高於該參考輸入電壓,該第二輸出 電壓訊號處於高電位狀態使得該產生器輸出電壓降低。 2.如申請專利範圍第丨項所述之電壓產生器,其中 14 1243472 該第一切換器為一 MOS電晶體,該MOS電晶體之閘極連 接於該第一輸出電壓訊號,該MOS電晶體之汲極連接於 該高電壓源,該MOS電晶體之源極連接於提供該產生器 輸出電壓之節點。 3.如申請專利範圍第1項所述之電壓產生器,其中 该第二切換器為一 MOS電晶體,該MOS電晶體之閘極連 接於該第二輸出電壓訊號,該MOS電晶體之源極連接於 邊低電壓源,該M〇s電晶體之汲極連接於提供該產生器 輸出電壓之節點。 含: 如申睛專利範圍第1項所述之電壓產生器 笛—弟一模式切換電路’置於該第一差動放大器以及該 弟一切換器之間,訪馀 w卜 q弟一模式切換電路接收一預燒測試模 八矾就;以及 、 第二切奐電路,置於該第二差動… 式訊號· 一模式切換電路接收該預燒測試模 電路將^ 測試模式訊號致能時,該第-模式切換 路,該第二模式電壓訊號切斷到該第一切換器的通 第二切換電路二換電路將該第二輸出電壓訊號切斷到該 俠电路的通路;以及 當該預燒測試楹 、x汛號失能時,該第一模式切換電路 15 1243472 將該第一輸出電壓訊號連接至該第一切換器,該第二模气 切換電路將該第二輸出電壓訊號連接至該第二切換器、。x 5.如申請專利範圍第1項所述之電壓產生器,其中 該分壓電路至少包含: 一第一電阻,一端連接於提供該參考高電壓之節點; 一第二電阻;以及 點 第二電阻,一端連接於提供該產生器輸出電壓之節 其中該第一電阻、該第二電阻以及該第三電阻依序串 聯,且該分壓電路依據該參考高電壓以及該產生器輸出電 壓以分壓方式產生該第一輸入電壓以及該第二輸入電壓。 6.如申請專利範圍第丨項所述之電壓產生器,其中 該第一差動放大器至少包含: 、 一 PMOS主動負載; 一第一 NMOS電晶體,該第一 NM〇s電晶體之閘極 連接於該參考輸入電壓,該第一 NM〇s電晶體之汲極連 接於該PMOS主動負載;以及 一第二NMOS電晶體,該第二NM〇s電晶體之閘極 連接於該第一輸入電壓,該第二NM〇s電晶體之汲極連 接於該PMOS主動負載。 如申請專利範圍第丨項所述之電壓產生器,其中 16 1243472 該第二差動放大器至少包含: 一 NMOS主動負載; 晶體之閘極 沒極連 一第一 PMOS電晶體,該第一 PMOS電 連接於該參考輸入電壓,該第一 PMOS電晶體之 接於該NMOS主動負載;以及 晶體之閘極 及極連 一第二PMOS電晶體,該第二PMOS電 連接於該第二輸入電壓,該第二PMOS電晶體之 接於該NMOS主動負載。 8 · —種產生穩定電壓的方法,至少包含: 一分壓電路依據一參考高電壓以及—產 _ I生裔輪出雷 壓產生一第一輸入電壓以及一第二輸入電 电 _ 尖具中該夂去 面電壓高於該第一輸入電壓,該第一輸入電 少哼 土人 S冋於該筮- 輸入電壓,該第二輸入電壓高於該產生器輪出電壓· 一 一第一差動放大器依據一參考輸入電壓以及+ ’ # 輸入電壓產生一第一輸出電壓訊號; 第 一第二差動放大器依據該參考輸入電 輸入電麗產生一第二輸出電壓訊號; 及该第二 當該第一輸出電壓訊號為高電位時,— 該產生器輸出電壓提供一高電壓源; 士刀換器對 當該第二輸出電壓訊號為高電位時,— ^產生器輸出電壓提供-低電壓源; 刀換器對 當該第一輸入電壓低於該參 出電壓气辦一+ 電壓時’該第一輪 电H虎處於咼電位狀態使得該 翰 I生态輪出電壓增 17 !243472 力口 ;以及 當該第一輸入電壓南於該參考輸入電壓時,該第—輸 出電壓訊號處於高電位狀態使得該產生器輪出電壓降低^ 藉此,該產生器輸出電壓為一實質上穩定之電壓: 9.如申請專利範圍第8項所述之方法,其中更包含: 提供一 MOS電晶體作為該第一切換器; - 將該MOS電晶體之閘極連接於該第—輸出電壓訊 號; 。 將該MOS電晶體之汲極連接於該高電壓源;以及 將該MOS電晶體之源極連接於提供該產生器輸出 壓之節點。 ” 10·如申請專利範圍第8項所述之方法,其中更包含 提供一 MOS電晶體作為該第二切換 31243472 Patent application scope 1 · A voltage generator for generating a substantially stable life pressure, the voltage generator includes at least: a voltage divider circuit, based on a reference high voltage and a generator output voltage Generating a first input voltage and a second input voltage, wherein the reference high voltage is higher than the first input voltage, the first input voltage is higher than the second input voltage, and the second input voltage is higher than the generator output Voltage; a first differential amplifier that generates a first output voltage signal based on a reference input voltage and the first input voltage; a first differential amplifier that generates a second output based on the reference input voltage and the second input voltage Voltage signal; a first switcher, when the first output voltage signal is at a high potential, the first switcher provides a high voltage source to the generator output voltage; and > a second switcher, when the first switcher When the two output voltage signals are at a high potential, the first switch of the 50H provides a low voltage source for the output voltage of the generator; wherein when the first input voltage Below the reference input voltage, the first output voltage signal is at a high potential state so that the generator output voltage increases; and "Tian" Haidi-the input voltage is higher than the reference input voltage, and the second output voltage signal is at a high potential The state causes the output voltage of the generator to decrease. 2. The voltage generator according to item 丨 of the patent application scope, wherein 14 1243472 the first switch is a MOS transistor, and the gate of the MOS transistor is connected to the first An output voltage signal, the drain of the MOS transistor is connected to the high voltage source, and the source of the MOS transistor is connected to the node providing the output voltage of the generator. 3. The voltage as described in item 1 of the scope of patent application Generator, wherein the second switch is a MOS transistor, the gate of the MOS transistor is connected to the second output voltage signal, the source of the MOS transistor is connected to a low-side voltage source, and the MOS transistor The drain of the crystal is connected to the node that provides the output voltage of the generator. Including: The voltage generator flute as described in the first item of Shenyan's patent scope-Di-mode switching circuit is placed in the Between the first differential amplifier and the switch, the mode switching circuit receives a burn-in test mode, and the second switching circuit is placed in the second differential ... Mode signal. A mode switching circuit receives the burn-in test mode circuit. When the test mode signal is enabled, the first mode switching circuit and the second mode voltage signal are cut off to the second switching circuit of the first switch. The second switching circuit cuts off the path of the second output voltage signal to the Xia circuit; and the first mode switching circuit 15 1243472 connects the first output voltage signal when the burn-in test 楹 and x flood are disabled. To the first switch, the second gas switching circuit connects the second output voltage signal to the second switch. x 5. The voltage generator according to item 1 of the scope of patent application, wherein the voltage dividing circuit includes at least: a first resistor, one end of which is connected to a node providing the reference high voltage; a second resistor; Two resistors, one end of which is connected to a section providing the output voltage of the generator, wherein the first resistor, the second resistor and the third resistor are connected in series in order, and the voltage dividing circuit is based on the reference high voltage and the generator output voltage The first input voltage and the second input voltage are generated in a divided voltage manner. 6. The voltage generator according to item 丨 of the patent application scope, wherein the first differential amplifier includes at least: a PMOS active load; a first NMOS transistor, and a gate of the first NMOS transistor. Connected to the reference input voltage, the drain of the first NMOS transistor is connected to the PMOS active load; and a second NMOS transistor, the gate of the second NMOS transistor is connected to the first input Voltage, the drain of the second NMOS transistor is connected to the PMOS active load. The voltage generator according to item 1 of the patent application range, wherein 16 1243472 the second differential amplifier includes at least: an NMOS active load; the gate of the crystal is not connected to a first PMOS transistor, and the first PMOS transistor Connected to the reference input voltage, the first PMOS transistor is connected to the NMOS active load; and the gate and the pole of the crystal are connected to a second PMOS transistor, the second PMOS is electrically connected to the second input voltage, the The second PMOS transistor is connected to the NMOS active load. 8 · —A method for generating a stable voltage, including at least: A voltage dividing circuit generates a first input voltage and a second input electrical voltage according to a reference high voltage and a production-line lightning pressure The surface voltage is higher than the first input voltage, the first input voltage is lower than the input voltage, and the second input voltage is higher than the generator output voltage. The differential amplifier generates a first output voltage signal according to a reference input voltage and + '# input voltage; the first second differential amplifier generates a second output voltage signal according to the reference input electrical input signal; and the second current When the first output voltage signal is a high potential, the generator output voltage provides a high voltage source; when the second output voltage signal is a high potential, the generator output voltage provides a low voltage. Source; when the first input voltage is lower than the reference voltage, a + voltage is applied, 'the first round of electric H tiger is in a pseudo-potential state, which increases the output voltage of the Han I ecological wheel by 17! 243472 And when the first input voltage is south of the reference input voltage, the first output voltage signal is at a high potential state, so that the generator output voltage is reduced ^ thereby, the generator output voltage is substantially stable Voltage: 9. The method as described in item 8 of the scope of patent application, further comprising: providing a MOS transistor as the first switch;-connecting the gate of the MOS transistor to the first output voltage signal ;. The drain of the MOS transistor is connected to the high voltage source; and the source of the MOS transistor is connected to a node providing the output voltage of the generator. "10. The method described in item 8 of the scope of patent application, further comprising providing a MOS transistor as the second switch 3 將該MOS電晶體之閘極連接 於該第二輸出電壓訊Connect the gate of the MOS transistor to the second output voltage signal. 將.玄MOS電晶體之源極連接於該低電壓源;以及 :該MOS電晶體之汲極連接於提供該產生器輪出電 1.如申請專利範圍第8項所述之方 將-第-模式切換電路置於該第一差動放大器以及 /刀換1™之間,其中該第-模式切換電路接收-預燒 18 1243472 測試模 將 該第二 測試模 當 將該第 當 將該第 以及 當 將該第 當 將該第 式訊號;以及 一第二模式切換電路置於該第二差動放大器以及 切換器之間’其中該第二模式切換電路接收該預声 式訊號; 、& 該預燒測試模式訊號致能時,該第一模式切換電路 一輸出電壓訊號切斷到該第一切換器的通路'; 該預燒測試模式訊號致能時,該第二模式切換電路 二輸出電壓訊號切斷㈣第二切換電路的通路; 該預燒測試模式訊號失能時,該第一模式 一輸出電壓訊號連接至該第-切換器;以及 該預燒測試模式訊號失能時,該第二模式切換 二輸出電壓訊號連接至該第二切換器。 12·如申請專利範圍第8項所述之方法,其中更包人: 將一第一電阻、一第二電阻以及_3 以組合成該分壓電路,其中該第一’串聯 該參考高電壓之節點,該第三電阻於提供 生器輪出電壓之節點;以及 ^連接於提供該產 :二壓電路依據該參考高電壓以及該產 刀壓方式產生該第—輸人電壓以及該第二輸入電壓 13.如申請專利範圍第8項所述 將一 PMOS主動負載、—第 / ,、中更包含: 罘—NMOS電晶體以及— 19 1243472 第二NMOS電晶體組合成該第一差動放大器; 將該第一 NMOS電晶體之閘極連接於該參考輸入電 壓; 將該第一 NMOS電晶體之汲極連接於該PMOS主動 負載; 將該第二NMOS電晶體之閘極連接於該第一輸入電 壓;以及 將該第二NMOS電晶體之汲極連接於該PMOS主動 負載。 14.如申請專利範圍第8項所述之方法,其中更包含: 將一 NMOS主動負載、一第一 PMOS電晶體、一第 二PMOS電晶體組合成該第二差動放大器; 將該第一 PMOS電晶體之閘極連接於該參考輸入電 壓; 將該第一 PMOS電晶體之汲極連接於該NMOS主動 負載; 將該第二PMOS電晶體之閘極連接於該第二輸入電 壓;以及 將該第二PMOS電晶體之汲極連接於該NMOS主動 負載。 20Connect the source of the Xuan MOS transistor to the low voltage source; and: the drain of the MOS transistor is connected to provide the generator wheel to produce electricity 1. The party described in item 8 of the scope of patent application will be- -The mode switching circuit is placed between the first differential amplifier and / tool changer 1 ™, wherein the first mode switching circuit receives-burn-in 18 1243472 test mode And when the first signal is received; and a second mode switching circuit is placed between the second differential amplifier and the switch 'where the second mode switching circuit receives the pre-amplified signal; & When the burn-in test mode signal is enabled, an output voltage signal of the first mode switching circuit cuts off the path to the first switch; when the burn-in test mode signal is enabled, the second mode switching circuit outputs two The voltage signal cuts off the path of the second switching circuit; when the burn-in test mode signal is disabled, an output voltage signal of the first mode is connected to the -switch; and when the burn-in test mode signal is disabled, the second Formula two switching output voltage signal is connected to the second switch. 12. The method as described in item 8 of the scope of patent application, wherein it further includes: combining a first resistor, a second resistor, and _3 to form the voltage dividing circuit, wherein the first 'series is the reference height Voltage node, the third resistor is at the node that provides the output voltage of the generator; and ^ is connected to provide the product: the second voltage circuit generates the first input voltage and the second input voltage according to the reference high voltage and the blade voltage method. The second input voltage 13. As described in item 8 of the scope of the patent application, a PMOS active load, the-/,, and more include: 罘-NMOS transistor and-19 1243472 The second NMOS transistor is combined into the first difference An amplifier; connecting the gate of the first NMOS transistor to the reference input voltage; connecting the drain of the first NMOS transistor to the PMOS active load; connecting the gate of the second NMOS transistor to the A first input voltage; and a drain of the second NMOS transistor connected to the PMOS active load. 14. The method according to item 8 of the scope of patent application, further comprising: combining an NMOS active load, a first PMOS transistor, and a second PMOS transistor into the second differential amplifier; The gate of the PMOS transistor is connected to the reference input voltage; the drain of the first PMOS transistor is connected to the NMOS active load; the gate of the second PMOS transistor is connected to the second input voltage; and The drain of the second PMOS transistor is connected to the NMOS active load. 20
TW93102964A 2004-02-09 2004-02-09 Voltage generator and method for generating stable voltage TWI243472B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI456585B (en) * 2011-11-23 2014-10-11 Faraday Tech Corp Memory apparatus and negative bit-line signal generating apparatus
TWI493530B (en) * 2013-05-31 2015-07-21 Himax Tech Ltd Display system and drive voltage generating device of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI456585B (en) * 2011-11-23 2014-10-11 Faraday Tech Corp Memory apparatus and negative bit-line signal generating apparatus
TWI493530B (en) * 2013-05-31 2015-07-21 Himax Tech Ltd Display system and drive voltage generating device of the same

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