TWI242322B - Low-voltage differential signals (LVDS) transceiver device - Google Patents

Abstract

A low-voltage differential signals (LVDS) transceiver device is provided. A CMFB (common mode feedback) circuitry is utilized in the transmitter to stabilize the common voltage in a pre-defined range. Besides, a regenerative circuit, for example a latch circuit, which provides a positive feedback loop gain is used between a preamplifier and output buffers in the receiver.

Description

1242322 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a transmitter and a receiver, and more particularly to a transmitter and a receiver of a low-voltage differential pair signal. [Previous Technology] Low Voltage Differential Signals (LVDS) is a widely used transmission interface standard that has the advantages of high speed, low power, and resistance to electromagnetic interference. In order to meet the requirements of high-speed data transmission, the IEEE has formulated a new physical layer transmission interface standard. This standard is IEEE Std 1596.3-1996. This standard defines a transmission standard that uses a low voltage swing (minimum 250mV) differential signal, which is also known as a low voltage differential signal. The LVDS transmission interface has the advantages of low voltage swing, high data transmission rate, low power consumption, low cost, low electromagnetic interference and noise immunity. It is the mainstream interface transmission standard widely used in the industry. At present, it is mainly used in display device drivers, telecommunications and network applications, and system applications with high bandwidth requirements. In a system that uses a low-voltage differential signal as a signal transmission standard, the low-voltage differential signal transmitter (lvds T; rmer, lvds τχ) responsible for sending the signal must ensure that the common-mode output voltage of the output signal is within a stable range. . In order to stabilize the low-voltage differential signal transmission :: "The level of the output voltage", the conventional technique is to add two large resistors to the voltage difference between the two output terminals of the low-voltage differential signal transmitter. The common mode voltage is then compared with the reference voltage. ^ ^ Λ, these two resistors will occupy a large area on the layout of the Λ body and cause dispersion.

1242322 V. Description of the invention (2) Heat difficulties. In the current design of the low-voltage differential signal transmitter, the operating speed of the voltage-differential signal transmitter is about 1 Ghz, but the operating speed of the low-voltage differential signal receiver (LVDS Receiver, lvdS Rx) is mostly At 600 ~ 700 MHz, the speed obviously cannot keep up with the low voltage differential signal transmitter. [In the invention, there is a device based on the area of the signal, including current switching, current switching, and switching of the polarity of an input signal. Switching the switch to generate an electric voltage with a common mode negative sfL 3 tiger series makes the current mirror voltage accurate.] Here, the transmitter and the switch are connected, and the low-voltage differential circuit of the present invention is improved. The circuit system receives the current of the mirror when No. _ and the second low-voltage differential circuit operate, and the feedback circuit changes the current when the negative level of the common mode changes. The clear purpose of the receiver is voltage differential. It is proposed to provide a low voltage differential driver to reduce the operation of the low voltage differential receiver. The differential voltage drives a current mirror circuit and a common mode negative to output a low voltage differential signal. The first input signal and a second input signal are used to determine one of the signals. A bias current is correlated with the current. mirror. The feedback bias voltage is used to control the feedback circuit's common-mode negative and then change the fixed-low voltage common-mode voltage. Current mirror The current circuit of the current mirror is low. When the low circuit controls the current, it stabilizes the low voltage differential signal transmission and operates at a speed. The signal transmitter includes: a feedback circuit. number. The current cut-in signal, the differential pair signal system and the current cut circuit are used to change the current. Voltage differential pair voltage differential pair flow mirror circuit, constant output common mode

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According to another object of the present invention, a low-voltage differential pair receiver is provided including a preamplifier and a latch circuit. The pre-amplifier is used to receive and amplify low-voltage differential signals. The latch circuit uses Z to determine the polarity of the low-voltage differential signal amplified by the preamplifier. The interlock circuit includes an interaction surface (Cr0SS-C0Upled) circuit and two current source inverters. The cross-coupling circuit is used to generate a first signal and a second signal according to the polarity of the amplified low-voltage differential signal, and the first signal and the second signal are inverted. The two current source inverters are used to generate a third signal and a fourth signal according to the first signal and the second signal, and the swing of the third signal and the fourth signal is close to the logic level. ~ In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings as follows: ΰ [Embodiment] Please refer to FIG. 1 It shows the system architecture diagram of low voltage differential signal transmission. When the input signal of the low voltage differential signal transmitter 1 0 1 is low state (logic 0), the low voltage differential signal transmitter 1 0 1 will output a pair of low voltage differential signals Voa and Vob, and the signal Voa The voltage is less than the voltage of the signal Vob. Conversely, when the input signal is high (logic 1), the voltage of the signal Voa is greater than the voltage of the signal Vob. After the low-voltage differential signals Voa and Vob are transmitted through Transmission Lines, power loss and phase delay will occur. After it is consumed with the noise generated by the system or other reasons, the signals V i a and V i b will be formed. The signals V i a and V i b are matched via terminals.

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: Π to the two input terminals of the low-voltage differential signal receiver 102. Example ^ ° In a system with a characteristic impedance of 50 Ω, Rterm is 100 Ω :: when the undervoltage is less than the signal Vib voltage, the low voltage differential signal Ϊ Ϊ; the voltage of the driver is low (logic 0) K, When the signal ..., the voltage of the electric voltage 大大 大号 Vib, the output voltage is high (logic 1) ° "month", Figure 2, which shows the low voltage difference according to a preferred embodiment of the present invention The circuit diagram of the dynamic signal transmitter 101. The low-voltage differential pair signal transmitter 101 includes a voltage regulator 201 and a differential voltage driver. The output of the two-voltage regulator 201 does not depend on the temperature within a certain range. As with the stable voltage Vdc of the electric pad, the differential voltage driver 202 uses the stable voltage Vdc as an operating voltage. The voltage regulator 201 can isolate the noise coupled to the power supply of the system. The differential voltage driver 202 includes a current switching circuit, a current mirror circuit, and a common mode negative feedback circuit (CMFB). The current switching circuit is composed of transistors NM201, NM202, NM203 and NM204. The current mirror circuit is composed of crystals PM201, PM203 and NM212. The common mode negative feedback circuit is composed of PM202, NM206, NM207, NM208, NM209, question 210 and NM211. The current switch circuit is used to output a low-voltage differential pair signal composed of the output signals TX-QUT1 and TX-OUT2. The current switches the switch circuit and receives the input signals TX_IN1 and TX_IN2. The input signals τχ—IN1 and TX_IN2 are used to determine the polarity of the low-voltage differential pair signal. Low-voltage differential: The common mode voltage VCM of one of the signals is activated with the current switch circuit.

TW1749F (Youda) .ptd Page 9 " " " " '' '" " —-1242322 V. Description of the invention (5)-One of the bias current 11 is related. The current mirror circuit is used to generate a current mirror current. The bias current 11 is changed with the current mirror current I 2. The common mode negative feedback circuit is used to control the current mirror circuit, and the low voltage differential pair signals (output signals τχ — OUT1 and TX — 0UT2) are fed back to the common mode negative feedback circuit. Among them, when the voltage level of the low-voltage differential pair signals (the output signals TX_OUT1 and TX_OUT2) is changed, the common mode negative feedback circuit controls the current mirror circuit, so that the current of the current mirror 2 changes, and then the bias voltage is changed. The current 11 is to stabilize the output common-mode voltage vcm. In detail, when the input signal TX_IN1 is high and the input signal TX_IN2 is low, the transistors NM202 and NM20 3 are turned on, and the transistors NM201 and NM204 are turned off, so that the output The voltage of the signal TX-0UT1 is greater than the voltage of the output signal τχ —〇UT2; conversely, when the input signal TX_IN1 is low and the input signal τχ_ΙΝ2 is high, the transistors NM2 01 and NM2 04 are turned on, and the transistors NM202 and NM203 are turned on. Off, the voltage of the output signal TX_OUT1 is greater than the voltage of the output signal τχ_〇υΤ2. In this embodiment, the output common-mode voltage VCM conforms to the requirements of the low-voltage differential signal specification by returning the output signals TX-OUT 1 and TX-OUT2 to the common-mode negative feedback circuit '. In a common-mode negative feedback circuit composed of transistors PM202 and NM20 6 to NM211, NM206 and NM207 and NM2 0 8 and NM209 series form two differential pairs to transmit the output signal TX — 0UT1 Compare with TX — 0UT2 and a reference voltage VREF. Assume that when the input signal TX-IN2 is low and the input signal τχ_ΙΝ1 is high, the current flowing through the transistors NM20 2 and NM2 0 3 is I, and the output common-mode voltage veM is as follows:

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Shi 203 (f) The formula Γ 1 \ rk f, Zhongzhong Xie 203 and the factory 7H, serving the sub-paragraphs of 203 Φ means the guide parameter and threshold thirst, the turn R of Pintiguan 203 is the transmission wheel. ⑽ is the aspect ratio of the transistor NM2 0 3, 雷, and τα Equation 7 (1). It can be known that the output common-mode voltage Vcm can be controlled by flowing through the NM202 and the gate 203 = machine I. Therefore, by using the negative feedback characteristic of the common mode negative loop, the common mode voltage can be stabilized. The operation of the common mode negative feedback circuit is as follows: + (1) When the voltage of the output signals TX — 0UT1 and TX — 0UT2 drops When the common-mode voltage VCM of the wheel is smaller than the preset reference voltage VREF, the current 13 flowing through PM201 will be reduced, so that the current mirror current of the current mirror composed of the transistor ρM2 (π, pM2 03 and Li 212丨 2 will also decrease accordingly. In this way, the bias current II flowing through the transistor PM204 and NM20 5 will also decrease, causing the output common-mode voltage VCM to increase. (2) When the voltages of the output signals TX_0UT1 and TX_0UT2 rise, causing the output common When the mode voltage VeM is greater than the preset reference voltage VREF, the current I 3 flowing through the PM201 will rise, causing the current of the current mirror I 2 to rise accordingly. In this way, the bias current 11 flowing through the transistors PM204 and NM205 will also increase. Rising makes the output common-mode voltage VeM fall.

TW1749F (Youda) .Ptd Page 11 1242322 V. Description of the Invention (7) Figure 3 shows a block diagram of a low-voltage differential signal receiver according to a preferred embodiment of the present invention. Illustration. The low-voltage differential signal receiving device 102 includes a pre-amplifier 303 and a latch circuit 300, and a bias circuit 307 and a set of output buffers. This set of output buffers, for example, consists of output buffers 305 and 306. In order to determine the polarity of the low-voltage differential signal and convert it to a logic level, the low-voltage differential signal receiver of this embodiment must first pass the low-voltage differential signal through a fully differential preamplifier 303. Zoom in, and then input it to the flash lock circuit 3 04 to get a signal close to the logic level. The bias circuit 307 includes a bandgap voltage reference 301, an operational amplifier 302, and resistors R1 and R2. The band difference reference circuit 301 provides a stable output voltage that does not drift with temperature and system voltage. This output voltage passes through the operational amplifier 302 connected to a unity-gain buffer, and is divided by resistor R2 and resistor R1. The resulting voltage is used as the bias between the preamplifier 303 and the latch circuit 304. Pressure. Assume that the input signal and ^ — 丨 are the input signals of the low voltage differential signal output from the transmitter via the transmission line and then through the terminal matching resistor 'to the two input terminals of the low voltage differential signal receiver. In order to receive high-speed low-voltage differential signals, the preamplifier 303 must have high-frequency characteristics for high-speed requirements. However, because the relationship between the frequency and gain of the preamplifier 303 is a trade-off relationship ', therefore, in order to obtain high frequency bandwidth, the preamplifier 303 can only obtain very limited gain. However, as long as this gain can

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It is sufficient that the latch circuit 304 is sufficient to perform the discrimination operation. After the input signals RXJN1 and RXJN2 are amplified by the pre-amplifier 303, the signals VP and VN are obtained. The signals VP and VN are input to the flash lock circuit 3 04 ′ and the lock circuit 3 04 will judge the polarity of the signals vp and 0. The positive feedback characteristic of the flash locker 304 can make this signal vp and 0 quickly separated into two signals which are opposite to each other and whose level is close to the logical level. The two output terminals of the latch circuit 304 output signals 33 and 84, respectively. The output buffers 5 and 3 06 receive signals S3 and S4, and generate logic signals out 1 and RX_OUT2 accordingly. Among them, the flash lock circuit 304 is used as a regenerative circuit (Regenerative Circuit). Please refer to FIG. 4 for a detailed circuit diagram of the preamplifier 3 03 in FIG. 3. The pre-amplifier 303 is composed of two operational transconductance amplifiers 401 and 402. The operational transconductance amplifiers 401 and 402 have a positive terminal and a negative terminal, respectively, and are used to receive low-voltage differential pair signals (input signals RX-IN1 and RX-IN2). The positive terminal of the operational transconductance amplifier 401 is coupled to the negative terminal of the operational transconductance amplifier 402, and the negative terminal of the first operational transconductance amplifier 401 is connected to the positive end face of the " first nose transduction amplifier 402. Pick up. These two operational transconductance amplifiers 401 and 402 amplify the low-voltage differential pair signals and convert them into a pair of differential signals VP and VN output. Please refer to FIG. 5, which shows a detailed circuit diagram of the latch circuit 304 in FIG. 3. The latch circuit 304 includes a cross-coupled circuit and two current source inverters. The cross-coupling circuit is composed of transistors NM50 3, NM504, PM503, PM504, PM505 and PM50 6. The first current source inverter consists of transistors PN502, PN507,

TW1749F (Youda) .ptd Page 13 1242322 5. Description of the invention (9) NM502 and NM50 6 are composed, and the second current source inverter is composed of PM501, PM508, NM501 and NM507. The two input terminals L11 and LI 2 of the cross-coupling circuit are used to receive the signals VP and VN, respectively. The cross-coupling circuit is used to generate the signals Sa and Sb according to the polarity of the signals VP and VN, and the signals Sa and Sb are inverted. The signals Sa and Sb are input to two current source inverters, respectively. The two current source inverters generate signals L01 and L02 based on the signals Sa and Sb. The swing range of signal L01 and signal L02 is close to the logic level. Please refer to FIG. 6, which shows the simulation after the low voltage differential signal transmitter of this embodiment is laid out by Taiwan Semiconductor Manufacturing Corporation's 0.25 μm 1P5M CMOS process. Figure 6 shows the output waveform of the low voltage differential signal transmitter when the input is i ghz at three different process corners. Figure 7 shows the simulation of the low-voltage differential signal receiver of this embodiment after the layout of the 0.25 μm 1P5M CMOS process of Taiwan Semiconductor Manufacturing Corporation. Figure 7 shows the waveform when the VDD is 3.3 V and the input is i GHz differential signal. The invention can be applied to flat displays, routers and switches. The data transmission speed of the present invention can reach one billion bits per second, and is an input / output interface circuit conforming to the IEEE STD 15 96 · 3 (LVDS) standard. Make this " low power of the month " C differential 5 ordinary transmitter output voltage and current change in the stable energy within the range specified by the specification, and no need to use; Since the two output terminals of the low-voltage differential signal transmitter of the present invention do not need to add two large resistors to divide the common-mode voltage, the present invention has the advantages of the area of the transmitter. / 、 Name

TW174QR Fangda kntd Page 14 1242322 V. Description of the invention (10) In addition, in the receiver of the present invention, since the transient response of the preamplifier 303 and the flash lock circuit 304 are negative exponential form and positive exponential form, Therefore, the pre-amplifier 303 and the latch circuit 300 are connected in series and have a transmission delay characteristic of 2 so that the receiver of the present invention can meet the high-speed demand. The transmission line has nearly Gbps (Giga bit Per comprehensive As mentioned above, although water I Ming / i ^ ^ 鈇 1 Feida B Mao Mao has been disclosed as above with a preferred embodiment, Asia and Africa are used to limit the present invention, anyone skilled in this art, the spirit and scope of the present invention In this case, it can be used for a variety of purposes: Without departing from the scope of protection of the invention, the scope of patent application attached to the present invention shall be attached by: TW1749F (友 达) .ptd page 151242322

System architecture diagram. Low voltage difference of the preferred embodiment. FIG. 1 shows a low voltage differential signal transmission wheel. FIG. 2 shows a circuit diagram of a comparative signal transmitter according to the present invention. FIG. 3 is a block diagram of a low-voltage differential signal receiver 102 according to a preferred embodiment of the present invention. FIG. 4 is a detailed circuit diagram of the preamplifier 303 in FIG. 3. FIG. 5 is a detailed circuit diagram of the latch circuit 304 in FIG. 3. Fig. 6 shows the simulation of the low-voltage differential signal transmitter of this embodiment after the layout of the 0.25 um 1P5M CMOS process of Taiwan Semiconductor Manufacturing Corporation. Figure 7 shows the simulation of the low-voltage differential signal receiver of this embodiment after the layout of Taiwan Semiconductor Manufacturing Co.'s 0.25 um 1P5M CMOS process. 0 Symbol description 101: Low-voltage differential signal transmitter 1 0 2 : Low voltage differential signal receiver 2 01: Voltage regulator 202: Differential voltage driver 301: With differential reference circuit 302: Operational amplifier 3 03: Pre-amplifier 3 0 4: Latch circuit 305, 306: Output buffer Device

TW1749F (AUO) .ptd page 16 1242322 Simple explanation of the diagram 3 0 7: Bias circuit 401, 402: Operational transduction amplifier Draw __TW1749F (AUO) .ptd page 17

Claims (1)

1242322 Dynamic pair of signal transmitters cm, including ... Six, patent application scope 1 · A low voltage difference-differential voltage drive a current switch switch circuit, used to signal, the current switch switch circuit receives _ ^ f the The low power M differential second input signal, the first input signal and the second second input signal and one determine the polarity of the low voltage differential pair signal, the low ^ = ^ signal is used for an output common mode The voltage is related to the current of the two pairs of signals of the current switch; one of the bias current mirror currents during the work, the bias current mirror circuit is used to generate _ the voltage current changes with the current of the current mirror; And φ Γ · a common-mode negative feedback circuit, which is used to control the current mirror circuit, and the low-voltage differential pair signal is fed back to the common-mode negative feedback circuit; * wherein when the low-voltage differential pair signal When the voltage level is changed, the 2-mode negative feedback circuit controls the current mirror circuit, so that the current of the current mirror is changed, and then the bias current is changed to stabilize the level of the output common-mode voltage 0 2 Scope item 1 Transmitter, the common-mode negative feedback circuit further receives a reference voltage. When the output common-mode voltage is less than the reference voltage, a current flowing through the common-mode negative feedback circuit is reduced, so that the current of the current mirror and the The bias current is reduced to increase the level of the output common-mode voltage; when the output common-mode voltage is greater than the reference voltage, the current flowing through the common-mode negative feedback circuit increases, causing the current mirror current and the bias The voltage current is increased to reduce the level of the output common-mode voltage. 3. The transmitter described in item 1 of the scope of patent application, the transmitter more TW1749F (Youda) .ptd 1242322 6. Scope of patent application Including a voltage regulator for providing a stable voltage, the differential voltage driver uses the stable voltage as a working electric dust. 4. A low-voltage differential pair signal receiver, comprising: a pre-amplifier to receive and amplify the low-voltage differential signal; and a flash lock circuit to determine the low-voltage difference amplified by the pre-amplifier. The latch circuit includes: a cross-coup 1 ed circuit for generating a first signal and a second signal according to the polarity of the amplified low-voltage differential signal, The first signal and the second signal are inverted; and two current source inverters for generating a third signal and a fourth signal according to the first signal and the second signal, the third signal The swing with the fourth signal is close to the logical level. 5. The receiver according to item 4 of the scope of patent application, wherein the receiver further comprises a bias circuit for outputting a stable bias to the latch circuit, the bias circuit includes: A bandgap voltage reference is used to provide an output voltage; an operational amplifier is used to process the output voltage; and a series resistor is used to divide the output voltage processed by the operational amplifier through the series resistor. After pressing, the stable bias voltage is obtained. 6. The receiver according to item 4 of the scope of patent application, wherein the pre-amplifier includes a first operational transconductance amplifier and a second operational transconductance amplifier, each of which has a positive terminal and a negative terminal, and both are used. To receive this low voltage TW1749F (Youda) .Ptd Page 19 1242322 6. Patent application range differential pair signal, the positive terminal of the first operational transconductance amplifier is coupled to the negative terminal of the second operational transconductance amplifier, the first The negative terminal of the operational transconductance amplifier is coupled to the positive terminal of the second operational transconductance amplifier. 7. The receiver according to item 4 of the scope of patent application, wherein the receiver further comprises a set of output buffers, the set of output buffers including a first inverter and a second inverter for Receiving the third signal and the fourth signal and converting the third signal and the fourth signal into a first logic signal and a second logic signal having a high driving load capability, respectively. 8 · —A low voltage differential pair signal transmission system including: a transmitter including: a differential voltage driver including: a current switch circuit for outputting the low voltage differential pair signal 'the current switch The switch circuit receives a first input signal and a second input signal to control the polarity of the low-voltage differential pair signal. One of the low-voltage differential pair signals outputs a common-mode voltage that operates with the current switching switch circuit. A bias current is related to the current; a current mirror circuit to generate a current mirror current, the bias current changes with the current mirror current; and a common mode negative feedback circuit to control the current mirror circuit The low-voltage differential pair signal is fed back to the common-mode negative feedback circuit. When the voltage level of the low-voltage differential pair signal changes, the common-mode negative feedback circuit controls the current mirror circuit so that the The current of the current mirror changes, thereby changing the bias current to stabilize the level of the output common-mode voltage; and a receiver including: 1242322 6. The scope of patent application: a pre-amplifier to receive and amplify the low-voltage differential signal 5 tiger, and a flash lock circuit to determine the polarity of the low-voltage differential signal amplified by the pre-amplifier, the The interlock circuit includes a cross-coupled circuit for generating a first signal and a second signal according to the polarity of the amplified low-voltage differential signal, and the first signal and the The second signal is inverted; and two current source inverters are used to generate a third signal and a fourth signal according to the first signal and the second signal, and the third signal and the fourth signal are Close to logical level. 9. The system according to item 8 of the scope of patent application, the common-mode negative feedback circuit further receives a reference voltage, and when the output common-mode voltage is less than the reference voltage, it flows through one of the common-mode negative feedback circuits. The current is reduced, so that the current mirror current and the bias current are reduced to increase the level of the common-mode voltage 丄 Γ of the wheel; when the output common-mode voltage is greater than the reference voltage, the common-mode negative 2 Γίϊΐ flows, making the The current of the current mirror and the bias current are increased to reduce the level of the output common mode voltage. ιο · —A differential voltage driver, including: a current switching switch circuit, which is used for 钤, the current switching switch circuit receives a low voltage differential input signal, the first input signal and the second The polarity of the second round of input signal and a second low-voltage differential pair signal, the low; the second input signal is used to determine the common mode voltage is related to one of the differential switches of the current switch DIP 2 differential pair; Bias current 1242322 6. Application scope: A current mirror circuit is used to generate a current mirror current, and the bias current is changed with the current mirror current; and a common mode negative feedback circuit is used to control the current mirror circuit The low voltage differential pair signal is fed back to the common mode negative feedback circuit; wherein, when the voltage level of the low voltage differential pair signal is changed, the common mode negative feedback circuit controls the current mirror circuit, The current of the current mirror is changed, and then the bias current is changed to stabilize the level of the output common mode voltage. TW1749F (AUO) .ptd Page 22