1238095 玖、發明說明： 【發明所屬之技術領域】 本發明係關於一種無錯焊料，尤其有關—種表面上被 形成有-銦4或銦纟金層的無錯焊才斗。 【先前技術】 *軟焊是電子產品中最重要之連結技術。焊點品質之良 T ’亦是直接與電子產品之可靠度息息相關。然而基於環 境保護與工業安全之老旦 ^ 、、 之考里，取代傳統錫鉛合金之無鉛焊 科 成為目别電子工章Φ早'^ μ ^ 、菜中最重要之議題。目前最受重視的 …、錯焊料為Sn-Ag-Cu之J£曰命、a u . 之，、日日與近共晶合金。雖然Sn-Ag-cu a金具有良好之性質，铁 貝…、而與傳統之Sn_Pb共晶合金比較， 點南出三十多庚攝洋 又攝氏。而此高熔點之焊料之引進，勢 必引起電子工業在势藉I 士、 、, 隹I耘與成本上之諸多變動。Sn-In共晶焊 :亦為良好之無鉛焊料，而且其相對之熔點亦低。然而因 :銦之價格昂貴’且共晶之Sn_In合金含In量高達一， 仏格過高成為Sn_In焊料在使用上之主要缺點。 g Cu D金除了具有較高熔點之缺點外，值得特別 =意的是其為三元之合金。在近年來電子4之—項重要 ^ 又j重視。奴者技術之演進與高密度 裝之需求’目前之覆晶基板焊料凸塊之製備，已漸從傳 :厚膜印刷技術改變為電鍍之製程。毫無疑問的此三元合 :的电鍍製程’將會成為此技術發展巨大之瓶頸。更令人 擔憂的是最近關於Sn_Cu_Ag的探討中發現，與傳統的 12380951238095 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to an error-free solder, and more particularly to an error-free soldering bucket in which an indium 4 or indium rhenium gold layer is formed on the surface. [Previous technology] * Soft soldering is the most important connection technology in electronic products. The good quality of solder joints T 'is also directly related to the reliability of electronic products. However, based on the research of environmental protection and industrial safety, the replacement of the lead-free soldering department of traditional tin-lead alloys has become the most important issue in the electronic chapter of the industry. At present, the most valued…, the wrong solders are Sn-Ag-Cu's J £, Ming, au. ,, Ri-ri and near-eutectic alloys. Although Sn-Ag-cu a gold has good properties, iron shell ... Compared with the traditional Sn_Pb eutectic alloy, the point is more than 30 hectares and the temperature is Celsius. The introduction of this high melting point solder will inevitably cause many changes in the electronics industry in terms of cost, cost, and cost. Sn-In eutectic solder: It is also a good lead-free solder, and its relative melting point is also low. However, because of the high price of indium, and the eutectic Sn_In alloy contains up to one indium, the excessively high lattice has become the main disadvantage of the Sn_In solder in use. In addition to the shortcomings of the higher melting point of g Cu D gold, it is worth noting that it is a ternary alloy. In recent years, Electronics 4 has become an important item and has been attached great importance. The evolution of slave technology and the demand for high-density packaging ’At present, the preparation of solder bumps for flip-chip substrates has gradually changed from thick film printing technology to electroplating. There is no doubt that this ternary combination: the electroplating process' will become a huge bottleneck for the development of this technology. Even more worrying is the recent discussion on Sn_Cu_Ag found that the traditional 1238095
Sn-Pb合金不同，使用 相種類，對Cu含量：g_Cu谭料時其所生成之介金屬 量之控制須要十八之：之敏感’也即是在製程上對Cu含 易二確。三元合金之電鑛原已十分不 易，在組成上希冀有精準十刀不 ,_ 4更將疋十分之困難。 本^明之一目的即是在 、 高炼點、且電鏟生成不易之難：目V:Ag-Cu焊料之 a ^ n ,, 、 以及若疋採用Sn-In共 曰曰知枓價格將過高之難題。 /、 :發明為在無錯焊料之表面上生長一層銦或銦合全 刊莖丁 η + 仗用電鑛、蒸鍍、印刷、沾 Μ、 生成。此含10之金屬層於焊接之製程十 ^並與上下的母材接觸龍，降溫凝固後形成可靠之 ^點。因為姻的溶點僅為156价，比Μ共晶之峨 更低’焊接將可於較低之溫度下操作。而於焊接之過程中， 姻會與其所包覆的含錫之無錯焊料合金反應，因為Sn_In 之共晶溫度為UOL所以在短暫之焊接時間内，焊料會 形成梯度，但其表面保持為液相，並與基材有良好之潤^ 於焊接之過程中不致於因溶入過多之錫，而產生液相溫度 上升之困擾。目前之相關技術中’並未見到任何相同之辦 法0 已知之應用中有於高鉛焊料外加共晶焊料之作法[Nah et al.，J〇Urnal 〇f Applied Physics, v〇 94〇2)，pp 756〇 7566, 2003]，以降低焊接所須之溫度。韓國漢城大學 of Seoul)之鄭在弼教授則提出，於Sn_3 5wt%Ag之共晶焊 料外，加上Sn-Bi共晶焊料之作法[2〇〇4 TMS annual 1238095 meeting, Charlotte，NC，usA]。與本案相似的部份在於此二 種作法之目的，主要皆在於降低軟焊操作之溫度。然而前 者因係為含鉛之焊料，所以並不符合目前無鉛之趨勢。而 後者則因為含Bi，所以在接點之性質上，並未能跳脫出含 Βι材料於接點脆化之問題。此外則因與朴頗為類似，其 對人類是否會有毒性，則尚屬於未經探討之未知。Different Sn-Pb alloys, the type of phase used, the control of Cu content: g_Cu Tan material produced by the amount of intermetallic metal control must be eighteen: Sensitive ', that is, the process of Cu content is easy to confirm. The ternary alloy of electric ore has been very difficult, and in terms of composition, it is hoped that there is a precise ten knife, _ 4 will be very difficult. One of the objectives of this article is to make it difficult to produce at high refining points and electric shovel: Mesh V: a ^ n of Ag-Cu solder, and, if the use of Sn-In, the price will be over High difficulty. / 、: The invention is to grow a layer of indium or indium on the surface of the error-free solder, and to generate it. This metal layer containing 10 is welded in a process of ^^ and is in contact with the upper and lower parent materials, forming a reliable ^ point after cooling and solidification. Because the melting point of the marriage is only 156 valence, lower than the M eutectic, welding can be performed at a lower temperature. During the soldering process, it will react with the tin-containing solder-free solder alloy it covers. Because the eutectic temperature of Sn_In is UOL, during a short soldering time, the solder will form a gradient, but its surface remains liquid. Phase, and has a good moisturization with the substrate ^ in the soldering process will not be caused by the dissolution of too much tin, causing the problem of rising liquid temperature. In the current related art, 'the same has not been seen. 0 Known applications include the practice of adding eutectic solder to high-lead solder [Nah et al., J〇Urnal 〇f Applied Physics, v〇94〇2) , Pp 75607566, 2003] to reduce the temperature required for welding. Professor Zheng Jae-Hyun of Seoul University of Seoul) proposed that the method of adding Sn-Bi eutectic solder in addition to Sn_3 5wt% Ag [2004 TMS annual 1238095 meeting, Charlotte, NC, usA ]. The part similar to this case lies in the purpose of these two methods, which are mainly to reduce the temperature of the soldering operation. However, the former is a lead-containing solder, so it does not meet the current trend of lead-free. The latter, because it contains Bi, fails to overcome the problem of embrittlement of the Bila-containing material at the contact due to the nature of the contact. In addition, because it is similar to Park, whether it is toxic to humans is unknown.
FuerhaUpter [Fuerhaupter et al·，US532〇272，1994]提出於FuerhaUpter [Fuerhaupter et al., US 5,320,272, 1994]
Sn Bi外鑛上如金之材料薄層，但其目的為改進含則之脆 化問題，與本案之鍍銦與降低操作溫度並不相同。 與銦相關之文獻亦頗多[Krueger et al.，DE3306154, 1984; Weigenetal，Ep〇787818, 1997]，但並無與本發明相 同之技術。IBM 之 Digiacomo Giulio [US6025649, 2000]亦 曰提生成柱狀Sn_Pb焊料，在於焊柱之一端鍍上銦，如此 之、纟。構於迴焊後可生成Pb_Sn-In之接點，以提升其焊點之 耐疲勞性質。此發明之重點在於使用銦較佳之耐疲勞性 貝而且其底材為Sn-Pb之焊料，與本案所提之為降低操 乍/JHL度且底材為無錯焊料之特徵完全不同。本發明因係 利用外鍍銦，而銦具有熔點低、抗疲勞特性佳、以及界面 反應較緩和等多項優點。而且更重要的是，因| In-Sn系 '從、、、屯In到共晶之組成，具有非長寬廣之組成範圍、與非 苇平、、爰的度與組成變化梯度。這將使得本發明可以於軟 知過転中’可以有較寬廣的組成變化操作區間。 除了上述之優點外，奥地利維也納大學之ipser教授， 指出了高錫焊料在低溫下，可能會有灰錫（Un pest)脆化之 1238095 問題[2004 TMS annual meeting，Charlotte，NC，USA]。lpser 指出引進銦於錫中，對灰錫之問題有明顯之改善，這亦會 是鍍銦所引起的優點。本發明鍍銦之濃度梯度焊料得以應 用，與銦是低熔點之金屬，以及Sn_In之共晶區域寬廣平 緩直接相關。Tamura 與 Murayam [Jp2〇〇1219267, 2⑻”於 年開為了以一道電鍍（Sn-In及Sn-Bi)之程序以製傷 Sn-In-Bi基之焊料。然而此目的為製備三元合金，與本發 明為利用In之低熔點及Sn_In之共晶區域寬廣平緩之特性 無關。無絡焊料已勢在必行，而隨著覆晶技術之漸成主流， 間距之縮小已使得電鍍技術成為必要，本發明具有立即商 業上應用之利基。 η q η分j 八本發明在含錫之無鉛焊料之表面上形成一銦層或銦 二層，此銦或銦合金層可以使用電鍍、蒸鍵、印刷、沾 ，不同之方法生成。此含銦之金屬層於焊接之製程中 蛐’：潤溼與其接觸的基材及該無鉛焊料，降溫凝固後 2可罪之:)：干接點。因為銦的熔點僅為i56.6〇c，比 之183 C更低’焊接將可於較低之溫度下操作。而於 ，過私中’銦會與該含錫之無鉛焊料合金反應形成_ 區因為Sn~In之共晶溫度為12〇〇c，所以在短暫之焊 、間内’含銦之無錯焊料會形成梯度，但其表面保 相，並與基材有良好之潤澄。 馬 本發明因係利用Μ 用外鍍銦，而銦具有熔點低、抗疲勞 ί238〇95 个生杜 、以及界面反應較緩和等多項優點。而且更重要的是， 為1n-Sn系統從純Ιη到共晶之組成，具有非長寬廣之組 _JL> ^ 乾圍、與非常平緩的溫度與組成變化梯度。這將使得本 毛明可以於軟焊過程中，可以有較寬廣的組成變化操作區 間’於焊點形成濃度梯度。 【貫施方式】 本么月揭示一種連接兩基材的軟焊接點，至少包含： 附著於一第一基材的一表面上的一無鉛焊料層，該無 鉛焊料包含錫且實質上不含鉛； 、、、口 口於第一基材的一表面上的一含銦層，該含 為銦或熔點低於該無鉛焊料的銦合金；及 連接該無錯焊料層及該含銦層的梯度層，該梯度層具 有-沿該無錯焊料層向該含銦層方向改變的銦含量，且該 梯度層包含該無料料層與該含銦層的液相反應產物。 本各月亦揭示一種軟焊兩基材的方法，包含下列步驟： a)準備一具有含銦層無錯焊料點的第一基材，其中該含 姻層無錯焊料點包含一附著於該第一基材的一表面上 的，、、、乱焊料層及一附著於該無錯焊料層的含姻層，該 無錯焊料包含錫且實質上不含錯，及該含銦層為銦或 熔點低於該無鉛焊料的銦合金； b) 將該第-基材的該表面接觸 且加熱該含銦層無鉛焊料點 該含銦層和該無鉛焊料層蓋 一第二基材的一表面，並 ’使得該含銦層熔融，及 生一液相反應；及 1238095 c)冷卻介於該第一基材與第二基材的兩表面之間的焊料 點’於疋結合5亥第一基材與該第二基材。 較佳的，本發明方法步驟a)中的含銦層無鉛焊料點係 藉由電鍍、蒸鍍或印刷一無鉛焊料層於該第一基材的表面 上及電鍍、蒸鍍或印刷一含銦層於該無鉛焊料層上而形 成。更佳的，該含銦層係被電鍍於該無鉛焊料層上。 較佳的，該無鉛焊料為錫。 較佳的，該無鉛焊料為錫合金。更佳的，該錫合金為 Sn-Ag，Sn_Cii 或 Sn-Ag_Cii 合金。 較佳的，該含銦層為錮。 較佳的，該軟焊接點具有小於49重量％的銦，以該軟 焊接點的總重量為基準’以小於30重量％的銦為更佳：人 本發明可藉下列實施例被進一步 用於％ 〆啄解該專貫施例僅 用於说明，而非用於限制本發明範 實施例一： 於硫酸銦之酸性電鍵液使用 電流衆疮馬陽極 又 A/dm及40°c，在錫基材之表面進行铲銦 經過1小時之眭„铋π w琨仃鍍銦 …夺間後，可以得到均勾的銦層 如圖1所示。 υ μιη与 實例—· 以類似於實施例一 之迴¥。銦層之厚度為 的鍍銦錫基材，與鎳基材進行170oc 5〇〇_ ’迴焊時間為2分鐘。結果 1238095 良好之接點。在銦與錫之接觸面上，顯示有液相反應 之口P份。除了銦於焊 ^ 〜接過Μ為液相外’亦可以見到部份 在：解’以及固化後之多相區。此固化後之多相區， 2之二固Γ前為包含液相及界面反應生成相之區域。如圖 、相妝片所示，多相區域約為8〇 μιη。 實施例三： 、」類似於實施例-的鍍銦錫基材，與鋼基材進行 之迴焊。銦層之厚度為500 μηι，迴焊時間為5分鐘。結 生成良好之接點。在銦與錫之接 、° 之部份。除了銦於焊接過程中為、夜心^有❹反應 々n、 甲馮，夜相外，亦可以見到部份 之錫被溶解，以及固化後之多 扃l门 匕便之夕相£。此固化後之多相區， 在^固化前為包含液相及界面反應生成相之區域。其多 相區域約為8 Ο μηι，如圖3所示。 實施例四： 170QC之迴焊。銦 。結果生成良好之 以鍍銦之錫銀基材，與鎳基材進行 層之厚度為500 μπι,迴焊時間為2分鐘 接點。 實施例五： 進行i7〇°c之迴焊。銦 分鐘。結果生成良好之 以鍍銦之錫銀基材，與銅基材 層之厚度為500 μπι，迴焊時間為2 接點。 1238095 實施例六： ”碌卷材進杆 、 銦層之厚度為500 μιη，迴焊時間為 之迴焊。 之接點。 、刀鐘。結果生成良好 實施例七： 以鍍銦之錫銀銅基材，與銅基材進行17以之迴卜 銦層之厚度為_ μιη，迴焊時間為干 之接點。 、-果生成良好 【圖式簡單說明】 圖1為依本發明實施例一所完成的鍍銦錫基材的剖面 之光學顯微鏡金相照片。 圖2為依本發明實施例二所完成的鍍銦錫基材與鎳基 材的焊接點的剖面的光學顯微鏡金相照片。 圖3為依本發明實施例三所完成的鍍銦錫基材與鋼基 材的焊接點的剖面的光學顯微鏡金相照片。 12A thin layer of gold-like material on the Sn Bi outer ore, but its purpose is to improve the embrittlement problem, which is different from the indium plating and lowering the operating temperature in this case. There are also many literatures related to indium [Krueger et al., DE3306154, 1984; Weigenetal, Ep 0787818, 1997], but there is no technology similar to the present invention. IBM's Digiacomo Giulio [US6025649, 2000] also refers to the production of columnar Sn_Pb solder, which is plated with indium at one end of the solder post. The structure can generate Pb_Sn-In contacts after reflow to improve the fatigue resistance of the solder joints. The focus of this invention is to use the better fatigue resistance of indium and the solder whose substrate is Sn-Pb, which is completely different from the characteristics mentioned in this case for reducing the handling / JHL degree and the substrate is error-free solder. The present invention uses external indium plating, and indium has many advantages such as low melting point, good fatigue resistance, and moderate interface reaction. And more importantly, because | In-Sn is composed of from ,,, and In to the eutectic composition, it has a non-long and wide composition range, and the gradient of the degree and composition change of non-reed, flat, and tritium. This will allow the present invention to have a wider composition change operation interval in the software. In addition to the above advantages, Professor Ipser of the University of Vienna, Austria, pointed out that at high temperatures, high tin solders may have the problem of embrittlement of gray tin (Un pest) 1238095 [2004 TMS annual meeting, Charlotte, NC, USA]. lpser pointed out that the introduction of indium in tin will significantly improve the problem of gray tin, which will also be an advantage caused by indium plating. The application of the indium-plated concentration gradient solder of the present invention is directly related to the wide and gentleness of indium as a low-melting metal and the eutectic region of Sn_In. Tamura and Murayam [Jp2001219267, 2⑻ "was opened in the year in order to use a process of electroplating (Sn-In and Sn-Bi) to damage Sn-In-Bi based solder. However, the purpose is to prepare ternary alloys, It has nothing to do with the invention is to use the low melting point of In and the broad and gentle characteristics of the eutectic region of Sn_In. Non-contact solder is imperative, and as the flip-chip technology becomes mainstream, the reduction of the pitch has made the plating technology necessary The invention has a niche for immediate commercial application. Η q η 分 j Eight The invention forms an indium layer or two layers of indium on the surface of a lead-free solder containing tin, and the indium or indium alloy layer can be electroplated or evaporated , Printing, dipping, different methods. This indium-containing metal layer is used in the soldering process: 'wetting the substrate in contact with it and the lead-free solder, 2 guilty after cooling and solidifying :): dry contact. Because the melting point of indium is only i56.6 ° c, which is lower than 183 C, soldering can be operated at a lower temperature. However, in private, 'indium will react with the tin-containing lead-free solder alloy to form _ Since the eutectic temperature of Sn ~ In is 12Oc, "Inside, the indium-free solder containing indium will form a gradient, but its surface is phase-preserving and has a good moisturization with the substrate. The present invention is based on the use of external plating of indium, which has a low melting point and fatigue resistance. There are many advantages such as 238,095 biodegradable compounds, and a relatively mild interface reaction. What's more important is that the composition of 1n-Sn system from pure Ιη to eutectic has a non-long and broad group _JL > ^ Qianwei, and Very gentle gradient of temperature and composition change. This will allow Ben Maoming to have a wider composition change operation interval during the soldering process to form a concentration gradient at the solder joint. [Method of implementation] This month reveals a connection The soft solder joints of the two substrates include at least: a lead-free solder layer attached to a surface of a first substrate, the lead-free solder including tin and substantially free of lead; An indium-containing layer on one surface, the indium alloy being indium or a melting point lower than the lead-free solder; and a gradient layer connecting the error-free solder layer and the indium-containing layer, the gradient layer having-along the error-free Indium in which the solder layer changes in the direction of the indium-containing layer Content, and the gradient layer includes a liquid phase reaction product of the material-free layer and the indium-containing layer. This month also discloses a method for soldering two substrates, including the following steps: a) preparing an indium-containing layer without errors The first substrate of solder dots, wherein the fault-free solder-containing solder dots include a solder layer attached to a surface of the first substrate, a random solder layer, and a solder-containing solder attached to the fault-free solder layer. Layer, the error-free solder contains tin and is substantially free of errors, and the indium-containing layer is indium or an indium alloy having a melting point lower than that of the lead-free solder; b) contacting the surface of the first substrate and heating the indium-containing Layer of lead-free solder spot, the indium-containing layer and the lead-free solder layer cover a surface of a second substrate, and 'make the indium-containing layer melt and generate a liquid phase reaction; and 1238095 c) cooling between the first substrate The solder dots between the two surfaces of the substrate and the second substrate combine the first substrate with the second substrate. Preferably, the lead-free solder spot of the indium-containing layer in step a) of the method of the present invention is by plating, evaporation or printing a lead-free solder layer on the surface of the first substrate and plating, evaporation or printing of an indium-containing solder. A layer is formed on the lead-free solder layer. More preferably, the indium-containing layer is plated on the lead-free solder layer. Preferably, the lead-free solder is tin. Preferably, the lead-free solder is a tin alloy. More preferably, the tin alloy is a Sn-Ag, Sn_Cii or Sn-Ag_Cii alloy. Preferably, the indium-containing layer is rhenium. Preferably, the soft solder joint has less than 49% by weight of indium, and based on the total weight of the soft solder joint, it is more preferable to use less than 30% by weight of indium. The present invention can be further used in the following examples: % This solution is only used for illustration, but not for limiting the first embodiment of the present invention: The current used in the indium sulfate acid bond solution is A / dm and 40 ° C. After removing indium on the surface of the substrate for 1 hour, bismuth π w 琨 仃 indium plating ... After the interval, the uniform indium layer can be obtained as shown in Figure 1. υ μιη and Example— · Similar to Example 1 Return ¥. The thickness of the indium layer is an indium-tin-plated substrate, and the 170 ° 500__ reflow time with the nickel substrate is 2 minutes. The result is 1238095. Good contact. On the contact surface of indium and tin, Shows the P part of the liquid phase reaction. In addition to the indium in the welding phase ^ ~ after taking M as the liquid phase, you can also see a part in: solution and the multiphase region after curing. The multiphase region after curing, 2 bis before solid Γ is a region containing liquid phase and interfacial reaction formation phase. As shown in the picture and the phase makeup sheet, the multiphase region The domain is about 80 μm. Example Three: "" Similar to Example-the indium tin-plated substrate, and re-welded with the steel substrate. The thickness of the indium layer is 500 μηι, and the reflow time is 5 minutes. The knot produces good contacts. At the junction between indium and tin, °. In addition to the indium during the welding process, there is a ❹ reaction in the night heart, 々n, Jia Feng, and the night phase. It can also be seen that some of the tin is dissolved and the solidified phase. The multi-phase region after curing is a region containing a liquid phase and an interfacial reaction formation phase before curing. Its polyphase region is about 80 μηι, as shown in Figure 3. Example 4: 170QC reflow. Indium. As a result, an indium-plated tin-silver substrate was formed, the thickness of the layer with the nickel substrate was 500 μm, and the reflow time was 2 minutes. Example 5: Re-soldering at i70 ° C. In minutes. As a result, an indium-plated tin-silver substrate was formed with a thickness of 500 μm and a copper substrate layer, and the reflow time was 2 contacts. 1238095 Example 6: "The thickness of the coiled rod, the thickness of the indium layer is 500 μm, and the reflow time is the time for re-soldering. The contact point. The knife clock. The result is a good example. The thickness of the substrate is 17 μm with the copper substrate. The thickness of the indium layer is _ μιη, and the reflow time is dry. The results are good. [Schematic description] Figure 1 is a first embodiment of the present invention. Optical microscope metallographic picture of the cross section of the completed indium tin-plated substrate. Figure 2 is an optical microscope metallographic picture of the cross section of the welding point of the indium tin-plated substrate and nickel substrate completed according to the second embodiment of the present invention. FIG. 3 is an optical microscope metallographic photograph of a cross section of a welding point between an indium tin-plated substrate and a steel substrate completed according to the third embodiment of the present invention.