TWI237436B - Switching DC-to-DC converter with multiple output voltages - Google Patents

Abstract

A switching DC-to-DC converter includes multiple power supply channels, coupled in parallel between a DC voltage source and a ground, for converting the DC voltage source into multiple DC output voltages that are separate from each other. An oscillator outputs multiple oscillating signals to render at least one switching transition of each of the multiple power supply channels occur differently in time from those of others of the multiple power supply channels, thereby improving transient noise. The multiple oscillating signals include two triangular wave oscillating signals with a phase difference of 180 degrees and two pulse oscillating signals with a phase difference of 180 degrees. Rising edges of the two pulse oscillating signals occur simultaneously with either a peak or a valley of the two triangular wave oscillating signals, respectively.

Description

1237436 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to a switching DC-to-DC converter, and more particularly to a switching DC-to-DC converter, which is provided with multiple power supply channels to provide evening output voltage. It can improve the transient noise caused by power switching transistors. The multiple power supply channels can all use voltage branch feedback control or some channels use voltage mode feedback control and the other channels. Adopt current mode feedback control. [Previous technology] Typically, switching DC-DC converters adjust the DC voltage source to a DC input voltage with the desired voltage level by appropriately controlling the work cycle of the power knife for the sun and the sun. . In the case where the voltage level of the DC output voltage is greater than the voltage level of the DC voltage source, these switches = DC to DC converters may be collectively referred to as boost converters or boost regulators. In cases where the level is lower than the voltage level of the DC voltage source, these switching DC-to-DC conversions are collectively referred to as a buck converter or a buck regulator. In order to ensure the stability of the DC output voltage, the switching DC-DC converter is usually provided with a feedback circuit, which is typically divided into a voltage mode u ^ 8 and a current mode feedback. In the voltage mode feedback, the feedback circuit captures a certain ratio of the output voltage of the gaffa and the electric straight line to generate the feedback signal. In the current mode and the electrical error type, the feedback circuit uses a series resistor to sense the magnitude of the inductor current and bury it to generate a feedback signal. In addition, the current mode feedback circuit can also capture a certain ratio of the DC wheel output voltage for 1237436 to perform the slope compensation function. In most of today's electronic system products, — a variety of functional modules (Funetl 1 MGdule) hanging ”, and 5 various operations and results. For example, digital phase) machine System device, backlight module, image sensor, number: place: li;-, ^, electronic system products that process the combined image of Li, memory, etc. to achieve digital image capture, storage In the example of a digital camera, the liquid crystal display " moonlight module, image sensor, digital virtual ^. Two Ikis + digital processing state, and memory are all ::: power supply can perform the desired operation It is not the same as the functional long-distance medium lightning in the electronic system products, 7? __ # 弋 various functions of the wedge group required DC is not the same ^ that is, each is designed to operate under the direct current 2 voltage. Because electronic system products usually only have a single DC voltage .. (,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, must ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, to: • Switch states in order to supply a plurality of DC outputs, which are different from each other: Switching DC-DC converter integrated in single-chip Wafers are used to reduce packaging and wiring processes to achieve low cost / J, size, and reduce parasitic capacitance and inductance. IS Hit The original multiple switch DC-DC converters have been converted into this integrated single integrated circuit chip. There are a plurality of power supply channels. The plurality of power supply channels are connected in parallel between a common DC power source and the ground, and / or have separate output terminals' for supplying a plurality of mutually different DC output voltages. ® 1 (a) shows a circuit block diagram of a conventional switched DC-to-DC converter 10 with multiple output voltages. Refer to the figure ^ ⑷ 'switched DC 1237436 to DC converter 10 with four power supply channels 11A to UD To convert a single DC voltage source VSQurce (shown in Figure Vb) into four DC output voltages V () utl to VQut4. The power supply channel 丨 A includes a switching controller 12A and a conversion circuit 13A A power switching transistor 15A and a feedback circuit 14A are provided. The power switching transistor 15A is a pulse width modulation (Pulse-Wi) output by the switching controller 12A. dth-Modulated (PWM) control signal PWM1 is driven. The duty cycle of the PWM control signal PWM1 determines the voltage level conversion relationship between the DC voltage source vs〇urce and the DC output voltage V (> utl. In other words, at a fixed Under the condition of the voltage source __, various DC output voltages vQutl can be obtained by appropriately adjusting the duty cycle of the PWM control signal PWM1. In addition, the switching controller 12A receives the feedback signal generated from the feedback circuit 14A Fm, and adjust the pwM control signal PWMi to make the jade loop, so that the DC output% is maintained at a stable u value. 0 The power supply channel 13B 'is provided with a power switching transistor 15B and a feedback circuit 14B. The power switching transistor is driven by a PWM control signal PWM2 output from the switching control stomach. The working cycle of the pwM control signal request determines the level conversion relationship between DC_V—and DC output V_2. The switching control ϋCa # receives the feedback signal FB2 generated from the feedback circuit _, and adjusts the control signal of Satoshi, and the working cycle ′ keeps the DC wheel output $ V_2 at a stable value. The power supply channel 11C includes a switching controller and a conversion circuit Be. 1237436 is provided with a power switching transistor 15C and a feedback circuit degree. Power "M15C" is driven by switching pwM control = No. PWM3 output by switching controller, 12c. The duty cycle of the pWM control signal pwM3 determines the voltage level conversion relationship between the direct voltage source Vsource and the DC output voltage. The switching controller 12C receives the slave feedback circuit M. The generated = feedback signal FB3, and the working cycle of adjusting the pWM control signal pwM3… keeps the direct output voltage VeUt3 at a stable value. The power supply is connected to the switching controller 12D, a conversion circuit 丨 3D, which is provided with a 15D rate changer and a feedback circuit. The power switching circuit 15D is driven by the PWM control signal PW ^ 4 output by the switching controller and 12D. The duty cycle of the PWM control signal PWM4 determines the switching relationship between the voltage level between the DC voltage source Vsource and the DC output voltage V— Switching controller 丨 2D receives the feedback from the feedback circuit 1 and then bluffs FB4, and adjusts pWM The duty cycle of the control signal pwM4 maintains the DC output voltage v0ut4 at a stable value. The oscillator 16 outputs a pulse signal pULSE1 and a ramp signal RAMpi = the switching controller 12A. The rising edge of the pulse signal PULSE1 and the falling edge of the ramp wave P 1 occur simultaneously. The pulse signal PULs1 is set (S is called the switching controller, 12A, which causes it to generate the j-rising edge of the PWM control signal PWM1, and then turns on the power switching transistor 15A. The ramp signal RAMP1 and the feedback signal FBI determine the S The occurrence of the falling edge of the PWM control signal PWM1, and then turn off (Turn Off) the power switching transistor 15A oscillates 16 and outputs the pulse signal PULSE2 and the ramp signal RAMP2 to the switching controller 12B. The rising edge of the pulse signal puLSE2 1237436 and the ramp The falling edges of the signal RAMP2 occur simultaneously. The pulse signal PULSE2 sets the switching controller 12B to generate the rising edge of the PWM control signal PWM2, and then turns on the power switching transistor 15B. The ramp signal RAMP2 and the feedback signal FB2 determine the PWM control The falling edge of the signal PWM2 occurs, and the power switching transistor 1 5B is turned off. The oscillator 16 outputs the pulse signal PULSE3 and the ramp signal RAMP3 to the switching controller 12C. The rising edge of the pulse signal PULSE3 and the ramp signal RAMP3 fall The edges occur simultaneously. The pulse signal PULSES sets the switching controller 12C so that it generates the rising edge of the PWM control signal PWM3, Then the power switching transistor 15C is turned on. The ramp signal RAMP3 and the feedback signal FB3 determine the occurrence of the falling edge of the PWM control signal PWM3, and then the power switching transistor 15C is turned off. The oscillator 16 outputs the pulse signal PULSE4 and the ramp wave. The signal RAMP4 goes to the switching controller 12D. The rising edge of the pulse signal PULSE4 and the falling edge of the ramp signal RAMP4 occur at the same time. The pulse signal PULSE4 sets the switching controller 12D to cause the rising edge of the PWM control signal PWM4 to turn on the power The switching transistor 15D. The ramp signal RAMP4 and the feedback signal FB4 determine the occurrence of the falling edge of the PWM control signal PWM4, and then the power switching transistor 15D is turned off. Referring to FIG. 1 (b), the power supply channels 11A to 11D are connected in parallel with each other. The DC voltage source VSQUrce is connected to the ground. Specifically, the power supply channels 11A to 11D are connected in parallel between the DC voltage source VSQUrce and the ground through the connection wiring. As a result, there are DC voltage source VSQUree and the power supply channels 11A to 11D respectively. Connect the parasitic inductance Lw caused by the wiring. Similarly, in the 1237436 source supply channel 1 1 A to 1 1 D and ground There are also parasitic inductances Lw caused by the connection wiring between the surfaces. In the operation of the power supply channels 丨 丨 a to π d, the power switching transistors 15A to 15D in the conversion circuits 13A to 13D are periodically switched, thereby The voltage conversion function is achieved. Due to the presence of the parasitic inductance Lw, whenever any of the power switching transistors 15A to 15D performs a switching transition, noise caused by a transient spike (Transient Spike) is generated. FIG. 1 (c) shows waveform timing diagrams of the pulse signals PULSE1 to PULSE4 and the ramp signals RAMP1 to RAMP4 generated by the conventional oscillator 16. As shown in Fig. 1 (c), the pulse signals puLSE1 to puLSE4 have the same waveform and phase with each other, and the ramp signals RAMpi to RAMp4 have the same waveform and phase with each other. Therefore, the oscillator 16 actually only needs to produce a single pulse signal and a single ramp signal, and then supply them to the switching controllers 12A to ud of the four power supply channels 11A to UD at the same time. In this prior art, the circuit configuration of the oscillator 6 is quite simple, with the advantages of small size and low cost. However, the pulse signals PULSE1 to PULSE4 in the same phase set the switching controllers 12A to 丨 at the same time, so that the power switching transistors 丨 5A to 丨 5B are switched at the same time. As a result, the transients caused by the work and switching transistors 15A to 15B are superimposed on each other. Therefore, there is a considerable = transient noise between the DC voltage source and the ground, which makes the quality of the DC output voltages v0uti to v_4 bad: and it is easy to cause damage to the power supply channels 11A to 11D. "[Summary of the Invention] 9 1237436 has the above-mentioned problems. One of the objectives of the present invention is to provide a type of straight μ to DC converter with multiple output voltages, which can avoid transient spikes caused by multiple and source supply channels. Superimposed to achieve relatively low: the operation of transient noise. Another object of the invention is to provide a switching DC-DC converter with multiple output voltages, which can be achieved by using a configuration device: The advantages of small size and low cost. According to one aspect of the present invention, a switching DC to DC conversion is provided to include:-the first power supply channel, which is consumed by the DC voltage source = ground = 1 to The DC voltage source is converted into a first DC output ^ a power supply channel, which is coupled to the DC voltage source and the ground,-for converting the DC voltage source into-a second DC output voltage, and the side output DC voltage Is separated from the first DC output voltage; and = Shenger is used to output a first vibration surplus signal with a first period to 'a :: supply channel, and is used to output With-the second period-Bu Qiu a power supply channel, where: in the mother of the first period: the period, the first _ number has a wave peak, a wave valley,, up: wide: knife 'from the wave valley Gradually increasing to the peak, and a decreasing part of the second t peak gradually reducing to the trough, so that the first power supply through the second and eighth disk: a switching transition occurs between the first rising part of the first oscillation signal and the falling part Within the range of time covered; and at each of the 4 cycles, t does not have edges, but instantaneous gates. The second oscillation signal has the edge of a momentary transition, and the edge of the trough is temporarily moved. Zhenying said that the wave peak and the same% occur, which makes the second power supply channel 10 I237436 switching change occur at the same time as the edge of the instantaneous change. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The channel belongs to the corresponding channel, and the first electric power supply channel is a pull-type power supply channel. The younger-power supply channel belongs to the current-mode power supply: ::: ground, and the first-oscillation signal is a triangular-wave oscillation signal. Ground 'the second oscillating signal -Pulsing oscillation signal: each period of a cycle is shifted at the child's labor, a pulse sore „-falling edge, and the second„ signal ::, and refers to the rising edge. && amp The moving edge system preferably outputs the first auxiliary signal to the source supply channel, J: & > 筮,. / The first electric-rising part and a falling edge, so that the falling edge :::: The edges of the instantaneous transition with oscillating signals occur at the same time. ',' ~, Μ The first line of electricity: Γ = The second power supply channel uses the -secondary signal to perform electrical / melon feedback. Compensation for the slope of the control. The car is a good, switchable DC to DC converter, and also includes a # 1 power supply channel, coupled to the DC voltage, and the DC voltage source is changed to Α 帛 一 古, ... The voltage used to transfer the voltage is separated from the second direct current output of 料 —material Dishan 4 ... Hildi and the direct output voltage, among which Zhenyi Yi output more than one thunder, Ma Zhengyi with a third cycle , S coin-Zhensheng No. to the first-power supply t, should pass; in the first In each period of the cycle, the oscillating signal has a crest, a trough, a top / per person, and the vibration increases to 哕, 珞, and gradually decreases from the trough, /, q, and a falling portion from the peak to Xi valley 'causes the peak system of the third oscillation signal and the / wave of the first oscillation signal 11 1237436 to occur on the same date; and the valley system of the third oscillation signal occurs simultaneously with the 4 peaks of the third oscillation u; And the migration of the third power supply channel to / swordsmanship occurs within the time range covered by both the rising portion and the falling portion of the third oscillating signal. Compared with the "the third vibration signal is the anti-belief of the first vibration signal, the blade-changing DC-DC converter further includes: a fourth electric μ IC is coupled between the DC voltage source and the ground, Used for conversion: The direct voltage source becomes a fourth DC output voltage, and the fourth DC output power is separated from the first and the second DC output voltages, wherein the output of the vibrator is-篦 叩 彳Liang Gan from the fourth cycle of a fourth oscillation signal to the fourth power supply channel; at each period of the fourth cycle, the fourth vibration surplus tiger has the edge of a momentary transition, in which the momentary transition The edge system of 4 and one of the peak and the valley of the first oscillation signal simultaneously send σ / fourth oscillation. 5 The edge of the transient transition and the second oscillation signal: 4 between the edge of the transient transition. There is a predetermined time offset; and: at least one switching transition of the fourth power supply channel and the fourth oscillation. The edge of the instantaneous transition occurs simultaneously. Preferably, the predetermined time offset is the first Half of the second cycle. The 5th oscillating signal is a pulse exhaustion signal. In each period of the first: period, it has a rising edge, -pulse width, and falling edge, edge n. The edge is the rising edge. ', Preferably, the vibrator further outputs a second auxiliary signal to the fourth electric 12 1237436 :, a supply channel, wherein the second auxiliary signal is connected to a falling edge. So that the edge of the falling edge two to four; the edge of the instantaneous change of the 5th of l occurs simultaneously. Eighth preferably, the fourth power supply channel is compensated by the slope of the second flow mode feedback control. Q & According to another aspect of the present invention, a "shock device" is provided, including:-a device for reading out a device having a -first period of the _first_ period, for outputting a device having the second period —Second ^ / and Medium: In each of the first cycle, the second ^, its peak, one trough, one up to eight n 丄, \ swing h has one, and -decreasing neighboring eight: & lt °° The wave gradually increases to the crest, the mother-cycle of the brother-cycle, and the second Edge, wherein the _f1 _ 1Μ A σ I /, a moment changes both the peaks and the troughs of which - occur simultaneously. Zhenfu ... Auntie, preferably, the first oscillating signal is a _, preferably, the second oscillating signal is a pulse: the number is in each period of the-cycle, with a rising edge, at the first: The falling edge and the second oscillating signal should be: ==, and the rising edge should be the same. 1 The edge system of the transition is preferably, the oscillator further comprises: a device auxiliary signal, wherein the first auxiliary is used to output-the first-rising part and-the falling edge, = the falling = oscillating signal has an oscillating signal The edges of this instantaneous change occur simultaneously. The relationship between the fate and the second oscillator is better. The exhaustor further includes: a device for outputting a third oscillator i signal having a second period of-13 1237436, wherein: in the third period, the first The triple vibration signal has a wave crest, a wave trough, and the mother of two: minutes, gradually increasing from the wave trough to the wave crest, and a falling part eight: = the wave crest gradually decreases to the wave trough, making the third dysprosium neodymium "The peak system of 11 names": the wave valley of the di-oscillation signal occurs at the same time, and the oscillating wave system of the third vibration signal and the wave peak of the first oscillation signal occur simultaneously. No. "Earth"忒 The second oscillating signal is the anti-belief of the -oscillating signal # Preferably, the oscillator further includes: a set for outputting a fourth oscillating surplus signal having a period of four cycles, wherein: in the first In each of the four cycles, 'the fourth oscillation signal has a transient transition of the edge node and the transient transition of the edge system and the peak and the wave of the first oscillation signal: one of the two occurs simultaneously, and the first oscillation The second I 彳 5 is the instantaneous change, the edge and the second oscillation Between the edge of the instantaneous number of changes there is a predetermined time offset. Preferably, the fourth vibration exhaust signal is a pulse oscillation signal. In each period of the first period, it has a rising edge, a pulse width, and two falling edges. The transient edge refers to the rising edge. Preferably, the vibrator further includes: a device for outputting a second auxiliary signal, wherein the second auxiliary signal is a ramp oscillation signal, and has a rising edge and a falling edge, so that the falling edge It occurs at the same time as the edge of the instantaneous transition of the fourth oscillation signal. In the switching DC to 14 1237436 DC converter with multiple output voltages according to the present invention, the at least one switching transition of the first to the fourth power supply channels occurs separately from each other in time, which can avoid transients. The spikes are superimposed on each other to achieve a relatively low transient noise operating state. In addition, the switchable DC-DC converter with multiple output voltages according to the present invention uses a simple gain amplifier to generate a multi-phase and multi-waveform synchronization signal, thereby achieving the advantages of small size and low cost. It should be noted that a switching DC-DC converter with multiple output voltages according to the present invention can be applied to an arbitrary number of power supply channels. [Embodiment] The following description and drawings will make the foregoing and other objects, features, and advantages of the present invention more apparent. A preferred embodiment according to the present invention will be described in detail with reference to the drawings. Before explaining the embodiments according to the present invention in detail, in order to make the technical features of the present invention more understandable, the differences between the present invention and the prior art are explained first. The switching DC-DC converter with multiple output voltages according to the present invention and the multi-phase (Multiphase or Polyphase) described in the prior arts such as U.S. Patent Nos. 5,959,441, 6,137,274, 6,144,194, and 6,246,222, etc. ) Switching DC-DC converters are not the same. Specifically, the prior art multi-phase switching DC-DC converter has only a single output terminal to supply a single adjusted output voltage, but the switching DC-DC converter according to the present invention has a plurality of outputs ', Separated from each other, thereby supplying a plurality of adjusted output voltages. Furthermore, the prior art multi-phase switching DC-to-DC converter 15 1237436 device must be dedicated to maintaining a uniform current flow between the plurality of power supply channels to avoid a “hot channel” phenomenon. However, in the switching DC-DC converter according to the present invention, a plurality of power supply channels separately supply a plurality of adjusted output voltages. In addition, the oscillators in the previous multi-phase switching DC-DC converters were limited to providing pulse signals and ramp signals with the same waveform (possibly with different phases). However, in the switching type & DC converter according to the present invention: the oscillator outputs oscillating signals with different waveforms and different phases to the power supply channels operating independently of each other. Moreover, the prior art multi-phase switching DC-to-DC converters must use the same feedback control mode for each power supply channel. However, in the switching DC-to-DC converter according to the present invention, each power supply channel can use a different feedback control mode. '' A method for improving the transient noise of the switching DC-DC converter 20 with multiple output voltages according to the present invention will be described in detail below with reference to FIGS. 2 (a) and 2 (b) and FIG. 3. FIG. 2 (a) shows a circuit block diagram of a switching DC-to-DC converter 20 with multiple output voltages according to the present invention. In order to prevent the drawings from being too complicated and make the technical features of the present invention easier to understand, FIG. 2 (a) and the following descriptions and other reference drawings only show a switched DC-DC converter 20 with four output voltages, As one embodiment of the present invention. The present invention is not limited to this embodiment, but can be applied to a switched DC-DC converter having an arbitrary number of output voltages. Hereinafter, the switching DC-to-DC converter 2016 1237436 according to the present invention shown in FIG. 2 (a) will be described in detail. The difference from the prior art shown in FIG. 1 (a). Referring to FIG. 2 (a), the switched DC-DC converter 20 is different from the switched DC-DC converter 10 shown in FIG. 1 (a) in that the switched DC-DC converter 20 is provided with a multi-phase multi-waveform The synchronous oscillator 26 replaces the oscillator 16 of the prior art. Specifically, the multi-phase and multi-waveform synchronous oscillator 26 may generate a plurality of synchronous oscillating signals with different phases and different waveforms. In the embodiment shown in FIG. 2 (a), the multi-phase and multi-waveform synchronous oscillator 26 outputs the first to fourth synchronous oscillator signals tri, TR2, PC1, and PC2, which have different phases and different The waveforms are transmitted to the switching controllers 2 2 A to 22D of the power supply channels 2 1A to 2 1D, respectively. In addition, the first auxiliary signal RM1 is also input to the switching controller 22C along with the third oscillation signal, and the second auxiliary signal RM2 is also input to the switching controller 22D along with the fourth oscillation signal PC2. By synchronizing the first to #three vibration signals e TR1, TR2, PC1, and PC2 phase difference: Difference, the switching controller 22Ai 22D has to make ^ switch crystals 25A to 25D cut off at different points in time , 矣 w I The change of scalpel hair is changed, hunting and avoiding transient spikes mutually enriching. m Figure 2 (b) shows the timing diagrams of the first to fourth oscillation signals TRb tr2 PC2 and the first ounce of a knot, 1, and brother /, and the first auxiliary RM1 and RM2, to clearly explain 苴 你 屮 μ 4, 1 = 1 The phase relationship and waveform characteristics between the applications. Refer to H 2 (b), the first vibration signal TR1 is shown in the figure. It is shown in V r 辎 4 A% W angular wave, its amplitude change, stupidity, peak value) and VL (called valley value). Similarly, No.-#M TR2 is another consecutive brother-Zhen vdou. To /, Zhen Jintian also converted to νΗ 血 L 0 ',', to conveniently describe the waveforms of the first and second oscillation signals TR1 and TR2: 17 1237436, "peak" means the amplitude is equal to the value%, "wave in The valley value vL, the "buhudu hachi" & Bopa Nakata-ji, ° 卩 刀 "buckle amplitude gradually increases from the valley value Vl to the peak H 'and:" falling part "means that the amplitude gradually decreases from the peak value VH to 〇 L. The phase difference between the oscillating signal TR1 and the second oscillating signal τ Π is called the first vibration signal;… ¥ is aligned with the trough of the second oscillating signal TR2, and the trough of the first oscillating tiger TR1 is opposite in time. The peak of the quasi-second oscillation signal TR2. In other words, the first and second oscillations ㈣τ: points are staggered in time from each other and do not overlap each other. Similarly, the falling parts of the second vibration signal TR1 and TR2 are staggered in time from each other = mutual = overlap. Please note that, although in the embodiment shown in FIG. 2 (b), the ^^ 纟 1 TR1 and the TR2 have the same peak value and the same small and medium: two: but the present invention is not limited to this. In another embodiment of the present invention, the brilliance signals TR1 and TR2 may have valleys of different sizes or different sizes, but still need to maintain the same periodic disc-degree phase difference between each other. Furthermore, although in the embodiment shown in FIG. 2 (b); ^ 2: ㈣ ... is the time occupied by the rising part "equal triangle waves occupied by the falling h are equal to each other, but it is limited to this and can be applied to the first The ratio of the spot TR2 to the second oscillation S signal TR1 is that the time occupied by the rising portion and the time occupied by the falling portion are not equal to each other: a dihedral wave. Furthermore, although the second oscillation signals TR1 and TR2 are shown in the embodiment shown in FIG. The rising parts are all linear increases. The present invention is not limited to this, but can be applied to the first and -and- the rising parts are non-linear increasing. Furthermore, although the embodiment shown in 18 1237436 2 (b) The first—the first one—the one-kill oscillation k decreases linearly in both TR1 and TR2. To be respectful on the 3rd—The present invention is not limited to this, but can be applied to the first and the first-oscillation signal TR1 blood. Below TR2, the decrease of p 乞 \\ 1 KZ is a non-linear decrease. The second oscillation signal PC1 is a pulse signal, where each pulse is a rising edge that changes from predicate to MHIGH instantaneously and is maintained at mGH pulse = Width 'and the falling edge of the transient transition from LOW to HIGH., -Auxiliary signal RM1 -Continuous ramp, consisting of a rising portion that gradually increases from q to the maximum value vmax and a falling edge of _ that changes instantaneously from the maximum value Vmax to 0. The rising edge of the third oscillating signal PC1 decreases the first auxiliary signal view of the disk The edge system occurs at the same time. The fourth vibration signal ⑽. System-a pulse signal '纟 each pulse system changes from L0w to HIGH rising edge, the pulse width maintained at HIGH, and from [从 instantaneous transition The second auxiliary signal is a continuous ramp wave consisting of a rising knife that gradually increases from 0 to the maximum value Vmax and a falling edge that changes instantaneously from the maximum value Vmax to 0. The rising edge of the four oscillation signals PC2 and the falling edge of the second auxiliary signal RM2 occur simultaneously. In addition, as shown in FIG. 2 (b), the third and fourth oscillation signals PC1 and PC2 have the same period but phase However, the difference is 180 degrees. Please note that “In the embodiment shown in FIG. 2 (b), the third and fourth vibration signals PC1 and PC2 have the same maximum value Vmax, but the present invention is not limited thereto. In another embodiment of the invention The third and fourth oscillating signals pc i and PC2 must have different maximum values, but still need to maintain the same period and a phase difference of 180 degrees with each other. 19 1237436 In the embodiment shown in FIG. 2 (b) The peak value vH is about 0.8 volts and the valley value VL is about 0.3 volts. The periods of the first to fourth oscillation signals TRi, PCI, and PC2 and the first and second auxiliary signals RM1 and rm2 are all about 1 microsecond (micr0second). The pulse width of the third and fourth oscillating signals pc and PC2 is about 100 nanoseconds, and the state HIGH is about 2.2 volts and the state L0W is about 0. volt. The maximum amplitude Vmax of the first and second auxiliary signals RM1 and RM2 is about 0.8V. It is clear from Fig. 2 (b) that the trough of the first oscillation signal TR1, the peak of the second oscillation signal TR2, the rising edge of the third oscillation signal pc 丨, and the falling edge of the first auxiliary signal RM1 occur simultaneously. Furthermore, the peak of the first oscillation signal TR1, the valley of the second oscillation signal TR2, the rising edge of the fourth oscillation signal PC2, and the falling edge of the second auxiliary signal RM2 occur simultaneously. FIG. 3 shows a detailed circuit diagram of the power supply channels 2 丨 a to 2 丨 0 according to the present invention. Referring to FIG. 3, the power supply channel 21A adopts a voltage mode feedback control operation in response to the first oscillating signal TR1 to convert the DC voltage source VSQuree into a DC output voltage vQUtl. The power supply channel 21A includes a switching controller 22A, a conversion circuit 23A, and a feedback circuit 24A. The conversion circuit 23A is a step-down conversion circuit having a power switching transistor 25A, an inductor L1, a capacitor ci, and a diode D1, which are coupled as shown in the figure. The feedback circuit 24A is a voltage divider circuit 'composed of resistors Ra 1 and Rb 1 to provide a feedback signal FB1 indicating a DC output voltage V () Utl. The feedback signal FBI is input to the error amplifier eai in the switching controller 22A to be compared with the reference voltage Vrefl. Subsequently, the pwM comparator PA1 rounds out the comparison result between the 20th 1237436-Zhenshengxin 胄 TR1 and the error voltage rounded out by the error amplifier EA1 to drive n DR1 to generate the pwm control number

pwm 'is used to drive a power switching transistor 25A implemented by & NMOS transistor Qi. Specifically, when the first vibration signal tri gradually decreases from the peak value to the time equal to the error voltage, the PWM comparator pAi changes the PWM control signal PWM1 driven by the driving test DR1 to an enabled state (in this embodiment 2 HIGH) to turn on the NMOS transistor Qi. Subsequently, when the first oscillating signal TR1 gradually increases from the valley value to the time when it is equal to the error voltage again ', the PWM comparator PA1 causes the pwM control signal PWM1 output by the driver DR1 to transition to the non-enabled state (LOW in this embodiment) To turn off the NMOS transistor Q1. The power supply channel 21B adopts voltage mode feedback control and operates in response to the second oscillating signal TR2 to convert a DC voltage source ... to a DC output voltage ν_2. The power supply channel 21B includes a switching controller 22B, a conversion circuit 23B, and a feedback circuit 24β. The conversion circuit 23B is a step-down conversion circuit having a power switching transistor UR, an inductor L2, a capacitor C2, and a diode D2, which are coupled as shown in the figure. The feedback circuit 24B is a voltage dividing circuit composed of resistors Ra2 and Rb2, and provides a feedback signal FB2 indicating a DC output voltage Vout2. The feedback signal FB2 is input to the error amplifier EA2 in the switching controller 22B to be compared with the reference voltage Vref2. Subsequently, the PWM comparator pA2 outputs the comparison result between the second oscillation signal tr2 and the error voltage output from the a-difference amplifier EA2 to the driver DR2, thereby generating a PWM control signal PλνM2 to drive the power implemented by the NMOS transistor Q2. The transistor 25B is switched. Specifically, as for J237436, when the second oscillation signal TR2 gradually decreases from the peak value to the time when the error voltage equals, the PWM comparator PA2 changes the pWM control signal PWM2 output by the driver DR2 to an enabled state (HIGH in this embodiment) ) To turn on the NMOS transistor Q2. Subsequently, when the second oscillating signal TR2 gradually increases from the valley value to the moment when it is equal to the error voltage again ... the comparator PA2 causes the pWM control signal pwM2 output by the driver DR2 to move to the non-enabled state (in this embodiment L0w) to turn off nmos transistor Q2. The power supply channel 21C is operated in response to the third mode S signal PC1 and the first auxiliary signal RM1 using a voltage mode feedback control to convert the DC voltage source Vs () uree into a DC output voltage V. …. The power supply channel 2 1 C includes 3 switching controllers 22c and a switching circuit. . And a feedback circuit 2 4 C. Conversion Leizheng 9 2 # ΤΤΛΤ BS-W Talk Circuit 23C is a step-down conversion circuit with power switching transistor 25C, inductor L3, capacitor C3, and diode D3, as shown in the figure. The feedback circuit 24C is a sub-circuit composed of a resistor Ra3 and provides a feedback signal indicating the DC wheel output voltage v-. The feedback signal FB3 is input to the error amplifier EA3 ′ in the switching controller μ, which is compared with the reference voltage 懕 v ref3 and outputs an error voltage to the pwM comparator PA3. Specifically, the second and second oscillation signal PC 1 is used to set the latching benefit LA1 'to drive the pwM control signal driven by DR3. Please change the old to the enabled state (in this embodiment) MGH), the transistor condition is switched with the power implemented by the conduction ㈣Q3. On the other hand, because the falling edge of the brother-auxiliary ㈣RM1 occurs simultaneously with the rising edge of the third oscillator, the falling edge of the first-assistance signal 22 1237436 also occurs simultaneously with the conduction of the NMOS transistor Q3. Subsequently, when the rising portion of the first auxiliary signal RM 1 gradually increases to the time equal to the error voltage, the PWM comparator PA3 resets the latch LA1, so that the PWM control signal PWM3 output by the driver DR3 changes to the non-enabled state (at LOW in this embodiment) to turn off the NMOS transistor Q3. The power supply channel 2 1D adopts current mode feedback control, and operates in response to the fourth oscillation signal PC2 and the second auxiliary signal RM2 to convert the DC voltage source VS () uree into a DC output voltage ν_4. The power supply channel 21D includes a switching controller 22D, a conversion circuit 23D, and a feedback circuit 24D. The conversion circuit 23D is a step-down conversion circuit, which has a power switching transistor 25D, an inductor L4, a series resistor Rs, a capacitor C4, and a diode D4, which are coupled as shown in the figure. The feedback circuit 24D includes a current sense amplifier CA for providing a feedback signal FB4, which indicates a potential difference caused by the inductor current flowing through the series resistor Rs. In addition, in order to perform slope compensation of the current mode feedback control, the feedback circuit 24D must further include a voltage dividing circuit composed of resistors Ra4 and Rb4, and provide a signal indicating the DC output voltage VQUt4 to the error amplifier EA4, This is compared with the reference voltage Vref4. Through the analog operation circuit AD, the error voltage output from the error amplifier EA4 is subtracted from the second auxiliary signal RM2 and input to the inverting terminal of the PWM comparator PA4. The feedback signal FB4 is input to the non-inverting terminal of the PWM comparator PA4. The fourth oscillation signal PC2 is used to set the latch LA2, so that the PWM control signal PWM4 output by the driver DR4 changes to an enabled state (HIGH in this embodiment) to turn on the NMOS transistor Q4. Power switching transistor 25D. Since the second auxiliary signal RM2 23 1237436: the edge occurs simultaneously with the rising edge of the fourth oscillating signal pC2, the falling edge of the second auxiliary signal RM2 also occurs simultaneously with the derivative 2 of the NMOS transistor Q4. During the period during which the NMOS transistor Q4 is on, the linear increase of the inductor motor causes the feedback signal FB4 output by the current sense amplifier ca to linearly increase. When the feedback signal fb4 increases to be equal to the voltage output by the analog operation circuit, the PWM comparator pA4 resets the latch LA2, so that the pwM control signal pwM4 output by the driver DR4 changes to a state of no pity (in this implementation In the example, it is L0w). According to the description of turning off the NMOS transistor Q4 and other explanations, it can be seen that the time point when the power switching transistor 25a changes from off to on is at the falling part of the first oscillation signal TR1 and the power rate. The point in time when the switching transistor 25B changes from off to on is within the falling portion of the second oscillating signal TR2. Because the falling portions of the first and second vibrating k-waves TR1 and TR2 do not overlap with each other in time, as shown in FIG. 2 (b), the power switching transistors 25a and 25B are effectively prevented from changing to 4k when they are turned off. Continuity. As a result, the transient spikes caused by the power switching transistors 25A and 25B do not overlap each other. On the other hand, the transition of the power switching transistor 25C from the off to the conduction system and the rising edge of the second vibration signal PC 1 occur at the same time, while the transition of the power switching transistor 25D from the off to the conduction and the fourth oscillation signal pC2 occurs simultaneously. The rising edges occur simultaneously. Because the rising edges of the third and fourth oscillation signals PC1 and PC2 do not overlap each other in time, as shown in FIG. 2 (b), it is effective to prevent the power switching transistors 25C and 25D from changing from off to on simultaneously. As a result, the transient spikes caused by the 25C and 25D power switching transistors do not overlap with each other. In addition, it is clear from FIG. 2 (b) that since the rising edge of the third oscillation signal pc 1 occurs simultaneously with the trough of the first oscillation signal TR1 and the peak of the second oscillation signal TR2, the third oscillation signal pc 1 The rising edges are not located in the respective falling portions of both the first and second oscillation signals TR1 and TR2. As a result, the time point when the power switching transistor 25C transitions from off to on is different from the time point when the power switching transistors 25A and 25B transition from off to on. Similarly, since the rising edge of the fourth oscillation signal PC2 occurs simultaneously with the peak of the first oscillation signal TR1 and the valley of the second oscillation signal TR2, the rising edge of the fourth oscillation signal pc2 is not located in the first and second oscillation signals. Both TR1 and TR2 are within their respective falling portions. The time when the power switching transistor 25D changes from off to on is different from the time when the power switching transistors 25A and 25B change from off to on. Therefore, in the switching DC-DC converter according to the present invention, 2′0 ′: the transient spikes caused by the power rate switching transistors 25A and 25D will not be related. Please note that although the implementation shown in FIG. 3 In the example, the power supply channels 21A to 21C are voltage mode feedback control and the power supply channel 21D is current feedback control. However, the present invention is not limited to this, and the channels W to Sin are voltage mode feedback control. _ 者 电 ^ In response to channel 21A, please use voltage mode feedback control while power supply shore channels 2 1C and 21 1D are current feedback control. It should be noted that, although the point in time when the real y + y body 25A and the transition from off to on are shown in FIG. 3 ^ = 25 1237436 The invention is not limited to this, but can be applied to the power switching transistor 25A and The time points from 25d transition from on to off do not overlap each other. In other words, according to the present invention, at least one switching transition of the power switching transistors 25A and 25D is mutually independent in time, and the switching transition refers to transition from off to on or from on to off. FIG. 4 shows a circuit block diagram of a multi-phase multi-wave synchronous oscillator according to the present invention. Referring to Fig. 4, the multi-phase multi-waveform synchronous oscillator 26 includes a boosting signal generator 41, an inverter 42, and an auxiliary signal generator 43. Specifically, the oscillation signal generator 41 generates a first oscillation signal TR1. Subsequently, the second oscillation signal TR2 is obtained from the first oscillation signal TR1 through the inverter 42. As a result, the phases of the first oscillating signal TR1 and the second oscillating signal TR2 differ by 80 degrees. In addition to the first oscillating signal TR1, the oscillating signal generator 41 generates two third and fourth oscillating signals pci and pC2 which are 180 degrees out of phase with each other. Finally, in response to the third and fourth oscillation signals PC1 and PC2, the auxiliary signal generator 43 outputs the first and second auxiliary signals RM1 and RM2. Since the waveform characteristics of the first to fourth oscillating signals TR1, TR2, PC1, and PC2 and the first and second auxiliary signals RM1 and RM2 have been described in detail above, their descriptions are omitted here. FIG. 5 shows a detailed circuit diagram of a first example of a multi-phase multi-waveform synchronous oscillator according to the present invention. Referring to Fig. 5, the multi-phase and multi-waveform synchronous oscillator 26 includes an oscillation signal generator 41, an inverter 42, and an auxiliary # generator 43. The vibration surplus signal generator 41 includes a peak comparator 411, a valley comparator 412, a latch 413, three inverters 26 1237436, 414, 419S, and 419R, a switching device 415, and a first current source. 416, a second current source 417, and a capacitor 418. The non-inverting terminal of the peak comparator (indicated by the symbol "+,") is coupled to a peak setting voltage VH 'and the inverting terminal of the valley comparator 412 (indicated by the symbol "-,," is coupled to a The bottom value sets the voltage vL. The inverting terminal of the peak comparator 411 and the non-inverting terminal of the valley 2 comparator 4 丨 2 are coupled to each other, and are coupled to the output terminal NTR1. The output of the peak comparator 411 is coupled to the setting input of the latch 413 (Setting mputW, and the output of the valley comparator 412 is coupled to the reset input of the flash lock 413 (Resetting —setting. First current The source 4 丄 6 is connected between the DC voltage source Vsource and the output terminal ^, and the second current source 4Π is connected between the output terminal ^ and the ground via the switch device £ 415. In the embodiment shown in FIG. 5 'The current supplied by the second current source 417 is twice the current supplied by the first current source 416. In this case, the triangle wave generated by the vibration signal H 41 is the rising time and the fall Partially occupied equilateral triple carpels of equal time. Please note that the present invention is not limited to this, but can be applied to any " Eight Drinks Can Vortex Foot First Current Source 41 7 The current value supplied is greater than the first current v. 41 The condition of the value of the current you 416 supplies (about this, there will be a detailed # 扪 description later). That is, according to this

The oscillating signal generator 41 of the invention also has a * A L of 41, which also generates a non-exclusive dihedral wave for the time occupied by the rising part and the time occupied by the falling part. The switching device 4 1 5 is controlled by one of the lockout positions 4 1 3 & In the embodiment shown in FIG. 5, the normal output of the latch 413 (Normal output) g controls the switching device 415 via the inverter 414. Note that because the inverted output of the latch 413 (Inverted 〇utput) & UP is a positive Wei output 0 and the opposite is believed to be 27 1237436, so in another embodiment of the present invention, the switching device 4! 5 is directly closed. The same control effect can be obtained in the actual detailed example shown in FIG. 5 by using the reverse rotation wheel of the gear and 413. In the present invention, the switching device 4 i 5 must be formed by a switching transistor, such as a NMOS transistor, a pMos transistor, or a bi-electron transistor. The capacitor 418 is connected between the output terminal I and the ground. Hyun will explain in detail how the oscillation signal generator 41 generates the first oscillation signal TRi and the second and third oscillation signals pd ”PC2 with reference to FIGS. 5 and 2 (b). The voltage at the output terminal Ntri is less than the valley setting voltage & When the input S is set to HIGH and the reset input and L0w are set, the normal output 2 is HIGH. At this time, the inverter 414 outputs 10w to the switching device 415 to make it non-conductive. As a result, the The two current sources 4] 7 are off, and the first current source 416 charges the capacitor 418, which causes the voltage at the output terminal Ntri to rise. When the voltage at the output terminal NTR1 rises to be greater than the valley setting voltage% but still less than the peak setting voltage At ¥ 11, the set input S is high and the reset input and HIGH are high, which results in a normal output of mGH. At this time, the inverter 414 outputs LOW to the switching device 415 to make it non-conductive. As a result, the second current source 417 remains closed, and the first current source 416 continues to charge the capacitor 418, so that the voltage at the output terminal Ntri continues to rise. When the voltage at the output terminal ntr1 rises above the peak setting voltage, the input 5 is set to LOW and Reset input and HIGH, guide The normal output g is LOW. At this time, the inverter 414 outputs HIGH to the switching device 415 to turn it on. As a result, the second current source 417 is turned on. Because the current value supplied by the second current source 417 is greater than the first current source The current value supplied by 4 丨 6, so the capacitor 41 8 is discharged to the ground through the second current source 41 7, which causes the voltage at the output terminal NTR1 of 28 1237436 to drop. In the embodiment shown in FIG. 5, the second current source 417 The current value supplied is twice the current value provided by the first current source 416. In this case, because the discharge current value of the capacitor 418 is exactly equal to the current value provided by the first current source 416, so at this stage of operation The discharge rate of the medium capacitor 418 is equal to the charge rate of the capacitor 418 in the previous operation stage, which results in the generation of an equilateral triangle wave. When the voltage at the output terminal Nτμ drops below the peak setting voltage VH but is still greater than the valley setting voltage,疋 Input 5 is high and reset input and high, which causes the normal output ρ to be LOW. At this time, the inverter 414 outputs HIGH to the switching device 41 5 to turn it on. As a result, the second current source 4 丨 7 is still dimensional. Turn on, so that the capacitor 418 continues to discharge to the ground through the second current source 417, causing the voltage at the output terminal ntr1 to continue to drop. When the voltage at the output terminal Ntri drops below the valley setting voltage Vl, the oscillating signal generator 41 repeats The foregoing operation. Therefore, the desired first oscillation signal TR1 can be obtained from the output terminal Ntri. The first pulse signal PC1 is obtained by inverting the reset input and inverting the inverter 4 丨 9R. Similarly, The second pulse signal PC2 is obtained by inverting the set input S through an inverter 419S. Referring again to FIG. 5 ', the auxiliary signal generator 43 is composed of two ramp wave generators 43a and 43b, which respectively generate the first and the second: the auxiliary signal view and RM2. The ramp generator 43a includes a Sample-And-Hold AmPlifier 431a, a sample-and-hold capacitor 432a, a voltage-to-current converter 433a, an output capacitor 434a, and a switching device 435a. The non-inverting terminal of the sample-and-hold amplifier 431a is coupled to 1237436 at the reference voltage vrefa, and its output terminal is consumed by the voltage input terminal of the voltage-to-current converter 43 \. The sample-and-hold capacitor 432a is connected between the output terminal of the sample-and-hold amplifier 43a and the ground. ㈣ to current converter Sin's current output terminal is lightly connected-the output terminal N is. The output capacitor 434a and the switching device 435a are connected in parallel between the output terminal u and the ground. The output terminal NRM1 is further connected to the inverting terminal of the sample-and-hold amplifier 4 仏 to form a feedback loop. On the other hand, the ramp generator state includes a sample-and-hold amplifier ㈣, a sample-and-hold capacitor 堡, an electric castle-to-current converter 433b, a wheel-out capacitor 434b, and a switching device sen. The non-inverting terminal of the sample holding amplifier 43ib is fortunate to another—refer to the electric house and its output terminal is connected to the input terminal of the current converter 43. The sample-and-hold capacitor 432b is connected between the output terminal of the sample-and-hold A || side and the ground. The current output terminal of the voltage-to-current converter is connected to the other output terminal Nrm2. The output capacitor side and the switching device are between the ST output terminal N_ and the ground. The output terminal NRM2 is further coupled to the inverting terminal 'of the sample-and-hold amplifier 43 11) to form a feedback loop. Swing r: The output of the inverter 41 9 S of the t-th generator 41 (that is, the fourth oscillation M number PC2) is a core-controlled sample-and-hold amplifier and switching device 435b. On the other hand, the output of the inverter 4i9R of the oscillating signal generator (ie, the third vibration surplus signal PC1) is used to control the sample hold cry = and open_set 435a. In the present invention, the switching device 4 仏 and _ Azimuth is formed by a switching transistor, such as an NMOS transistor, a p-transistor, or a bipolar transistor. The auxiliary signal generator 43 30 1237436 will be described in detail with reference to FIGS. 5 and 2. Two auxiliary signals RM 1 and RM2. First, a method for controlling the ramp generator 43 a to generate the first auxiliary signal RM1 by the third and fourth oscillation signals PC 1 and PC 2 will be described. When the third and fourth oscillation signals PC When both 1 and PC2 are LOW, the sample-and-hold amplifier 43a and the switching device 435a are both turned off and non-conductive. In this case, the fixed voltage held by the sample-and-hold capacitor 432a is converted into a fixed current through a voltage-to-current converter 433a, It is used to charge the wheel output capacitor 434a. As a result, the voltage at the output terminal Nrmi rises. When the third oscillation signal PCI is HIGH and the fourth oscillation signal PC2 is LOW, the switching device 435a is turned on. In this case, the output capacitor 434a via The on-off switching device 435 & discharges to the ground and outputs ^ NRM! Connected to the ground via the on-off switching device 43 5a. As a result, the voltage at the output knows that the voltage at Nrmi is instantly reduced to the ground potential. Therefore, it can be obtained from the output terminal nrm1. The desired first auxiliary signal RM1. In order to improve the stability of the obtained first auxiliary signal RM1, when the third vibrating j slogan PC1 is LOW and the fourth exhausting signal PC2 is HIGH, the sample-and-hold amplifier 431a is turned on The feedback circuit compares the voltage at the output terminal NRM1 with the reference voltage Vrefa, thereby outputting an error voltage, and performing feedback control on the voltage held by the sample-and-hold capacitor 432a. Because the voltage held by the sample-and-hold capacitor 432a is via voltage The current is converted to current by the current converter 433a, which determines the rate of voltage rise at the output terminal Nr ，, so the first auxiliary signal RM1 obtained from the output terminal Nrmi improves stability due to feedback control. In FIG. 5 and FIG. Take… In the embodiment, since the time point when the fourth oscillation signal PC2 becomes HIGH is located in the ½ period of the _ auxiliary signal RM1 Therefore, refer to 31 1237436. The test voltage Vrefa can be selected as one half of the maximum value vmax of the first auxiliary signal RM1. Please note that the present invention is not limited to this, but can be based on the time point and sampling of the fourth oscillation signal PC2 becoming HIGH. Maintain the proportional relationship between the feedback voltage received at the non-inverting terminal of the amplifier 43la and the voltage at the output terminal NRMi 'to select an appropriate reference voltage Vrefa to achieve the desired feedback control. Then, the third and The fourth oscillating signal wave generator 43b generates a second auxiliary signal rm2. When the first and fourth oscillation signals PC1 and PC2 are both LOW, the sample-and-hold amplifier 43 lb and the switching device 435b are both turned off and non-conductive. In this case, the fixed voltage held by the sampling and holding valley 432b is converted into a fixed current through voltage-to-current conversion to 43 3b to charge the output capacitor 434b. As a result, the voltage at the output terminal nRM2 rises. When the first pulse signal pci is low and the second pulse signal PC2a HIGH, the switching device 43% is turned on. In this case, the output capacitor 434b is discharged to the ground via the conductive switching device 435b, and the output terminal NrM2 is connected to the ground via the conductive switching device 435b. As a result, the voltage at the output terminal NrM2 is instantly reduced to V to the ground potential. Therefore, 'the desired second auxiliary rule can be obtained from the output terminal N_. In order to improve the stability of the obtained second auxiliary signal RM2, when the third oscillation M signal ⑽ is η · and the fourth exhaustion signal PC2 is LOW, the sample-and-hold amplifier ㈣ is turned on and the output terminal NRM2 is compared via the feedback loop. The voltage and reference voltage ... Output an error voltage, and perform feedback control for the extraction only. Because the voltage held by the sampling capacitor 432b 32 1237436 is converted into a current through a voltage-to-current converter 433b, the current determines the rate of voltage rise at the output terminal NRM2, so the first obtained from the output terminal Nrm2 The auxiliary signal RM2 improves stability due to feedback control. In the embodiment shown in FIGS. 5 and 2 (b), since the time point when the third oscillating signal pc i becomes HIGH is located at two-half of the period of the second auxiliary signal RM2, the reference voltage Vrefb must be selected as the first One half of the maximum value Vmax of the two auxiliary signals RM2. Please note that the present invention is not limited to this, but can be based on the proportional relationship between the point in time when the third oscillation signal PC1 becomes HIGH and the feedback voltage received by the non-inverting terminal of the sample-and-hold amplifier 431b and the voltage at the output terminal Nrm2. , Select an appropriate reference voltage Vrefb to achieve the desired feedback control. FIG. 6 shows a detailed circuit diagram of a second example of a multi-phase and multi-waveform synchronous resonator 26 according to the present invention. The second example shown in FIG. 6 is the same as the first example shown in FIG. 5 except that the circuits and methods for generating the third and fourth vibrating signals PC1 and PC2 are modified. Therefore, portions of the circuit element shown in FIG. 6 similar to those in FIG. 5 are designated by reference symbols similar to those in FIG. 5. To simplify the description, only the second example is different from the first example in detail below. As shown in FIG. 6, the second example, a r. Slaver, (One Shot Generator) 6U and 612 replace the j-phase devices 419R and 419S of the first example shown in FIG. 5. Specifically, the first single-shot generator & is a rising-edge single-shot generator whose input is coupled to the latch 413. "Whenever the first single-shot generator 611 detects a normal round-out-rising edge, The first single-shot generator 611 | queries out a pulse with a predetermined € 33 1237436-again, such as 100 nanoseconds. Since the normal output _: the edge occurs when the # th—vibration i signal TR1 reaches the trough, the: early generator 611 generates the desired third oscillation signal PC1. μ: Face 帛 —Single-shot generator 612 series-Single-shot single-shot generator is, and the input end is lightly connected to the normal output of the flash locker 413. Whenever the second early-shot generator 612 _ to the falling edge of normal output 2 At the time, the second single-shot generator 612 is output—with a predetermined width. Example # ⑽nanoseconds of financial impulse is positive; the falling edge of the output ρ occurs when the first oscillating letter: Tiger tri reaches the peak, The first-single-shot generator 612 generates a desired fourth oscillation signal PC2. ... The second example shown in Figure 6 provides an additional advantage as described below. Since the third and fourth oscillation signals pci and pc2 are generated by using the first and second single-shot generators 611 and 612, respectively, the third and fourth oscillation signals PC1 and PC2 have pulses with different widths, respectively. As mentioned earlier, since the third and fourth oscillation signals pci and pC2 control the switching devices 435a and 435b, respectively, a fixed-width pulse ensures that the discharge time of the output capacitors 43 and 434b is fixed, so the charging time is also fixed. As a result, the amplitude stability of the first and second auxiliary signals RM1 and RM2 is further improved. In one embodiment of the present invention, the switching controllers 22A to 22D, the feedback circuits 24A to 24D, and the multi-phase multi-waveform oscillator 26 are integrated into a single integrated circuit chip. The conversion circuits 23A to 23D are formed as external circuits of the single integrated circuit chip, and can be implemented as a step-down conversion circuit or a step-up conversion circuit, and are usually designed according to application requirements. In another embodiment of the present invention, the power switching transistors MA 34 1237436 to 25D in the conversion circuits 23A to 23D are also connected to the switching controllers 22A to 22D, the feedback circuits 24A to 24D, and the multi-phase multi-waveform oscillator. 26 is integrated into a single integrated circuit chip so that only the rest of the conversion circuits 23A to 23D are formed as external circuits of the single integrated circuit chip. In addition, the multiphase waveform synchronous oscillator 26 must be separately formed into an independent integrated circuit chip, and then coupled to the synchronous oscillator 26 including the power supply channels 22A to 22D via wiring; a single power supply in an independent package Integrated circuit chip of the channel. 2D integrated circuit chip. In addition, multiple phases and multiple waves may also output a plurality of oscillating signals to a plurality of devices. Although the present invention has been explained by taking preferred embodiments as examples, it should be understood that the present invention is not limited to the disclosed embodiments. in contrast

,,… 〇 Branch / 丨 Other Cheek Repairs? Another similar configuration. [Brief description of the diagram] Fig. 1 (a) shows a circuit block diagram of a conventional switching DC-DC converter with multiple output voltages. Figure 1 (b) shows the parasitic inductance caused by the connection wiring between the DC voltage source and the ground. Fig. 1 (0 shows a waveform timing diagram of a signal generated by a conventional oscillator. Fig. 2 (a) shows a circuit block diagram of a switching DC-DC converter with multiple output voltages according to the present invention. Fig. 2 (b ) Shows a timing diagram of the signals output by the multi-phase multi-waveform synchronous oscillator 35 1237436 according to the present invention. FIG. 3 shows a detailed circuit diagram of the multiple power supply channels according to the present invention. FIG. 4 shows a multi-phase multi-phase according to the present invention. Block diagram of the heart of a waveform synchronous oscillator. Figure 5 shows a detailed circuit diagram of the first example of a multi-phase multi-waveform synchronous oscillator that is not in accordance with the present invention. Detailed 1 circuit diagram of the second example. Symbol description: 10 Switching DC to DC conversion 11A ~ 11D power supply channel 12A ~ 12D switching controller 13A ~ 13D conversion circuit 14A ~ 14D feedback circuit 15A ~ 15D power switching transistor 16 oscillator 20 switching DC to DC conversion 21A ~ 21D power supply channel 22A ~ 22D switching controller 23A ~ 23D conversion circuit 24A ~ 24D feedback circuit 25A ~ 25D power switching transistor Figure 6 shows Number 36 of the multi-phase multi-wave synchronous oscillator 41 1237436 26 Multi-phase multi-wave synchronous oscillator 41 Oscillation signal generator 411 Peak comparator 412 Valley comparator 413 Latcher 414, 419R, 419S Inverter 415 Switching device 416 First current source 417 Second current source 418 Capacitor 42 Inverter 43 Auxiliary signal generator 431a, 431b 432a, 432b 433a, 433b 434a, 434b 435a, 435b 43a, 43b 611,612 FBI ~ FB4 Sampling and holding is amplified to the sampling and holding capacitor voltage To current converter output capacitor switching device ramp generator single-shot generator feedback signal PULSE1 ~ PULSE4 pulse signal PWM1 ~ PWM4 PWM control signal RAMP1 ~ PAMP4 ramp signal

Vsource DC voltage source 37 1237436 to VQUt4 DC output voltage Cl to C4 Capacitance CA Current sense amplifiers D1 to D4 Diodes DR1 to DR4 Drivers EA1 to EA4 Error amplifiers L1 to L4 Inductors LA1 to LA2 Latches NtRI, NrmI, Nrm2 Outputs PA1 ~ PA4 PWM comparators TR1, TR2, PCI, PC2 Oscillation signals Q1 ~ Q4 NMOS transistors RM1, RM2 Auxiliary signals Ral ~ Ra4, Rbl ~ Rb2, Rs Resistors Vrefl ~ vref4, vrefa, vrefb Reference voltage Vh Peak

Vl trough vmax max 38

Claims (1)

1237436 No. 092128〇73 patent application, patent application scope: 1 · A switching DC-DC converter, including:-the first power supply channel, coupled to a DC voltage source, a ground to convert the The DC voltage source becomes a first-DC output voltage; the intermediate-second power supply channel is connected to the DC voltage source and the DC voltage source is used to convert the DC voltage source into a first-degree 士 -Shile-DC wheel output voltage, The current output voltage is separated from the first DC wheel output voltage-oscillator, and is used to output the signal having the number from the first thunder, the shield correction, the χ & 'And used to output a first power supply channel with a second period and a frequency of 5 to 5, where the peak is in each period of the second period, the first oscillation signal has-and-the falling part: two parts, Gradually increasing from the trough to the crest,-the rising part of the signal for the power supply ::; * c occurs within the -resonance; and the person descends. In the time period covered by the two, in each of the second cycle, the edge and edge of the instantaneous transition, the dormant gate, and the 'mid-month', the second oscillation signal has-the trough occurs simultaneously: The edge system and the first-oscillation signal change transition system and the instantaneous edge transition; at least all the edges of the second power supply channel's cultural transition occur simultaneously. 2. As in the scope of patent application No. 1: the switching DC-to-DC converter of 3, the first power supply channel belongs to a voltage mode power supply channel 39 1237436 No. 092128073 Lilly Road I, and the second power supply channel Patent Fan Yuan substitutes plum source supply channel ^ ^; in a current mode power supply channel: Shenyue's patented yoke surrounds the first switching DC-DC converter, the period of which is equal to the period of the fourth period as applied The scope of patent No. 1 is a switching DC to DC converter. The increase in the signal of the oscillating surplus signal is linearly increasing in the rising part. The switching DC-DC converter of the first item of the line is reduced linearly. The falling part of the first oscillating signal is a dc converter, 6 of which is the switching DC to right-angle oscillating signal of the first scope of the patent application. Number! The switching DC-to-oscillation signal system—pulse oscillation signal 'has a rising edge, a pulse width, and a falling edge at the edge of the second period. The edge of a momentary change of a oscillating 彳 a or ring refers to the scope of the patent application for which there is no underline after the amendment on June 9, 1237436, replacing the No. 092128〇73 Huishui application Ning rising edge. 8. The switching DC-DC converter according to item 1 of the patent application scope, wherein: the oscillator includes a valley comparator for comparing the first oscillation signal with a valley setting voltage; and an inverse The phase 'its round-in terminal is coupled to an output terminal of the valley comparator' for generating the second oscillating signal. 9. The switching DC-to-DC converter according to the scope of the patent application: item 1, wherein: the oscillator includes: a peak comparison for comparing the first oscillation signal with a peak set voltage; a valley comparator, Used to compare the first oscillating signal with a valley setting voltage; ° Ask the lock 其 its position; t input terminal is combined with-output 4 of the peak comparator, which resets the input terminal system _ combined with One output terminal of the valley comparator is used to generate a normal output; and the rising edge single-shot generator is used to generate the second oscillating signal in response to the normal output. 41 1 〇 · If the switching range of the patent application scope is up to the DC converter, 1237436 layers of inverse ridge i month 9th amended without the line of the application of the appetite for stomach sound patent replaces this patent application No. 092128073 Wherein: the oscillator further outputs a first auxiliary signal to the second power supply channel, wherein the first auxiliary signal is a ramp wave oscillating signal with a rising portion and a falling edge, so that the falling edge is related to the The edges of the instantaneous transition of the second oscillating signal occur simultaneously. 11. The switching DC-DC converter according to item 10 of the patent application scope, wherein: the second power supply channel performs slope compensation of current mode feedback control by the first auxiliary signal. 12. The switching DC-DC converter according to item 10 of the patent application scope, wherein: the oscillator includes: a peak comparator for comparing the first oscillating signal with a peak set voltage; a valley comparator, Used to compare the first oscillating signal with a valley setting voltage; an input terminal of a first inverter 'is coupled to an output terminal of the valley comparator to generate the second oscillating signal; a second The input terminal of the inverter is coupled to an output terminal of the peak comparator; an auxiliary output terminal is used to output the first auxiliary signal; a sample-and-hold amplifier is controlled by the second inverter, and 42 1237436 No. 092128073 Lilly E. Patent Application Replacement to compare the first auxiliary signal with a reference voltage;-A capacitor is connected between the output of the sample-and-hold amplifier and the ground;-Voltage to current converter , Its voltage input terminal is lightly connected to the output terminal of the sample-and-hold amplifier, and its current output terminal is connected to the auxiliary output terminal; an output capacitor is connected to the auxiliary The output terminal; and a switching means F ^, Si surface in between the output terminal and the auxiliary ground, controlled by the first inverter. 2: The switching DC-DC converter of the 12th scope of the patent application, wherein: the reference voltage is a half of the maximum amplitude of the first auxiliary signal. :. 4. If the switching DC-DC converter of item 10 of the patent application is used, wherein: the oscillator includes: a peak comparator for comparing the first oscillating signal with a value set voltage; a valley comparator, It is used to compare the first oscillation signal with a valley setting voltage. An interlocking device whose setting input terminal is coupled to the output terminal of the peak comparator. Its reset input terminal is coupled to the valley comparator. A lose 43 1237436 Minli was also amended on June 6, 1994. The patent application for the arrow line has not been changed. The Riley application room No. 092128073 is issued by the Lily application room ^ 'for generating a normal output; a rising edge single-shot generator for Generating the second oscillating signal in response to the normal output; a falling edge single-shot generator for receiving the normal output; an auxiliary output terminal for outputting the first auxiliary signal; a sample-and-hold amplifier from the falling edge Controlled by a single-shot generator to compare the first auxiliary signal with a reference voltage; ^ a sample-and-hold capacitor coupled between an output terminal of the sample-and-hold amplifier and the ground; A voltage-to-current converter whose voltage input terminal is coupled to the output terminal of the sample-and-hold amplifier, and whose current output terminal is coupled to the auxiliary output terminal; an output capacitor is coupled to the auxiliary output terminal and the ground And ▲ switching device 'is coupled between the auxiliary output and the ground, and is controlled by a single-edge generator. 14 items of switching DC to DC conversion 15. If the scope of the patent application is applied, where: the reference voltage is the first 16. If the scope of the patent application is the first, it further includes: the maximum amplitude of the auxiliary signal of the second power supply channel surface One-half of the switching DC-DC converter 'lights on the DC voltage source and the ground 44 1237436 amended without the line of the patent application. Replaces this patent No. 092128〇73 by the office: used to The DC voltage source is converted into a third DC output voltage, and the third DC output voltage is separated from the first and the second DC output voltages. Oscillating i signal to the third power supply channel; in each period of the second cycle, the third oscillating signal has a wave peak, a wave trough, and a rising portion, and gradually increases from the wave trough to the wave peak, and-drops Partially decreases from the crest to the trough, so that the crest of the first: oscillating signal and the trough of the first #oscillation signal occur simultaneously, and the i-th vibration plate ? The tiger & valley system and the peak of the first vibration signal occur simultaneously; and A-at least one switching transition of the third power supply channel occurs between the rising portion of the second vibration signal and the τ Within the time range covered by both. For example, the switching type DC to DC converter of item 16 of the patent scope is declared, wherein: the third oscillating signal is an inverted signal of the first oscillating signal. 18. The switching DC-to-DC converter according to item 1 of the scope of patent application, further comprising: " a fourth power supply channel, coupled to the DC voltage source and the ground 1 with an X-conversion DC voltage source to become a The fourth DC output voltage, which is separated from the first and the second DC wheel output = 45 1237436 Patent No. 092128073 Patent Application No revised line of the patent application after the amended date replaces this voltage , Where: the oscillator further outputs a fourth oscillation signal with a fourth period to the fourth power supply channel; every _ in the fourth period; idle 1 μ meaning, the mid-month 'the brother's four oscillation signal has The edge of the momentary change, # 说 日 日 ^ / in μL, the edge of the transition between beer and the peak of the first oscillation signal occurs simultaneously; the current howl of the fourth vibration signal is called ^ ☆ There is a predetermined time offset between the edge of the second oscillation 4 and the edge of the instantaneous transition pq7; and the fourth power supply channel k > a switching transition is Of the fourth oscillation signal Instant change sides, you rate / occur simultaneously from the heart to move text π U lance four edges. 19 · If the patent application scope i 8 device, where: the predetermined time offset is one and a half of the switching DC to DC conversion cycle of the second item:,: The application claims the switching DC to The fourth period of the DC conversion is equal to the 21st period. For example, the device in the 18th scope of the patent application, where: 、 Switching DC to DC conversion, the fourth vibration and each period, = a pulse vibration signal In the fourth cycle, the rising edge, a pulse width, and a falling edge of 46 1237436 H 092128073 and the instantaneous change of the fourth vibration signal of the brother are the rising edges of Gan Zhi ^. 22. · If the switching DC to DC converter of item 18 of the patent application 'Among them: ", LW ^ The oscillator further outputs a second auxiliary signal to the fourth power supply channel, where the second auxiliary signal It is a ramp wave plate signal, which has a rising part and a falling edge, so that the falling edge occurs at the same time as the edge of the first vibration. 2. The switching DC to DC converter according to item 22 of the patent application scope, wherein: the fourth power supply channel performs slope compensation of the current branch feedback control by the second auxiliary signal. Alas. 4. If the switching DC-DC conversion method of item 22 of the patent application scope, among which: and implement the frontier: the second out of the second line is the oscillator using the second oscillation k and the fourth Oscillation letter 25. For example, the switchable DC to J: W of item π 〃 of the patent application scope, where: the oscillator includes: an auxiliary wheel output terminal for rotating the second auxiliary signal, 47 1237436 思 国 94 Year 6 mesh 9 _______ ”A sample hold amplifier crying ## mmmm ±± is controlled by the second oscillator signal to compare the second auxiliary signal with a reference voltage. One of the sample and hold amplifiers is a sample and hold capacitor. , Coupled between the pumping output and the ground; a voltage-to-current conversion test, 苴 ^ Μ ^ ii ^ 4.… /, the voltage wheel input terminal is coupled to the auxiliary output terminal, and its current output The end-to-end output capacitor is coupled between the auxiliary output terminal and the ground; and the ▲ switching device, #closed between the auxiliary output terminal and the ground, is controlled by the fourth oscillation signal. Switching DC to A current converter includes: a plurality of power supply channels connected in parallel between a DC voltage source plate and a ground; ... an oscillating signal generator including: an oscillating output terminal coupled to one of the plurality of power supply channels first Power supply channel; the peak comparator 'its non-inverting terminal is coupled to a peak set voltage and its inverting terminal is coupled to the oscillating output; a valley comparator whose inverting terminal is coupled to a valley A set voltage and its non-inverting terminal are connected to the oscillating output terminal; a latch 'whose setting input terminal is consumed by an output terminal of the peak comparator and its reset input terminal is coupled to the valley 48 1237436 Patent Application No. 092128073 of the value comparator. No correction after the correction on June 9 ^ an output terminal; a first inverter whose input terminal is coupled to a normal output terminal of the latch A first switching device controlled by the first inverter; a first current source for supplying a first current from the DC voltage source to the oscillation output terminal; a second current source by the first A switching device Control so that a first current flows from the oscillation output to the ground; and a first output capacitor is coupled between the oscillation output and the ground; and an auxiliary signal generator including an auxiliary output 4 ′ coupling A second power supply channel in one of the plurality of power supply channels; a sample-hold magnification write, which is controlled by a four-oscillator generator, and its non-inverting terminal Is coupled to a reference voltage; is coupled to the auxiliary output; an inverting 鳊 T pumping capacitor 1 is connected between an output of the sample amplifier and the ground; σ voltage-to-current conversion write, basin sampling with amplification @ > The eight-voltage input terminal is coupled to the output terminal of the image holding amplifier, and to the auxiliary output terminal; The eight-motor output terminal is coupled to a second output capacitor, bismuth earth; and the port; to the auxiliary output terminal It is lightly connected with the ground and the second switching device on the auxiliary output and the ground. 49 1237436 No. 092128073 surface details The replacement time is controlled by the oscillating signal generator. 27. The switching DC to DC converter according to item 26 of the patent application scope, further comprising: a rising-edge single-shot generator whose input terminal is coupled to the normal output terminal of the latch; and a falling-edge single-shot generator The input end of the generator is consumed by the normal wheel output end of the latch, wherein: / Sample hold amplification is controlled by one of the rising edge single shot generator and the falling edge early shot generator, And the second switching device is controlled by the other of the rising edge single-shot generator and the falling edge single-shot generator. 26 items of switching DC to DC conversion 28. If the scope of the patent application is applied, it further includes: a second inverter input terminal; and a third inverter input terminal, wherein: its input terminal is coupled to the latch The reset of the latch, the input end of which is coupled to the settling sample-and-hold amplifier of the latch, is controlled by the second anti-a not a / 5 ^ Λ the second anti, and the second switching Device family and. Τ ^ ^ in the second inverter is controlled. 29. For example, the switching DC-to-DC conversion 50 of the 26th patent application No. 1237436 patent application is described as' more inclusive ... An inverter device whose input terminal is coupled to the output terminal of the oscillator I, and the output terminal is coupled to Among the plurality of power supply channels and the supply channel is an electric switching DC-DC converter, including:-a first power supply channel, coupled to a direct current f 30. an intermediate voltage source and- The DC voltage source becomes a first DC output power generating surface-second power supply channel, which is lightly connected to the DC voltage source and is used to convert the DC voltage source into a second DC output electric ink surface. The voltage is separated from the first DC output voltage and the oscillator is used to output the first and last numbers to the first power supply channel, and is used to output the first vibration signal with: To the second power supply channel, wherein: in each period of the first period, the first peak, first, and last ff let 11 1 ports now have ~ / σ, a rising portion, from wave Gradually increase to the peak, ―: the decline, and gradually decrease from the peak to the valley, so that at least one switching transition of the first power supply channel occurs in the first oscillation & the rising portion and the falling portion Within the time range covered by the two; and the edge of the instantaneous transition: "Mother-period" The second oscillation signal has an edge of transition, and the edge of the instantaneous transition is at the same time as the peak of the first oscillation signal Occurs, causing at least one switching transition of the second power supply channel to occur at the same time as the edge of the instantaneous transition. 51 1237436 Patent Application No. 092128073 Patent Application of the Republic of China on June 9, 1994. 3 1. The switching DC-DC converter according to item 30 of the patent application scope, wherein: the first power supply channel belongs to a voltage mode power supply channel, and the second power supply channel belongs to a current mode power supply channel. 32. The switching DC-DC converter according to item 30 of the patent application, wherein: the first period is equal to the second 33. For example, the switching DC-to-DC converter in item 30 of the scope of patent application, wherein: the rising part of the first oscillating signal increases linearly. 34. In the switching-type DC to, area of the patent application scope 30 DC converter, wherein: the falling part of the first oscillating signal is linearly reduced. 35. The switching DC-DC converter according to item 30 of the patent application scope, wherein: the first oscillating signal is a triangular wave oscillating signal 3 6. If switching to DC-to-DC conversion in item 30 of the scope of patent application 52 1237436 No. 092128〇73 Huili apply for the scope of application of Ningwei without line Device, wherein:-the second oscillating signal is a pulse oscillating signal, in each of the second period, * a rising edge, -pulse width, and a falling edge, and The transient edge refers to the rising edge. 3J · The switching DC-to-DC converter of item 30 in the patent scope, wherein: the oscillator includes: a composite ratio device for comparing the first oscillating signal with a valley setting voltage; and An inverter 'has an input terminal coupled to an output terminal of the valley comparator for generating the second oscillating signal. 3 8. The switching DC-DC converter according to item 30 of the scope of patent application, wherein: the oscillator includes: a peak comparison benefit used to compare the first oscillation signal with a peak set voltage; a valley value comparison A latch for comparing the first oscillating signal with a valley setting voltage; a latch 'whose setting input is coupled to an output of the peak comparator, and its reset input is coupled to the valley An output terminal of a comparator, used to generate a normal rotation; and 53 1237436 Patent No. 092128073 Patent Application 94 gg 9th revised amended underlined patent application scope replaces this rising edge single-shot generator for In response to this normal output, the second brother's second vibrating signal is generated. 39. The switching DC-DC converter according to item 30 of the patent application scope, wherein: the oscillator further outputs a first auxiliary signal to the second power supply channel, wherein the first auxiliary signal is a ramp wave oscillation The signal has a rising part and a falling edge, so that the falling edge occurs simultaneously with the edge of the instantaneous transition of the second vibrating signal. 40. The switching DC to DC converter according to item 39 of the patent application scope, wherein: the slope compensation of the current mode feedback control is performed by the first auxiliary signal in violation of the second power supply channel. 41. The switching DC-DC converter according to item 39 of the patent application scope, wherein: the oscillator comprises: a peak comparator for comparing the first oscillation signal with a peak set voltage; a valley comparator, Used to compare the first oscillating signal with an under-set voltage; ° a first inverter whose input terminal is coupled to an output of the valley comparator to generate the second oscillating signal; 54 1237436哕 2128〇73 __ ^ Applying a plug range to replace the second inverter, its input terminal is coupled to one of the output terminals of the peak comparator; σσ an auxiliary output terminal for outputting the first auxiliary signal; A sample-and-hold amplifier controlled by the second inverter to compare the first auxiliary signal with a reference voltage; an output terminal and the voltage-to-current converter; the output of the sample-and-hold amplifier is at the auxiliary output terminal ; Its voltage input terminal is connected to the surface, and its current output terminal is coupled to the output valley, coupled between the auxiliary output terminal and the ground; the switching device is connected to the Controlled by an inverter between the auxiliary output terminal and the ground 42. As in the patent application No. 'of which: 41 of the switching DC-DC conversion, the reference voltage is half of the maximum amplitude of the first auxiliary signal 43. According to the scope of the patent application, where: 3 to 9 switching DC to DC conversion, the oscillator includes: a peak comparator value setting voltage; used to compare the first oscillator signal with a peak 55 1237436 A valley comparator for comparing the first oscillating signal with a valley setting voltage; a flash latch 'its setting input is coupled to an output of the peak comparator' and its reset input is coupled to An output of the valley comparator is used to generate a normal output; a rising edge single-shot generator is used to generate the second oscillation signal in response to the normal output; a falling edge single-shot generator is used to receive The normal output; an auxiliary output terminal for outputting the first auxiliary signal; a sample-and-hold amplifier controlled by the falling-edge single-shot generator to compare the first auxiliary signal with a reference voltage; a sample-and-hold A capacitor is coupled between an output terminal of the sample-and-hold amplifier and the ground; the output of a voltage-to-current converter sample-and-hold amplifier is at the auxiliary output; 'the voltage input terminal is connected to the sensor' and its current The output end is integrated with an output capacitor, and is coupled between the auxiliary output end and the ground; and a sword changing device, #combined between the auxiliary output end and the ground , Δ Hai single rising edge generator is controlled. 44 · such as the maximum amplitude of the auxiliary signal · such as the 43rd device in the scope of patent application'where: the reference voltage is the switched DC-to-DC conversion of the first auxiliary item 56 1237436 patent 092128073_ ^ application patent 45. The switching DC-to-DC converter according to item 30 of the patent application, further includes: W ^ a third power supply channel coupled between the DC voltage source and the ground for converting the DC voltage source into a third DC output Voltage, ^ the third DC output voltage is separated from the first and the second direct thunder voltage, where: ^ ^ the vibrator output from one to the third power supply channel with a third period; : In each cycle of the third cycle, the third _ number has — = 1 — trough, — rising portion, which gradually increases from the trough to the peak, and 1 — a falling portion 'gradually decreases from the wave to the trough, Make :: Sheng signal, the wave quake is the wave valley of the first oscillation signal; hour X, and the wave peak of the wave valley of the second oscillation signal occurs at the same time; and the Xth vibration oscillating wave = 4 source supply channel Of Less_Switching transition occurs within this time range.… The switching DC to DC conversion of the items covered by the two in the falling part 46 · For example, the 45th device in the scope of patent application, where: The third vibration signal is the first Inverted signal of a vibrating signal 47. For example, the switching DC-DC conversion of item 30 in the scope of patent application 57 Kun threshold Threshold of the patent application without correction after the correction on June 9, 1994 1237436 箆 〇92128 〇73 patent application device further includes: a fourth power supply channel, coupled between the DC voltage source and the ground, for converting the DC power source into a fourth DC output voltage, the fourth DC output voltage Is separated from the first and the second DC output voltage, wherein: the oscillator further outputs a fourth oscillation signal having a fourth period to the fourth power supply channel; in each of the fourth period , The fourth oscillating signal has a transient transition edge, wherein the transient transition edge occurs simultaneously with the trough of the Hth signal; :: the four transient oscillation edge of the transient transition There is a certain time offset between the edges of the second oscillation and the transition between the two tigers; at least one switching transition of the two power source Γ channels and the edge of the fourth transient transition occur simultaneously. 48. If the device of the 47th scope of the patent application is applied, among them, the predetermined time offset of Qiaozhi Ling to DC conversion is the 20000. 49. The device of the 47th scope of the patent application, of which: Straight-to-DC conversion cycle This fourth cycle is equal to the 58th 1237436th 092128073 ^ 9-day correction after the winding [| line of the application Leeley range to replace the 50. Such as the application of the 47th patent scope of switching DC to DC A converter, wherein: the fourth oscillating signal is a pulse oscillating signal, and each of the fourth period has a rising edge, a pulse width, and a falling edge; and the instant of the fourth oscillating signal The edge of change is the rising edge. 5 1 · If the switching DC-DC converter of item 47 of the patent application 'wherein: the oscillator further outputs a second auxiliary signal to the fourth power supply channel' wherein the second auxiliary signal is a ramp wave oscillation The signal has a rising portion and a falling edge, so that the falling edge occurs simultaneously with the edge of the instantaneous transition of the fourth oscillating signal. 52. The switching DC to DC converter according to item 51 of the patent application scope, wherein: the fourth power supply channel performs slope compensation of current mode feedback control by the second auxiliary signal. 53. The switching DC-to-DC converter according to item 51 of the patent application scope, wherein: the output of the second auxiliary signal is implemented by the oscillator using the second vibration k number and the fourth oscillation signal. 59 1237436 Suffering from Patent Application No. 092128073, the Republic of China, June 9, 1994, J1 ^ 7 ^ Unlined Application Specialist for the Application _Replacement Wherein, the oscillator includes: an auxiliary output terminal for outputting the second auxiliary signal; a sample-and-hold amplifier controlled by the second oscillating signal for comparing the second auxiliary signal with a reference voltage; A sample-and-hold capacitor is coupled between an output terminal of the sample-and-hold amplifier and the ground; a voltage-to-current converter whose voltage input terminal is coupled to the output terminal of the sample-and-hold amplifier, and its current The output terminal is coupled to the auxiliary output terminal; an output valley is coupled between the auxiliary output terminal and the ground; a switching device is coupled to be controlled by the auxiliary oscillation signal. Between the exit of the wheel and the ground, the fourth 601237436 revised page replaced by the diagram on January 7, 1994, picture: 10 11A PULSE1 JLUUL, ΛΑΑΑ / RAMP1 12A power supply channel conversion circuit switching controller PWM1 FBI 14A Power Switching Transistor 15A Voutl Feedback Circuit Oscillator 11B X. PULSE2 JUULJLx ΪΑΛλZ RAMP2 Yout2 11, C PULSE3ULfULJU ^ \ ΔΑΑ7 RAMP3 12C power supply channel 13C conversion circuit switching controller PWM3 FB3 14C power switching transistor 15C Vout3 feedback circuit 11D ^ PULSE4JULfUU RAMP4 12u D power supply channel switching controller PWM4 FB4 Figure 1⑻ 14D Feedback circuit Vout4