TWI236212B - Design method and its architecture of hierarchical adaptive equalizer - Google Patents

Design method and its architecture of hierarchical adaptive equalizer Download PDF

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TWI236212B
TWI236212B TW93115753A TW93115753A TWI236212B TW I236212 B TWI236212 B TW I236212B TW 93115753 A TW93115753 A TW 93115753A TW 93115753 A TW93115753 A TW 93115753A TW I236212 B TWI236212 B TW I236212B
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hierarchical
adaptive
algorithm
layer
adaptive equalizer
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TW93115753A
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TW200541209A (en
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Chien-Hsing Liao
Wei-Min Chang
Tai-Kuo Woo
Shih-Che Lin
Jyh-Horng Wen
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Chung Shan Inst Of Science
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Abstract

A design method and its architecture of hierarchical adaptive equalizer are provided. The design method provides to divide N delay elements into a plurality of adaptive algorithm device, and each adaptive algorithm device has beta delay elements. Secondly, these adaptive algorithm devices are established to be a logic hierarchical tree that has alpha layers. Furthermore, a first layer of the tree has beta<alpha-1> adaptive algorithm devices, the second layer of the tree has beta<alpha-2> adaptive algorithm devices, and the last layer has one adaptive algorithm device.

Description

1236212 13679twf.doc/006 玖、發明說明: 【發明所屬之技術領域】 本發明是有關於一種適應性等化器,且特別是有關於 一種階層式適應性等化器。 【先前技術】 近年來,由於通訊技術及市場需求之快速發展’使得 行動通訊之用戶人口急遽地增加。然而,由於現有的通訊 資源有限(如頻寬)及環境條件(如地形)限制’爲解決 這些問題,諸多適應性及先進之通訊技術及系統不斷發展 中,而其中適應性等化技術(Adaptive Equalizer Technique)扮演著十分重要的角色,因其使用的演算法 (Algorithm)及設計架構將會影響整個通訊系統的執行效 能。等化器之設計分類可依種類(Type)、結構(Stmcture), 及演算法(Algorithm)等作分類。 依種類來分,等化器一般上而言可分爲兩種,一是線 性等化器(Linear Equalizer ),另一是非線性等化器 (Nonlinear Equalizer);而就結構劃分而言,不管線性或 非線性別,一般皆以橫向(Transversal)型結構的等化器 演算法爲主,線性等化器以FIR ( Finite Impulse Response) 橫向型結構爲代表,而非線性等化器部分則以DFE (Decision,Feedback Equalizer)橫向型結構設計爲主;至 於演算法分類則包羅萬象,但大抵皆以傳統之演算法設計 架構爲主,如 LMS ( Least Mean Square)、RLS ( Recursive Least Square)、CMA ( Constant Modulus Algorithm)等0 1236212 13679twf.doc/006 請參照圖12,其係繪示習知一種FIR橫向型適應性等 化器的設計架構圖。在習知之技術中,適應性等化器設計 是一個可動態調整的等化器,它的組成包含3個主要部分: (1 ) 一組輸入訊號向量(Input Signal Vector),( 2) —組 相對應的權重向量(Weighting VeCto〇,( 3)與一個調整 機制-適應性控制演算器(Adaptive Control Algorithm), 此調整機制係適應性等化器的核心。 請接著參照圖13,其係繪示習知一種DFE橫向型適 應性等化器的設計架構圖。在習知之技術中,DFE橫向型 適應性等化器是由兩個濾波器所組成的,一個是前向濾波 器 1206 (Feed-forward Filter),另一個是迴授濾波器 1208 (Feedback Filter)。而每個濾波器的運作皆與前述之線性 者原理相同。但在權重更新部分,DFE的權重更新是由預 期響應減去DFE最後的輸出(即Data Out)所產生的 誤差啦)來調整個別濾波器的權重,而不是以雄)減去個別 濾波器輸出所產生的誤差來調整權重。一般而言,迴授濾 波器1208的長度比前向濾波器1206要短。前向濾波器1206 的功能是將瀘波器估計的訊號輸出送給迴授濾波器1208 作第二次的判定。而迴授濾波器1208的功能是將前向濾 波器1206所傳送的訊號作進一步的濾波處理,目的是爲 了消除前一次訊息因多重路徑所遺留下來的訊號。所以當 通訊環境較差時,使用DFE將有較顯著的效果。 進一步而言,就適應性控制演算法(Adaptive Control Algorithm)而言,大部份的線性或非線性適應性演算法係 1236212 13679twf.doc/006 根據是否使用校準序列(Training Sequence),將演算法分 成兩類。一類的演算法係使用校準序列去調整權重向量 (Weighting Vectors),對於這類的演算法其被稱爲非盲目 式(Non-Blind)適應性演算法,傳送端與接收端兩者皆 知要傳送校準序列外0,在校準期間,傳送端發送訊號給 接收端,接收端在接收到校準序列#0後,使用以0的資訊 去計算最佳的權重向量。俟接收端校準結束後’發送 端才開始傳送資料,此時接收端再使用先前計算過的權® 向量來處理所接收的訊號;另一類是不需使用校準序列’ 對於這類的演算法其被稱爲盲目式(Blind )適應性演算法° 盲目式(Blind)等化器(如DFE-CMA),因無校準序列 可預先進行估測,故必須修改預期響應部分’但整Μ 架構的設計都大致相同。 請參照圖14,其繪示習知一種LMS演算法示意圖’ 其係包含了以下兩個基本的處理程序:濾波處理1410 (Filtering Process )及適應性處理 1412 (Adaptive1236212 13679twf.doc / 006 (1) Description of the invention: [Technical field to which the invention belongs] The present invention relates to an adaptive equalizer, and in particular to a hierarchical adaptive equalizer. [Previous Technology] In recent years, due to the rapid development of communication technology and market demand ', the mobile communication user population has increased rapidly. However, due to the limitation of existing communication resources (such as bandwidth) and environmental conditions (such as terrain), in order to solve these problems, many adaptive and advanced communication technologies and systems are constantly developing, and among them, adaptive equalization technology (Adaptive Equalizer Technique) plays a very important role, because the algorithm and design architecture it uses will affect the performance of the entire communication system. The design classification of the equalizer can be classified according to Type, Structure, and Algorithm. According to the type, the equalizer can be divided into two types in general, one is a linear equalizer (Linear Equalizer), and the other is a non-linear equalizer (Nonlinear Equalizer); and in terms of structural division, regardless of linearity Or non-linear, generally it is equalizer algorithm of transversal structure, linear equalizer is represented by FIR (Finite Impulse Response) horizontal structure, and non-linear equalizer part is DFE. (Decision, Feedback Equalizer) is mainly designed for horizontal structure. As for algorithm classification, it is all-inclusive, but most of them are based on traditional algorithm design architecture, such as LMS (Least Mean Square), RLS (Recursive Least Square), CMA ( Constant Modulus Algorithm), etc. 0 1236212 13679twf.doc / 006 Please refer to FIG. 12, which shows a design architecture diagram of a conventional FIR horizontal adaptive equalizer. In the known technology, the adaptive equalizer design is a dynamically adjustable equalizer. Its composition includes three main parts: (1) a set of Input Signal Vectors, (2) — a set of Corresponding weight vector (Weighting VeCto0, (3) and an adjustment mechanism-Adaptive Control Algorithm (Adaptive Control Algorithm), this adjustment mechanism is the core of the adaptive equalizer. Please refer to Figure 13, which shows Shows the design and architecture diagram of a DFE horizontal adaptive equalizer. In the conventional technology, the DFE horizontal adaptive equalizer is composed of two filters, one is the forward filter 1206 (Feed -forward Filter), the other is the feedback filter 1208 (Feedback Filter). The operation of each filter is the same as the linear principle described above. However, in the weight update part, the weight update of the DFE is subtracted from the expected response. The final output of the DFE (ie, the error generated by the Data Out) is used to adjust the weight of the individual filters, rather than the male) to subtract the error generated by the output of the individual filters to adjust the weight. Generally, the length of the feedback filter 1208 is shorter than that of the forward filter 1206. The function of the forward filter 1206 is to send the signal output estimated by the wave filter to the feedback filter 1208 for a second decision. The function of the feedback filter 1208 is to further filter the signal transmitted by the forward filter 1206, in order to eliminate the signal left by the previous message due to multiple paths. Therefore, when the communication environment is poor, the use of DFE will have a significant effect. Furthermore, as far as adaptive control algorithms are concerned, most linear or non-linear adaptive algorithms are 1236212 13679twf.doc / 006. Divided into two categories. One type of algorithm uses a calibration sequence to adjust the weighting vectors. For this type of algorithm, it is called a Non-Blind adaptive algorithm. Both the transmitting end and the receiving end need to know 0 is transmitted outside the calibration sequence. During the calibration, the transmitting end sends a signal to the receiving end. After receiving the calibration sequence # 0, the receiving end uses the information of 0 to calculate the optimal weight vector.后 After calibration at the receiving end, 'the sending end only starts to send data, at this time the receiving end uses the previously calculated weight ® vector to process the received signal; the other is that no calibration sequence is needed.' For this type of algorithm, It is called Blind adaptive algorithm ° Blind equalizer (such as DFE-CMA), because there is no calibration sequence can be estimated in advance, it is necessary to modify the expected response part 'but the entire M architecture The designs are roughly the same. Please refer to FIG. 14, which shows a schematic diagram of a conventional LMS algorithm ’, which includes the following two basic processing programs: Filtering Process 1410 (Filtering Process) and Adaptive Process 1412 (Adaptive

Process)。前項處理所包含的工作係藉由一組輸入訊號的 運算處理,產生濾波器的輸出,而後再將濾波器產生的輸 出與預期響應比較,以產生估計誤差;至於後項之適應性 處理則利用產生的誤差,動態調整濾波器的權重向量値’ 以上這兩個處理程序是結合在一起運作的。 根據圖14所示的LMS演算法示意圖,其基本運算式 表示如下: 橫向1410濾波器輸出:〆灸)=w⑷r(A:)。 1236212 13679twf.doc/006 估計誤差:啦)=^⑻j⑻。 適應性權重控制機制權重更新 1412 : ‘(灸 + 1)= ‘(幻 + //!·(々)〆(灸)。 其中,A表示重複運算(iteration)的順序,而步距大 小(step size) //是用來控制收斂的速率。3认)表示期望 響應(desired response),啦)表示估計誤差。LMS演算 法係屬於預測變化率(Stochastic Gradient)演算法的一種, 因爲它是根據輸入資料向量r(A),瞬間估計變化率向量, 因此這裡的變化率向量是一個隨機向量。LMS演算法每次 重覆運算(iteration)時,需要2N+1次的複數乘法(Complex Multiplications),此處的N表示基本元素(Elements)的 個數,因此LMS的計算複雜度是0(Λ〇。LMS演·算法的輸 出響應是由3個係數所決定的:(1)步距大小(step size) //,(2)權重的個數,(3)輸入資料向量之相關矩陣的特 徵値(Eigenvalue)。 請參照圖15,其繪示習知一種RLS演算法設計示意 圖。在習知之技術中,RLS演算法設計是Kalman Filter的 一個特例,但其不同於LMS演算法,因爲LMS演算法是 用最陡遞減法(Steepest-Descent)的方法來更新它的權重 向量;而RLS係使用最小平方(Least Square)的方式來 調整權重向量。RLS演算法的重要特徵是它使用包含在輸 入訊號中的資訊,因此使得它的收斂速率,一般而言’比 單純的LMS要來的快速。但這相對的也使得RLS演算法 的計算複雜度增加。RLS演算法因爲具有快速的收斂率和 1236212 13679twf.doc/006 免除特徵値擴散(Eigen-value Spread)的特性,因此是一 個十分受到歡迎與重要的演算法。在指數權重係數 (Exponential Weighting Factor)的 RLS 演算法中,選擇 第灸次的權重向量去最小化(Minimize)主値函數(CostProcess). The work involved in the previous process is to generate the output of the filter by a set of input signal operations, and then the output generated by the filter is compared with the expected response to generate an estimation error; as for the adaptive processing of the latter, the use of The resulting error is a dynamic adjustment of the weight vector 权 'of the filter. The above two processing procedures work together. According to the schematic diagram of the LMS algorithm shown in Fig. 14, the basic operation formula is expressed as follows: Transverse 1410 filter output: 〆moxibustion) = w⑷r (A :). 1236212 13679twf.doc / 006 Estimation error: la) = ^ ⑻j⑻. Adaptive weight control mechanism weight update 1412: '(moxibustion + 1) =' (Magic + //! · (々) 〆 (moxibustion). Among them, A represents the order of iteration, and the step size (step size) // is used to control the rate of convergence. 3) indicates the desired response, and) indicates the estimation error. The LMS algorithm is a type of Stochastic Gradient algorithm, because it estimates the change rate vector instantaneously based on the input data vector r (A), so the change rate vector here is a random vector. Each iteration of the LMS algorithm requires 2N + 1 complex multiplications (Complex Multiplications), where N represents the number of basic elements, so the calculation complexity of the LMS is 0 (Λ 〇. The output response of the LMS algorithm is determined by three coefficients: (1) step size //, (2) the number of weights, (3) the characteristics of the correlation matrix of the input data vector値 (Eigenvalue). Please refer to Figure 15 for a schematic diagram of the design of a conventional RLS algorithm. In the known technology, the RLS algorithm design is a special case of the Kalman Filter, but it is different from the LMS algorithm because the LMS algorithm The method is to use the steepest-descent method to update its weight vector. The RLS system uses the Least Square method to adjust the weight vector. An important feature of the RLS algorithm is that it uses the The information in the signal therefore makes its convergence rate, in general, 'faster than that of a simple LMS. But this also makes the computational complexity of the RLS algorithm increase. The RLS algorithm has a fast Convergence rate and 1236212 13679twf.doc / 006 Eliminate the characteristics of Eigen-value Spread, so it is a very popular and important algorithm. In the RLS algorithm of the Exponential Weighting Factor, choose Weight vector deminimization (Minimize) principal unit function (Cost

Function ) s(A:) = if|e(/)|2,此處 e(z·)表示預期響應 _)與 /=1 輸出K0之間的誤差,A是一個接近1但小於1的正常數。 然而,在靜止的環境中^將等於1,因爲所有過去與現在 的資料已有適當的權重。RLS演算法可從主値函數運算式 中,經由平方的展開與使用反矩陣原理取得。依據圖15 的RLS演算法示意圖,其基本運算式表示如下: #xl的增益向量:k⑷: 先前的估計誤差:㈧- - l)r(A:), w&quot;V _ l)r⑻是 橫向濾波器1510輸出。 適應性權重控制機制權重1512權重更新:Function) s (A :) = if | e (/) | 2, where e (z ·) represents the error between expected response _) and / = 1 output K0, A is a normal close to 1 but less than 1. number. However, ^ will be equal to 1 in a static environment, because all past and present data is appropriately weighted. The RLS algorithm can be obtained from the main unit function expression through the expansion of the square and the use of the inverse matrix principle. According to the schematic diagram of the RLS algorithm shown in Fig. 15, the basic expression is as follows: #xl gain vector: k⑷: previous estimation error: ㈧--l) r (A :), w &quot; V _ l) r⑻ is a lateral filter 1510 output. 1512 weight update of adaptive weight control mechanism weight:

Λ A w(^) = w(^ -1) + k(^\k) , R-1 (幻=A-iR-1 (A: 一 1) 一;1-4(幻1·&quot; (QR-1 认一 1)。 又是權重係數,可用來改變等化器的執行效能,如果 通道的時間不變,^可以被設定爲1。但如果通道是隨時 間不斷變化,則;I可設定在0.8到1之間的値(0.8 &lt;;L&lt; 1)。 A値對收斂率並沒有影響,但它決定RLS的追蹤 (Tracking)能力,;L値較小,其濾波器追蹤能力越好, 但若是/1値太小,則濾波器會不穩定。RLS演算法需要 4iV2+4iV + 2次的複數乘法計算,此處的#表示陣列元素的個 數。因此RLS的計算複雜度是0(iV2)。 1236212 13679twf.doc/006 另外,CMA演算法設計方式係使用常係數(Constant Modulus)標準(簡稱CM)來最小化(Minimize)等化器 的輸出變異,而此標準使用一個特定的最小化常係數主値 函數(CM Cost Function ),此常係數主値函數表示成 /〇1/=五|少(灸)|2-/)2,/7 = 2,0 = 2,此處&gt;^)表示等化器的估計輸 出,而r是一個散射常數(Dispersion Constant),盲目式 CMA適應性演算法是不需要使用校準序列,其係直接利 用所接收目標訊號的已知特性來求得估計誤差。許多數位 通訊的訊號都具有一些特性,例如:常數係數的特性 (Constant Modulus Property)或頻譜自我同調(SpectralΛ A w (^) = w (^ -1) + k (^ \ k), R-1 (Magic = A-iR-1 (A: One 1) One; 1-4 (Magic 1 · &quot; ( QR-1 recognizes 1). It is also a weight coefficient, which can be used to change the performance of the equalizer. If the time of the channel is constant, ^ can be set to 1. But if the channel is constantly changing with time, then I can値 (0.8 &lt;; L &lt; 1) set between 0.8 and 1. A 値 has no effect on the convergence rate, but it determines the tracking ability of the RLS, and L 値 is small, its filter tracking ability The better, but if / 1 値 is too small, the filter will be unstable. The RLS algorithm requires 4iV2 + 4iV + 2 complex multiplication calculations, where # represents the number of array elements. Therefore, the calculation complexity of RLS It is 0 (iV2). 1236212 13679twf.doc / 006 In addition, the CMA algorithm is designed using the Constant Modulus standard (CM) to minimize the variation of the output of the equalizer, and this standard uses a A specific minimized constant coefficient principal function (CM Cost Function), this constant coefficient principal function is expressed as / 〇1 / = 五 | 少 (菇) | 2-/) 2, / 7 = 2, 0 = 2, Here &gt; ^) means equalization The estimated output of the receiver is r, and r is a dispersion constant. The blind CMA adaptive algorithm does not require the use of a calibration sequence. It directly uses the known characteristics of the received target signal to obtain the estimation error. Many digital communication signals have some characteristics, such as: Constant Modulus Property or Spectral

Self-Coherence)特性。由於通訊系統中具有干擾、雜訊 和不斷隨時間變化的頻道,所以當訊號在接收器上被接收 時,這些訊號的特性可能會受到影響。在接收器設計上嘗 試去重建這些特性,並希望藉由重建這些特性使輸出成爲 一個傳輸的重建訊號。許多訊號都具有一個常數訊號封包 (Constant Envelope)例如:PSK、FM 等。當訊號透過 頻道傳送時,可能會產生失真的狀況。CMA能夠透過調 整適應性之權重向量,將輸出變異減至最小。CMA試圖 去最小化主値函數運算式雄) = j|&gt;wr-&lt;|,CMA演算法的 收斂是仰賴該運算式中的Pβ係數。此處係假設 ρ = 2,g = 2,且其基本運算式表不如下·· 濾波器輸出:= w〃⑷r⑷。 估計誤差:啦)=*&gt;^)(1-|&gt;#)|2)。 權重更新:w(A + l) = w(A:) + /ir(/:y(A:)。 1236212 13 679twf.doc/006 從上列運算式中,可以看到當陣列輸出Ly(l)| = l時,則 誤差訊號爲〇。上述三個運算式與LMS演算法之三個運算 式相較十分相似,且CMA的3;(4yW|2項和LMS演算法的 預期訊號#0扮演相同的角色,CMA演算法不需要藉由參 考的期望訊號外〇,來產生接收器上的誤差訊號。本CMA 演算法設計方式目前已廣泛地被用來作爲盲目式接收器的 設計演算法架構。 綜合以上所述,習知之LMS演算法只使用前一次的 均平方誤差(Mean Square Error)來調整權重向量’所以 它有較低的計算複雜度。但因爲具有大的特徵値擴散效 應,所以它的缺點是收斂速度較於緩慢,且當等化器接點 (tap)增加時,它的收斂效果也會逐漸變差。 而RLS演算法中,因其重要特徵是它使用包含在輸入 訊號中的資訊,因此使得它的收斂速率比單純的LMS要 來的快速。但這相對的也使得RLS演算法的計算複雜度增 加。 CMA演算法設計方式係使用常係數(Constant Modulus)標準(簡稱CM)來最小化(Minimize)等化器 的輸出變異,但使用CMA演算法具有兩個缺點:(1)收 斂速率相當緩慢,(2)由於常係數主値函數的非中凸特性 (Non-Convexity ),使得等化器權重向量可能收斂到一個 區域的最小値(Local Minimum),而非全域之最小値(Global Minimum),因此導致訊號間的干擾(ISI)無法完全地被 消除。 11 1236212 13679twf.doc/006 【發明內容】 本發明的目的就是在提供一種階層式適應性等化器之 設計方法,係以「階層式」(Hierarchical)的設計架構來 發展新的適應性等化器演算法模型及設計架構,其係將基 本元素長度爲#的濾波器(或稱等化器)任意分成許多適 應性演算器處理,並將這些適應性演算器建立成邏輯上的 階層樹(Hierarchical Tree)。 本發明的再一目的是提供一種階層式適應性等化器架 構,其係以階層式劃分方式分別處理各階層中及各適應性 演算器的演算法運算,以將輸入的訊號分成階層式的適應 性演算器,然後再各別做的運算處理。因此,可使得輸出 是較精確、收斂速度較快、穩定靜止時MSE誤差値最小, 同時具較低之計算複雜度的資料。 本發明提出一種階層式適應性等化器之設計方法,此 設計方法包括提供N個延遲元素,接著將這些延遲元素分 割成多數個適應性演算器,並使每一適應性演算器係具有 召個延遲元素。其次,將這些適應性演算器建立成邏輯上 之一階層樹由上而下之第一層,並使此階層樹具有α層。 而且,使階層樹由上而下之第一層係具有/3 個適應性 演算器,由上而下之第二層具有θ 個適應性演算器, 最後一層則具有一個適應性演算器。其中,Ν、α與沒均 爲大於等於1的正整數,且Ν大於等於召。 依照本發明的較佳實施例所述,上述之階層樹由上而 下之第一層的輸出係爲階層樹由上而下之第二層的輸入。 12 1236212 13679twf.doc/006 依照本發明的較佳實施例所述,上述之階層樹之最後 一層之輸出係爲階層式適應性等化器架構的輸出。 本發明再提出一種階層式適應性等化器架構,其特徵 在於具有一階層樹,此階層樹具有α層,且階層樹由上而 下之第一層係具有/3 個適應性演算器,第二層具有冷α _2個適應性演算器最後一層則具有一個適應性演算器。其 中,々係爲每一適應性演算器內之延遲元素個數,並且α 與/3均爲大於等於1的正整數。 依照本發明的較佳實施例所述,上述之階層式適應性 等化器架構係具有Ν個延遲元素。其中Ν等於/3 &quot;,且Ν 爲大於等於1的正整數以及Ν大於等於/5。 依照本發明的較佳實施例所述,上述之階層樹由上而 下之第一層的輸出係爲階層樹由上而下之第二層的輸入。 依照本發明的較佳實施例所述,上述之階層樹之最後 一層之輸出係爲階層式適應性等化器架構的輸出。 依照本發明的較佳實施例所述,上述之適應性演算器 係爲以一運算法執行最小化運算處理與個別更新適應性演 算器的權重。 本發明因採用階層式之等化器設計方法及架構優點, 因此能夠有效改善收斂速率、改善既有演算法的追蹤能 力,且當通訊環境變差時,效果相對愈形顯著、有效降低 計算複雜度。另外,階層式的設計可擴展到多階層上,且 不限定於線性等化器,也能廣泛地應用於DFE等非線性 等化器設計上。 13 1236212 13679twf.doc/006 爲讓本發明之上述和其他目的、特徵和優點能更明顯 易懂,下文特舉一較佳實施例,並配合所附圖式,作詳細 說明如下。 【實施方式】 請同時參照圖1A與圖1B,其分別繪示依照本發明一 較佳實施例的一種階層式適應性等化器架構圖與階層式適 應性等化器設計方法流程圖。 在本實施例中,此設計方法係爲首先提供N個延遲元 素102 (sl22)。其中,熟悉此技藝者可以輕易知曉,延遲 元素可以是濾波器或等化器,但均不以此爲限。 接著將這些延遲元素分割成多數個適應性演算器 104,並使每一適應性演算器係具有/3個延遲元素(sl24)。 其中,係採#進行適應性演算器的分割,此處α所代表的 意義是分割的層數,#代表未分割時全部的基本元素個 數,而每個適應性演算器內的元素個數是&gt;0 = #。 其次,將這些適應性演算器建立成邏輯上之一階層樹 由上而下之第一層,並使此階層樹具有α層。而且,使階 層樹由上而下之第一層係具有/3 α ^個適應性演算器,由 上而下之第二層具有/5 個適應性演算器,最後一層則 具有一個適應性演算器(sl26)。其中,階層式架構全部 的適應性演算器數計算方式爲l + 。 其中,N、α與々均爲大於等於1的正整數,且N大 於等於/3,而Ν等於/3 α。 1236212 13679twf.doc/006 在本實施例中,每一個適應性演算器中作最小化的運 算處理,每一適應性演算器內都個別地執行適應性控制演 算法,與個別更新適應性演算器的權重。並以第一層適應 性演算器的輸出(必須注意的是,此處的輸出是第一層輸 入訊號乘上更新過後的權重),作爲第二層適應性演算器 的輸入,而第二層適應性演算器的輸出則是濾波器真正的 輸出,並且此種方法也可用於多階層處理。 在本發明之較佳實施例中,本發明之階層式適應性等 化器架構係適用於傳統之線性或非線性適應性等化器演算 法(如 LMS、RLS、CMA、DFE-LMS、DFE-RLS 及 DFE-CMA等),甚或是其彼此間之複合式(Hybrid),但均不以 此爲限。 爲了詳細說明本發明之階層式方法之多階層的架構, 且爲了程式模擬與說明的方便’將在以下分別說明二階層 式適應性等化器架構與三階層式適應性等化器架構。其 中,等化器的真正輸出可以寫成,此處&lt;表示最 後一層適應性演算器的第&amp;個權重’而 &lt;表示最後一層適 應性演算器的第々個輸入訊號。 請參照圖2,假設有16個延遲陣列元素(# = 16),根據 上述的分害!J方式,且將它們分成2層(α = 2)處理,每一適 應性演算器的延遲陣列元素是4個Μ = 。因此,第1層 具有4個適應性演算器,而第2層則有1個適應性演算器。 圖2係以&lt;與&lt;符號來分別表示,第/層第/個適應性演算 15 1236212 13679twf.doc/006 器第y·個元素的輸入訊號鹚權重(在圖3中也是使用同樣 的表示法)。因此,在第i層中,適應性演算器的輸入訊 號分別被表示成β乂, (β,β,γ4Κ)。而在第2靨中只有一個適應性演算器,它被 表示成«,〃122,^〃124)。在第1層與第2層間訊號的輸入關係 我們可以表示成: r\\ = ^1/11 + wi2ri2 + wnrn + J r{l = w\/lx + wl22r2l2 + wj3r23 + wj4r2l4 ^ = W3ir31 + W32r32 + V33 + 心3丨4,r丨卜 W;,4丨丨 + W:2r:2 + 心丄 + 心么 ^ 由於在階層式的方法中,最後一層的輸出才是等化器 真正的輸出。所以在這個範例中,第2層的輸出表示等化 器真正的輸出’我們可將此範例的等化器輸出表示成 。 在圖3中,假設有27個延遲陣列元素(# = 27),根據 階層式方法的分割方式,將它們分成3層(α = 3)處理,每 一適應性演算器的延遲陣列元素是3個〇0 = 3)。因此,第1 層具有9個適應性演算器,第2層則有3個適應性演算器, 而第3層則有1個適應性演算器,此分割後的結果,在第 1層中,適應性演算器的輸入訊號分別被表示成、 (厂21,广22,广23)、(厂31,厂32,厂33)、(广4丨,广42,厂43)、(广51,厂52,广53)、(’61,’62,广63)、 (广71,厂72,厂73)、(厂8丨,广82,厂83)、(广91,广92,厂93) 〇 第 2 層可表示成:(rK%)、(r22pr222,r223 )、(&lt;,r322,r323 )。而 在第3層中只有一個適應性演算器,它被表示成(r^rK)。 在第1層與第2層間訊號的輸入關係我們可以表示成: β = « + « « , 4 = « « + «3 , 1236212 13679twf.doc/006 厂丨3 - &gt;^3丨’3丨 + W32&quot;32 + W33r33 ^22 ~ ^51^51 ^52^52 ^53^53 r31 — w1{r7{ + w72rj2 + w13^13 r33 - w91r91 + w92r92 + w93r93 ° 而在第2層與第 成·· + 々4丨2 + « β = « + « + « θ ϋ+«2+«3 3層間訊號的輸入關係可以被表示 4=0«2+«3 , β = «1 + «2 + «3 , 4 = « « + «。Self-Coherence) feature. Because communication systems have interference, noise, and constantly changing channels, the characteristics of these signals may be affected when they are received at the receiver. Try to reconstruct these characteristics in the receiver design, and hope to reconstruct the characteristics so that the output becomes a transmitted reconstruction signal. Many signals have a constant signal envelope (Constant Envelope) such as: PSK, FM, etc. When the signal is transmitted through the channel, distortion may occur. CMA can minimize the variation of output by adjusting the adaptive weight vector. The CMA tries to minimize the main unit function expression.) = J | &gt; wr- &lt; |, the convergence of the CMA algorithm depends on the Pβ coefficient in the expression. It is assumed here that ρ = 2, g = 2, and the basic expression is not as follows: · Filter output: = w〃⑷r⑷. Estimation error: la) = * &gt; ^) (1- | &gt;#) | 2). Weight update: w (A + l) = w (A :) + / ir (/: y (A :). 1236212 13 679twf.doc / 006 From the above expressions, you can see that when the array outputs Ly (l ) | = l, the error signal is 0. The above three expressions are very similar to the three expressions of the LMS algorithm, and the CMA is 3; (4yW | 2 terms and the expected signal of the LMS algorithm # 0 Playing the same role, the CMA algorithm does not need to refer to the expected signal outside the zero to generate an error signal on the receiver. This CMA algorithm design method has been widely used as a blind receiver design algorithm. Architecture. Based on the above, the conventional LMS algorithm only uses the previous Mean Square Error to adjust the weight vector ', so it has a lower computational complexity. However, because of its large feature 値 diffusion effect, So its disadvantage is that the convergence speed is slower, and its convergence effect will gradually worsen when the equalizer taps increase. However, the important feature of RLS algorithm is that it uses the The information in the signal, so its convergence rate is faster than that of a simple LMS It ’s fast. But this also makes the RLS algorithm more complicated. The CMA algorithm is designed using the Constant Modulus standard (CM) to minimize the output variation of the equalizer. However, the use of CMA algorithms has two disadvantages: (1) the convergence rate is quite slow, and (2) the non-convexity of the principal coefficient function with constant coefficients, so that the equalizer weight vector may converge to a region of Local Minimum, not the Global Minimum, therefore, the inter-signal interference (ISI) cannot be completely eliminated. 11 1236212 13679twf.doc / 006 [Abstract] The purpose of the present invention is to Provide a hierarchical adaptive equalizer design method, which uses the "Hierarchical" design architecture to develop a new adaptive equalizer algorithm model and design architecture, which is based on the basic element length of # Filters (or equalizers) are arbitrarily divided into many adaptive calculus processors, and these adaptive calculus are built into a logical hierarchical tree (Hierarchical Tre e). Another object of the present invention is to provide a hierarchical adaptive equalizer architecture, which processes the algorithmic operations of each hierarchy and each adaptive calculator separately in a hierarchical manner to divide the input signal into Hierarchical adaptive calculus, and then do separate calculations. Therefore, it can make the output more accurate, fast convergence speed, minimum MSE error 稳定 at stable stationary, and data with lower calculation complexity. The invention proposes a method for designing a hierarchical adaptive equalizer. The design method includes providing N delay elements, and then dividing these delay elements into a plurality of adaptive calculiers. Delay elements. Secondly, these adaptive calculi are established as a logical first hierarchical tree from top to bottom, and this hierarchical tree has an alpha layer. Moreover, the first layer of the hierarchy tree has / 3 adaptive calculus, the second layer from top to bottom has θ adaptive calculus, and the last layer has an adaptive calculus. Among them, N, α, and N are all positive integers greater than or equal to 1, and N is greater than or equal to the sum. According to a preferred embodiment of the present invention, the output of the first layer of the hierarchical tree from the top to the bottom is the input of the second layer of the hierarchical tree from the top to the bottom. 12 1236212 13679twf.doc / 006 According to the preferred embodiment of the present invention, the output of the last layer of the above hierarchical tree is the output of the hierarchical adaptive equalizer architecture. The present invention further proposes a hierarchical adaptive equalizer architecture, which is characterized by a hierarchical tree having an alpha layer, and the first layer of the hierarchical tree from top to bottom has / 3 adaptive calculators. The second layer has cold α _2 adaptive calculus. The last layer has an adaptive calculus. Among them, 々 is the number of delay elements in each adaptive calculus, and α and / 3 are positive integers greater than or equal to 1. According to a preferred embodiment of the present invention, the above-mentioned hierarchical adaptive equalizer architecture has N delay elements. Where N is equal to / 3, and N is a positive integer greater than or equal to 1 and N is greater than or equal to / 5. According to a preferred embodiment of the present invention, the output of the first layer of the hierarchical tree from the top to the bottom is the input of the second layer of the hierarchical tree from the top to the bottom. According to the preferred embodiment of the present invention, the output of the last layer of the hierarchical tree is the output of the hierarchical adaptive equalizer architecture. According to a preferred embodiment of the present invention, the adaptive calculator described above is a algorithm that performs a minimization operation and individually updates the weight of the adaptive calculator. The invention adopts the hierarchical equalizer design method and the advantages of the architecture, so it can effectively improve the convergence rate and improve the tracking ability of the existing algorithm. When the communication environment becomes worse, the effect becomes more significant and the calculation complexity is effectively reduced. degree. In addition, the hierarchical design can be extended to multiple levels and is not limited to linear equalizers. It can also be widely used in the design of non-linear equalizers such as DFE. 13 1236212 13679twf.doc / 006 In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings. [Embodiment] Please refer to FIG. 1A and FIG. 1B at the same time, which respectively illustrate a hierarchical adaptive equalizer architecture diagram and a hierarchical adaptive equalizer design method flowchart according to a preferred embodiment of the present invention. In this embodiment, the design method is to first provide N delay elements 102 (sl22). Among them, those familiar with the art can easily know that the delay element can be a filter or an equalizer, but they are not limited to this. These delay elements are then divided into a plurality of adaptive calculus 104, and each adaptive calculus system has / 3 delay elements (sl24). Among them, the system adopts # for the segmentation of the adaptive calculus. Here, the meaning of α is the number of layers to be segmented, # represents the number of all basic elements when not divided, and the number of elements in each adaptive calculus. Yes &gt; 0 = #. Secondly, these adaptive calculi are built into a logical hierarchical tree from the top to the bottom, and this hierarchical tree has an α layer. Moreover, the first layer of the hierarchy tree has / 3 α ^ adaptive algorithms, the second layer from top to bottom has / 5 adaptive algorithms, and the last layer has an adaptive algorithm.器 (sl26). Among them, the calculation method of the total number of adaptive calculus in the hierarchical structure is l +. Among them, N, α, and 々 are all positive integers greater than or equal to 1, and N is greater than or equal to / 3, and N is equal to / 3 α. 1236212 13679twf.doc / 006 In this embodiment, each adaptive calculus is minimized, and each adaptive calculus executes the adaptive control algorithm individually and updates the adaptive calculus individually. the weight of. And take the output of the first layer of adaptive calculus (it must be noted that the output here is the input signal of the first layer multiplied by the updated weight) as the input of the second layer of adaptive calculus, and the second layer The output of the adaptive calculus is the true output of the filter, and this method can also be used for multi-level processing. In a preferred embodiment of the present invention, the hierarchical adaptive equalizer architecture of the present invention is applicable to traditional linear or non-linear adaptive equalizer algorithms (such as LMS, RLS, CMA, DFE-LMS, DFE -RLS, DFE-CMA, etc.), or even their hybrids, but they are not limited to this. In order to explain the multi-level architecture of the hierarchical method of the present invention in detail, and for the convenience of program simulation and description, the two-level adaptive equalizer architecture and the three-level adaptive equalizer architecture will be described respectively below. Among them, the real output of the equalizer can be written here, where &lt; represents the & weight of the last layer of adaptive calculus &apos; and &lt; represents the first input signal of the last layer of adaptive calculus. Please refer to FIG. 2. Assume that there are 16 delay array elements (# = 16). According to the above-mentioned method of splitting damage! J, and divide them into 2 layers (α = 2) for processing, the delay array elements of each adaptive algorithm It is 4 M =. Therefore, the first layer has 4 adaptive calculus, and the second layer has 1 adaptive calculus. Figure 2 is represented by the &lt; and &lt; symbols, respectively, the first / layer / adaptation calculation 15 1236212 13679twf.doc / 006 The input signal 鹚 weight of the y-th element of the device (the same is used in Figure 3 Notation). Therefore, in the i-th layer, the input signals of the adaptive calculator are expressed as β 乂, (β, β, γ4K), respectively. In 靥 2, there is only one adaptive calculus, which is represented as «, 〃122, ^ 〃124). The input relationship of the signals between the first layer and the second layer can be expressed as: r \\ = ^ 1/11 + wi2ri2 + wnrn + J r {l = w \ / lx + wl22r2l2 + wj3r23 + wj4r2l4 ^ = W3ir31 + W32r32 + V33 + heart 3 丨 4, r 丨 bu W ;, 4 丨 丨 + W: 2r: 2 + heart 丄 + heart? ^ In the hierarchical method, the output of the last layer is the real output of the equalizer . So in this example, the output of layer 2 represents the true output of the equalizer. We can represent the output of the equalizer of this example as. In Fig. 3, suppose there are 27 delay array elements (# = 27). According to the hierarchical method of division, they are divided into 3 layers (α = 3) for processing. The delay array element of each adaptive calculus is 3 〇0 = 3). Therefore, the first layer has 9 adaptive calculus, the second layer has 3 adaptive calculus, and the third layer has 1 adaptive calculus. The result of this segmentation, in the first layer, The input signals of the adaptive calculator are expressed as (Factory 21, Guangzhou 22, Guangzhou 23), (Factory 31, Factory 32, Factory 33), (Guang 4 丨, Guang 42, Factory 43), and (Guang 51, Factory 52, Guangzhou 53), ('61, '62, Guangzhou 63), (Guang 71, Factory 72, Factory 73), (Factory 8 丨, Guangzhou 82, Factory 83), (Guang 91, Guangzhou 92, Factory 93) ) 〇 The second layer can be expressed as: (rK%), (r22pr222, r223), (&lt;, r322, r323). There is only one adaptive calculus in the third layer, which is represented as (r ^ rK). We can express the input relationship of signals between the first layer and the second layer as: β = «+« «, 4 =« «+« 3, 1236212 13679twf.doc / 006 Factory 丨 3-&gt; ^ 3 丨 '3 丨+ W32 &quot; 32 + W33r33 ^ 22 ~ ^ 51 ^ 51 ^ 52 ^ 52 ^ 53 ^ 53 r31 — w1 {r7 {+ w72rj2 + w13 ^ 13 r33-w91r91 + w92r92 + w93r93 ° and on the 2nd floor · + 々4 丨 2 + «β =« + «+« θ ϋ + «2+« 3 The input relationship of signals between 3 layers can be expressed 4 = 0 «2+« 3, β = «1 +« 2 + « 3, 4 = «« + «.

由於在階層式的方法中,最後一層的輸出才是等化器 真正的輸出。所以在此實施例中,第3層的輸出表示等化 器真正的輸出,我們可將此範例的等化器輸出表示成 請接著參照圖4,其係繪示依照本發明一較佳實施例 的一種階層式適應性等化器細部設計架構圖。其中,適應 性演算器104係執行HLMS演算法。 在以HLMS演算法來說明時,該演算法是將輸入的訊Because in the hierarchical method, the output of the last layer is the real output of the equalizer. Therefore, in this embodiment, the output of the third layer represents the real output of the equalizer. We can represent the output of the equalizer in this example as follows. Please refer to FIG. 4, which shows a preferred embodiment according to the present invention. A hierarchical adaptive equalizer detail design architecture diagram. Among them, the adaptive calculator 104 executes an HLMS algorithm. In the case of HLMS algorithm, the algorithm is to input the information

號分成階層式的適應性演算器,然後再由個別的適應性演 算器中執行LMS的運算處理。此部份的主要工作是在每 一階層的每一適應性演算器內執行最小化的運算處理,因 此在最後1層的適應性演算器中可獲得較佳的輸出,並且 具有較小的MSE均方誤差。對於HLMS設計方法,它的 計算複雑度是〇(A〇,與LMS之計算複雜度相仿,這是因 爲整體的計算複雜度是全部的適應性演算器數乘上單一適 17 1236212 13679twf.doc/006 應性演算器的複雜度。由於在每一個適應性演算器內 LMS演算法時,需要1 2々+ 1的複數乘法運算,且全部的適應 性演算器個數是iWK'g,因此全部的計算複雜^ 等於(1一々 = 〇(,) = Ο(Α0。 1-ρ 請同時參照圖5Α至5C,其中係爲HLMS均方誤差與 收斂率模擬結果。在HLMS模擬中係假設以下條件:( 等化器中具有#個輸入訊號。(2)分爲2層(^==2)處理, 每一適應性演算器內的元素個數爲#個(々=#)。(3) 頻道響應你)=1[1 + cos(2;r(卜2)/同彳=1,2,3,4 (表示具有4The number is divided into a hierarchical adaptive calculator, and then the LMS arithmetic processing is performed by the individual adaptive calculator. The main work of this part is to perform the minimum calculation processing in each adaptive calculus of each layer, so it can get better output in the adaptive calculus of the last layer, and has a smaller MSE Mean square error. For the HLMS design method, its computational complexity is 〇 (A〇, which is similar to the computational complexity of LMS, because the overall computational complexity is the total number of adaptive calculus multiplied by a single suitable number. 17 1236212 13679twf.doc / 006 The complexity of the adaptive calculus. Because the LMS algorithm in each adaptive calculus requires a complex multiplication of 1 2々 + 1, and the number of all adaptive calculus is iWK'g, so all The calculation of ^ is equal to (1 一 々 = 〇 (,) = 〇 (Α0. 1-ρ Please refer to FIGS. 5A to 5C at the same time, where HLMS mean square error and convergence rate simulation results. In the HLMS simulation, the following conditions are assumed : (There are # input signals in the equalizer. (2) It is divided into 2 layers (^ == 2) for processing, and the number of elements in each adaptive calculus is # (々 = #). (3) The channel responds to you) = 1 [1 + cos (2; r (卜 2) / peer == 1, 2, 3, 4 (meaning that it has 4

個多重路徑訊號),F = 3.1。( 4)在HLMS的模擬分析中, 我們將比較 LMS、NLMS ( Normalized LMS)與 HLMS 的收斂速率與靜止穩定狀態下的MSE値。(5)對於NLMS 的步距大小//,我們是使用以下公式來作調整: 1 等化器長度 # = 49,100,196。 2 SNR=30 dB。 1236212 13679twf.doc/006 LMS NLMS HLMS N=49 0.006869 0.00706 0.003276 N=100 0.045146 0.018263 0.000992 N=196 0.20651 0.049288 0.00118 表1 在圖5A與圖5C中,其分別顯示# = 49,100,196的模擬 結果,從圖中我們可以看到HLMS可以明顯提升LMS的 收斂速率,並且從表1中可以發現HLMS在穩定靜止時, 具有較小的MSE。從圖5A中,顯示了本發明之HLMS收 斂速率最快、且十分穩定,其次才是NLMS,最後是LMS。 在圖5B與圖5C中顯示當元素增多時,HLMS效果愈顯著。 請繼續參照圖4,其爲當適應性演算器104執行HRLS (Hierarchical LMS,簡稱 HRLS)時。 HRLS演算法的細部架構如圖4顯示,由圖4中可知, HRLS是採用一個階層式的設計槪念來分別處理各階層中 各適應性演算器的RLS運算處理。此種設計槪念是將輸入 的訊號分成階層式的適應性演算器,然後再各別做RLS的 運算處理。由於採階層式的處理方式,所以使得輸出是較 精確、收斂速度較快、MSE最小;同時具較低的計算複雜 度。對於本發明所提出的階層式設計方法,它的計算複雜 度是〇_) ’較RLS之g十算複雜度〇(約爲低(因心々),這 1236212 13679twf.doc/006 是因爲在每一個適應性演算器內執行RLS演算法時’需要 的計算複雜度,且全部的適應性演算器個數是 ,因此全部的計算複雜度等於Multipath signals), F = 3.1. (4) In the simulation analysis of HLMS, we will compare the convergence rate of LMS, NLMS (Normalized LMS) and HLMS with MSE 値 under static steady state. (5) For the NLMS step size //, we use the following formula to make adjustments: 1 Equalizer length # = 49, 100, 196. 2 SNR = 30 dB. 1236212 13679twf.doc / 006 LMS NLMS HLMS N = 49 0.006869 0.00706 0.003276 N = 100 0.045146 0.018263 0.000992 N = 196 0.20651 0.049288 0.00118 Table 1 In Figure 5A and Figure 5C, they show the simulation results of # = 49, 100, 196, respectively From the figure, we can see that HLMS can significantly improve the convergence rate of LMS, and from Table 1, it can be found that HLMS has a smaller MSE when it is stationary. Fig. 5A shows that the HLMS convergence rate of the present invention is the fastest and very stable, followed by NLMS, and finally LMS. It is shown in FIG. 5B and FIG. 5C that as the number of elements increases, the HLMS effect becomes more significant. Please continue to refer to FIG. 4, which is when the adaptive calculator 104 executes HRLS (Hierarchical LMS, HRLS for short). The detailed structure of the HRLS algorithm is shown in Figure 4. As can be seen from Figure 4, HRLS uses a hierarchical design concept to process the RLS operations of each adaptive algorithm in each layer. This design idea is to divide the input signal into a hierarchical adaptive calculator, and then perform RLS calculation processing separately. Due to the hierarchical processing method, the output is more accurate, the convergence speed is faster, and the MSE is the smallest. At the same time, it has lower calculation complexity. For the hierarchical design method proposed by the present invention, its computational complexity is 0_) 'compared to the RLS of g, which is 0 (about low (due to heart palpitations), which is 1236212 13679twf.doc / 006 because The computational complexity required when executing the RLS algorithm in each adaptive calculus, and the total number of adaptive calculus is, so the total computational complexity is equal to

Pa ¥l = 〇(βα+]) = 〇{Νβ) ° β 請繼續參照圖6Α〜圖6C,在HRLS模擬中係假設以 下條件:(1)等化器中,具有#個輸入訊號。(2)分爲2 層(α = 2)處理,第一層具有#個適應性演算器’第2層只 有一個適應性演算器,且每一適應性演算器內的元素個數 爲V77個(和# ) 。( 3 )頻道響應Pa ¥ l = 〇 (βα +]) = 〇 {Νβ) ° β Please continue to refer to Figure 6A to Figure 6C. In the HRLS simulation, the following conditions are assumed: (1) The equalizer has # input signals. (2) Divided into 2 layers (α = 2) for processing. The first layer has # adaptive calculus'. The second layer has only one adaptive calculus, and the number of elements in each adaptive calculus is V77. (with# ) . (3) Channel response

Kk )=丄[1 + cos(2;r(A: — 2)/fF] ,A: = 1,2,3,4’, = 2.9。( 4 )在追部 分的模擬分析中,我們將比較RLS、HRLS的收斂速率與 MSE値。(5)等化器長度# = 16,36,49。(6)SNR=30dB。 而在圖6A至6C中,其圖中可以看到HRLS可以明顯 提升RLS的收斂速率,而表2是顯示HRLS與RLS最後 靜止時的MSE。HRLS在穩定靜止時,具有較小的MSE。 從圖6A中,顯示了本發明所提的HRLS收斂速率最快、 且十分穩定,其次才是RLS。在圖6B與圖6C中顯示當元 素增多時,HRLS效果愈顯著。 20 1236212 13679twf.doc/006 RLS hrls N=16 0.001292 0.001055 N=36 0.001951 0.000836 N=49 0.002446 0.001103 表2 HCMA演算法的細部架構如圖4所示,此HCMA此 種階層式係爲讓適應性演算器分別執行CMA。第一層子 等化器的輸出(其中’第一層輸入訊號乘上更新過後的權 重),作爲第二層子等化器的輸入,而第二層子等化器的 輸出是等化器真正的輸出。透過以上多階層CM主値函數 的最小化處理’可以明顯地改善收斂速率、降低在最後穩 定狀態下的常係數主値函數與演算法可同時被執行,以減 少處理的時間。 爲驗證比較CMA及HCMA之最終收斂區域差異(Local or Global Minimum)係將模擬CMA的CM主値曲面(Cost Surfaces)進行此三維函數之最終等高線變化差異情形。 其運算式如下: JCM = E{Ukf -rj}-4y(ki}~^rE{y(kf}+ r2 =五[&gt;^)丨4卜如乂£:丨&gt;^)|2丨+«,/^表75輸入訊號{办)}的峭度 (kurtosis),而γ表示輸入訊號OW}的散射常數。其分別表 示成 如)|4}车门 如)|4}兩?r和 定義 ,你)=, Ks G = wC ° 21 1236212 13679twf.doc/006 在本實施例中,係使用具有4個輸入訊號接點(taps) 的等化器進行模擬。 CMA權重向量表示:㈨㈨,w2㈨,w3㈨,w4W]。 HCMA權重向量表不:w麵〇) = (w⑽+ w丨⑻)wi⑻ (w;⑷= [&lt;(Α〇Χ2⑷],&lt;(幻=[4(从切和 &lt;⑷=[&lt;⑻,W冰 將第二層的權重&lt;(幻代入到第一層的權重向量,可得 W腿洲=(W“⑷4 (众)Χ2(々)β(众 再代入通道係數(Channel Coefficients )向量 則可推得主値曲面運算式可以下式表示之 ^Λ/(^^ = σ;(^-3)Σ&lt;+3σ;Η^ +3σ^Ηΐ! +6σ&gt;.Νΐ2Η2 &quot; 2^X(^sM2+^Η[)+σΧ2。 如果第一層權重已設定W;㈨= [&lt;(〇;#)], &lt;(幻=KW,&lt;_,則 40v:J=4(«)。在 BPSK 中, σ;=^=1 , 且高斯雜訊、=3 。 則 ^CA/K^12) = -2Ze;+^ +6σ.|Νΐ2ΐΗ2 -2Wl2 + σ:Η;) + 1。 上式4(«)即爲HCMA的CM主値曲面函數推導表 示式。 圖7A〜圖7D是繪示CM主値函數與收斂率模擬結 果。在HCMA演算法模擬分析中,其假設所設定的環境 變數爲(1)模擬Fractionally-Spaced模式。(2)通道脈 衝響應係數[〇·2,0·5,1·0,-0·1]。(3)等化器長度是64。(4) SNR=50 dB ° 因此在圖7A〜圖7D CMA與HCMA比較可看出,在 22 1236212 13679twf.doc/006 既定條件下,HCMA階層式的設計方法能明顯加速主値函 數的收斂速度’ 一般在500次重複運算(iterations)後即 收斂。 圖7E係爲CMA (taps=2)之CM於穩定收斂後之曲 面等高線變化圖。如上所述,CMA的特性是具有多個區 域最小點(Local Minimum)。從圖7E中,可知標準CMA 具有4個區域最小點,其中所標示的數値是代表每一個區 域中最內層的等高線數値(0.061404 ),而符號*與+分別 代表該區域的最小點。由於此4點區域最小値是相同的, 所以這4點最小値也被稱爲整體最小値(Global Minimum)。由於所模擬的通道環境是狀況較好的通道環 境,所以4個區域最小點都能收斂到相同的最佳値。 請接著參照圖8,其係繪示依照本發明一較佳實施例 的一種DFE-HLMS適應性等化器細部設計架構圖。在本 實施例中,DFE可視爲是兩個線性濾波器106、108的運 作,只需在權重的更新處理上作些微的改變,其它的部分 皆和線性式相同;同樣地,階層式DFE也可視爲是兩個 階層式線性濾波器1〇6、108的運作,並且只要修改權重 的更新步驟(指使用Data Out更新第2層權重,因爲第2 層的輸出是2階層等化器真正的輸出)和適時地減少迴授 濾波器108的長度即可。非盲目式等化器是需要傳送校準 序列的等化器,與此種類型等化器相關的演算法,最具代 表性的有LMS與RLS演算法。 在本實施例中,首先先描述DFE-LMS的權重更新機 23 1236212 13679twf.doc/006 制,DFE-LMS等化器的輸出是: 資料輸出(Data Out) ·· w〃⑷r⑷-b&quot;⑷χ(Α:)。 估測誤差(MSE):咖)=d㈨-Data Out。 權重更新:+ 1) = &gt;¥(々) + //,!·(/:&gt;· (A:), b(々 +1) = b(A〇 + (Λ)。 其中,w㈨,b(A〇分別表示前向濾波器1〇6的權重向量與 迴授濾波器108的權重向量;r(/:),xW則分別代表它們的輸 入訊號。則表示它們的步距大小(step size)。 至於DFE-HLMS的設計架構與權重的更新機制,如 圖8細部架構圖。可知具兩個階層式的濾波器組1〇6、1〇8, 上半部是前向濾波器組106,而下半部則是迴授濾波器組 108。每一組濾波器的架構和前曾提及之HLMS架構相同, 每一組濾波器內部的設計方式都是根據階層式的設計原理 將輸入訊號再分割成多個適應性演算器處理,這裡的每一 個小適應性演算器104可被視爲是一個子濾波器,並將這 些子濾波器建立一個階層式的濾波器組。這裡有二點須注 意:第一 ’一階層式濾波器組中的第一層子濾波器都是各 自更新子濾波器中的權重。 而二個濾波器組中,第二層的權重皆由邶)減去Data Out ( DFE-HLMS最後的輸出)所產生的誤差e(《)來調整 第二層個別濾波器的權重。第二,迴授濾波器108的長度 比前向濾波器106短,在本實施例中所使用的迴授濾波器 108長度比前向濾波器106少1,但兩者所分割的適應性 演算器104數是相同的。DFE-HLMS的權重更新機制如下 24 1236212 13679twf. doc/006 所述: (1) 第一層每一個子濾波器的權重更新在前向濾波 器106部分: 估測誤差(MSE):砟⑻=雄)⑷。 權重更新:w;(A + l) = w;⑻㈨。 迴授濾波器部分: 估測誤差(MSE) ·· 4(幻=#幻幻Χ;(Λ〇。 權重更新:b;(h 1) = 1)^) + /^1 (幻4、)。 (2) 第二層子濾波器的權重更新由於階層式等化器 的實際輸出在最後一層,因此DFE-HLMS等化器輸出: 資料輸出(Data Out) ·· ⑷η2(Α:)-bf&quot;⑷xf⑻。 估預!I誤差(MSE): #幻一 Data Out。 在前向瀘波器106部分,其權重更新爲 wf (众+ l) = w⑽+ &quot;〆(吵丨’⑻。 在迴授濾波器1〇8部分,其權重更新爲 b% + l) = bM) + //〆(咖丨2&gt;)。 其中,W丨㈨〆(幻分別表示,前向濾波器106在第灸 次重複運算(iteration)時,第一層第ί個適應性演算器104 的權重向量與輸入訊號向量。b丨㈨,X丨㈨分別表示,迴授濾 波器108在第々次重複運算(iteration)時,第一層第/個 適應性演算器104的權重向量與輸入訊號向量。㈨ 表示前向濾波器106組第二層的輸出,bf㈨X丨㈨表示迴授 濾波器108組第二層的輸出,其中,必須注意的是tfW與 的計算,這兩個向量分別代表兩個濾波器106、108 25 1236212 13679twf.doc/006 組第二層的輸入訊號(意即第一層輸出到第二層的訊號), 此處 ife) = /^(幻],xfe) = (幻,Λ 〆#(々)]。而這 個第二層的輸入訊號是由第一層目前的輸入訊號向量乘上 更新過後的權重向量,因此 &lt;㈨= w;&quot;(* + l)r» ( w) (A: +1) = [4 (Λ +1),w;2 (众 + 1),Λ,4 (A: +1)] , r/W =[伽伽Λ,“(幻] ) Xu(k) = b)H(k + \)x](k) , ( b;+1) = [b{n(k + \\b)2(k + 1),A ,¾(k +1)] , 在本實施例中,資料輸出(Data Out)是DFE-HCMA 等化器的輸出,此處設Data ,而岵(λ:),4(λ:)分別表示 前向濾波器106和迴授濾波器108第一層第/個適應性演 算器的MSE。//,,//,是它們的步距大小。Data Out是DFE-HLMS等化器的輸出,彳㈨是第二層的MSE,也是DFE-HLMS等化器真正的MSE。而分別表示前向濾波 器106和迴授濾波器108第二層的權重向量。 在本實施例中,DFE-HLMS演算法模擬分析篮假設 以下條件··( 1)等化器中,具有#個輸入訊號。(2)前向 瀘波器106與迴授濾波器108皆分爲2層(α = 2)處理。前 向濾波器106每一適應性演算器104內的訊號個數爲# 個(&gt;0 = #)。迴授濾波器108除了第1層的最後一個適 應性演算器104外,其餘每一個適應性演算器104內的訊 號個數皆爲#個。而最後一個適應性演算器104的長度 在本硏究中是等於。( 3 )頻道響應 h(k) = ^[l + cos(2^(/:-2)/W],k = 12,3A (表示具有 4 個多重路 26 1236212 13679twf.doc/006 徑訊號),W = 3.1。(4) DFE 等化器長度 # = 64,1_21。(5) SNR=30 dB ° 從圖9A至圖9C中可以淸楚地看到DFE-HLMS有較 好的收斂能力與追蹤能力。表3列出在穩定狀態下DFE-LMS與DFE-HLMS的MSE,從表中我們可以看到DFE-HLMS有較低的MSE。根據以上的描述與模擬分析,可以 了解到階層式的設計架構確實能明顯地改善DFE-LMS的 收斂能力。其中,表3係爲在穩定狀態下,DFE-HLMS 和 DFE-LMS 的 MSE。 DFE-LMS DFE-HLMS N=64 0.01228 0.003761 N=100 0.044886 0.003215 N=121 0.082037 0.004316 表3 在本實施例中,根據CMA演算法的原理,DFE-CMA 的前向濾波器106與迴授濾波器108的權重更新機制可表 示如下各式: 資料輸出(Data Out):〆⑷r(A:)-b&quot;(A:)x(灸)。 主値函數:啦)=/⑷(1+⑻|2)。 權重更新:+ + (咖⑻(前向濾波器1〇6部 分)’禅+ l) = bW + %X(k)eW (迴授濾波器108部分)。 其中’ wa),b(A)分別表示前向濾波器106的權重向量, 與迴授濾波器108的權重向量,r⑻,χ(Α:)則分別代表它們的 輸入訊號,心,//0則表示它們的步距大小。 27 1236212 13679twf.doc/006 如圖10所示,DFE-HCMA的設計和DFE-HLMS設計 皆相同,只有在演算法的權重更新部分需要作些微的修 改,因此相同部分的描述我們可參考DFE-HLMS演算法 的相關說明,在此將只針對DFE-HCMA的權重更新機制 作描述。 (1) 第一層每一個子濾波器的權重更新,其前向濾 波器106部分,其子濾波器的估計輸出:4⑻, 主値函數:,權重更新: 在迴授濾波器108部分,其子濾波器的估計輸出: 乂·(幻= b!w(0x!(幻,主値函數:怂(幻=乂从)(1—|乂(a:)|2),權重更新: 1&gt;;(々 + 1) = 1);(灸)+//乂(灸)4(灸)。 (2) 第二層子濾波器的權重更新,由於階層式等化 器的實際輸出在最後一層,因此DFE-HCMA等化器之資 料輸出(Data Out ) ·· yf(k) = yvf (k)r^k)~b2xH(k)x2x(k)(令 (众)=&gt;7丨= ) 0 在前向濾波器106部分,其主値函數: 彳(灸)=&gt;;}1(々)(1-|&gt;;}1(^)|2),權重更新:研12^: + 1)=〜?(^:) + ///1*12(咖12(灸)。 在迴授濾波器部分,其主値函數·· , 權重更新:b〖(A + l) = b丨⑷。 其中,w;⑻,r,1⑻分別表示,前向濾波器106在第 次重複運算(iteration)時,第一層第/個適應性演算器104 的權重向量與輸入訊號向量。b;㈨,x;㈨分別表示,迴授濾 波器108在第々次重複運算(iteration)時,第一層第/個 28 1236212 13679twf.doc/006 適應性演算器104的權重向量與輸入訊號向量。 表示前向濾波器106組第二層的輸出,b〖&quot;(外^㈨表示迴授 濾波器108組第二層的輸出,其中,必須注意的是if㈨與 x?㈨的計算,這兩個向量分別代表兩個濾波器106、108 組第二層的輸入訊號(意即第一層輸出到第二層的訊號), 此處 η2 ⑷=[η;(幻,η22 (从Λ,r;⑷],xf (A)=[&lt; (从 η22 ⑷,Λ,r;⑻]。而這 個第二層的輸入訊號是由第一層目前的輸入訊號向量乘上 更新過後的權重向量,因此= + ( w J (Λ: +1) = [w]x (k +1), w\2 (k + 1),A 5 {k +1)] , r/ (k) = [rn (klrh ^)Λ 5(k)] ) Ά) = b)&quot;(众 + l)x)⑷ ( b;(A: +1) = [bln (k +1),b]2(k + 1),A ^(k +1)] , x)(灸)=W乂 W,A,⑷)。 其中,Data Out是DFE-HCMA等化器的輸出,此處 設Data Outyf,而砟⑷乂㈨分別表示前向濾波器1〇6和迴 授濾波器108第一層第ί個適應性演算器104的主値函數, 是它們的步距大小,是兩個濾波器組第二層的主 値函數,也是DFE-HCMA等化器真正的主値函數。而 wf㈨,b丨㈨分別表示前向濾波器106和迴授濾波器108第二 層的權重向量。 在圖示11A〜11C中,DFE-HCMA演算法模擬分析 假設條件爲(1)等化器中,具有#個輸入訊號。(2)前 向濾波器106與迴授濾波器108皆分爲2層(α = 2)處理。 前向濾波器106每一適應性演算器104內的訊號個數爲 29 1236212 13679twf.doc/006 #個(y? = # )。迴授濾波器108除了第1層的最後一個 適應性演算器104外,其餘每一個適應性演算器104內的 訊號個數皆爲#個。而最後一個適應性演算器104的長 度在本硏究中是等於W-1。( 3 )頻道響應 h(k) = ~[1 + qos{2k{L·-2)/W],k = 1,2,3,4 (表不具有 4 個多重路 徑訊號),Κ = 3·1。( 4) DFE 等化器長度 # = 81,100,121。( 5) SNR=30dB 〇 從這三個圖中可以淸楚地看到dfe-hcma的收斂能 力比DFE-CMA好。表4列出在穩定狀態下DFE-HCMA 與 DFE-CMA 的 cost function,從表中可以看到 DFE-HCMA 有較低的主値函數。根據以上的描述與模擬分析可了解到 階層式的設計架構確實能明顯地改善DFE-CMA的收斂能 力。 DFE-HCMA DFE-CMA N=64 0.020173 0.076936 N=100 0.017423 0.118227 N=121 0.019013 0.140263 表4 在本發明之較佳實施例中,所傳輸的資料位元、位元 與位元之間是非相關(uncorrelated)的。在許多資料通訊, 這種假設是合理的,如果資料是高度相關(correlated)(如 某些動畫),則應先進行解相關性(De-correlation)。 1236212 13679twf.doc/〇〇6 在本發明之較佳實施例中,多重路徑的數目與等化器 接觸點數目的比値不能太大,如果多重路徑的數目增加, 則應增加等化器接觸角的數目,否則階層式等化器的效能 會受到影響。 在本發明之較佳實施例中,在參數的選取方面,HLMS 的步距大小(//)値的選取建議如下,其他演算法類同: μ ( HLMS ) = μ ( LMS ) χΝ/β 〇 在本發明之較佳實施例中,步距大小(// )値的選取 亦適用於HCMA。 在本發明之較佳實施例中,本階層式等化器架構適用 於單一載波系統,如 DSL、WLAN、Cellular、TDMA 或 CDMA 系統皆可用,如果是CDMA則是RAKE的架構。 綜合以上所述,本發明之階層式適應性等化器之設計 方法與其架構具有下列優點: (1) 本發明之階層式適應性等化器之設計方法與其 架構,其階層式之適應性HLMS及DFE-HLMS等化器設計 方法及架構,可明顯加速演算法計算之收斂速度,並使最 終收斂之MSE均方誤差降低。 (2) 本發明之階層式適應性等化器之設計方法與其 架構,係以階層式劃分方式分別處理各階層中及各適應性 演算器的演算法運算。此種設計槪念是將輸入的訊號分成 階層式的適應性演算器,然後再各別做RLS的運算處理。 由於採階層式的處理方式,所以使得輸出是較精確、收斂 速度較快、穩定靜止時MSE誤差値最小,同時具較低之計 31 1236212 13679twf.doc/006 算複雜度(計算複雜度是〇(沖),較RLS之計算複雜度〇(π) 爲低(因Α^/〇)。 (3) 本發明之階層式適應性等化器之設計方法與其 架構,在收斂過程中,進入到區域最小點的距離較短,明 顯加速CMA主値函數的收斂速度;同時使得HCMA能快速 收斂到最佳値(誤差量最小),避免在收斂過程中落入到 較差的區域最小點,並於穩定收斂後,此些區域最小値能 同時到達一致的全域最低値,有效降低可能之ISI影響及干 擾。 (4) 本發明之階層式適應性等化器之設計方法與其 架構,能夠廣泛地應用於DFE等非線性等化器設計上。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍內,當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 【圖式簡單說明】 圖1Α是繪示依照本發明一較佳實施例的一種階層式 適應性等化器架構圖。 圖1Β是繪示依照本發明一較佳實施例的一種階層式 適應性等化器設計方法流程圖。 圖2是繪示依照本發明一較佳實施例的·一種二階層式 適應性等化器設計架構η。 圖3是繪示依照本發明一較佳實施例的一種三階層式 適應性等化器設計架構®|。 32 1236212 13679twf.doc/006 圖4是繪示依照本發明一較佳實施例的一種階層式適 應性等化器細部設計架構圖。 圖5 A〜圖5 C是繪不依照本發明一較佳實施例的一種 HLMS均方誤差與收斂率模擬結果。 圖6A〜圖6C是繪示依照本發明一較佳實施例的一種 HRLS均方誤差與收斂率模擬結果。 圖7A〜圖7D是繪示依照本發明一較佳實施例的一種 CM主値函數與收斂率模擬結果。 圖7E是繪示依照本發明一較佳實施例的一種標準 CMA於穩定收斂後之CM等高線圖。 圖8是繪示依照本發明一較佳實施例的一種DFE-HLMS適應性等化器細部設計架構圖。 圖9A〜圖9C是繪示依照本發明一較佳實施例的一種 DFE-HLMS均方誤差與收斂率模擬結果。 圖10是繪示依照本發明一較佳實施例的一種DFE-HCMA適應性等化器細部設計架構圖。 圖11A〜圖11C是繪示依照本發明一較佳實施例的一 種CM主値函數與收斂率模擬結果。 圖12係習知一種FIR橫向型適應性等化器的設計架 構圖。 圖13係習知一種DFE橫向型適應性等化器的設計架 構圖。 圖14係習知一種LMS演算法示意圖。 圖15係習知一種RLS演算法設計示意圖。 【圖式標示說明】 33 1236212 13679twf.doc/006 100 :階層式適應性等化器 102 :延遲元素 104、1204 :適應性演算器 106、1206 :前向濾波器 108、1208 :迴授濾波器 1410、1510 :橫向濾波器 1412、1512 :適應性權重控制機制 s 122〜s 124 :步驟流程 34Kk) = 丄 [1 + cos (2; r (A: — 2) / fF], A: = 1, 2, 3, 4 ', = 2.9. (4) In the simulation analysis of the chase part, we will Compare the convergence rate of RLS and HRLS with MSE 値. (5) Equalizer length # = 16,36,49. (6) SNR = 30dB. In Figures 6A to 6C, it can be seen that HRLS can be clearly seen Improve the convergence rate of RLS, and Table 2 shows the MSE when HRLS and RLS are at last stationary. HRLS has a smaller MSE when it is stationary. From Figure 6A, it is shown that the HRLS convergence rate provided by the present invention is the fastest, It is very stable, followed by RLS. Figures 6B and 6C show that the effect of HRLS becomes more significant as the number of elements increases. 20 1236212 13679twf.doc / 006 RLS hrls N = 16 0.001292 0.001055 N = 36 0.001951 0.000836 N = 49 0.002446 0.001103 Table 2 The detailed structure of the HCMA algorithm is shown in Figure 4. This hierarchical structure of HCMA is to allow the adaptive algorithm to perform CMA respectively. The output of the first-level sub-equalizer (where the first-level input signal is multiplied) Weight after updating), as the input of the second-level sub-equalizer, and the output of the second-level sub-equalizer is the real output of the equalizer. After the above minimization processing of the multi-level CM principal function, the convergence rate can be significantly improved, and the constant coefficient principal function and the algorithm in the final stable state can be executed at the same time to reduce the processing time. To verify and compare the CMA The final local or global minimum for HCMA and HCMA is to simulate the difference between the final contour changes of the three-dimensional function of CMA's CM Cost Surfaces. The calculation formula is as follows: JCM = E {Ukf -rj} -4y (ki) ~ ^ rE {y (kf} + r2 = five [&gt; ^) 丨 4 such as 乂 £: 丨 &gt; ^) | 2 丨 + «, / ^ Table 75 Input signal {Office)} Kurtosis, and γ represents the scattering constant of the input signal OW}. They are expressed as) | 4} car door such as) | 4} two? R and definition, you) =, Ks G = wC ° 21 1236212 13679twf.doc / 006 In this embodiment, the system has 4 input signals. The equalizer of taps is simulated. CMA weight vector representation: ㈨㈨, w2㈨, w3㈨, w4W]. HCMA weight vector table: w face 〇) = (w⑽ + w 丨 ⑻) wi⑻ (w; ⑷ = [&lt; (Α〇Χ2⑷], &lt; (幻 = [4 (从 切 和 &lt; ⑷ = [&lt; ⑻, W Bing the weight of the second layer &lt; (the magic vector into the weight vector of the first layer, we can get W leg continent = (W "⑷4 (众) × 2 (々) β (Substitute the channel coefficient (Channel Coefficients) vector can be deduced that the main unitary surface expression can be expressed as ^ Λ / (^^ = σ; (^ -3) Σ &lt; + 3σ; Η ^ + 3σ ^ Ηΐ! + 6σ &gt; .Νΐ2Η2 &quot; 2 ^ X (^ sM2 + ^ Η [) + σχ2. If the weight of the first layer has been set W; ㈨ = [&lt;(〇;#)], &lt; (Magic = KW, &lt; _, then 40v: J = 4 («). In BPSK, σ; = ^ = 1, and Gaussian noise, = 3. Then ^ CA / K ^ 12) = -2Ze; + ^ + 6σ. | Νΐ2ΐΗ2 -2Wl2 + σ: Η;) + 1. The above formula 4 («) is the derivation expression of the CM principal unit surface function of HCMA. Figures 7A to 7D show the simulation results of the principal unit function and convergence rate of CM. In the simulation analysis of HCMA algorithm, its assumptions The set environment variables are (1) analog Fractionally-Spaced mode. (2) channel impulse response coefficient [0 · 2, 0 · 5, 1 · 0, -0 · 1]. (3) equalizer length is 64 (4) SNR = 50 dB ° Therefore, it can be seen in the comparison between CMA and HCMA in Figure 7A ~ 7D that under the given conditions, the HCMA hierarchical design method can significantly accelerate the convergence rate of the main unitary function. Generally, it is 500. Convergence occurs after two iterations. Figure 7E is the contour curve of the CM of the CMA (taps = 2) after stable convergence. As mentioned above, the characteristic of the CMA is that it has multiple local minimum points. From Figure 7E, it can be seen that the standard CMA has four area minimum points, where the number 标示 is the number of contour lines 代表 (0.061404) representing the innermost layer in each area, and the symbols * and + represent the minimum of the area, respectively. Point. Since the minimum 値 of the four-point area is the same, the four minimum 値 is also called the global minimum. Since the simulated channel environment is a good channel environment, the four areas are the smallest. The points can converge to the same optimal frame. Please refer to FIG. 8 for a detailed design architecture diagram of a DFE-HLMS adaptive equalizer according to a preferred embodiment of the present invention. In this embodiment, DFE visible It is the operation of the two linear filters 106 and 108. Only a slight change in the weight update process is required. The other parts are the same as the linear type. Similarly, the hierarchical DFE can also be regarded as two hierarchical linear filters. The operation of the converters 106, 108, and as long as the weight update step is modified (referring to using Data Out to update the weight of the second layer, because the output of the second layer is the real output of the second-level equalizer) and timely reduction of feedback filtering The length of the device 108 is sufficient. Non-blind equalizers are equalizers that need to transmit calibration sequences. The most relevant algorithms for this type of equalizer are the LMS and RLS algorithms. In this embodiment, the DFE-LMS weight update engine 23 1236212 13679twf.doc / 006 is described first. The output of the DFE-LMS equalizer is: Data Out ·· w〃⑷r⑷-b &quot; ⑷χ (Α :). Estimation error (MSE): coffee) = d㈨-Data Out. Weight update: + 1) = &gt; ¥ (々) + // ,! · (/: &gt; · (A :), b (々 + 1) = b (A〇 + (Λ). Where w㈨, b (A0 respectively represents the weight vector of the forward filter 106 and the weight vector of the feedback filter 108; r (/ :), xW respectively represent their input signals. They represent their step size (step size). As for the design architecture and weight update mechanism of DFE-HLMS, as shown in the detailed structure diagram of Figure 8. It can be seen that there are two hierarchical filter banks 106 and 108, and the upper half is the forward filter bank. 106, and the lower half is the feedback filter bank 108. The structure of each group of filters is the same as the HLMS architecture mentioned earlier, and the internal design of each group of filters is based on the hierarchical design principle. The input signal is then divided into multiple adaptive operators. Each small adaptive operator 104 here can be regarded as a sub-filter, and these sub-filters are built into a hierarchical filter bank. Here are Two points must be noted: the first-level sub-filters in the first-level hierarchical filter bank all update the weights in the sub-filters. In each filter bank, the weight of the second layer is adjusted by 邶) minus the error e (") generated by Data Out (the final output of the DFE-HLMS) to adjust the weight of the individual filters of the second layer. Second, back The length of the feedback filter 108 is shorter than that of the forward filter 106. The length of the feedback filter 108 used in this embodiment is one less than that of the forward filter 106. However, the number of adaptive algorithm 104 divided by the two is The same. The DFE-HLMS weight update mechanism is described in 24 1236212 13679twf. Doc / 006: (1) The weight update of each sub-filter in the first layer is in the forward filter 106: Estimation error (MSE):砟 ⑻ = 雄) ⑷. Weight update: w; (A + l) = w; ⑻㈨. Feedback filter part: Estimation error (MSE) ·· 4 (幻 = # 幻 幻 Χ; (Λ〇. Weight) Update: b; (h 1) = 1) ^) + / ^ 1 (magic 4,). (2) Weight update of the second layer sub-filter. Since the actual output of the hierarchical equalizer is at the last layer, DFE -HLMS equalizer output: Data Out ·· ⑷η2 (Α:)-bf &quot; ⑷xf⑻. Estimate! I error (MSE): # 幻 一 Data Out. In the forward waver 106 part, Its weight is updated to wf (zhong + l) = w⑽ + &quot; 吵 (丨 丨 '⑻. In the feedback filter part 108, its weight is updated to b% + l) = bM) + // 〆 (Coffee丨 2 &gt;). Among them, W 丨 ㈨〆 (magic respectively represent the weight vector and input signal vector of the first adaptive adaptor 104 in the first layer during the iteration of the moxibustion iteration operation. B 丨 ㈨, X 丨 ㈨ respectively represent the weight vector and input signal vector of the first / first adaptive calculus 104 in the first iteration of the feedback filter 108. ㈨ represents the forward filter 106 group The output of the second layer, bf㈨X 丨 ㈨ represents the output of the second layer of the 108 sets of feedback filters. Among them, we must pay attention to the calculation of tfW and. These two vectors represent the two filters 106, 108 25 1236212 13679twf.doc, respectively. The input signal of the second layer of the / 006 group (meaning the signal output from the first layer to the second layer), where ife) = / ^ (幻], xfe) = (幻 , Λ 〆 # (々)]. And The input signal of this second layer is the current input signal vector of the first layer multiplied by the updated weight vector, so &lt; ㈨ = w; &quot; (* + l) r »(w) (A: +1) = [4 (Λ +1), w; 2 (mode + 1), Λ, 4 (A: +1)], r / W = [GaGa Λ, "(Magic)) Xu (k) = b) H (k + \) x] (k), (b; +1) = [b {n (k + \\ b) 2 (k + 1), A, ¾ (k +1)], in this embodiment, the data output (Data Out) is the output of the DFE-HCMA equalizer, Set Data here, and 岵 (λ :), 4 (λ :) respectively represent the MSE of the first / first adaptive calculus of the forward filter 106 and the feedback filter 108. /// ,, //, Is their step size. Data Out is the output of the DFE-HLMS equalizer, 彳 ㈨ is the MSE of the second layer, and it is also the true MSE of the DFE-HLMS equalizer. It represents the forward filter 106 and the feedback, respectively. Weight vector of the second layer of the filter 108. In this embodiment, the DFE-HLMS algorithm simulation analysis basket assumes the following conditions: (1) the equalizer has # input signals. (2) forward wave Both the processor 106 and the feedback filter 108 are divided into two layers (α = 2) for processing. The number of signals in each adaptive calculator 104 of the forward filter 106 is # (&gt; 0 = #). Feedback Except for the last adaptive algorithm 104 on the first layer of filter 108, the number of signals in each adaptive algorithm 104 is #. The length of the last adaptive algorithm 104 is in this study. Is equal to (3) channel response h (k) = ^ [l + cos (2 ^ (/:-2) / W], k = 12,3A (indicating that there are 4 multiple paths 26 1236212 13679twf.doc / 006 path signal), W = 3.1. (4) DFE equalizer length # = 64, 1_21. (5) SNR = 30 dB ° From Figure 9A to Figure 9C, we can clearly see that DFE-HLMS has better convergence and tracking capabilities. Table 3 lists the MSE of DFE-LMS and DFE-HLMS under steady state. From the table we can see that DFE-HLMS has lower MSE. According to the above description and simulation analysis, we can understand that the hierarchical design architecture can obviously improve the convergence ability of DFE-LMS. Among them, Table 3 is the MSE of DFE-HLMS and DFE-LMS under steady state. DFE-LMS DFE-HLMS N = 64 0.01228 0.003761 N = 100 0.044886 0.003215 N = 121 0.082037 0.004316 Table 3 In this embodiment, according to the principle of the CMA algorithm, the DFE-CMA forward filter 106 and feedback filter The weight update mechanism of 108 can be expressed as follows: Data Out: 〆⑷r (A:)-b &quot; (A:) x (moxibustion). Main 値 function: 啦) = / ⑷ (1 + ⑻ | 2). Weight update: + + (Ca⑻ (forward filter part 106) 'Zen + l) = bW +% X (k) eW (feedback filter part 108). Among them, 'wa) and b (A) respectively represent the weight vector of the forward filter 106 and the weight vector of the feedback filter 108, and r⑻, χ (Α :) respectively represent their input signals, heart, // 0 Indicates their step size. 27 1236212 13679twf.doc / 006 As shown in Figure 10, the design of the DFE-HCMA and the design of the DFE-HLMS are the same. Only slight changes need to be made in the weight update part of the algorithm, so we can refer to the description of the same part as DFE- The relevant description of the HLMS algorithm will only be described for the DFE-HCMA weight update machine. (1) The weight of each sub-filter in the first layer is updated, and its forward filter 106 part, the estimated output of its sub-filter: 4⑻, the main unit function :, the weight update: In the feedback filter 108 part, the Estimated output of the sub-filter: 乂 · (Magic = b! W (0x! (Magic, main 値 function: Counseling (Magic = 乂 Slave) (1— | 乂 (a:) | 2), weight update: 1 &gt;; (々 + 1) = 1); (moxibustion) + // (moxibustion) 4 (moxibustion). (2) The weight of the second layer sub-filter is updated, because the actual output of the hierarchical equalizer is at the last layer. Therefore, the data output of the DFE-HCMA equalizer (Data Out) ·· yf (k) = yvf (k) r ^ k) ~ b2xH (k) x2x (k) (Let (Man) = &gt; 7 丨 = ) 0 In the forward filter 106 part, its main unitary function: 彳 (moxibustion) = &gt;;} 1 (々) (1- | &gt;;} 1 (^) | 2), weight update: research 12 ^ : + 1) = ~? (^ :) + /// 1 * 12 (Coffee 12 (moxibustion). In the feedback filter part, its main unit function ··, weight update: b 〖(A + l) = b 丨 ⑷, where w; ⑻, r, 1⑻ respectively represent the weight vector and the input signal vector of the first / first adaptive calculus 104 during the first iteration of the forward filter 106. b; ㈨, x; ㈨ respectively represent the weight vector and the input signal vector of the adaptive calculator 104 in the first layer of the first / second 28 1236212 13679twf.doc / 006 in the first iteration of the feedback filter 108. Represents the output of the second layer of the 106 groups of forward filters, b 〖&quot; (外 ^ ㈨ indicates the output of the second layer of the 108 groups of feedback filters, of which the calculation of if㈨ and x? ㈨ must be noted. The vectors represent the input signals of the second layer of the 106 and 108 groups of the two filters (meaning the signals output from the first layer to the second layer), where η2 ⑷ = [η; (phantom, η22 (from Λ, r ; ⑷], xf (A) = [&lt; (from η22 ⑷, Λ, r; ⑻). The input signal of this second layer is the current input signal vector of the first layer multiplied by the updated weight vector. So = + (w J (Λ: +1) = [w] x (k +1), w \ 2 (k + 1), A 5 (k +1)], r / (k) = [rn ( klrh ^) Λ 5 (k)]) Ά) = b) &quot; (zhong + l) x) ⑷ (b; (A: +1) = [bln (k +1), b) 2 (k + 1 ), A ^ (k +1)], x) (moxibustion) = W 乂 W, A, ⑷). Among them, Data Out is the output of the equalizer of DFE-HCMA. Here Data Outyf is set, and 砟 ⑷ 乂 ㈨ represents the forward adaptive filter 106 and the feedback filter 108 first layer. The main unit function of 104 is their step size, the main unit function of the second layer of the two filter banks, and the real main unit function of the DFE-HCMA equalizer. And wf㈨, b 丨 ㈨ represent the weight vectors of the second layer of the forward filter 106 and the feedback filter 108, respectively. In the figures 11A to 11C, the DFE-HCMA algorithm is simulated and analyzed. Assume that (1) the equalizer has # input signals. (2) Both the forward filter 106 and the feedback filter 108 are divided into two layers (α = 2). The number of signals in the adaptive filter 104 of the forward filter 106 is 29 1236212 13679twf.doc / 006 # (y? = #). Except for the last adaptive algorithm 104 of the first layer, the number of signals in each adaptive algorithm 104 of the feedback filter 108 is #. The length of the last adaptive calculator 104 is equal to W-1 in this study. (3) Channel response h (k) = ~ [1 + qos {2k {L · -2) / W], k = 1,2,3,4 (the table does not have 4 multi-path signals), κ = 3 ·1. (4) DFE equalizer length # = 81, 100, 121. (5) SNR = 30dB ○ From these three figures, we can clearly see that the convergence ability of dfe-hcma is better than that of DFE-CMA. Table 4 lists the cost functions of DFE-HCMA and DFE-CMA in the steady state. It can be seen from the table that DFE-HCMA has a lower main function. According to the above description and simulation analysis, we can understand that the hierarchical design architecture can obviously improve the convergence ability of DFE-CMA. DFE-HCMA DFE-CMA N = 64 0.020173 0.076936 N = 100 0.017423 0.118227 N = 121 0.019013 0.140263 Table 4 In the preferred embodiment of the present invention, the transmitted data bits, bits and bits are uncorrelated ( uncorrelated). In many data communications, this assumption is reasonable. If the data is highly correlated (such as some animations), de-correlation should be performed first. 1236212 13679twf.doc / 〇〇6 In a preferred embodiment of the present invention, the ratio of the number of multiple paths to the number of equalizer contacts cannot be too large. If the number of multiple paths increases, the equalizer contact should be increased The number of corners, otherwise the performance of the hierarchical equalizer will be affected. In the preferred embodiment of the present invention, in terms of parameter selection, the selection of the step size of the HLMS (//) 値 is suggested as follows, and other algorithms are similar: μ (HLMS) = μ (LMS) χN / β 〇 In a preferred embodiment of the present invention, the selection of the step size (//) 値 is also applicable to HCMA. In the preferred embodiment of the present invention, the hierarchical equalizer architecture is suitable for a single carrier system, such as DSL, WLAN, Cellular, TDMA, or CDMA systems. If it is CDMA, it is a RAKE architecture. To sum up, the design method and architecture of the hierarchical adaptive equalizer of the present invention have the following advantages: (1) The design method and architecture of the hierarchical adaptive equalizer of the present invention, and its hierarchical adaptive HLMS And DFE-HLMS and other equalizer design methods and architecture can significantly accelerate the convergence speed of the algorithm calculation, and reduce the final convergence MSE mean square error. (2) The design method and framework of the hierarchical adaptive equalizer of the present invention are to deal with the arithmetic operations in each hierarchy and in each adaptive calculator in a hierarchical manner. This design idea is to divide the input signal into a hierarchical adaptive calculator, and then perform RLS calculation processing separately. Due to the hierarchical processing method, the output is more accurate, the convergence speed is faster, and the MSE error 値 is the smallest when it is stable. At the same time, it has a lower calculation 31 1236212 13679twf.doc / 006 The calculation complexity (the calculation complexity is 〇 (Chong), which is lower than the computational complexity of RL (0 (π) (because A ^ / 〇). (3) The design method and architecture of the hierarchical adaptive equalizer of the present invention enters into the convergence process. The shortest distance between the minimum points in the region significantly accelerates the convergence rate of the main unitary function of the CMA. At the same time, it allows the HCMA to quickly converge to the optimal unitary value (minimum amount of error), avoiding falling into the weakest area minimum point during the convergence process, and After stable convergence, these areas can reach the same global minimum at the same time, effectively reducing the possible ISI impact and interference. (4) The design method and architecture of the hierarchical adaptive equalizer of the present invention can be widely applied On the design of non-linear equalizers such as DFE. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone skilled in this art will not depart from the essence of the present invention. Within the scope of God and God, there can be some changes and retouching, so the scope of protection of the present invention shall be determined by the scope of the attached patent application. [Simplified illustration of the drawing] FIG. 1A shows a comparison according to the present invention. A hierarchical adaptive equalizer architecture diagram of the preferred embodiment. FIG. 1B is a flowchart illustrating a hierarchical adaptive equalizer design method according to a preferred embodiment of the present invention. FIG. 2 is a flowchart illustrating a method according to the present invention. A preferred embodiment of a two-tier adaptive equalizer design architecture η. Figure 3 shows a three-tier adaptive equalizer design architecture® according to a preferred embodiment of the present invention. 32 1236212 13679twf.doc / 006 Fig. 4 is a detailed design architecture diagram of a hierarchical adaptive equalizer according to a preferred embodiment of the present invention. Figs. 5A to 5C are diagrams not showing a preferred embodiment of the present invention. A simulation result of HLMS mean square error and convergence rate is shown in FIG. 6A to FIG. 6C are simulation results of HRLS mean square error and convergence rate according to a preferred embodiment of the present invention. FIGS. 7A to 7D are diagrams showing the results according to the present invention. Invention of a preferred embodiment Kind of CM main unit function and convergence rate simulation results. Fig. 7E is a CM contour map showing a standard CMA after stable convergence according to a preferred embodiment of the present invention. Fig. 8 is a preferred embodiment according to the present invention. A detailed design and architecture diagram of a DFE-HLMS adaptive equalizer. Figures 9A-9C show simulation results of the mean square error and convergence rate of a DFE-HLMS according to a preferred embodiment of the present invention. Figure 10 is a drawing A detailed design architecture diagram of a DFE-HCMA adaptive equalizer according to a preferred embodiment of the present invention. FIGS. 11A to 11C are simulation results of a CM main unit function and a convergence rate according to a preferred embodiment of the present invention. . Fig. 12 is a design diagram of a conventional FIR horizontal adaptive equalizer. Fig. 13 is a design diagram of a conventional DFE horizontal adaptive equalizer. FIG. 14 is a schematic diagram of a conventional LMS algorithm. FIG. 15 is a schematic diagram of a conventional RLS algorithm design. [Schematic description] 33 1236212 13679twf.doc / 006 100: Hierarchical adaptive equalizer 102: Delay element 104, 1204: Adaptive calculator 106, 1206: Forward filter 108, 1208: Feedback filter 1410, 1510: Transverse filter 1412, 1512: Adaptive weight control mechanism s 122 ~ s 124: Step flow 34

Claims (1)

1236212 13679twf.doc/006 拾、申請專利範圍· 1.一種階層式適應性等化器之設計方法,該設計方法 包括β· 提供Ν個延遲元素; 將該些延遲元素分割成多數個適應性演算器,並使每 一該些適應性演算器係具有/5個延遲元素;以及 將該些適應性演算器建立成邏輯上之一階層樹由上而 下之第一層,並使該階層樹具有α層,且該階層樹由上而 下之第一層係具有Θ 個適應性演算器,該階層樹由上 而下之第二層具有/3 個適應性演算器,最後一層則具 有一個適應性演算器, 其中,Ν、α與万均爲大於等於1的正整數,且Ν大 於等於β。 2·如申請專利範圍第丨項所述之階層式適應性等化器 之設計方法,其中該階層樹由上而下之第一層的輸出係爲 該階層樹由上而下之第二層的輸入。 3·如申請專利範圍第1項所述之階層式適應性等化器 之設計方法,其中該階層樹之最後一層之輸出係爲該階層 式適應性等化器的輸出。 4·如申請專利範圍第1項所述之階層式適應性等化器 之設計方法,其中該階層式適應性等化器係適用於一演算 法。 5·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括LMS演算法。 35 1236212 13679twf.d〇c/〇〇6 6·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括RLS演算法。 7·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括CMA演算法。 8·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括DFE-LMS演算法。 9·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括DFE-RLS演算法。 10·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括DFE-CMA演算法。 11·如申請專利範圍第4項所述之階層式適應性等化器 之設計方法,其中該演算法包括LMS、RLS、CMA、 DFE-LMS、DFE-RLS與DFE-CMA間之複合式演算法。 12· —種階層式適應性等化器架構,其特徵在於具有一 階層樹,該階層樹具有α層,且該階層樹由上而下之第一 層係具有点《-1個適應性演算器,第二層具有石α·2個適應 性演算器最後一層則具有一個適應性演算器,其中,/3係 爲每一適應性演算器內之延遲元素個數,並且α與/5均爲 大於等於1的正整數。 13.如申請專利範圍第12項所述之階層式適應性等化 器架構,其中該階層式適應性等化器架構係具有Ν個延遲 元素,其中Ν等於/3α,且Ν爲大於等於1的正整數以及 Ν大於等於/5。 14·如申請專利範圍第12項所述之階層式適應性等化 36 1236212 13679twf.doc/006 器架構,其中該階層樹由上而下之第一層的輸出係爲該階 層樹由上而下之第二層的輸入。 15.如申請專利範圍第12項所述之階層式適應性等化 器架構,其中該階層樹之最後一層之輸出係爲該階層式適 應性等化器架構的輸出。 16·如申請專利範圍第12項所述之階層式適應性等化 器架構,其中該些適應性演算器係爲以一運算法執行最小 化運算處理與個別更新該些適應性演算器的權重。 17. 如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括LMS演算法。 18. 如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括RLS演算法。 19. 如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括CMA演算法。 20·如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括DFE-LMS演算法。 2L如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括DFE-RLS演算法。 22. 如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括DFE-CMA演算法。 23. 如申請專利範圍第16項所述之階層式適應性等化 器架構,其中該演算法包括LMS、RLS' CMA、DFE-LMS、 DFE-RLS與DFE-CMA間之複合式演算法。 371236212 13679twf.doc / 006 Patent application scope 1. A design method of hierarchical adaptive equalizer, the design method includes β · providing N delay elements; dividing the delay elements into a plurality of adaptive calculations And make each adaptive algorithm have / 5 delay elements; and build the adaptive algorithms into a logical first hierarchical tree from top to bottom and make the hierarchical tree It has an α layer, and the first layer of the hierarchical tree has Θ adaptive calculiers, the second layer of the hierarchical tree has / 3 adaptive calculiers, and the last layer has one adaptive calculus. An adaptive calculator, where N, α, and 10,000 are all positive integers greater than or equal to 1, and N is greater than or equal to β. 2. The design method of the hierarchical adaptive equalizer as described in item 丨 of the patent application, wherein the output of the first layer of the hierarchical tree from top to bottom is the second layer of the hierarchical tree from top to bottom input of. 3. The design method of the hierarchical adaptive equalizer as described in item 1 of the scope of patent application, wherein the output of the last layer of the hierarchical tree is the output of the hierarchical adaptive equalizer. 4. The design method of the hierarchical adaptive equalizer as described in item 1 of the scope of patent application, wherein the hierarchical adaptive equalizer is applicable to an algorithm. 5. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes an LMS algorithm. 35 1236212 13679twf.doc / 〇〇6 6. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes the RLS algorithm. 7. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes a CMA algorithm. 8. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes a DFE-LMS algorithm. 9. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes a DFE-RLS algorithm. 10. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of patent application, wherein the algorithm includes a DFE-CMA algorithm. 11. The design method of the hierarchical adaptive equalizer as described in item 4 of the scope of the patent application, wherein the algorithm includes a compound algorithm between LMS, RLS, CMA, DFE-LMS, DFE-RLS, and DFE-CMA law. 12 · —A hierarchical adaptive equalizer architecture, which is characterized by a hierarchical tree, the hierarchical tree has an α layer, and the first layer of the hierarchical tree has points -1 adaptive calculation The second layer has two kinds of adaptive calculators. The last layer has one adaptive calculator. Among them, / 3 is the number of delay elements in each adaptive calculator, and α and / 5 are equal. Is a positive integer greater than or equal to 1. 13. The hierarchical adaptive equalizer architecture according to item 12 of the scope of the patent application, wherein the hierarchical adaptive equalizer architecture has N delay elements, where N is equal to / 3α, and N is greater than or equal to 1. A positive integer and N is greater than or equal to / 5. 14. Hierarchical adaptive equalization as described in item 12 of the scope of patent application 36 1236212 13679twf.doc / 006 architecture, in which the output of the first layer of the hierarchical tree from top to bottom is that the hierarchical tree is from top to bottom Input on the second layer below. 15. The hierarchical adaptive equalizer architecture as described in item 12 of the scope of patent application, wherein the output of the last layer of the hierarchical tree is the output of the hierarchical adaptive equalizer architecture. 16. The hierarchical adaptive equalizer architecture as described in item 12 of the scope of the patent application, wherein the adaptive calculators perform a minimum operation processing with an algorithm and individually update the weights of the adaptive calculators. . 17. The hierarchical adaptive equalizer architecture as described in item 16 of the patent application scope, wherein the algorithm includes an LMS algorithm. 18. The hierarchical adaptive equalizer architecture as described in item 16 of the patent application scope, wherein the algorithm includes an RLS algorithm. 19. The hierarchical adaptive equalizer architecture as described in item 16 of the patent application scope, wherein the algorithm includes a CMA algorithm. 20. The hierarchical adaptive equalizer architecture as described in item 16 of the patent application scope, wherein the algorithm includes a DFE-LMS algorithm. 2L The hierarchical adaptive equalizer architecture described in item 16 of the scope of patent application, wherein the algorithm includes a DFE-RLS algorithm. 22. The hierarchical adaptive equalizer architecture as described in item 16 of the patent application scope, wherein the algorithm includes a DFE-CMA algorithm. 23. The hierarchical adaptive equalizer architecture described in item 16 of the scope of patent application, wherein the algorithm includes a hybrid algorithm between LMS, RLS 'CMA, DFE-LMS, DFE-RLS, and DFE-CMA. 37
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