TWI235981B - Method and equipment of simulating impulse displaying for CRT - Google Patents

Abstract

This invention provides a method and equipment of simulating impulse- displaying for CRT. It resolves the restriction and shortcoming of the traditional hold-type LCD, and removes the blurred outline problem resulted from the superimposing of the image and residual image. A simulator is provided to achieve the above-mentioned purpose. Its basic structure comprises a first input control line, a second input control line, a first data input line, a second data input line, a first capacitor, a second capacitor, a first transistor, and a second transistor. The second capacitor provides a driving voltage output line. The first transistor has a first gate that connects with the first input control line. The first source connects with the first data input line. The first drain connects with the driving voltage output line, the first capacitor and the drain of a second transistor. The second transistor has a second gate that connects with the second input control line. The second source gate connects with the second data input line. The second drain gate connects with the driving voltage output line, the second capacitor and the drain of the first transistor. Where the first and the second capacitors are grounded, the driving voltage output line is used to output the simulated driving voltages to the pixels of the LCD panel to display images. The features are that the first and second input control lines connect with a gate driver, and the first and second data input lines connect with a data driver. It also provides a method of simulating impulse displaying for CRT.

Description

1235981 D. Description of the invention: [Technical field to which the invention belongs] The method is related to a method for simulating GRT pulsed imaging. W, *, Gan Yuenv About-a kind of liquid crystal display to simulate ⑽ pulsed imaging The methods and methods of profitability are especially [previous technology] At the end of recent years, liquid crystal display technology and devices have been widely used in the mouth, such as: televisions, computers, monitors, mobile phones, personal data, and the development of features such as video product consumption and low heat dissipation. Demand. ▲ In the future, electronic production buckles will continue to be light, thin, short, and low-power. The TV panel made with liquid crystal display technology is full of the period of the New Year's Day-one of a short period of time, and the curve in Figure 1 This pixel only has almost no visible light (gmKinstant) in each of them. Therefore, the image displayed between the day and the day looks at mm- the limitation of the characteristics of the liquid crystal material itself, and the response is displayed. However, it will feel the old screen. The image and the new book ^ the shadow, the image ^ |, ° f, this is the phenomenon that the viewer sees the image, (after image). — ~ The image overlaps to form an image. The residual image is impulse type. LS ^ ί Γ 2 ^ CRT ^ «^^^ Cpseudo The optical response at the time of writing is the image ^, and the optical response is as shown in Figure 1. As shown in the curve 只, only this kind of acceleration driving can be reduced to ^, which can be reduced to; the liquid crystal grayscale response time of the display-a ^^^^^ type of display made of ^^^^ technology can be used. The grayscale response time is reduced to k, so the H image of the picture still cannot completely remove the image «and, the image remains, the phenomenon of the image 1235981. In order to completely remove the "residual image", the current conventional technology uses the following three methods: (1) the remaining time after the image is displayed in this surface is written into black data or a black screen; (2) the backlight is turned off. The backlight light (blink light) method; (3) Combining the above two methods (1), (2) ... both the axe book and the backlight is turned off. The content limitations and disadvantages will be described in detail below. …, * I use Γί, ^ f Refer to Figure 2A_2C for reference. Each of its display techniques uses an LCD display to simulate a CRT pulsed display method. As shown in FIG. 2A, the image displayed by the conventional liquid crystal display is composed of a series of written Cframes 1, 2, 3, and 4. The method used is to insert the full daylight surface 11, 12, and 13 between the daylight surface 1, 2 and 蚩 2: Shizhi ^, and between the daylight surface 3 and 4, respectively, to achieve a simulated CRT & And the backlight source ^ 々!) Corresponding to the time points of the above day and day are all in a bright state. ", Such as the first method of ^ skin 2 and 1 mouth technology. Please refer to Figure 2β" at this time "the shadow presented by the display = 疋 = the daytime surface of sequential playback 丨 ―7. This second method turns off the moon light sources 22, 24, and 26 corresponding to the points of the daytime surface 2, 4, and 6, and corresponds to the written ambiguities of 1, 3, 5, 7, and 9 ^ θ is the second, which explains the third method of the conventional technique. Please refer to Fig. 2C. This LCD shows crying sequence = ^ sequence, which is composed of a series of screen spoons. This method is to insert two and two in the daytime i and 2 mj households = 12 = i, the whole: the stomach, the training picture 1 12 and 13, and make the backlight light sources 22, 24, and 26 corresponding to the time point of the picture 1 It is in the closed state, and the other is to close the library in full 1 ”. The door is black and 4 sides, and at the same time, the backlight is turned off. The alternating light-emitting state is off, and the flashing type is used to achieve the LCD display to simulate the CRT display. The effect of pulse development. Coincidentally, each of the above three methods has its disadvantages and limitations. Assume that the method of drawing 3 to 22 people's black daytime faces requires the addition of equipment such as a frequency multiplier. = Two ί minutes, and one and a half of its number of daytime faces is used to place a black screen. Therefore, this method will be extensive and costly. And doubling the imaging frequency will result in increased electromagnetic interference (EMI: da count id ti = n er erence), which is the disadvantage and limitation of the first method of conventional technology. This method also requires adding multiplier equipment to achieve the same number of display screens / single image. Therefore, ^ half of the daylight surface corresponds to the backlight off state and cannot be displayed = and missing ^ 关 # The cost of this method is increased step by step. This is the second method of the conventional technique. The third method is a combination of the above two methods, that is, inserting the black daylight and backlight mode. In addition, click ^^ The disadvantages and limitations of the two methods on the package t. So it is also not ideal. At the same time, these are inserted into = all, because the characteristics and speed of the optical response of different liquid crystal materials are not dark, but change from dark to another-this; the material is not applicable. Because some liquid crystal materials are inserted into the black daylight surface from bright change interval to simulate and change from dark to fast; therefore, for the research, development, experiment and improvement of equal time, the inventors of this case have devoted their efforts to investing in this related 1235981 [Invention [Contents] Therefore, the object of the present invention is to provide a simulation of CRT pulse exhibition & to improve the shortcomings of related knowledge. It does not make devices known by knowledge, to solve the design and method of light, and to Provides a color picture on the screen without turning off the back display. The amount of display must be = the image is blurred, which can be greatly improved. Its basic purpose is that the present invention provides an LCD display simulation "for display" The device, ΓΪ analog drive voltage output i-plane control line is connected to the-driver, and these first and second input data lines are connected to the-type, pulse type imaging device and other changes and Embodiments The present invention also relates to a method for simulating CRT pulsed imaging. A better mosquito is obtained by the correlation formula. [Embodiment] The following describes the example of t hair, in which the same reference symbols represent the same elements. In the following description, the liquid crystal display t i (wave fom) is used as a tool 'to describe the voltage applied to the liquid crystal and the liquid crystal's prior learning response characteristics and behaviors, so as to explain the advantages and characteristics of the present invention. The horizontal axis in the first, sixth, eighth, tenth, and twelfth of Α1 t is time, and its unit is? Y to A: It is the time point when it advances to 4d according to the time sequence, and the vertical axis is the driving voltage gcode ( Code) as the display unit. In the figure, for the convenience of explanation, this time is divided into 0H0, and, ι (? Λ) round solid, isogastric time interval (partition) in the unit of daytime (frametime), and 4 (a ), 6 (a) in response to the song ^. This -response is usually the brightness exhibited by this liquid crystal (lumi = ef nits (candle light / square meter: Cd / m2). In the following 4th to (e), 6 (a) to (g), 8 (a) The meanings of the representative symbols of the voltage pulses in (d), lG (a) to ⑷, and 12 (a) to (e) can be obtained by referring to the circuit structures in 3⑹, 5⑻, 7⑹, 9⑹, and u⑹. Understand. For example, the waveform shown in Figure 4 (b) represents the control voltage pulse applied to the gate of the transistor Q simulated in Figure 3 (1); as shown in Figure 4 (c) The waveform shown in Figure 3 (b) represents the control voltage pulse applied to the gate of transistor Q '; Figure 4 (d) represents the waveform shown in Figure 3 (b) The driving voltage pulse applied to the source of the body Q '; the waveform shown in Figure 4 (e) represents the driving voltage pulse applied to the source of the transistor Q' in Figure 3 (b); Vlc is The output drive voltage 1235981 and vc ° m generated in this analog device are reference voltages. The above is for the convenience of comparing the 4th to the 4th) figures with each other. For the sake of comparison, the ^ f ί will be under the 4th) figure for the common use of the first) to 4 (e); and A1 to A6 3 hours I. The time of the sequence. The other figures 6, 8, 10 and 12 are illustrated in a similar manner as described above. In the following, the circuit diagrams shown in the five embodiments, the control voltage pulse of the pixel unit of the liquid crystal display controller are set to S3: the voltage pulse waveform, and the liquid crystal optical response characteristic curve generated by it to illustrate the present invention. Embodiment 1 The third embodiment of the present invention will be described with reference to FIGS. 3 (a), ⑹, and 4 (a) to (e). Please refer to FIG. 3 (a) for its display: According to the first embodiment of the present invention, the simulation device of the gate coil data is shown in FIGS. 3 (a) and (b). The simulation device includes: One input = control line ⑹; second input control line (Gr); first input (\); first-capacitor ⑹; second capacitor (⑸; output drive voltage line)-input input 第 line The system includes: the first gate is connected to the first input control line ⑹, the-source is connected to the first flute (the Bebi is connected to the output drive voltage line and the-capacitor ⑹, and the second electric voltage Line; _ 纽 钱 #Electric sun and sun body miscellaneous with the second capacitor (Oc) and output drive capacitor acid second capacitor, each capacitor storage capacitor 11 no day, day, etc. «Capacity 3 and each line for reducing voltage The driving voltage used in the simulation is output to the panel. This connection is to be connected to the first-if IfA-shun_ship—. Touch 1. The receiver is connected to the special data line. The simulation method is as follows:丨 The driving method of the analog device of the embodiment includes the following steps: a first control signal with a periodic pulse waveform provides the first electric shirt of the circuit When the Na-trigger trigger is triggered, the circuit will send the output signal ^^ 7 『Feed 3 = output voltage | by g 2 control signal (Gr) 1235981 to output the output driving voltage generated by the above steps to the pixels for display Waveform analysis The following refers to Figures 4 (a) to 4 (e) to describe in detail the control voltage pulses Gi, Gl generated by the simulation device according to Figures 3 (a) and (b) of the first embodiment of the present invention. And the relationship between the driving voltage pulses d IV and VLC.

When the impulse is electric Λ pulse-like impulse is Gl (Figure 4 (b)), the corresponding driving voltage pulse is Di (Figure 4 (d)), and the control voltage pulse for this equipment is Gi, (Figure 4 (c)), the drive voltage pulse corresponding to A is Dr (Figure 4 (e)); and the actual combined output drive voltage pulse generated by the analog device of the present invention for liquid crystal is Vlc (Figure 4 ( a) Figure). The value of the chess-like device on the liquid. In the following discussion, the driving voltages V1, V2, and V3 can be regarded as a voltage thunder that is represented by a code (cod). These driving voltages can reach their goals in an instant when they are applied. After applying the voltage, the target optical response position must be reached as soon as possible. This is because the material of the liquid crystal itself should generally use alternating current (AC) as the driving voltage to the liquid crystal. , ^ 'T' L will have the phenomenon of alternating positive and negative phases). The 疋 1 of A is repeated cyclically in the time sequence of time points A1 to A6 using ^^ below: at the time point Aι, the driving voltage pulse Dr in the N-1 daytime plane is used, V ,,, n, ": The value of the driving voltage pulse rises to V2 (c0d: J) at the time of the second dagger, so that the output produced by this analog device; + pulse Gl ^ (code, 2), when the driving voltage pulse The value of Dl, Vl (for example, 0), due to the effect of the electric voltage Γ, the value of the driving voltage pulse VLe is on the N + 1th frame of the instant G. At this time, the value of the driving voltage pulse h drops to v3, The value of \ c〇d is from the value of v to the control (mf i, which drives the pulse of «pulse (_ to \\ pulse ^ value rises to V), u% A6 / control voltage pulse at the other time points of moxibustion Gl and η η can be easily derived by referring to the above description. In this figure, the liquid crystal optical response characteristic curve when the analog drive is implemented. When inserting a full color ($ / 文 二 上 巧 Hne) between the screens, it can be It achieves the same effect as the conventional technology of turning off the backlight in ..., the color surface or the daytime surface, and achieves the purpose of simulating the CRT display pulse display with [文 心 1235981 display In addition, η shown at the pulse Gr in the Nth daytime plane of Fig. 4 (c) represents η pulses, and there are η scans between the control voltage pulses Gi and Gr in the same screen The time difference of the lines, that is, 'from the perspective of this pixel', after the first L pulse, after another η Gi pulses, another control drive pulse Gr is input. The length of the time interval (intervai) represented by n can be designed Depending on the actual characteristics of the liquid crystal material and other needs to make appropriate adjustments, the effect of scanning the black lines to simulate the pulsed display of the CRT display can be achieved. This is the biggest feature of the present invention over the conventional technology. Example 2 $ 下Figures 5 (a), (b), and 6 (a) to (g) of McCaw illustrate a second embodiment of the present invention. ≫ First, please refer to Figure 5 (a), which shows: According to this The first embodiment of the invention is a pixel array composed of intersections of a plurality of gate lines and data lines, and a driving circuit composed of a plurality of data drivers and a plurality of gate drivers. FIG. Example of an analog driving device for a liquid crystal display. The analog device consists of 5 (a), (b) It can be known that the LCD display acceleration driving device includes a period pulse waveform of the time when the (brass /) 1 (drain) first wire is connected to the output driving voltage line and the first capacitor ⑹ and the second transistor sweep line.) In the case of the state, the driver of the liquid crystal display analog driving device of the second embodiment of the read pulse method is provided with the first transistor gate. The control signal neck 1235981 provides the fifth data ^ (Ds) to the parallel number: :: f to provide the third data signal (D,) to the f-th source; the control signal is tilted, and the gamma -Longpu Dl) feed the * f & = _ the first control | provide the source of the second transistor (Q ') as the second data signal (Di. ff ^ control signal (Gr) trigger When 'the circuit will output the second data signal (Dr ^ 1) = the output of the above-mentioned supplementary students can be sent to the county Su Ming 4 far, and the waveform analysis 5r reference 6 (a) to 6 ( g) diagram to explain in detail the control voltage pulses G1, Gl, and the driving voltage generated by the simulation device of (b) and (b) according to the second embodiment of the present invention. The relationship between the waveforms of the pulses Ul, Di ', and Vlc. ^ Because alternating current (AC) is usually used as the driving voltage for liquid crystals, there will be a phenomenon of alternating positive and negative phases during the direct drive; (ie, the waveforms of the driving voltage pulse, ^, K, and VlC) Relative to the reference voltage VcOM, the positive and negative phases alternate. These waveforms are cyclically repeated in the time sequence of time points A1 to A6, for example, in the following manner: the driving voltage pulse Di in the N-! Th frame before time ^, the value Vi, (c〇de 〇) is negative and The value of the driving voltage pulse Vlc Vi (code 〇) is negative; and at the time point a! Starts to enter ^ N pictures, at this time the value of the driving voltage pulse h rises to V2 (code 32) and is positive, The role of the control voltage pulse G1 makes the value of the output drive voltage VLC generated by this analog device rise to V2 (code 32) and become positive polarity, and remains until the time point A ?. Then the time reaches the time point A2, at this time the value of the driving voltage pulse m, Vi (cod), due to the action of the control voltage pulse Gr, the value of the driving voltage pulse Vlc drops to V2 (code 32) at an instant! (code 0) is still positive, and its value remains until time point a3 ^. Then time progresses to time point A3, at this time it starts to enter the N + 1 picture, at this time: the value of driving 3 ^ pressure pulse dagger decreases To Vs, (code 120) is negative polarity. Due to the effect of the control voltage pulse Ul, this causes the value of the driving voltage pulse VLC to drop to V3 in an instant, (c〇de 12〇), ^ is negative polarity. Keep it until the time point M. Then proceed to the time point A4, at this time, the value of the driving noon pulse Dr is still Vi ′ (code 0) and is negative, because the control voltage pulse is used, this causes the driving The value of the voltage pulse Vlc rises to v / (code 0) and is still negative, once to the time point A5. Then, the time proceeds to the time point 尨, and it starts to enter the n + 2 day surface. Therefore, the voltage pulse D! The value rises to Vs (code 120) and becomes positive. Due to the effect of the control voltage on Gl, this leads to the drive. The value of the dynamic voltage pulse Vlc rises to v3 (code 120) instantaneously and is positive, and remains until time point A6. Control voltage pulses G, Gr, throbbing voltage pulses Di, Dl •, and other time points after time point A6 The change of Vlc can be easily derived by referring to the above description. Figures 6 (d) and 6 (e) are shown in Figure 5 (a). Waves of the third and fourth data signal voltage pulses are shown in Figure 6 (a). The dotted line shown in the figure is the liquid crystal optical response characteristic curve when the analog drive is implemented. When the output drive voltage VLC of the analog device at each point in the figure is (code 〇), it means that it is on the display screen during the & time. Scan the black line, which can be achieved with the conventional technology in 11 1235981. The black daylight is inserted between the LCD display and the daylight display, or the backlight is turned off between the screens. The phase indicator simulates the CRT display pulse display. Purpose. In this month, the pulse is displayed in the Nth frame of the t. The η shown here represents 1 ^ pulses, and the control of f is shown! The time difference between the pressure pulses Gl < From the perspective of 22 af, after the first & pulse, η 0! Pulses pass The daily control drive pulse ^, this ^ represents the length of the time interval (Nerval) can be adjusted according to the actual needs of the liquid crystal material characteristics, etc., and can be achieved to scan the black line to achieve the RT display pulse This is the biggest feature of the present invention over the conventional technology. The waveform of the driving voltage pulse & output by the analog device is the same as in Example 1 for the sake of clarity, so as not to cause too much in the description process. The situation is complicated and difficult to understand, but the waveform can be designed into various waveforms by the designer according to actual requirements. Embodiment 3 The third embodiment of the present invention will be described with reference to FIGS. 7 (a) and (b) and FIGS. 8 (a) to (d). -First refer to Figure 7fa), which shows a driving circuit composed of a plurality of gate lines and data line dot arrays, and a plurality of data drivers and a plurality of gate drivers according to a third embodiment of the present invention. FIG. 7 (b) is a liquid crystal display acceleration driving device according to this embodiment. The simulation device can be seen from Figs. 7 (a) and (b) that the liquid crystal display acceleration driving device includes: a first second input control line (Gr); a first input data line ⑼; a-capacitor ⑹; and a first power valley ^ (Cls); output drive voltage line; second lifn ?, encapsulation: the first gate is connected to the first input control line ⑹, the first source is connected to the-input two 枓, and the first, first, and pole connections To the output drive voltage line, the first capacitor (and the second transistor, and the first transistor), and the first body (Q ')' includes: the second gate is connected to the second input control line (Gi.), The second source is grounded, and the first capacitor Γ and the second capacitor 11 (第二 and the output drive voltage line; the capacitor hybrid second capacitor 1 is an age capacitor and a material effect capacitor H and each is grounded, and the output The crimping line is an image of a cut-out image of a secret image that is transferred to LGD sulfur; the pot data is connected with a second input control line to a gate driver, and the first input data line is connected to a differential The time difference between the periodic pulse waveforms of the system signal is the time between the sweeping lines of η pulses Simulation method • The following is the driving method of the simulation device according to the third embodiment of the present invention, which includes the following steps 12 1235981 A control signal (Gi) provides the first gate of the first transistor 该 of the circuit; ° iu the first) ¾ the source of f, a transistor 'when triggered by the first control signal, feed the first data signal to the output drive voltage line; follow the second control signal (Gr) When triggered, the circuit will connect the ground potential (code_ to the output drive voltage line; drive the output generated by the above steps to output the pixel Eshow image. Waveform analysis 7 (a) \ 下 ϋ 第 之; ^ ϋ8 (^ figure to explain in detail the control voltage pulses Gl, Gl, and driving voltage pulses, and driving liquid crystal driving voltage generated by the waveform device according to the third embodiment of the present invention, therefore, in its control: When the reference voltage VC ° M is equal to f, the positive and negative phases will alternate.) Click "Cycle" to repeat the time sequence from the time point A1 to A6: the value V2 of the driving voltage pulse h in the second daytime plane, ( code 32), (since

Al VC〇m) 'VLc ^ ft Vcom; The value of the driving voltage pulse D1 rises to V "c〇de 32) from the surface. When the door enters, it will dry 5 ^ V2, and the heart will become positive. And remains until the time point A2 is because S = point eight 2 at this time, the value of the driving voltage pulse D1 is still at the heart (. 〇, (code ϊ) τ ^^ νι pictures i 1Ϊ5. Then the time is OK At the time point A3, at this time, it starts to enter the N + i. The voltage pulse pulse is used to power G, and the second pulse is negative, to v3, (code 12 (n iff 4) makes the value of the voltage pulse Vlc also instantaneous. The falling point a4, this (at this time, the driving Hi is negative polarity, and remains until the time point A4. Then proceed to the control voltage pulse.!, The first one TIL120) and the negative polarity 'from I pulse, the value Rise and overshoot at = 2!) 'Due to the control voltage pulse G1, this causes the drive voltage pulse to stop. It rises to V3 (code 120) and becomes positive polarity, and remains until the time point A6 is the other time points after the time point A6 The change of the control voltage pulse Gl 1 can be easily derived from the above description to obtain f ...

Gi ', driving voltage pulse D !, and the dotted line in this figure are the liquid crystal optical response characteristic curves when analog driving is performed. When scanning on the display screen during linpf 20m), that is, the watch does not insert $ 多 金 而? ,, line ib. B 1) between this time and plane, it can be achieved with the conventional technology in the day ..., once or in Once the backlight is turned off between surfaces, the purpose of simulating a CRT display with an LCD display 13 1235981 is achieved. In addition, η shown at the pulse Gr in the Nth frame of FIG. 8 (c) represents η pulses, which shows that the control voltage pulses Gi and Gr in the same day plane have n scanning lines Time difference; that is, from the point of view of the pixel, after the first G! Pulse, another control driving pulse Gr is input after η 0 pulses, and the length of the interval represented by η can be designed Depending on the actual characteristics of the liquid crystal material, proper adjustments are required, and the effect of scanning the black lines to simulate the CRT display pulse display can be achieved. This is the biggest feature of the present invention over the conventional technology. Embodiment 4 Hereinafter, a fourth embodiment of the present invention will be described with reference to FIGS. 9 (a) and (b) and FIGS. 10 (a) to (d).

First, please refer to FIG. 9 (a), which shows a pixel array composed of intersections of a plurality of gate lines and data lines according to a fourth embodiment of the present invention, and a plurality of data drivers and a plurality of gates. Drive circuit composed of drivers. FIG. 9 (b) is a liquid crystal display acceleration driving device according to this embodiment. The simulation device can be seen from Figures 9 (a) and (b) that the liquid crystal display acceleration driving device includes: a first input control line (GO; a second input control line (Gn); a first input data line QO; a first capacitor ( cs); a second capacitor (Cls); and a drive-out driving voltage line; and a first transistor (Q1), including: a gate connected to the first input control line (Gi) or the second input control line, a source The electrode is connected to an input data line (DO, and a drain is connected to the output drive voltage line and two capacitors (Cs, Clc) in parallel; and each of them, the container and the second capacitor 11 are grounded, and the output * The driving voltage line is used to display the analog driving electric two-voltage output to the pixels of the LCD panel to display an image; it is characterized by being connected to a data driver, the input control line is connected to a gate driver, and the gate The second driver outputs 0E: output enable to input the line and the start horizontal pulse (STH: start pulse h〇riz〇ntal)

/, R The P input lines such as λ receive relevant signals to generate synchronous control voltage pulses of the input control line; the input control line is supplied to the gate of the transistor and is driven by its control. , ^ Can simultaneously generate two simultaneous scanning lines separated by m-1 scanning lines on the display screen, using the display simulation method udm (the driving method of the LCD display acceleration driving device of the fourth embodiment) The first transistor (the source of the tritium; and the input "# generated by the above steps = the synchronizer generates a synchronous control signal", and the circuit will feed the data signal to the output when "triggered" Drive the voltage line; analyze the 1Q (d) ® to display the image 14 1235981 waveforms to explain the relationship between the waveforms of h and VLC according to the embodiment 4 of the present invention in detail. The control circuit pulses G1, Gm and The driving voltage pulse is used for the driving current to the liquid crystal. Therefore, the voltage value of the W voltage pulse on the daytime at the time of protection i νN_ 1 0 ^ t雷 懕 次 洛 r ★ The value of a rises to V2 (code 32) and becomes positive, because the post-control time reaches the point in time (= this 3 = the power is electric—the value is straightforward, ^ Thunder pressure pulse, Γ, Xi Congtian Zhi: The value of Li voltage guan guan Ul is Vi (code 0), because the value of control H (LUt dynamic voltage pulse VLC from V2 (cod e 32) down to V3 ;,: c ': start, enter the N + 1th day surface, at this time, the value of the driving voltage pulse D! and the value of t are also lower) Λ lower than the "voltage pulse Gi This causes the driving voltage to be repeated. At this time, the value of the driving voltage pulse D1 is V1, (code0), and then enters U U to the time point As. Then, the time proceeds to time point A5, and the time is turned on. The value of the driving pressure pulse D1 on the second surface rises to V3 (code 12). 'This causes the value of the driving voltage pulse Vlc to instantly rise to the control voltage pulse Gl, the driving voltage pulse Dl, and Vu of the remaining time points. Variations can be easily derived by referring to the above description. Han Lmen I% 3) The dotted line shown in the figure is the characteristics of the optical response of the liquid crystal when the analog drive is implemented. The same effect is achieved, and the purpose of using a pseudo-CRT pseudo-RTC pulse display is achieved. = 10 (c) HSync indicates that the control voltage pulses G1 and Gm are synchronization signals. Design, ^ and Gl are Simultaneous control voltage pulses, scanning lines generated by Gm 2 control are scanned on the screen at intervals m] and scanned on the f screen The material is processed in a synchronous manner. The relationship between the waveform of the control voltage pulse Gm ft and the relationship between the control voltage pulse 电 and the driving voltage = wave ^ (that is, what is described above with reference to Figures 10 (a) to 10) is Or), so it is not repeated here. Ft The waveform of the driving voltage pulse VLC output by the analog device shown in the above example is for convenience = and = = see the same as in Example i to avoid the description process This situation can be changed, but the waveform can be designed to have various changes by the designer according to actual requirements. 15 1235981 This is in the same day plane (for example, the Nth day plane). In addition, according to the design features of the present invention, two consecutive successive control voltage pulses Gi (Figure 10 (b)) and g〆i0 (c (Picture) The question and answer m need to be adjusted as required. This important development of this case can be achieved according to the actual desired effect and design. The key points and features are listed by all relevant conventional technologies 5 tmn »5 The same device is used, but f ^ (a, b) is used for illustration by different control parties, and its purpose is to show Will be explained below. "', Different visual effects are achieved on the page screen.' There are 2 related to this line: according to the fifth embodiment of the present invention, a plurality of gate lines and data are used to move the circuit. 1Ub) s several data purchase and transfer The driving circuit “11 (b)” of the complex side pole II is shown in FIG. 1 as an acceleration driving device for a liquid crystal display according to this embodiment. It can be seen from the simulation device 筮 2 i11 (a) and (b) that the acceleration driving device for a liquid crystal display includes · (DO: C thunder second capacitor (CLC); and output drive voltage line; and control line, said 1, 1, secret, check two gates connected to the first input control line or the second input control line or the first The three-input control unit is electrically connected to the "input ~ material line (Dl)", and-the pole is connected to the output drive voltage line and two, and each device is a storage capacitor and a liquid crystal equivalent capacitor and each is grounded. The voltage line 疋 is used to output the analog driving voltage to the pixels of the LCD panel to display an image; =, # is connected to a material driver, the input control line is connected to a gate driver, the gate driver two, 'and Third output enable_input line and start horizontal pulse (sth) People line and receive related signals through this # input line, the input output enable (0E) signal of these gate drivers is controlled in such a way that the output of these gate drivers generates two synchronous signals. Group of control voltage pulses, basins are selected with three groups of control voltage pulses ... (Gi, GO, ⑵ (Gm + 1, G2e), (3) (G_, G3b), and three groups of control voltage pulses Two sets of control voltage pulses (1, 3), or (1, 2), or (2, 3) selected and configured to pass through their corresponding first, second, or third input control lines in a cyclic alternating pattern Supplied to the gates of these transistors, and the driving voltage pulse Vlc generated by their control can drive the pixels to simultaneously generate two simultaneous scanning lines separated by 2m scanning lines on the display screen in a cyclic alternating mode to Display the image. Analog method 16 1235981 The following is the method according to the present invention, which includes the following steps: The driver of the liquid crystal display analog driving device of the embodiment provides the data signal (D1) with a periodic pulse waveform to the transistor (Q1). And start horizontal pulse (STH) input line,

The second, third or third input control line is supplied to the gate of the transistor (Q1); it is characterized by wearing the ancient female 1¾ FS1 Α.ί /->-uk. / 1 r \ \ \ > / λ ^ \ *

Waveform analysis

Because alternating current (AC) is usually used as the driving voltage to the liquid crystal, there will be positive and negative phases when the control f is driven too tightly. The reference voltage v⑽ will alternately appear in positive and negative phases.) /. This I waveform, for example, is repeated cyclically in the time sequence of time points A1 to A6 in the following manner. The value of the driving voltage pulse Di is%, so that the value Vl ′ (code 0) of the driving voltage Vu is negative; and at the time point Aι starts to enter the N-th screen, at this time driving, the value of the pulse #j D! Rises to V2 (code 32), because of the control voltage pulse Gi, the value of the output drive voltage pulse Vlc generated by this analog device also rises to V2 (code is positive polarity, and remains until the time point A2 . Then the time reaches the time point A ?, this = the value of the driving voltage pulse D1 Vi (c〇de 〇), due to the effect of the control voltage pulse G1, the drive = the value of the voltage pulse Vu from V2 (c〇de 32) ) Drops to Vi (code 0) while still being positive. Until the time point As. Then the time progresses to the time point As, at which time it starts to advance = the N + 1th daylight surface. At this time, the value of the driving voltage pulse D1 drops to v3, (c0de 120), because the control voltage pulse Gi The effect is that the value of the driving voltage pulse Vlc also drops to V3 (cOde 120) at an instant. It is negative polarity and remains until the time point A4. Then it proceeds to the time point _ A4 'At this time, the driving voltage pulse Di The value is still Vl '(code 0). Due to the control voltage pulse and Gl, this causes the value of the driving voltage pulse Vu to rise to V / (code 0) is still negative polarity until the time point 尨. Then, the time Go to the time point As, and start to enter the N + 2th drawing. At this time, the value of the driving voltage pulse Di rises to Vs (code 120). Due to the role of the control voltage pulse G1, this causes the value of the driving voltage pulse Vlc to rise to V3 in an instant. (c〇de 12〇) and A positive polarity, until the time point Ae. Control voltage pulses gBt1, G2B + n driving voltage pulses D! and Vu at other time points after time point A6 can be changed more easily as described above Derived from. 17 1235981 Section 12 (a) The dotted line shown in the figure is the liquid crystal optical response characteristic curve when the analog drive is implemented. When the output drive voltage VLC of the analog device at each point in the figure is (code 0), it means that it is performed on the display screen during this time. Scanning the black line can achieve the same effect as the conventional technique of inserting a black daylight between the f-planes or turning off the backlight between the screens, thereby achieving the purpose of simulating a CRT display with an LCD display. …, The waveform of the driving voltage pulse Vlc output by the analog device shown in the above embodiment is the same as that in Embodiment 1 for the convenience of explanation and understanding, so as to avoid the situation that is too complicated and difficult to understand during the description; but it can be designed This waveform is designed to have various changes according to actual requirements. In short, the purpose of this embodiment is to expand two simultaneous scanning lines on the display screen, as shown in Figures 12 (b), (c), and (d). Gi, G «n'i, G ^ i In order to control the voltage pulses synchronously, two sets of scanning lines are generated on the display screen through the driving voltage pulses generated by its control, which are simultaneously scanned at intervals of 2m scanning lines to display an image. Embodiment 6 Hereinafter, a sixth embodiment of the present invention will be described with reference to FIGS. 11 (a) and (b) and FIGS. 13 (a) to (e). This 6th example and the device of the 5th embodiment described above are illustrated by using FIG. 11 (a, b). The purpose is to display the device in the same phase, but different control methods can be used in the display. Different display effects are achieved on the screen. First, please refer to FIG. 11 (a), which shows a pixel array composed of a plurality of gate lines and data points according to the Θ embodiment of the present invention, and a pixel array composed of a plurality of data drivers and a plurality of gate drivers. Structure of the driving circuit. FIG. 11 (b) is a liquid crystal display acceleration driving device according to this embodiment. The simulation device can be seen from Figure 11 (a), (b), the LCD display acceleration driving device includes: t Lost control i ^ iGi); the second input control line (M; the third input control line (g_); The first input data line-the second electric valley device; the second capacitor (0 £); and the output drive voltage line; and the dipper bag: a gate connected to the first input control line or the second input control line or The third input control unit and the electrical connection factory input data line (Dl), and one electrode connected to the output drive voltage line and two and two capacitors 11 are each a storage capacitor and a liquid crystal equivalent capacitor and each is grounded. And the power electronics secret is that the analog driving voltage is output to the pixels of the LGD panel to display the image; the material is connected to a material driver, the input control line is connected to the gate driver, and the three outputs of the gate driver are enabled. The input line and the start horizontal pulse (sth) input line, and the input output enable (0E) signal of these smart pole drivers via the w 丄 sign is: The output terminal of the pole driver generates three sets of control voltage pulses, which are synchronized by the following figan (Gi, Gn), ⑵gua 1, ... Its special gift is provided by the corresponding first, second or third input control line to the transistors (Q1) Tian Po These two sets of synchronous control money (1 , 2, 3) When triggered, the circuit feeds the data signal to the output drive circuit 18 1235981? And the driving voltage pulse Vix generated by its control can drive three synchronous scanning of pixels separated by m scanning lines. The simulation method is generated when the screen is displayed on the screen. The following is the analog driving method of the liquid crystal display according to the sixth embodiment of the present invention, which includes the following steps: The double κ drive square has a data signal with a periodic pulse waveform ( D!) Provide the source of the transistor (q 1); provide 0E and STH control signals to the first, second, and third rounds of the gate driver, and start the horizontal pulse (STH) input to the line, and pass These input lines receive related signals. In this case, the output enable (0E) signal of the driver is controlled in such a way that the three sets of control voltage pulses synchronized by these gate drivers are composed of the following three sets Control voltage pulse composition: ⑴ (Gi, & generation (3) (G_, G,) 'These three groups The control voltage pulse (1, 2, 3) is supplied to the gates of the transistors (Q1) via the three-input control line of the bank H. It is characterized by the first, second, or third synchronization control signals. α, 2, 3) When triggered, the circuit feeds the dragon signal to the wheel-out drive power and outputs the output drive voltage generated by the above steps to the pixels. The image is generated on the screen at the same time. Analysis of the first and second waveforms 1U ^ ^ Refer to Figures i3 (a) to 3 (6) to explain this in detail according to Embodiment 6 of the present invention f 11 (a), ( b) The relationship between the control voltage pulse X, GQ, and the waveforms of the driving voltage pulses Di and Vlc generated by the simulation device in the figure. Impacting Gb) ((^, "), (G). Because alternating current (AC) is usually used as the driving voltage for the liquid crystal, the positive and negative phases alternately appear during the driving process. Therefore, fits = the waveform of VLC is opposite to the reference voltage v⑽, there will be a phenomenon of positive and negative phase alternately.) 1 D D /, point A, for example, in the following way in the time sequence of points A1 to A6, repeat the loop: at time ^ V The value of the picture driving pulse D1 is V1, which makes the disturbance voltage (code0) negative; and at the time point Aι starts to enter the nth daytime surface, at this time the drive value rises to V2 (Code 32), Due to the effect of the control voltage pulse Gi, the value of the output drive voltage pulse ^ generated by the 32 devices also rises to V2 (@ at the time of the code, and remains until time A2. Then the time proceeds to time A2, this movement Ray® rr i ^ the value of Dl Vl (C〇de 〇), due to the effect of the control voltage pulse Gl, the drive g ϊ = the value of ILC from V2 (C〇 32) to V! code 0) and remain the positive electrode ^ until time point A3. Then the time progresses to time point I, at which time it starts to enter a daytime surface, At this time, the value of the driving voltage pulse Di drops to y3, (code 120), = the role of the control voltage pulse Gl, which makes the value of the driving voltage pulse & also decrease at the instant A3 (I20), but it is negative polarity, and has been maintained Until the time point A4. Then until the time = hour, the value of the driving voltage pulse Dl is still Vl, (code 0), because the control voltage pulse is used at first, this causes the value of the driving voltage pulse Vlc to rise to%, (c〇de 〇) It is still the negative electrode ^ up to time point As. Then, time progresses to time point A5 and begins to enter the N + 2 day, the value of the hour driving voltage pulse Di rises to Vs (COCie uo), because the control voltage pulse 19 1235981 V3 (code 120) ^ 4 and Vu: The changes can be compared. The G2-1 driving voltage pulse D1 is shown in th FI Ξ i3ial as the dotted line in the figure. When scanning the oblique line (Gan 0) on the screen, the watch does not insert a black picture in the daytime or between the L, which can achieve the purpose of simulating the CRT display on the indicator with the conventional technology. You closed the door in Yueyou Effect, and achieved the LCD display 13 & t, (t) Reality: Middle Head: One In order to develop three synchronous scanning lines on the display f, the driving voltage pulses are generated as shown in the display screen of the display screen ^, which is a voltage pulse, which is used to control the scan. H. Although it is different Thin m scans are performed at intervals ^ ^ fJ ^ / f ί ^ f, J 1M ^ ^ ^ * Gm + 1 lines, these two sets of concealment lines are on the screen f screen fil m between the concealment and the mth line +1 line starts to sweep the cat. This control refers to the relationship between the first line on the screen and the control voltage pulse G ^ pulse ^ drive, voltage pulse D〗, the wave of VLC (that is, the 13th ra above), the voltage pulse, and the waveform of VLC间 之 关 # Repeat. Humming brothers 13⑷ to 13 (the explanation made by _) are the same. Therefore, with the ((G- ^ line, each of them from the first m +; [, 2m + U ^ (卩 ^^ column ^) three groups are generated on the display screen Scanning the control voltage pulses, the scanning line starts to scan downwards simultaneously and the cycle is repeated.) ^ ^ R d > 'III%), system (ie, refer to the 13th above (彳 丨, =)', driving voltage) The relationship between the waveforms of the pulses D 丨 and Vix is repeated. However, it is the same as that illustrated in Figures 13U) to 13 (e). Therefore, the waveform of “ΪΓΜϊΚπη input pulse ^” is explained for convenience. According to actual requirements, this waveform is designed to have various ί = ^ or it can be used as a conventional technique to write 3 can ^ light ^ hair date; ^ description = device sweeping black cats and # intends to group her The display time can be waived; Timothy 2 = additional cost and cost of the frequency converter or backlight flash device; the time interval between ^ depends on the two types of turn-in control pulse 61 and the black line sweep 9¾ (especially It's the black line woman's concealment) that the liquid crystal optical grayscale response and Γ's tenacity in time 'can also be removed «Removal of the conventional technique due to the residual Dantian Qiao, not only has a sufficient image' to optimize the quality of the displayed image. Therefore, the essential ^ outline is fuzzy ^

+ 知 / 1 雒 Er j The effect and purpose of simulating the CRT 20 1235981, and saki silk images with an LCD display. All of the above are the characteristics of the present _ Yu Xilin. Therefore, the cost of the analog CRT pulse type development of the present invention greatly improves its function. Because of the value in the industry, it has new experience and progress, and is consistent with those who are better than the conventional technology. The present invention does have special features, but it is only for illustration, not for limiting the scope of the invention and spirit and scope. [Brief description of the drawings] in the invention of Bianxian and the scope of the patent application attached. 々1Comparison Open 7-liquid display liquid crystal, and the liquid crystal optical response curve of analog CRT pulsed display ^ 3 (a) ® S ^ 7: moving circuit ;, drive L3r (^) composed of a shell driver and a plurality of gate drivers ffAccording to the first embodiment of the present invention, the liquid crystal display is acceleratedly driven by F; i pulses, 4 sets of gangue rushes, and driving power. Its display: According to the second embodiment of the present invention, the intersection of a plurality of gate lines and data lines The resulting pixel array and the accelerated driving device for the liquid crystal display according to the second embodiment of the invention are driven by a plurality of material drivers and a plurality of drivers; ^ deleted by the pulse simulation device, and the driving circuit is shown on the L7 map. Accelerated driving device for liquid crystal display in the third embodiment of the invention; Observing the running pressure pulse and driving voltage of the running device ^ 9 (b) The picture shows the accelerated driving device for liquid crystal display in accordance with the fourth embodiment of the invention; 21 1235981 Road No. 11 (b The figure shows the fifth and sixth embodiments of the invention. Liquid crystal display acceleration driving device; Figures 12 (a) to 12 (e) are corresponding waveform diagrams of control voltage pulse pressure pulses and liquid crystal optical response generated by an analog device according to a fifth embodiment of the present invention; and Figure 13 (a) ) To 13 (e) are the corresponding waveform diagrams of the control voltage pulse voltage pulse and the liquid crystal optical response generated by the analog device according to the sixth embodiment of the present invention. Driving electric driving electric [Description of symbol elements] (a) Characteristic curve ( b) Characteristic curve Al, h.2 · A3 at time A4, Αδ, Αδ at time Cs Storage capacitor Clc Liquid crystal equivalent capacitor DS input data line Di input data line D2 input data line D input data line D, input data line Dr input data Line Gi input control line G2 input control line Gr input control line G2 input control line G0 input control line Gm + l input control line G2m input control line G2m + 1 input control line Gzm input control line Vlc output drive voltage Q transistor Q , Transistor Qi transistor q2 transistor q3 transistor Q4 transistor Vc〇M reference voltage

twenty two

Claims (1)

1235981 Patent application scope: 1. A device for simulating CRT pulsed imaging, including: a first input control line; a second input control line; a first input data line; a second input data line; a first capacitor; Two capacitors; output driving voltage line: the first gate is connected to the first input control stage, the second is connected to the first input line and the input line is connected to the output driving voltage line and the first capacitor and the second circuit. The output voltage driving line of the crystal is used to view the acceleration drive to its characteristics as follows. The time difference between the periodic pulse waveforms of the two data lines is connected to η pulses. The two steps between the scan lines. — To raise the shape of the green, its turn ^ package details the next steps: Press the line; * 电 Yue Yue shares # 电 令 益, the first capacitor, and the output drive the phase delay material and the first- To control the gate of the second transistor, the second control signal except > Material No. provides the source of the first transistor, which is fed to the output drive voltage line by the first driver-data signal ; &Amp; X will control the low marriage, the circuit will Two data signals provide the source of the second transistor, _ the second data signal feeds the wheel-out drive voltage line; and when the first control signal is sent, the circuit will output the drive voltage generated by the above steps Output to these pixels to display the image. For example, the method of applying for the second item of the patent scope, wherein the voltage is driven, so that these voltages are driven under its control (^^ V ^ AB ^^ U) The driving voltage pulse D, in the Nlth daytime plane before the time point Ai The effect of the voltage-controlling voltage pulse Gi makes the value of the voltage pulse Vlc of the simulation device also rises to V2 and is positive. The voltage is kept live and the time goes to the point A2. At this time, the voltage pulse G1 is stopped. The effect of the driving voltage pulse is as follows: ^ 23 1235981 (V! ≪ Vs) is still positive polarity, and its value is maintained until the time point As; (d) Then the time proceeds to time point A3, and starts to enter the Nth + 1 screen, at this time the value of the driving voltage pulse Di drops to V3 '. Due to the effect of the control voltage pulse Gi, the value of the driving voltage pulse VLC also drops to V3 in an instant, and it is negative polarity until the time point A4. (E) Then proceed to the time point A4, at which time the value of the driving voltage pulse Di is still Vi '. Due to the effect of the control voltage pulse Gr, the value of the driving voltage pulse Vix rises to the level V!' Is still negative. 'Until time 8: 5; and ( Then proceed to the time point M ', and start to enter the n + 2 daytime surface. At this time, the value of the driving voltage pulse V rises to V3 as a positive polarity. Due to the effect of the control voltage pulse G1', the value of the driving voltage pulse Vlc rises instantly to V3 is positive polarity until point A6. 4. If the method of the scope of patent application No. 3 method, where when the output drive voltage VLC of the device between each point is (code 0), it means at. During this time, scanning the black line on the display screen can achieve a better effect than inserting a black daylight in the daytime or turning off the backlight during the daytime, and optimally implement the pulse display of the LCD display to simulate the CRT display. The purpose of development: 5. A device for simulating CRT pulse type imaging, including: first input control line; second input control line; first input data line; second input data line; third input data line A fourth input data line; a fifth input data line; a first capacitor; a second capacitor; a third transistor; a fourth transistor; and an output driving voltage line; a first transistor including: a first The gate is connected to the first input control line, the first source is connected to the first input data line, and the first drain is connected to the output drive voltage line and the drain of the first capacitor and the second transistor; and the second power The crystal includes: the second gate is connected to the second input control line, the second source is connected to the second input data line, and the second drain is connected to the drain and the second capacitor of the first transistor and the output Driving voltage line; wherein the first capacitor and the second capacitor are respectively a storage capacitor and a liquid crystal equivalent capacitor and each is grounded, and the output driving voltage line is used to output the driving voltage used for the simulation to the LCD panel. Pixels; characterized in that these first and second input control lines are connected to a gate driver, and these first and second input data lines are each connected to two other third and fourth switching circuits connected in parallel The drain of the crystal, the source of the two parallel-switched transistors are connected to a data driver, and the gates of each are connected to the third and fourth input lines; and / The time difference between the shapes is η between the scan lines of the read pulse. 6. A method for simulating CRT pulsed imaging, which is characterized in that it includes the following steps to provide a circuit, which has a first input control line, A second input control line, a first-round transistor; and an output driving circuit Pressure line; an electric valley state will provide a first control signal with a periodic pulse waveform to the first transistor gate, and a second control weave number with a periodic pulse shape to a second transistor, and the second control The number 5 is the same as the first control signal except that the number is stolen 24 1235981. _ Provide the first data signal with the source of the third transistor and the fourth transistor in parallel; provide the third data signal with the third The transistor gate uses the voltage pulse generated by its drain as the first data signal. When the first transistor is triggered by the first control signal, the first lean signal is fed to the output driver. Voltage line; μelectrically controls / provides the ^ th Γ data signal to provide the fourth transistor gate, and the voltage pulse generated by its drain to the source of the second transistor as the second data signal, When the second transistor is triggered by the # symbol, the circuit feeds a second data signal to the output driving voltage line; and the person outputs the output driving voltage generated by the above steps to the pixels to display an image. 7. The method according to item 6 of the scope of patent application, wherein the parent current (AC) is used as the control voltage and the driving voltage. Therefore, the positive and negative phases will alternate in these voltages. Passing = cyclically repeats according to the time sequence of time points A1 to A6: The following method (a) the driving voltage pulse m in the N—1 daytime plane before the time point ^, and the value vr of the driving voltage pulse VLC is also It is negative polarity; and (b) At the time point A !, it starts to enter the n-th frame, and the value of the driving voltage pulse Dl is 2 at this time. Due to the effect of the control voltage pulse, the voltage generated by this simulation device = V voltage pulse VLC The value also rises to V2 and is positive polarity. 'Af electricity (c) is maintained until the time point, and then time passes to the time point Az'. At this time, the value of the driving voltage pulse Di is ^ ^ ^, due to the role of the control voltage pulse • , The driving voltage pulse Vu = pole V: falling to Vl (Vl < V2) is still positive, and its value is maintained to the point value of the time from ^ (from time to time point A3, starting to enter the N + 1th At this time, the driving voltage ίf 丄, Λ drops to V3, due to the control voltage Impulse Gi, the value of the drive voltage Vu also drops to I at an instant, and is negative, and remains to the point in time, and then punches (e) to point A4. At this time, the value of the driving voltage pulse Dr is still Vi, ' The value of the two or two voltage pulses Gr causes the value of the driving voltage pulse Vlc to increase ^ ^ to be negative, until the time point A5; and the main level Vl is still (f) ^ and then proceeds to the time point As, starting to enter the first N + 2 screens. At this time, the value of the driving voltage rises to V3. Due to the effect of the control voltage pulse G !, the value of the driving $ βι rises to V3 in a moment and becomes positive, and the voltage pulse is dynamic until time 8: 6. VLC 8 · Please refer to the method in item 7 of the patent scope, where when the output driving voltage of the analog device is at each time point, the black line is scanned on the display screen during the time interval, which can be achieved more than on the day. In this case, it is better to turn off the backlight during the day and day, and to optimize the purpose of the CRT display pulse display. Display 9 · A device for simulating CRT pulse type imaging, including ··, a first input control line; a second input control line; a first input data line; a first capacitor; a time and wheel-out drive voltage line; Leyi Different states; a first transistor including a first gate connected to a first input control line, a first source connection, and a first drain connected to an output drive voltage line, a first capacitor, and a second Transistor ^ first, material 25 1235981 pole; and the first It-to-second input control line, the second source ground, and the second drain body and pole with the second capacitor and the output drive voltage line; 'is a capacitor Each of the storage capacitors 11 is a non-crystalline equivalent capacitor and each is grounded. The driving voltage line is used to output the analog driving voltage to the pixels of the panel. The display is characterized by the material line connected to the cycle. The time difference between the pulse waveforms is 1 ^ · The method used for the 10-media imaging of the n sweeping cat lines, which is characterized by the following steps: The crystal is second, the second is the electric wheel input. Control line, first input Material line, the first electricity === ㈣4 钱 1—voltage line; the control money provides the second transistor; the betting material is the same as the first-store signal; the first transistor is provided to the first transistor The source; ^ 4: at the time of the issue, the circuit feeds the first data signal to the output drive voltage line; when S is triggered, the circuit feeds the ground potential to the output drive voltage line; and The noise generated by the ride is driven «output to fresh pixels to display the image. 11. The method of item 10 in the scope of patent application, in which the control voltage and the driving voltage are made, so that these voltages alternately appear in their control drive according to L $ Afit. The process is as follows (m 『Ff ▲ The cycle is repeated in time sequence: The value of the pulsating voltage pulse d in the n_ 1st frame of the thunder-ray, the value Vi ′ 'from α), the value of the driving voltage pulse ^ at grounding, Vi, 1 is negative polarity ; 2, * In batch enters the Nth daytime surface, at this time, the value of the driving voltage pulse 上升 rises to V. The effect of the voltage pulse pulse G1 makes the output drive current (c) fUt f generated by this analog device rise to V2 and is The positive polarity is maintained until the time point A2; the function of tnn (and the second transistor source is grounded) makes the value of the driving voltage pulse decrease from _ to ~ to V1 (V1 < V2), and its value is maintained until the time point A3 is (HiS II, at time A3, it starts to enter the N + 1 picture, at this time the value of the driving voltage pulse I is also instantaneous; 3 'drops from v to the control, "the role of the dagger, the driving voltage pulse (e ) After the absence, enter 彳 1000 to a # and go to a 3 until the time point A4, 俺, 懕 day rr 俺 r, from Μ 'At this time, the value of the driving voltage pulse Di is still V3. Due to the control of A 6 ^', the value of the driving voltage pulse VLC rises to the level Vi, and still ⑴m until the time point As; and ... At time As, it starts to enter the N + 2 daytime surface. At this time, the value of the driving voltage pulse mountain 26 1235981 rises to V3. Due to the role of the control voltage pulse G], the value of the driving voltage pulse vLC rises to V3 instantaneously. Positive polarity, up to the point Ae. 12. The method according to item Π of the patent application range, wherein when the output drive voltage VLC of the analog device at each point in time is (c0de 0), it means that during this time Scanning black lines on the display screen can achieve a better effect than inserting a black daylight between the daylight or turning off the backlight between the screens, and optimally implement the CRT monitor pulse type based on the LCD display The purpose of imaging 13 · —A device for simulating CRT pulse type imaging, including: a first input control line; a second input control line; a first input data line; a first capacitor; a second capacitor; and an output A driving voltage line; and a first transistor & comprising: a gate connected to the first input control line or the second input control line, a source connected to the input data line, and a drain connected to the output driving voltage line And two parallel first and second electrical The first capacitor and the second capacitor are respectively a storage capacitor and a liquid crystal equivalent capacitor and each is grounded, and the output driving voltage line is used to output the driving voltage used in the simulation to the pixels of the LCD panel to display an image. It is characterized in that the input data line is connected to a data driver, the input control line is connected to a gate driver, and the gate driver has an output enable (0E) input line and a start horizontal pulse (STH) input line, and It receives relevant signals through it to generate the synchronous control voltage pulse G1 of the input control line. It is supplied to the gate of the transistor through the first and second input control lines, and the driving voltage pulse generated by it can cause the Two simultaneous scanning lines separated by m-1 scanning lines are simultaneously generated on the display screen to display the image. 14. A method for simulating CRT pulsed imaging, which is characterized by including the following steps: 77 电 ^, which has: the first input control line, the second input control line, and the first round data line A first electric body, a first capacitor, a second capacitor, and an output driving voltage line; The data signal with a periodic pulse waveform will provide the source of the first transistor. For the secret signal, the control signal for the coin-cut axis_new time | is triggered by the synchronization control signal G and Gm. The output driving voltage is fed to output the output driving voltage generated by the above steps to the pixels to display an image. 15. As the method of claim 14 in the scope of patent application, in which alternating current (AC) is used as the control voltage and the driving voltage, there is a phenomenon in which positive and negative phases (fine) alternate. These are expressed by == according to time points A1 to A6. The chronological sequence repeats repeatedly: the value V / of the driving voltage pulse L in the 1 ^ · ^ frame before / ΛΑΐ, and the value V / of the driving voltage pulse VLC is also negative; A (vb) begins to enter the N pictures, at this time the value of the driving voltage pulse 上升 rises to V2. Due to the effect of the control voltage pulse Gl, the output generated by this analog device drives 27 1235981, and the value of f = also rises to V2 and is positive .'— Straight Hold until time point A2; (c); ,,, and 'back inch proceed to time point A2, at this time the value of the driving voltage pulse Di is Vi and is positive, due to the role of the control voltage pulse G1, the driving voltage pulse v decreases < V2) is still positive polarity, its value-kept until the time point ((0 and then ^ proceed to the time point-), began to enter the N + 1 daytime surface, at this time driving, due to the role of the control voltage pulse Gi, the driving voltage pulse Vlc value also drops to V3 in an instant, and is negative (E) until time point A4; (e) then proceed to time point A4, at which time the value of the driving voltage pulse 〇! Is still Vl, due to the action of the pestle voltage pulse G !, the value of the driving voltage pulse Vlc rises, ^ Negative polarity, up to time point As; and early Vi is still up to time point A5, and starts to enter the N + 2 daytime surface. At this time, the driving voltage pulse is V3. Due to the effect of the control voltage pulse Gl, the driving voltage pulse The value of Vlc rises to Vs in a moment and is positive, until the time point Ae. 16. The method of item 15 of the scope of patent application, wherein when the output drive voltage Vlc of the analog device at each time point is (code 0) , That is, the name of the room. The black line of the cat on the Ai display screen can achieve a better effect than inserting the father's black face between the screens or turning off the backlight between the faces. The purpose of the device is to simulate the pulse display of a CRT display. See page 17 for LCD display — A device used to simulate the pulse display of a CRT, including: the first capacitor A first input control line; a second input control line; a third input control line; a first input capacitor; a second capacitor; and an output drive voltage line; and a first transistor including: a gate connected to the first The input control line or the second input control line or the third input data line, and one electrode is connected to the output driving voltage line and two ^, wherein each of the first electric valley device and the first electric valley device is a storage capacitor, respectively. And liquid crystal equivalent capacitor The ground and the output driving voltage line are used to output the analog driving voltage to the pixels of the LCD panel to display the image; "It is characterized in that the input data line is connected to a data driver, and the input control line is connected to A gate driver having first, second, and third output enable (0E) input lines and start horizontal pulse (STH) input lines, and receiving related signals through these input lines. The input output enable (0E) signal of the gate driver is controlled in such a way that two sets of control voltage pulses are generated synchronously at the output of the gate driver, which are selected by the next three sets of control voltage pulses. : ⑴ (Gl, G., melons, G., ⑶⑹㈣, and two sets of control voltage pulses selected and configured by combining the two sets of control voltage pulses (1, 3), or (1,2)), Or (2'3) in a cycle? Instead mode, it is supplied to the gates of these transistors through its corresponding _, second or third input control line, and the driving voltage pulse generated by its control can be displayed on the display Simultaneously generated on the screen in cyclic alternating mode Two simultaneous scanning lines separated by 2m scanning lines to display an image. 18. A method for simulating CRT pulsed imaging, including the following steps: Provide a circuit having a first input control line, The second input control line and the third input control line; the first round 28 1235981 input data line, the first transistor, the first capacitor, the second capacitor, and the output drive voltage line; the data signal with a periodic pulse waveform is provided to the The source of the transistor; & Provides 0E and STH control k5 tiger to the first, second, and third output enable (0E) input line and start horizontal pulse (STH) input line of the gate driver, And through these input lines to receive the relevant letter, "These" pole drive "input input enable (0E) signal is controlled in this way, so that at the gate end of these gate drivers Generate two sets of control voltage pulses that are synchronized, which are selected from the following three sets of control voltage pulses: (〗) (&, dagger), ((G㈤, Gh), (3) (G_, G%), and the three Group of control voltage pulses selected and configured into " The pressure pulse (1, 3), or (1, 2), or (2, 3) is supplied to the gate of the transistor in a cyclic alternating mode through the second or third input control line corresponding to i; It is characterized in that when triggered by these two sets of synchronous control signals 0, 3), or d, 2), or (2, 3), the circuit feeds the front μ signal to the output drive voltage line. And outputting the output driving voltage generated by the above steps to the pixels, the display can simultaneously generate two simultaneous scanning lines separated by 2m scanning lines to display an image. Shield clothing father 19. For the method of applying for patent No. 18, which uses alternating current (AC) as the control voltage and driving voltage, the positive and negative phases will alternate in these electric processes. The driving type is repeated in the time sequence of time points A1 to A6: ° below (a) the driving voltage pulse D in the n-1 frame before the time point Aι, the value Vi 'of the driving voltage pulse Vlc is also negative; 1 'and (b) at the time point A! Begins to enter the nth daytime surface, at this time the driving voltage pulses Di, V2, due to the action of the control voltage pulse Gl, the value of this analog device 1 soil rise to the dynamic voltage pulse VLC also rises It is positive polarity until V2, as soon as it is driven out; it remains until the time point A2 (c), and then time goes to the time point A ?, at this time the role of the voltage pulse G! Of the driving voltage pulse, driving voltage pulse vL. The value is still positive in the instantaneous gate-to-control (Vi < V2), and its value is maintained until the time point α3 θ 2. Reduce to V! (C〇 and then the time proceeds to time point A3, and starts to enter the N + 1th This screen: The value of the pulses D, D, D, D, V3, because the value of the control voltage pulse Gi, the voltage value of the dynamic voltage pulse Vu also drops to V3 in an instant, and is negative, until U dynamic voltage A4 ; Keep it until the time point (e) and then proceed to the time point A4, at this time the value of the driving voltage pulse Di is still Av, the role of the control voltage pulse Gi makes 佶 1 of the driving voltage pulse vLe, because the control voltage is still negative, Until the time point A5; and rise to the level%, and then proceed to the time point As, start to enter the N + 2 daytime surface, the value of flutter κ rises to V3, due to the action of the control voltage pulse, dynamic, pressure The value of the pulse impulse Vlc rises to Vs in a moment, and becomes positive, until the pulse voltage of the driving voltage point A6. 20, · As in the method of the 19th scope of the patent application, where the device is simulated at each point in time Output drive voltage Vlc is (on the display screen during code w time) Scan the black line, it can be compared, that means insert black between this face 29 1235981 21 · —A device for simulating CRT pulsed imaging, including: The first and second capacitors connected; the image; The dynamic voltage pulse can simultaneously generate three identical and same data actuators on the display. The input control line is connected to the gate driver 51. The gate driver has the first, the first, and the first. Three output enable (0E) input line and start horizontal pulse (STH) input line, 22 · — A method for simulating CRT pulsed imaging, including the following steps: Provide a circuit having: a first input control Line, second input control line, third input control line; input data line, first transistor, first capacitor, second capacitor, and output drive voltage line; provide a data signal with a periodic pulse waveform to the transistor Source;, 'Provide 0E and STH control signals to the first, second, and third output enable (0E) and start horizontal pulse (STH) input lines of the gate driver, and via these input lines Receiving relevant signals, the φ input of these gate drivers, the output enable (0E) signal is controlled in such a way that three sets of control voltage pulses are generated synchronously at the output terminals of these gate drivers. By the following Group of control voltage pulses, dagger), 〇 (G 利, Gh), (3) (G ^ l, Gam), and these three groups of control voltage pulses (1,2,3) pass through the corresponding first, The second or third input control line is supplied to the gates of the transistors, and is characterized by ... when triggered by the three sets of synchronous control signals (1, 2, 3), the circuit feeds the data signal to the Output driving voltage lines; and outputting the output driving voltages generated by the above steps to the pixels, three simultaneous scanning lines separated by m scanning lines on the display screen can be simultaneously generated to display an image. 23. The method according to item 22 of the patent application, wherein alternating current (AC) is used as the control voltage and the driving voltage. Therefore, during the control and driving of these voltages, the positive and negative phases alternately appear. The process ^ repeats in the chronological order of time points A1 to A6 in the manner I ^: 30 1235981 and (a) at time point eight! The value of the driving voltage pulse VLC in the previous N-th daytime driving voltage pulse VLC is also negative; (b) At the time point A !, the N-th screen is started, and the driving voltage pulse The action of 2 lightning 1 = 7 voltage pulses & makes the output drive generated by this analog device. The value of tu also rises to V2 and becomes positive polarity, and remains until the time point A? (C) = point A2, at this time The value V1 of the driving voltage pulse D1 is controlled by the redundant voltage pulse G, and the value of the driving voltage pulse Vlc drops from V2 to% in an instant. V2 is still positive, and its value is maintained until the time point A3; At time ^, the N + 1 picture starts to be entered. At this time, the value of the driving voltage pulse D! Drops to V3. Due to the control voltage pulse (;, the value of the A pulse also drops to V3 in an instant, and Negative polarity,-] 5 = ☆ The value of the driving voltage pulse Dl is still V ′ in the field. Due to the effect of the control voltage pulse Gi, the value of the driving voltage pulse Vu rises to a bit that is still negative, until the time point As; a5, first enter the N + 2 screen. At this time, the driving voltage pulse is caused by the control voltage pulse G1, so that the value of the driving voltage pulse vLC rises to% in an instant and becomes positive, until the time point Ae. 24. If the method of applying for the item 23 of the patent scope, where the mode driving voltage Vlc is (code 0), it means scanning the black line here, which can achieve a better effect than inserting a black sleeve between the screens: Optimally achieve the purpose of simulating CRT monitor pulse display with LCD display. 31