TWI233734B - System and method of stacking network switches - Google Patents

Abstract

A network switch system that includes a plurality of first-level switches operating in a slave mode, the first-level switches providing a plurality of local ports for receiving and sending network packets, and a plurality of second-level switches operating in one of brain mode or master mode, wherein, the first-level switches includes a plurality of upward ports connecting to the second-level switches, each of the first-level switches and the second-level switches having a forwarding database, wherein the first-level switches sends the refresh packets to the second-level switches for synchronizing the forwarding databases of the second-level switches, wherein the second-level switches providing packet communications among the first-level switches, and wherein a second-level switch operating in the brain mode providing refresh packets to the first-level switches for synchronizing the forwarding databases of the first-level switches.

Description

1233734 V. Description of the Invention (1) [Field of the Invention] The present invention relates to a system and method for a stack network switch, and more particularly, to a forwarding database when solving a stack network switch. System and method of synchronization problem. BACKGROUND OF THE INVENTION Generally speaking, a network system can provide multiple remote machines to exchange information with each other. Take a computer network system as an example. This system can provide information about multiple nodes and regional parents. A parent dot or section may contain one or more endings

The end device may be a temple server, a personal computer (pc), an input device, or a roll-out device such as a printer or a plotter. Generally speaking, the network parent switch manages and regulates the traffic between nodes or sections of a network system, and directs packets to their destinations to make data exchange more efficient and reduce network congestion. In the case of an Ethernet (Integrated C i rcu i (Application Spec i) system that provides network packets, system requirements have been changed, and the development of chips has been changed. For example, the system of § 10 is often integrated to improve its packet processing. The equivalent memory bandwidth in the 0-swap system 'Ethernet integrated circuit t; 1C) is a special application integrated circuit fic Integrated Circuit; AS IC) ^;

Management and regulation. For the need for different numbers of communications t promotes a variety of different specifications of Ethernet], for high-speed Ethernet operation / a considerable number of communication ports in a single chip can achieve f and efficiency. This type of chip is usually 彳, so it is often accompanied by extremely high R & D time and;

1233734

Check the network switching system at the ethernet destination address and the network switch database to form the standard package of the transfer adapter. (Original Process) The operation of the database is expected to change between a limited section of the database. Time changer, provided for operation. The traditional four types: (Switching architecture (Inter, ', Kushiro parent converter's operating principle, an Ethernet network gets its source address in the 12 bytes at the beginning of the packet. When an Ethernet, When a packet arrives, it will take its destination address for easy forwarding, and then export the packet to the destination port. Record the source address and source port information of the input packet to

Magazine. IEEE 802.1D, a media access control (MAC) bridge 'provides the learning process for the formation of the transfer database and the transmission and reception of the network parent switch in the network envelope (Learning refers to the above record source address and source port information in Transfer funds process. This procedure enables the Ethernet switch to forward the input packet to its destination port according to the transferred data. The number of communication ports of the Ethernet switch manages the limited nodes or network traffic. For the need for more The Ethernet of the communication port usually needs to combine or stack two or more Ethernet connections between them, so that this combined system can coordinately operate the Ethernet switch stack architecture. It is classified into the following Shared Bus, Switching Core Fabric, Ring-Bus, and Interleaved Leaved Interconnection.

Please refer to FIG. 1, which shows a schematic block diagram of a conventional shared bus architecture. Among them, each Ethernet exchange gESW1 ~ ESW4 has a packet memory in the area. When an Ethernet switch receives an _ input packet, it first performs a Forwarding Decision in the area and temporarily stores the input packet in the packet.

1233734 V. Description of the invention (3) Package memory. If the destination output port of this input packet is in the same Ethernet switch area, the Ethernet switch will send the connection through the output port. · ”Conversely, if the destination output port of this input packet is in the area of other Ethernet switches, the Ethernet switch will first issue a command over the shared bus and request the destination Ethernet The network switch prepares a free packet buffer. This Ethernet switch then sends the packet to the shared bus' and releases the buffer that stores the packet in the original Ethernet switch after the destination Ethernet switch has completely received the input packet / packet. The destination Ethernet parent switch temporarily stores the input packets received in the packet memory and sends them out through the port. The second known stacking method, the switching core architecture, can be roughly divided into two categories: shared memory switching cores (Shared Memory Switching Fabr * ic0) and array switching cores (Crossbar Switching Fabric). Networks of shared memory switching core architecture The switch allows all the network ports to write the packets of the input port to a shared memory, which will be read out by the output tan after the path decision step is completed. However, the action of “this read and write requires centralized sharing” The memory makes a large number of access operations. Due to the limited shared memory bandwidth, this requirement limits the scalability of this architecture. For example, the shared memory of a 16 G i gab it Ethernet switch The body switching core requires 32Gbps (16Gbps X 2, read and write) memory bandwidth. This is a great challenge to the current memory design. Please refer to Figure 2 for its edge showing an array switching core (crossbar switch) Fabric) Schematic block diagram of a network switching system. Share vm

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Compared with the 4 core configuration of the f-body parent, the array switching core has a high switching capacity. This system has the so-called input 备 »歹 put put ^ in the input terminal of the # 士 幻 任 寸 承 更, and the 端 input terminal is used to temporarily store the packet, and then to the array scheduler (rossb ^ Scheduler ) Requires an output 蟫. After the array scheduler agrees, the packet can be sent to the array (CrOssbar) and sent to the output port through the method set by the scheduler. Since this method does not rely on ping-pong sharing and memory to achieve the action of packet exchange, naturally there is no memory bandwidth problem ^, so it has better scalability. However, this type of switching core requires a complex scheduler to provide 100% communication throughput and packet delay control, so the price is more expensive. In Figure 2, each Ethernet switch ESW5, ESW6, ESW7, and ESW8 is connected to a scheduler 12. When an Ethernet switch, such as ESW5, wants to send packets to other Ethernet switches, such as ESW8, ESW5 will first issue a command to scheduler 12 and establish it through scheduler 12 Point-to-point connection to complete the exchange of packets. Please refer to Fig. 3, which shows a schematic block diagram of a ring-bus architecture network switching system. The four Ethernet switches ESW 9, ESW10, ESW1 1 and ESW12 are interconnected in a ring bus. This system is essentially due to the need to pass one or more relay switches to reach the destination. For example, in order to send a packet from ESW9 to ESW12, first send the packet to ESW10, then ESW11, and finally to ESW1 2. This process consumes extra packet processing power and bandwidth 'to limit the transmission volume of this network switching system. American A 1 1 a y e r company and

TW0780F (Industrial and Industrial Research Institute_Telecommunications Institute) .ptd Page 8 1233734 V. Description of Invention (5) PMC—Some of the Ethernet switch products of Si erra Company use this kind of stacking architecture. Please refer to FIG. 4 ′, which shows a schematic block diagram of an interleaved interconnection network switching system. Alexander has examples in U.S. Patent (USP No. 5,732,041), '' memory interface systems for providing and arbitrating access to a shared memory by multiple devices'. Among them, four Ethernet switches ESW13, ESW14, ESW1 5 and ESW1 6 are interconnected in a grid manner, and each Ethernet switch is connected to the other three Ethernet switches respectively. Each Ethernet switch has a packet memory to store packet information waiting to be transmitted. However, these stacking architectures described above all need to use some special stacking buses to connect many Ethernet switches together, and have some major disadvantages. First, there is no standard signal interface and protocol for stacked cables, and special design is required. Second, stacking rows and cables cannot be used as general network ports, so it will be a waste in non-stacking systems. Third, the stacking cables have insufficient bandwidth and limited scalability. Fourth, the special design of the cable requires additional costs. In addition to using a variety of switching cores, you can also use an Ethernet interface to connect Ethernet switches into a two-tier architecture to form a more multi-port system. Please refer to FIG. 5 for a schematic block diagram of such a second-order serial connection architecture, in which four lower-level Ethernet switches ESW17, ESW18, ESW19, and ESW20 are connected to a higher-level switch ESW21. When ESW17, ESW18, ESW19, and ESW20 have packets to each other

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During mutual transmission, it will be sent directly to the upper layer ESW21 through the pottery port rewr 91, rewni and serial Ethernet communication port, and then transmitted by ESW21 on the 5th day from α w

i 甬 Zou 埴.屮 锸 Button Dedan destination parent converter, and finally reached the destination communication Zen This kind of architecture with the largest / true WK s A _ 玖 拖 拖% π 'point 疋 is very simple, there is no need to The converter makes any additional π ± m ^ -T or 11 疋 or Chinese juice. Therefore, different brands of B and "two" are connected in this way to achieve the purpose of more ports. However, the tandem layer concatenation architecture is not a non-blocking (Non-Bocking) architecture. All incoming packets from ESW17, ESW18, ESW19 and ESW20 are

The ESW21 can reach the communication port of another switch. In other words, if each port sends packets at full speed to non-repetitive round-trip ports, packets will still be lost. This is caused by the insufficient bandwidth between the upper-layer switch £ 3 and the lower-layer parent switch ESW17, ESW18, ESW19 and ESW20. However, because this method is very simple, it is still widely used in situations where non-blocking characteristics are not particularly emphasized. Swedish company Swi tchCore proposes another concatenation method in the application examples of its products. Referring to Figure 6 ', it will show a schematic block diagram of this architecture. Basically, this architecture is a continuation of the traditional network planning for the purpose of network load balancing and fault tolerance systems. The connection method used is such as Hiscock et al. In US patent (118? \ 0, 6,058,116) jf, Interconnected trunk cluster

Arrangement ". Please refer to Figure 6 again. The lower-layer Ethernet switches ESW2 2, ESW23, ESW2 4 and ESW25 all have the same amount of Cascading Ports, such as port # 8 ~ 15 of ESW22. And User Port, such as port # 0 ~ 7 of ESW22, so through proper design will be able to achieve the performance of Ν ο η-b 1 〇cking. The appropriate design mentioned here is

1233734 V. Description of the invention (7) Means to maintain the synchronization of the entire system to avoid unnecessary

Qlir.., 3 The broadcast and packet order are out of order. Because the system jr: 2 transfer database is not centralized, it will make the network exchange test. This reason is because each of the upper and lower layers of the ether: = database may not be the same, so that in a certain-Ethernet + = so two α, the source address and source port of the recording do not reflect on another Ethernet Lu Nihan of the father of the converter is rough. This will greatly increase the broadcast packet f f1 (when the standby Ethernet switch receives an unknown destination address, it will broadcast the packet to all other output ports), and reduce the communication volume of the entire system. Please refer to Figure 6 again. Switchcore's method is to make each Ethernet switch ESW22, ESW23, ESW24, and Ethernet in the lower layer? 25 only learn the source address and source port of the packets sent by the communication port below it, but do not learn the packets sent by the serial port connected to ESW26 and ESW27. Therefore, the Ethernet switch at the lower layer only knows that the user below it is located at that port, and does not know the users under other Ethernet switches can be reached via that communication port. For example, the switch starts with? 22 only has port information for its users, but no port information for ESW24 users. When the lower-layer Ethernet switch ESW22 receives a packet with an unknown destination address, it will send it to the upper-layer Ethernet switch, such as ESW26, through any serial connection. This upper layer Ethernet switch ESW26 then determines its destination port, and then sends it to the destination lower layer switch, such as ESW24. Therefore, it is necessary for this method to make the upper-layer Ethernet switch possess the contents of the forwarding database of the entire system. SwitchCore's approach is to be any lower-level Ethernet

TW0780F (Industrial and Industrial Institute_ Dentsu Institute) · Ptd

1233734 V. Description of the invention (8) The network switch learned that θ X new source address and coming, and the central processing unit (CPU) on the system is unknown. When it requests it, it must communicate with the upper-level B Ethernet switch. : This shell material is registered in each, so ‘SwitchCore’ method allows

The Ethernet switch is used to construct a larger type of Ethernet exchange. What kind of Ethernet switch does the Ethernet switch only need to record the IP address and source port data from its rain system? In addition, only the source of the upper layer B packet has a complete forwarding database, which is guaranteed by the system's central voice network. The parent switch needs to be protected. The biggest problem with this method is that it requires the central processor's $ processor to construct. However, the transfer database of the Ethernet switch is a burden on the central party to synchronize the upper layer B. In addition, when the lower-layer switch receives the packet, it may be too small, and it will send the packet to the upper layer. If the packet of the destination port of the upper layer knows the destination port of the packet, the packet needs to be returned. The circuit switch is still not a network switch (including the B, ,, and σ of each lower layer of the Ethernet that originally sent this packet is undoubtedly a waste of bandwidth. "" Broadway parent switch), which does not limit the invention Under the scope of the above, the above-mentioned example of the Ethernet network system to explain the invention will be explained once again. The system and method can also be applied to other different energy-saving halls and knowledge. The J 1 state network system of the present invention. [Objective and Summary of the Invention] According to the above-mentioned many purposes, the present invention proposes a system and method of ^, and its structure and method characteristics are simplified. A switch is a network switching system, including: a plurality of operations; Mode first-order switch, this first-order switch provides a plurality of

TW0780F (工 硏 院 _ 电 通 所) .ptd

1233734 V. Description of the invention (9) Send network packets, and connect the second-order switch port to the second-order exchange-forwarding database, the second-order switch is in synchronization, and the second-order switch is among them, The operation is in China-Singapore packet to the first-order intersection database. Therefore, the present invention and method are substantially difficult. The following narrative was discovered, and some will be learned in action. The present system and method are the same. In order to achieve these universally described inventions, the system includes a plurality of network switch packet packets. The network switching system: (Refresh Packet) library, and when several operations are received, where the switch, each Among them, the second one is to provide the first pivot architecture converter to avoid the problem. The purpose of the present invention is very consistent with the patent owner and other standards. The network exchange includes all the capabilities The first-order switch in the medium-frame architecture mode or the main-architecture mode includes a plurality of upstream first-order and second-order switches that send update packets to the first-order switch. Forwarding database, the packet communication between its order switches, the second order switch can send further steps located in the first order switch, the disadvantages and limitations of the system technology of how to stack network switches The other advantages and characteristics of the Ming Ming will appear in the text, or other advantages of the invention will be expanded by the narrative Wenting, or in the attached image , Advantages, and herein the fat has outfitting ^ true = Providing a network switch system to send Ϊ ί Ϊ packet exchange network. Should be sent to the library, where the network requires at least one update, several networks i ^ ^ ^ — the transfer funds in the converter # ’母 — 个 网络 开关 会 、 纪 #

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Where in the transfer database. ▲ On the one hand, the address records of the transfer database include at least — = timers, the purpose of which is to record whether the address records corresponding to those located in the internal exchange of the exchange = North Korea are still valid. On the other hand, the transfer information is left. The transfer database contains an address record, the Age Timer, which is used to record that the address record is the address of the year—々, ,, and the recorded address. Port information associated with the address. On the other hand, there are two types of network switches, each of which has a forwarding database. The first type of switch has the following two types = f,

Send the update packet to the second switch. First, when the first type of packet is transmitted, and the route is routed, and the address information contained in the packet does not have a recorded address, or when the first switch receives the network packet [7 f the packet The contained address information, the address record corresponding to the forwarding tt in the second switch is out of date. 、 / On the other hand, a plurality of network switches further includes a plurality of first-level switches, which have a plurality of uplink ports, and operate in a slave mode. , A plurality of second-level (Second-level) switches, including a Channeling Switch, wherein each first-level switch is configured to be connected to each second-level switch, wherein at least one The second-stage parent switch operates in the grain mode and at least one second-stage switch operates in the master mode. Among them, the first-stage switch provides a plurality of local ports to receive the network. Packet, the upstream port of the first-order switch is connected to the second-order switch, and the first-order switch sends updates

1233734 V. Description of the invention (11) Packets to the second-stage switch. The second-stage switch provides a forwarding database in the first stage, and the second-stage switch in the pivot architecture mode communicates with the packet, Operation in

To synchronize the forwarding data within it ^. The present invention also proposes that the _M⑽A switch operates in a slave architecture, which includes a plurality of first-order packets to receive or send network packets. A first-order parent switch provides a plurality of Local or central architecture mode or: frame structure; m-th; stage; change = including a plurality of uplink ports connected to the database in the second-stage switch, the transfer database provided in the second-stage switch . ^ Change 15 'to synchronize the first-order switch. On the one hand, when the address information contained in the first-order switch does not exist in the first-order switch;; = packet: = packet, or the network The address information contained in the packet is transferred to the address database of the shell database. The address record of the transfer database is out of date. The first-level switch sends the update packet to the second-level switch connected to it. If the operation in the hub frame is received by a network packet, and the address contained in this packet: The second-stage exchange is used as the second-stage exchange in the central architecture mode. The address information is stored in 3 in the first-order switch, and the address of the π transfer database in the network packet is TW0780F (Industrial and Technical Education Institute-Dentsu) .ptd Page 15 1233734 V. Description of the invention (12) The download is out of date 》 Or go to the county shibu 3pin ... received the first operation of the second-stage central-architecture mode in the second-stage central architecture mode and the connected first-stage exchanger. On the other hand, when it is caused by a first-order exchange, the order exchange must send an update packet, or at the beginning, the source address of the network packet of the order exchange is widely included in the packet: not included The beginning of the first-stage exchanger and the first stage of the tour: ;;;; This month progress advances a new product in the network switching system to operate the network exchange within the architecture mode, ',,' Transfer data] From the switch in the architecture mode, the address information contained in the switch does not contain a network packet, when the network packet is in the library, or when the network packet is in the switch == 冓 mode. The second address information in the transfer database of the new data is newly packeted to the neighboring network switch in the surrounding network:; :: of :: The record has passed: the time is out, and the update packet is sent. The switch in the architecture mode sends a log of the network packet in the synchronous surrounding switch to the database, the database, and the i !! address information is transferred to the update from the architecture mode switch in the architecture mode. When packet, record its address information and forward it from the second converter The forwarded data in the library is further included. From the architecture mode switch to the destination port, and to the destination port of the δ network packet, the network packet is sent from the architecture mode switch. There is no phase in the transfer database-_ __ TW0780F (Gongyeyuan—Diantong Institute)

Ptd Page 16 1233734 V. Description of the invention (13) Corresponds to the purpose of the network packet ^^ 'On the other hand, from Chai's Port Bay News, this network packet address record will be broadcast including an update timing = mode The corresponding ° U record in the transfer database of the switch is located in its surrounding switch. In other respects, whether %% is still valid. Include a record of the address, which contains the transfer data in a 1 t-structured chessboard. The validity of the package is included in the address. A piece of money is provided by the filmmaker to record the address of the invention. Address-related port information. The converter in the central architecture mode-one that operates in the network switching system. The network has a forwarding database, including method I. 'The exchange in the central architecture mode = the address information contained in the package is not stored.] To a network Road packets, when the network; send database, 3 Ge is the address of the t3 address in the transfer database in the converter in the converter in the network 2 architecture mode converter in the surrounding network or the central architecture mode Exchange write :, when the address record is out of date, and when the packet is updated, a change will be issued from the neighboring switch, in the central architecture mode; out packet == switch, its steps are forwarded by the switch. The purpose of data and daggers is to transfer the addresses of own packets in the central architecture mode switch with the same information. The present invention also proposes a method for communicating with the main architecture mode in the network. The main architecture module J = the switch sends The database contains the address information of the updated packet when a network packet is received. When the packet is transferred, the packet transfer database command is used to query the destination port information of the network packet in the main architecture mode switch J. 'Send network packets to the library Mm _ mm TW0780F (Institute of Industry and Technology_Telecom) · ptd Page 17 1233734 V. Description of the invention (14) In the main frame wheel switch, the purpose and information of the packet :::::: = Corresponds to the network packet ^ near :: 器; =: ί;: [will come the original network packet, and the address information of the original received one is in the main = f, or in the original network packet Contains the corresponding transfer data in the network switch ... Phase-bit :: Carrier: Including =; The transfer database in the converter is inclusive, and an address πi timer records the address recorded in the address. There is 贝 Λ and port information related to the address. Tata further proposes a method of stacking network switches, κ, a plurality of network switches as a network :: method includes the ability to provide at least one ί = ^ 'When a network packet is received, there are 4 more packets on record; For each of the circuit switches = 旳 contains the blame in its forwarding database. Second-order switches: j in and out: a first-order switch and a database, and when the first:! ^ One Yang and the second-order switch each contains a transfer packet with the address% = To a network packet, and the network is sealed, or the network: the 2 ^ address in the transfer database in the transfer data in the switch is sent by the second-tier network exchange server- ::: Yes: The address record is out of date, and the Dirion new packet is sent to the second-order switch. Turn into

HK TW0780F (Institute of Electrical Engineering and Communication Technology).

Ptd page 18 1233734 V. Description of the invention (15) ^ 'Aspect' This method also includes proposing a plurality of first-order exchange uplink ports and operating in a slave architecture mode, providing a plurality of-: the second and second brackets as a channel Use a switch that operates at least &# ¥ π tt and operates in the central architecture mode. Operate at least one of the first switches in the main architecture mode. It provides multiple numbers to send network packets earlier than the first stage. The second-level switch of the parent switch sends an update packet. The upstream port of the parent switch is connected to the first transfer database, and the second-order switch is used to synchronize its internal use, and provides an update packet to the first pb φJ switch. A library of packet communication with each other. The second-tier switch is used to synchronize the transfer funds within it. On the other hand, in this method, the firearm sends a network packet to another second-order switch for the first-order switch channel , And it must be sent at this time. ^ When it is used as the source address information of the network packet, a second-order switch is included in the update packet, but excluding ^, the packet will be sent to each In order to make the above objects, features, and two converters of the present invention. It is understood that the preferred embodiments will be enumerated below, and it will be more obvious as follows in conjunction with the attached embodiments. The drawings and detailed descriptions [Preferred Embodiments] The invention proposed herein provides a stacked network. This system and method does not require a considerable processing system and method. The forwarding database in the server provides-unobstructed = source can synchronize network exchanges and methods. Multiple identical types of efficiency can be used. This system _ parent converter to build a more Page 19 TW0780F (Industrial and Technical Institute _ Dentsu Institute) .ptd 1233734

Port number network switching system. Generally speaking, in the system and method proposed in the present invention, there are four modes: normal (normal), central frame, and slave (slave) mode. Set ^ The master framework (MaSter) is a single network switch. The network switch is a separate network switch. Π: combined: ft does not operate in different modes, t 2: ^, and slave architecture mode to form A stack of network switching systems

System. The stack configuration will provide more ports than a single network switch can provide. In addition, the system and method of the stack network switch presented in the present invention can be applied to different types of network systems, including an Ethernet (Et h e r n e t) network parent switching system. In addition, the communication between these network switches can rely on different types of network interfaces, such as the Media Independent Interface (M II) in the Ethernet environment, the simplified Media Independent Interface (RMII), and the ultra-high speed. Gigai media independent interface (gmii) and other interfaces. Please refer to FIG. 7, which illustrates functions consistent with the implementation of the present invention.

The block diagram, specifically, shows that the network switching system shown in the example uses twelve eight-port switches to construct a one-three-port and twelve-port switching system. As shown in Fig. 7, the network switching system includes a plurality of lower-level network switches L1-L8, and a plurality of higher-level switches Ul-U4. This system sets the lower-level network switches L 1 -L8 to slave mode. The lower-level network switches L1-L8 provide input and output ports to external devices, or specifically, to the users of the lower-level network switches L1-L8. This system configures one of the higher-level switches. Taking U 1 as an example, it is a central architecture mode (hereinafter referred to as f ’central architecture).

TW0780F (Industrial and Technical Education Institute-Telecommunications Institute) .ptd Page 20 1233734 V. Description of Invention (17)

Switch U1 "), and other higher-level switches "to" main architecture mode (hereinafter referred to as "main architecture switch U2_U4"). U and the main architecture switches U2-U4 each keep their duties n + Α Γ _Identifies A, β ^ divides the operation of the knife into a communication channel between lower-level network masters. · A higher-level switch is connected to any lower-level switch to form a non-stop because of the result of direct connection, all the more lettuces are more numb than the others. Hierarchical switches Ul-U4 become the " adjacent switches " or " peripheral switches " of each lower-tier switch, and the lower-tier switches owned by the mother become each " thin-nearby "; Or " Around Exchange ". Please refer to Figure 8 for a description of the I / O port configuration shown below. The lower-level network switch presented in the figure is φ… acupoints < 』丨” in and out of the port. In Figure 8, the two lower-level ^ network switches provide so-called, uplink ports " to connect to the car parent-class network parent switch, and the so-called taxi, 诒, 々, 贸, AA, AA, AAAA 々Λ. «Local 4 埤 'to provide input and output to users of external devices or lower-level network switches. Take the network switch as an example ’This switch provides four ports with upstream ports. This lower-level network switch sends updated packets. Newer packets and network packets from Darwin pass through the upstream port. In addition, for general network communication, the lower-level network switch will treat the uplink as a trunk pipe and operate with link aggregation. The system and method proposed in the present invention provide update packets between higher-level and lower-level network switches to facilitate synchronization of multiple transfer databases in the system with each other. The so-called update packet, as it is intended, is a clearly distinguishable packet and contains source address information, such as the source address and corresponding destination port information of a packet that the system needs to record.当 系统 When the system

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-Update the envelope ... The source address of the exchange record. Xuan Yu's transfer database in the exchange. It ’s more important = Department of Xiongping ^ In the system, although updating packets may consume part of the bandwidth, first bandwidth, the distance between the system and method presented in the present invention (7 or packet preamble) to reduce Bandwidth = ^^ Learning of the source address may be delayed when the second packet of the system has not yet spread to the converter. Bronze has = ΐ = Γ delay only temporarily increases the number of broadcast packets in the system. T 2 system: Packets are distributed to each A switch, after this broadcast packet is the same number of two f, the forwarding database in the different switch will be loaded. However, the content recorded in these addresses may contain different timer values and different in different exchange updates. The proximity of the switch caused different target losses §fL.

Times ^ = Refer to FIG. 9, which shows a transfer record location format of a shellfish storehouse exemplified in accordance with the present invention. In FIG. 9, the record packet of the transfer database ^ I updates the timer 16, which records whether the corresponding address record in the adjacent switch in the system is still valid. For example, the update timer 6 can be a count-up or count-down timer that changes by 1 over time. When the value of the update timer 16 reaches a preset value, the parent converter will consider that the address record corresponding to the timer in the forwarding database is "outdated" and therefore needs to be updated. When the forwarding database of the adjacent switch updates the corresponding record or when the switch sends an update packet for the special address record, the switch resets the update timer 16 to its initial value.

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5. Description of the invention (19) value. Please refer to Figure 9 again. The address record of the transfer database includes a timer 18, address 20, and port information 22. Age timer 18 records, beta has contained validity. For example, ‘Age Timer 1 § may be a timer that counts up or down and changes its value over time. When the value of =: reaches a preset value, the switch will recognize that the address record corresponding to the timer is " outdated ". The switch will shift this obsolete address record. When the address record has been updated, it usually happens: the source address learning process after receiving a network packet or updating the packet ’The switch resets the age timer 18 to its initial value. Package address information, such as the media access control bit in Ethernet: address = includes the destination port information associated with address 20, such as the network switch system and method for which the destination port number packet is presented in this RFN Update covers are also provided ... -In general, when the update is sent, the full machine is triggered by the packet. When a network packet or an update packet is received, it is listed in one of the following cases. In addition, the update packet may be transferred in the device to the receiver and received in the library.

· * + Scoop μ Α jitter library, update packets may be sent. For example, the arrival of a packet triggers the learning of the source address of a switch (SA iirn + rg) + and the switch indicates that its forwarding database does not contain the switch. This switch will send an update packet containing Source address information of the input seal to record the address information in other exchanges in the system

1233734 V. Description of the invention (20) The transfer capital of the switch is triggered when the switch has passed. The address of the neighboring switch is already recorded in the record. For example, the device 18 confirms this. Finally, when the internal storage of the adjacent exchanger is received, the transfer of the exchange is out of date. This update says that if the update is out of date, the update of the exchange is as described above. Figure 10 shows the work in the normal mode (such as cyclic CRC). The purpose is to filter some packet information to learn the correct source address and transfer it to the database. One ~ The source address information contained in the packet is exchanged in close proximity. Update packets may also be sent. For example, the source address of a packet learner, and the switch displays in the database the bit system corresponding to the source address information and sends an update packet containing the new source address information to the neighboring switch As shown in Figure 9 of the forwarding database, this switch can update timing information. When the router operates in the central architecture mode and receives a packet from, an update packet may be sent. The system and method presented by the invention operate in four modes. A flowchart consistent with the present invention shows the situation of a network switch. This switch performs a cumulative check of packet confirmation in step 40 (Cyclic Redundancy Check-sending an incorrect packet. This confirmation step 40 ensures that the place is received. The switch proceeds to step 4 2 to record the source address and source of the record. After the port information is in the switch, perform the task of step 44 destination address (DA) query 'to get the destination port information based on the destination address of the input packet. If 杳 珣 = to the destination port information, this switch will broadcast This way the switch will request the establishment of a peer-to-peer connection at step 46. $ The destination port is used to send the packet to another network switch or the same switch.

TW0780F (Gongyeyuan_Diantong Institute) .Ptd

1233734

The other I / O port. The switch may contain two or more rounds of incoming and outgoing channels. In order to achieve efficient transmission, the switch can select one of several possible input and output ports to be used as the channel, with the load of the input and output ports. According to the diagram of the parent network, the parent network diagram shows a flow chart consistent with the present invention. 3 ^ The case where the parent converter operates in the slave architecture mode, such as the network converters L 1 to L8 in FIG. 7 is Its examples. In the figure, a step 50 is performed from the architectural mode to perform the packet confirmation work, such as a cyclic accumulation check, to filter the packets with incorrect data or transmission errors. In this confirmation, step 50 ensures that all the inputted network packet data can be received correctly. If ^ t is an update packet, the slave architecture switch also ensures that it can be correctly received in step% 5 ^ and marked on the update packet. In addition, the heartbeat 50 = the new packet will be received without error, and comes from the local port = this packet is from this :: Erran No // // 52 decides whether the source of the input packet should be Address Jiqi: The database contains the transfer information in the database, and (3) whether the architecture mode switch ^^ address of the neighboring switch is out of date. If there is no corresponding ^ second seal from the warehouse, = from the local 珲 and the corresponding transfer data in the database = = = = ', or transfer to all higher-level Λ-forms near the exchange A switch, such as U, will send update packets to the parent switches U1-U4 of the same layer. To avoid providing source address information more than twice to higher-level

1233734 V. Description of the invention (22) Switch, the channel switch, which is suitable for the lower-level network packet converter. It does not need to say, please refer to the intermediary network packet phase. The channel switching switch will reset the switch to zero. Please refer to the procedure of updating the packet to step 5 4 again. The source bit of this packet will also be the address corresponding to its year. The destination port for the address of the lost address. The architecture mode switch cannot send an update packet — if this-channel switch exists. So: In other words, it is a higher-level switch, = the channel through which the parent switches communicate with each other. Because through these two, there is the same source address as the update packet. The converter needs to update the packet to synchronize its forwarding database .: According to Figure 7, when the network is sent from the architecture switch u For example, U2,1 must also send an update packet to the corresponding address information at the same time. This sends a new packet from the architecture to the remaining three switches: U, U3, and "L1" U2. When the slave architecture does Send update envelope = Send more corresponding address records in its forwarding database ^ ^ Respond to the corresponding address records in its neighboring switches already ^ 3 License 1st 1st chart, if this is decided by the architecture switch This packet B does not come from the local port, or this slave fabric exchange. 6 This slave fabric exchange will continue to step 5 6 the source address ^ ire input the update packet or general network & address information from the fabric exchange record. Transfer the database within it. This slave architecture exchange aging timer is reset to zero to reflect that the switch has updated the ^ record. W Incoming network packets, the slave architecture switch performs a DA lookup at step 58 ) To get the bit corresponding to the packet destination Information. In step 60, request from the framework switch to establish an I ^ HI ΙΙΜ page 26 TW0780F (Industrial Institute_Telecommunications Institute) .ptd 1233734 V. Description of the invention (23) Point-to-point connection parent switch For two or more efficient transmissions, each is used as a channel. Please refer to the first converter and converter U1. Step 6 2 Wrong material. Keep all the packages in one place. In the case of a packet, the switch starts to exchange the U1 packet, and the same address is sent as a row of packets or the input update packet is sent to the backbone frame corresponding to the source address of the new packet. But this device is received. Than say the updated information. Way to plan the destination line and the other two packets of the switch to another network I / O port for transmission = 丄 ㊁ exchange; may include switches may be available from several; ； ; ... have reached the load with thousands of input and output ports., Zen 3 z1 and its flow chart-flow chart, consistent with the present invention, showing: 丨 pivot; structure; the situation of the type of operation 'The first figure, Network Crossover 2: Again = according to Figure 12 'Central Architecture Switch in Step ~ Work, such as cyclic accumulation check to filter the wrong packets. This confirms the work, step 62, and the network packet information can be received correctly. If the incoming packet 'this hub architecture switch also ensures that it can be in step 62 The positive mark is on the update packet. The parent switch determines in step 6 4 whether (丨) this packet is '(2) whether its forwarding database contains the input packet record' and (3) whether it is in a nearby switch The forwarding data source address record is out of date. If this packet is a restructuring mode switch, it will send this update packet to its neighboring hub architecture mode switch. For example, please refer to Figure 7 again. The backbone architecture is handed over to the update converter L 2 sent by a lower-level originating switch. This backbone architecture mode converter u 丨 will return a packet ^ to L2 because the infrastructure L2 has been updated. After the mode switch U1 sends an update packet,

1233734 V. Description of the invention (24). The central architecture mode switch will reset its corresponding update timer to zero to reflect that the corresponding address records in adjacent switches have been updated. · Please refer to Figure 12 again. If this packet is not an update packet, and the forwarding database in the Zhongji architecture mode switch does not record the corresponding source address record, or it is in the forwarding database of the adjacent switch. When the corresponding address record is out of date, this hub architecture mode switch will send update packets to the neighboring switches in the system. The hub-mode switch will not send update packets to the source switch, which means that the original transmission network packet must be the hub-mode switch. For example, please refer to FIG. 7. If the hub architecture mode switch U1 receives a network packet from the source switch, taking > L3 as an example, this hub architecture mode switch will not send update packets to the source Switch L3, because the source switch L3 has updated the corresponding address information. Similarly, after the hub architecture mode switch sends an update packet, the hub architecture mode switch will also reset the corresponding update timer in the forwarding database to reflect the corresponding knowledge position in the forwarding database of its neighboring switches. The address record has been updated. -Please refer to Figure 12 again, assuming that none of the conditions are met in step 64, or the power exchange has completed step 66, this hub architecture switch will follow the procedure of source address learning in step 68. This central architecture switch records the source address information of the f update packets or general network packets in its ^ ^ = input database. This central architecture switch will also reflect its age timer on the forwarding turtle. This switch has updated the corresponding address record i ° ^ for the input network packet 'the central architecture switch's step destination address query To obtain the destination port corresponding to the packet destination 彳

1233734 V. Description of invention (25) Gongxun. In step 72, the hub architecture switch plans a destination port by requesting the establishment of a point-to-point f-line to send the packet to another network switch or another output of the parent switch. The switch may contain two or more I / O ports as the channel for transmitting packets. In order to achieve efficient transmission, the hub architecture switch may select one of several input and output ports as a channel to balance the load of each input and output port. Ask the network switch U2 to perform an error or send an update number to the source address packet or a 0. Refer to the 13th switch to send the wrong network packet to the main, U3, and U4 packets. This new packet learns the process-like network map, and its architecture model is its work, packet. Package information on the main architecture. Main sequence. The main package comes to show a one-shot operation example. For example, following the confirmation, the source address of the architecture module of the positive switch and the situation of the present invention, the cumulative inspection of the main architecture module can be received step by step. It also ensures that the switch information of the switch can be matched. The flowchart shown in Figure 7 shows the network switch in step 74 to filter the data. Error 7 4 can also ensure that if the incoming packet is Correctly received and recorded will continue to step 76. Records will be entered in the transfer database in the update envelope

For the input network packet, the main architecture mode switch performs a location address query at step 78 to obtain a destination corresponding to the packet destination address = at step 80 'The main architecture mode switch requests to establish a pair: Ϊ Γ Γ: ΪPlan the destination port to send packets to another network for exchange; IT II SC St another input and output port. The switch may contain two transmissions. The main architecture mode crosses = f channels ... to achieve efficiency. You can switch from 15 possible input and output ports to 15

1233734 V. Description of the invention (26) -------- Choose one to be the channel ’to balance the load of each input and output port. ^ As explained in the above paragraphs, the present invention provides a system and method for a stacked network switch. The combination of this system and method under different operating modes of the power switch. Therefore, the same type of switches can be built to form a system independently without the assistance of other devices, such as a central processing unit (CPU), a switching core, a specific bus or connection structure, or a new interface. . The system and method presented by the present invention improve the operation efficiency of the network switching system, improve the network bandwidth, and provide a low-cost method for constructing a high-port-number network switching system. It should be noted that the geometric structure of each object in the embodiment is only one example of the present invention and is not intended to limit the applicable conditions of the present invention. Any person skilled in the art can adjust it to achieve similar functions to the present invention. 5 Departs from the spirit of the invention. p 7 + In summary, although the present invention has been described with a preferred embodiment, it is not intended to limit the present invention. Anyone skilled in the art can make various changes within the spirit and scope of the present invention. The scope of protection of an invention

1233734

Brief description of the drawings [Simplified description of the drawings] Fig. 1 shows a functional block diagram of a conventional Shared Bus architecture network switching system. Figure 2 shows a functional block diagram of a conventional switching fabric architecture. FIG. 3 shows a functional block diagram of a conventional Ring Bus architecture network switching system. FIG. 4 shows a functional block diagram of a conventional interleaved interconnect architecture network switching system.

FIG. 5 shows a functional block diagram of a conventional double-layer serial architecture network switching system. Figure 6 shows the 32-port Gigabit Ethernet switch system architecture of SwitchCore in Sweden. Each of these switches is a 16-port ultra-high-speed Ethernet network switch, which requires a total of six switches. The system's operation requires software and a central processing unit to support it. It cannot operate independently. An embodiment of the present invention is also a 32-bee super-speed Ethernet switch system architecture. A group of 12 switches is assembled to form a super-south-speed Ethernet network with one parent and 8 switches. Road switch, complex operation without the support of software or CPU, can operate independently. / 、、 Green diagram in FIG. 8 is consistent with the content of the present invention. It is a thick converter as referred to in the text, that is, a Slave Mode converter. The sixth is the naming and explanation of the father. ... Father's Change Figure 9 shows the format of the content of the forwarding database (Forwarding Data Base) in accordance with the content of the present invention.

1233734 Brief Description of the Drawings Fig. 10 shows a flowchart of the operation processing of the network switch in normal mode consistent with the content of the present invention. FIG. 11 shows a flowchart of the operation processing of the network switch in Slave Mode (Slave M o de e) in accordance with the content of the present invention. FIG. 12 shows a flowchart of the operation processing of the network switch in the backbone architecture mode (Brain Mode) consistent with the content of the present invention. FIG. 13 shows a flowchart of operation processing of a network switch in a master architecture mode (Master Mode) consistent with the content of the present invention. [Illustration of legend label 64 12 16 18 20 22 40 66 ' , 58, 60, 62, 74, 76, 78, 80: steps

TW0780F (工 硏 院 _ 电 通 所) .ptd Page 32

Claims (1)

1233734 1. A network switching system, comprising: a plurality of network switches whose purpose is to provide the exchange of a network packet, each of the plurality of network switches having a forwarding database, wherein when the network When the road switching system receives the plurality of network packets, the network switching system is capable of sending at least one refresh packet to synchronize the plurality of network switching internal forwarding databases around, where when the plurality of When each network switch receives = at least one update packet, the plurality of network switches will each take out an address contained in the at least one update packet and record it in the transfer data 2 · If a patent is applied for The one-bit record of the first database in the scope includes whether the address record corresponding to the plurality of nets located in the surrounding area is still 3. If the j-th database in the scope of patent application includes one-bit record in the timer, use To record the address, and a 4 associated with the address. If the first network switch in the scope of patent application has a first switch and the second switch The sub-switch will packet in the following two cases to the second switch, to the network packet, and to the system described in the network packet, wherein the forwarding has one less update timer, the purpose of which is to The forwarding database in the switch is valid. The system according to the above item, wherein the forwarding includes an age timer (Age load is valid, a recorded port information. The system according to the above item, wherein the plurality of switches and a second switch, the second type With the transfer database, the first sends the update packet (Refresh first, when the address information contained in the packet received by the first switch does not exist, the 1233734 VI. When the address of the patent application scope transfer database is recorded, or when the first switch receives the network packet, and the address information contained in the network packet is in the second parent The address record corresponding to the transfer database in the converter is out of date. 5. The system as described in item 1 of the scope of patent application, wherein the plurality of network switches further include: a plurality of first-level switches having a plurality of upward ports, Operates in a secondary architecture mode (SUve Mod) multiple second-level (Second-Level) switches, including a channel switch (Channel ing Switch), wherein the multiple first-order switches are each undefined And connected to the plurality of second-stage switches; wherein the at least one second-stage switch operates in a backbone architecture mode (Bra in Mode) and the at least one second-stage switch operates in a master architecture mode (Master Mode); Wherein, the plurality of first-order switches provide a plurality of local ports (acal cal) to receive the network packet, and the plurality of uplink ports of the plurality of first-order switches are connected to The plurality of second-order exchangers, the plurality of first exchanges, and the plurality of update # packets to the plurality of second-order parent converters to synchronize the forwarding database therein; and The second-order exchanger provides the plurality of first-order exchangers. The packet communication, which is operated in the central second-order switch, will issue the plurality of more paid, and use the plurality of switches to synchronize the packets within the plurality of first-order switches. The system described in the above item, wherein, when the complex _ page 34 country TW0780F (Industrial Institute-Dentsu) .Ptd 1233734 A number of first-level exchange switches to one of the plurality of network-source-level level switches, but does not include the update in which one of them sends the network's second-level switch address > message The packet sends the updated packet channel switch. The road packet 'through one of the channels and must send the contained packet' the plural first to the plural second-order intersection 7 · If the application must be sent at the beginning of the first, the update will be sent including the update Starting from the 5th-order switch in the patent scope, when the new packet is received, the packet goes to the switch. The system described in item 2 is a plurality of second orders, a plurality of second orders, and a plurality of first orders. Among them, when one of the cause exchangers is one of the parent exchangers, but does not include the _ 8. If the scope of patent application The system described in item 5, wherein one of the plurality of second-order exchangers must send the update packet ^ =: the packet contains one from the one of the plurality of first-order exchangers: the packet contains For a source address, one of the plurality of second-order switches is prepared to send the update packet to the plurality of first-order switches but does not include one of the plurality of first-order switches of the source. Μ 9. The system described in item 5 of the scope of patent application, wherein when the third-stage switch uses the plurality of upstream packets to transmit the plurality of network packets, it Multiple uplink ports Trunk Port processing, also known as Link 'Aggregation ° 10. The system described in item 丨 of the scope of patent application, wherein the network switch is an Ethernet network Exchanger. 11 · A network switching system, including: 1233734 A plurality of first-order switches operating in a slave architecture mode (suve the plurality of first-order switches provide a plurality of local ports to receive or send a plurality of network packets; and a plurality of μ e The second-stage switch operates in a backbone mode or a master mode; wherein the plurality of first-stage switches include a plurality of uplink ports connected to the plurality of second-stage switches. Switches, the plurality of first-order switches and the plurality of second-order switches each have a Forwarding Database; wherein the plurality of first-order switches send a plurality of update packets ( (Refresh Packet) to the plurality of second-order exchangers to synchronize the forwarding database in the plurality of second-order exchangers; wherein 'the plurality of second-order exchangers provide the plurality of first-order exchangers with each other Packet communication between them; and where one of the plurality of second-order switches operates in the Brain Mode, and sends the plurality of update packets to the plurality of first-order switches To synchronize the forwarding database in the plurality of first-order exchangers. 0 to 12 · The system as described in item 11 of the patent application scope, wherein the plurality of first-order exchangers and the complex number When the second-stage exchangers respectively receive the plurality of update packets (Reefresh Packet), they will record the information in the plurality of update packets to the forwarding database therein. 1 3 11. The system according to item 1, wherein a one-bit record in the transfer database of the plurality of first-order switches includes to TW0780F (Industrial Institute_Telecommunications Institute) .ptd Page 36 1233734 6. Scope of patent application 'a —-^ a refresh timer (Ref resh Timer) to record the transfer data of the plurality of second-order switches Whether the corresponding address record in the library is valid. ^ 1 4 · The system as described in item 丨 丨 of the scope of patent application, wherein the plurality of second-order exchanges operating in the beta mode (Brain Mode) are located at the address of the transfer database The record includes the update timer to record whether the corresponding address record in the forwarding database located in the plurality of first-order switches is still valid. 1 5. The system according to item 丨 丨 in the scope of patent application, wherein the forwarding database of the plurality of first-order exchangers and the plurality of second-order exchangers includes the address record, including an age The timer records the validity of the address record, a bit value, and a port of information related to the address. 1 6. According to the system described in the item No. 丨 of the scope of patent application, in the basin, one of the plurality of first-order switches receives the network packet, and the network 9 ^^ When the address information does not exist in the forwarding database of the plurality of first-stage switches, or the address information contained in the network packet should be complex = the address record of the forwarding database in the second-stage switch has already been Obsolete, one of the plurality of first-order switches will send the update packet to the plurality of second-order switches connected to the complex. / 、 相 1 7. The system described in item 丨 丨 of the scope of patent application, wherein, One of the plurality of second and second stages t and B of the Zhongmei architecture mode (ΒΓΜη Mode) receives the network packet, and the network packet operates as the plurality of nodes in the central architecture mode. The second parent switch is-, or the address information contained in the network packet ^ 1233734 VI. The address of the patent application for the transfer database in the plurality of first-order switches is out of date, or one of the plurality of second-order switches operating in the central architecture mode receives When the update packets from the plurality of first-order exchanges, one of the plurality of second-order exchanges in the backbone architecture mode of this operation will send the update packets to the plurality of first-order exchanges. . 々Reverse connection 18. The system described in item u of the patent application scope, wherein one of the plurality of first-order switches is told to send the network packet through one of the plurality of second-order switches. One channel switch (Channel ing Switch) to another one of the plurality of first-order switches, if this time one of the plurality of first-order switches must send the update The packet contains the source address information of the network packet, then ^ one of the plurality of first-order switches will send the update packet to each of the plurality of ^ second-order switches, but does not include a channel for One of the second-order exchangers. mu 1 9 · The system as described in item 11 of the scope of patent application, wherein one of a plurality of second-order switches must send the update packet from the first-order switch, or the The ^ address information contained in the update packet is from a source switch belonging to the plurality of first-order switches where = j, and the plurality of second-order switches where ^ two will: the update packet to the Each of a plurality of first-order exchangers, but 'the starting first-order exchanger and the source exchanger. Dagger 20. —A method for operating a network switch in a slave mode in a network switching system, a switch in the slave mode 1233734 Six, the patent application scope has a transfer database, including: Received a network packet; from the library contained in the architecture package to the complex converter sender of the formula should be delivered to the slave architecture- There is no network packet in the query database in the step package library. When the network packet contains—the address information does not exist in the formula: = the transfer database or the network in the converter; the address In the adjacent network switch, the forwarding times correspond to, and when an address record is out of date, an update is issued [倜 :: switch ', where the g in the slave architecture mode is more than 7 packets. The purpose is to synchronize the plurality of adjacent exchange and forwarding databases; (i) the exchange port records the address information of the network packet in the forwarding database in the slave architecture module; and when the update packet is received, Record the address information in the forwarding database in the parent switch of the model. 2 1 · The method described in claim 20 of the patent scope, including-including: the transfer data in the switch in the slave architecture mode of the network packet-purpose; send 4 network packets To the destination port; and when the forwarding data in the switch in the slave architecture mode corresponds to the destination port information of the network packet, the packet will be broadcasted 0 2 2 The method described above, wherein the address record in the transfer database of the switch in the slave architecture mode includes an update timer to record the transfers located in the plurality of adjacent parent switches. 1233734 VI. Scope of patent application Whether the corresponding address record in the database is still valid. 21 The method as described in item 20 of the scope of patent application, wherein the transfer database in the switch in the slave architecture mode includes the address record, and contains an age and time register to record the address recorded in the address. Validity, the address information 'and the port information associated with the address. 24. The method as described in claim 20 of the patent application scope, wherein the switch in the slave architecture mode provides a plurality of local ports (Loccal) to receive the plurality of network packets, and A plurality of uplink ports (Upward port) are connected to the plurality of adjacent switches. 25. The method as described in item 20 of the scope of patent application, wherein when the slave frame switch sends the network packet through a channel switch, and at this time, it must send out an address containing the source of the network packet When the information is updated, the update is sent from the architecture switch to the adjacent switches | §, but the channel switch is not included. 26. The method as claimed in claim 2 of claim 4 wherein the adjacent parent switches include operating in the central architecture mode (B device e) or the first master architecture mode (Master M). de) of the plurality of network backbone architecture modes (Brain operates the network parent switch in a parent switch having a forwarding database, including: a, a network packet is received; when the network packet In the switch in the human mode: the ;: does not exist in the backbone architecture to reverse the beacon library, or in the network packet HR TW0780F (Industrial and Technical Institute-Dentsu) .ptd Page 40 1233734 VI. The address of each patent application scope is the transfer of the relative $ = in the network database of the multiple database and the transfer conversion ... update = from the multiple adjacent , The central architecture model = = the purpose of adjacent packets is to synchronize the plurality of :: = = = the update repository; and the transfer capital record in the adjacent parent switch of the network The forwarding database in the bit device of the packet. Beixun exchanged in the Chinese bank structure mode =. The method described in the 27th scope of the patent application scope of the company, including the inquiry of the network packet—header; in the database of Yuda in 15 Observation = the network packet is sent to the destination port; and when there is a packet corresponding to the network packet in the switch in the central architecture mode. Listening to the broadcast of the network cover 29. As described in item 27 of the scope of the patent application, the address record in the transfer database of the switch in the architecture mode / including an update timer, A record is located at the corresponding addresses in the plurality of dagger transfer databases to record whether or not the 30 ·· types of operation in the network switching system to operate a network traffic and cry a master mode Method, the main architecture module a; ^ the main converter has a transfer database, including: a network in a chess game received a network packet; 1233734 VI. Scope of patent application When an update packet is received, one bit information of the update packet is recorded in the transfer database in the switch in the main architecture mode; in the switch in the main architecture mode A destination port in the forwarding database querying the network packet; sending the network packet to the destination port; and when the forwarding database in the switch in the main architecture mode does not correspond to the network When the destination port information of the road packet is broadcast, the network packet will be broadcast. 3 1 · The method as described in item 30 of the scope of patent application, wherein the received update packet contains a bit address and corresponding port information. 3 2 · If the method described in item 30 of the scope of the patent application 'wherein, the switch of the main architecture mode will receive the update packet from a neighboring switch in the following cases, and when the neighboring The switch receives an original packet; the address information contained in the original network packet does not exist in the forwarding database in the adjacent switch; or the address information contained in the original network packet When a corresponding address in the forwarding database in the network switch in the main architecture mode is passed. The method described in item 30 of the scope of patent application, wherein the transfer database in the switch of the main architecture mode includes an address register, and an age timer is included to record the position. The validity of the address record, an owed message, and a piece of information related to the address. 34. The method described in item 30 of the scope of patent application, wherein the main IHI — page 42 TW0780F (Industrial and Electrical Engineering Institute-Dentsu Communications). Ptd 1233734 6. The switch in the patent application architecture mode is connected to the adjacent switch of the network switching system, and the plurality of adjacent switches Z the plurality of patterns. . Based on a slave architecture 35 · —A method for stacking network switches, including: providing a plurality of network switches to be used as a plurality of paths; It is capable of providing, when receiving the plurality of network packets, a new packet to synchronize the forwarding data in the plurality of network switches ^ and for each of the plurality of network switches , A packet contains a packet of information in the forwarding database. 36. The method as described in claim 35 of the scope of patent application, providing a first-order exchanger and a second-order exchanger; furthermore, providing the first-order exchanger and the second-order exchange 5!- Data bank; and white for the transfer of funds when the first-order exchange received the address information contained in the network does not exist in the first-order communication: device: 'or the network packet When the address information is reported, the one-bit record of the 4th-order exchange 4 jtm is out of date. 37 If it is requested, please send the update packet to the second-order exchange. Including: The method described in the 35th patent scope, further including providing a plurality of first-stage switches with a plurality of uplink ports 1233734 (Upward Port) and operate in a slave architecture mode; provide a plurality of second-order switches, including one as a channel switch; and, use at least one of the plurality of second-order switches in a configuration Mode; τ modul operates at least one of the plurality of second-order switches in a master mode; zhuzhu provides a plurality of local ports in the plurality of first-to-six switches to send the For multiple network packets; the parent connects the multiple uplink ports of the multiple first-order switches to the multiple second-order switches; connects early to the sending the update packets to the multiple second-order switches The switch steps the forwarding database within the plurality of first-order switches;-provides the packets as common among the plurality of first-order switches to each other; and δ provides the plurality of update packets to the plurality of The first-order exchanger steps the transfer database within the plurality of first-order exchangers by _ steps. Same as 38. The method described in item 37 of the scope of patent application, further comprising: when one of the plurality of first-order switches transmits the network packet to the other of the plurality of first-order switches, passing through the channel At this time, when the switch packet must send a bit of information containing the network packet, the update packet will be sent to each of the plurality of second-order switches, but the channel is not included. Exchanger. , W, 3 9 · The method described in item 37 of the scope of patent application, further including: 1233734 Six applications for patent scope The first three of the second-order switches Li Yinzhi must send from-starting a plurality of ΐ When the update packet is sent, the update packet is sent to the = 1st parent exchange Each of the organs, but excluding the method of starting the first-order interleaving as described in item 37 of the patent scope of the application, further includes: when the plurality of -brain ^^ 丄 into the dagger. The package contains Once one of the first parent converters must send the update 44: 2 t-level source switch when the network address "new address", the update packet is sent to the plurality of == the source bits, but Does not include the first-order source switch. TW0780F (Institute of Industry and Technology_Electric Works) .p td Page 45