TWI231533B - Method for grinding a backside of a wafer including protruding components on its active surface - Google Patents

Method for grinding a backside of a wafer including protruding components on its active surface Download PDF

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TWI231533B
TWI231533B TW93118579A TW93118579A TWI231533B TW I231533 B TWI231533 B TW I231533B TW 93118579 A TW93118579 A TW 93118579A TW 93118579 A TW93118579 A TW 93118579A TW I231533 B TWI231533 B TW I231533B
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Taiwan
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wafer
tape
active surface
padding
grinding
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TW93118579A
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Chinese (zh)
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TW200601440A (en
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Sheng-Tsung Liu
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Advanced Semiconductor Eng
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Publication of TW200601440A publication Critical patent/TW200601440A/en

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Abstract

A method for grinding backside of a wafer including protruding components on its active surface is disclosed. A plurality of protruding components, such as passive components, are mounted on an active surface of a wafer, a spacer tape having a plurality of openings is attached to the active surface of the wafer. The openings are aligned with the passive components without contact. A grinding tape is adhered to the spacer tape to seal the protruding components inside the openings. Thus, a back surface of the wafer can be grinded without damaging the wafer or the protruding components.

Description

1231533 五、發明說明(1) 【發明所屬之技術領域】 · 本發明係有關於一種晶圓之晶背研磨方法,特別係有 關於一種晶圓之主動面接合有突起元件之晶背研磨方法。 【先前技術】 為增進半導體封裝件之電性功能與降低半導體封裝件 =厚度,常於晶圓(晶片)之主動面設置有被動元件或各式 大起元件並對晶圓(晶片)之背面施以一研磨薄化製程,依 製程步驟不同’可在晶背研磨之前或是晶背研磨之後將被 動凡件設置於晶圓主動面上、或者是在晶圓切割成晶片之 後將被動70件設置於晶片上,其中一種在晶圓(晶片)之主 動面Λ置有被動元件或各式突起元件之製程步驟係先研磨 一晶圓,再切割該晶圓成複數個晶片,接著將該些晶片黏 設於複數個基板或導線架上,之後再形成一錫膏或助銲劑 於該些晶片之主動面,之後,再設置複數個被動元件或其 它突起元件於該些晶片之該主動面,再進行打線製 膠製程…等製程,以完成複數個半導體封裝件,但由於上 述製程係先將個別之晶片黏設於該些基板或導線架上,因 此無法以較快之印刷方式在該些已分離且黏設在該些基板 之晶片上形成連接該些被動元件之錫膏或助銲劑,而必須 以點膠機作業點塗錫膏或助銲劑於該些個別晶片之主動面 上,因此其作業速度無法提昇,此外,為了能在黏晶後設 置被動元件於個別晶片上,該些晶片仍應具有適當之厚 度,以供接合被動元件,晶片之厚度將無法有效降低ς 另一種在半導體封裝件内設置有被動元件之方法\其1231533 V. Description of the invention (1) [Technical field to which the invention belongs] · The present invention relates to a wafer back grinding method for a wafer, and more particularly to a wafer back grinding method in which the active surface of a wafer is joined with protruding elements. [Previous technology] In order to improve the electrical function of the semiconductor package and reduce the thickness of the semiconductor package =, passive components or various large lifting components are often set on the active surface of the wafer (wafer) and the back of the wafer (wafer) A polishing and thinning process is applied, depending on the process steps. 'Passive parts can be set on the active surface of the wafer before or after wafer back grinding, or 70 passive parts can be set after the wafer is cut into wafers. It is arranged on a wafer. One of the process steps of placing passive components or various protruding components on the active surface of a wafer (wafer) is to first grind a wafer, then cut the wafer into a plurality of wafers, and then place the wafers. It is adhered to a plurality of substrates or lead frames, and then a solder paste or a flux is formed on the active surfaces of the wafers, and then a plurality of passive components or other protruding components are set on the active surfaces of the wafers, and then Carry out a wire bonding process ... to complete a plurality of semiconductor packages, but since the above process is to attach individual wafers to the substrates or lead frames, The solder paste or flux connected to the passive components cannot be formed on the wafers that have been separated and adhered to the substrates by a faster printing method. Instead, the solder paste or flux must be applied on the spot of the dispenser. The active surfaces of these individual wafers cannot be increased in operating speed. In addition, in order to set passive components on individual wafers after sticking the crystals, the wafers should still have an appropriate thickness for bonding passive components. The thickness will not be effectively reduced. Another method is to provide passive components in the semiconductor package.

1231533 五、發明說明(2) 係先研磨一晶圓之一 再貼設 切割該 打線製件,但 之後, 快速形 昇製程 或助銲 執行晶 面上, 業之平 複數個 晶圓成 程、封 隨著該 可能造 成錫膏 良率, 劑,再 背研磨 因此在 面0 被動元 複數個 膠製程 晶圓之 成該晶 或助銲 在晶背 將多個 步驟, 執行晶 背面, 件於一 貼設有 …等製 厚度愈 圓輕曲 劑,作 研磨之 被動元 但由於 背研磨 使得該晶 曰曰 圓之 被動元件 程,以完 來愈薄, ,因此仍 業速度依 前係先以 件預先設 預先設置 時’將無 圓之厚度達 主動面,接 之晶片,再 成複數個半 在研磨該晶 然無法使用 舊無法提昇 印刷等方式 置於晶圓主 被動元件於 法提供'一個 到要求' 著,進行 依序進行 導體封裝 圓之步驟 印刷方式 。為了提 形成錫膏 動面,再 晶圓主動 供研磨作 ,種被動元件預先設置於晶圓主動面再執行晶背研磨 之製程’其係先貼設複數個被動元件於一晶圓之一主動 面,^依序進行研磨晶圓、切割晶圓、打線製程、封膠製· 程…等一般封裝製程,以完成複數個半導體封裝件,由於-在研磨晶圓之前,先進行該些被動元件之表面黏著製程, 以使得該晶圓之該主動面得以使用印刷方式形成錫^或助 銲劑’以提升產能,然而,請參閱第1圖,一晶圓i 〇之一 主動面11设置有複數個被動元件13 ,並且貼合一研磨膠帶_ 20於該晶圓10之主動面11,由於該些被動元件13係已預先 設置於該主動面11之故,且習知之該研磨膠帶2 〇係只有 0·2至0.3mm厚’因此造成該研磨膠帶2〇係呈凹凸不平地貼 設於該晶圓1 〇之主動面丨丨上,接著將上述貼設有該凹凸不1231533 V. Description of the invention (2) It is to grind one of the wafers before mounting and cutting the wire-bonded part, but after that, the rapid lift-up process or soldering is performed on the crystal plane. This may result in solder paste yield, flux, and back grinding. Therefore, passive wafers are formed on the surface. Passive wafers are formed or soldered on the wafer back. Multiple steps are performed on the back of the wafer. There are ... etc., The thickness of the rounder is used as a passive element for grinding, but the passive component of the crystal is rounded down due to the back grinding, so the speed is still set according to the previous system. When set in advance, 'the thickness of the non-circle reaches the active surface, and the wafer is then connected into multiple halves. The crystal can not be polished. The old and passive printing methods cannot be used to place the active and passive components on the wafer. Then, the printing method of the step of conducting the conductor encapsulation circle in sequence is performed. In order to form the active surface of the solder paste, and then the wafer is actively used for polishing, a passive component is set in advance on the active surface of the wafer before the wafer back grinding process is performed. Surface, ^ sequentially carry out general packaging processes such as grinding wafers, dicing wafers, wire bonding processes, sealing processes, etc. to complete a plurality of semiconductor packages, because-before grinding wafers, these passive components are first carried out Surface bonding process, so that the active surface of the wafer can be printed with tin or flux to increase the production capacity. However, referring to FIG. 1, one of the active surfaces 11 of a wafer i 0 is provided with a plurality of Passive components 13 and an abrasive tape _ 20 is attached to the active surface 11 of the wafer 10, because the passive components 13 are previously set on the active surface 11, and the conventionally known abrasive tape 2 〇 Only 0.2 to 0.3 mm thick ', so that the abrasive tape 20 is unevenly placed on the active surface of the wafer 10, and then the unevenness

第7頁 1231533 五、發明說明(3) 平地之研磨膠帶20之該晶圓1〇設置於一研磨台(圖未繪 出),以進行研磨該晶圓1 〇之一背面丨2,但如上述,因習 知之研磨膠帶30係只有〇·2至0.3mm厚,其並無法在研磨晶 圓之製程中提供一平整之貼合平面,晶背研磨時之應力將 集中在該些被動元件丨3,使得在該晶圓丨〇在研製 致破片或被動元件1 3剝落。 【發明内容】 本發明之主要目的係在於提供一種突起元件在晶圓主 動面之晶背研磨方法,其係貼設一墊高膠帶於一晶圓之一 主動面’该墊高膠帶係具有複數個開口,以對應避開複數 個没置於該主動面之被動元件或其它突起元件,使得該第 /二墊高膠帶可平整貼設於該晶圓之主動面,以避免在研磨 該晶圓之一背面時造成該晶圓破片。 本發月之次一目的係在於提供一種突起元件在晶圓主 動面之晶背研磨方法,其係在貼設一墊高膠帶於一晶圓之 一主動面^步驟之後,設置一研磨膠帶於該墊高膠帶上, 其中^塾高膠帶係具有複數個開口,以對應避開複數個設 置於該f動面之被動元件,且該研磨膠帶係密封該些被動 _ 元件於。玄上開口内,以避免在研磨該晶圓之一背面時研磨 齊J水或其他污染物進入該些開口内污染該晶圓之主動 面。 首依^發明之突起元件在晶圓主動面之晶背研磨方法, 荖科署晶圓’該晶圓係具有一主動面及一背面,接 叹複數個被動元件或其它突起元件於該主動面,再貼Page 7 1231533 V. Description of the invention (3) The wafer 10 of the flat abrasive tape 20 is set on a polishing table (not shown in the figure) to grind one of the wafers 10 back surface 2 but if As mentioned above, because the conventional polishing tape 30 is only 0.2 to 0.3 mm thick, it cannot provide a flat bonding plane in the process of polishing wafers, and the stress during wafer back grinding will be concentrated on these passive components. In this way, the wafer or the passive component 13 is peeled off during the development. [Summary of the Invention] The main purpose of the present invention is to provide a method for polishing a backside of a protruding element on the active surface of a wafer by attaching a padding tape to one active surface of a wafer. The padding tape has a plurality of Openings to avoid a plurality of passive components or other protruding components not placed on the active surface, so that the second / second padding tape can be flatly attached to the active surface of the wafer to avoid grinding the wafer One of the wafers was broken on the back side. The second objective of this month is to provide a method for polishing the backside of a protruding element on the active surface of a wafer. After the step of attaching a padding tape to an active surface of a wafer, a polishing tape is provided on the wafer. On the padding tape, the tape is provided with a plurality of openings to avoid avoiding a plurality of passive components provided on the f-moving surface, and the abrasive tape is used to seal the passive components. The upper openings are formed to avoid grinding water or other pollutants into the openings to contaminate the active surface of the wafer when grinding one of the back surfaces of the wafer. Firstly, the method of polishing the backside of the protruding element on the active surface of the wafer. The wafer of the Department of Science and Technology has an active surface and a back surface, and laments a plurality of passive components or other protruding components on the active surface. , Then post

第8頁 1231533Page 8 1231533

五、發明說明(4) 設一第一墊高膠帶於該晶圓之主 執古视迆.〆 具有複數個開口,以對庫面遠第一墊问膠帶係 研磨膠帶於該第一熟古膠鹉μ —被勳兀件接者,又置一 些開口内,:L主:ΐ帶上,以密封該些被動元件於該 帶於哼第執丄峨可。又置—具有複數個開口之第二墊高膠 應避開該4b被動元件,;:墊咼膠帶之該些開口係對 塍帶,技;ί 研磨膠帶係貼設於該第二墊高 面_ i 4 θ研磨該晶圓之背面以避免在研磨該晶圓之背 面時造成該晶圓破片。 【實施方式】 參閱所附圖式,本發明將列舉以下之實施例說明。 依本發明之第一具體實施例,一種突起元件在晶圓主 動面之晶背研磨方法,首先,請參閱第以圖,提供一晶圓 ,該晶圓110係具有一主動面lu及一背面112,複數個 在干墊11 3係形成於該晶圓丨丨〇之主動面丨u,該晶圓丨1〇在該 主動面111與該背面112之間係具有一第一厚度…,在本實 施例中’其係約為數十密耳;請再參閱第2β圖,利用印刷 方式形成複數個接合劑1 2 0於該些鋅墊11 3,該些接合劑 120係可以是錫膏或助銲劑;請再參閱第2C圖,再將複數 個突起元件設置於該主動面111,在本實施例中該些突起 元件係以複數個被動元件1 3 0舉例,並以該些接合劑12 0連 接該些被動元件130與該些銲墊1 13 ;請再參閱第2D圖,貼 設一第一墊高膠帶140於該晶圓110之主動面111,該第一 墊高膠帶140係具有複數個開口 141,以對應避開該些被動 元件130,使得該第一墊高膠帶1 40係可平貼於該晶圓1 10V. Description of the invention (4) A first pad of tape is placed on the wafer, and it has a plurality of openings, so that the first pad on the surface of the library is an abrasive tape on the first cooked pad. Jiaomu μ—People who were picked up by the warrior, and placed in some openings: L main: ΐ straps, to seal the passive components in the band to the sergeant. Also set-the second padding adhesive with a plurality of openings should avoid the 4b passive component ;; the openings of the padding tape are opposed to each other, and the polishing tape is attached to the second padding surface _ i 4 θ grind the back of the wafer to avoid breaking the wafer when grinding the back of the wafer. [Embodiment] With reference to the drawings, the present invention will be described by the following embodiments. According to a first specific embodiment of the present invention, a method for polishing a backside of a protruding element on an active surface of a wafer is provided. First, referring to the figure, a wafer is provided. The wafer 110 has an active surface lu and a back surface. 112. A plurality of active surfaces 丨 u formed on the wafer 丨 丨 are formed on the dry pad 11 3. The wafer 丨 10 has a first thickness between the active surface 111 and the back surface 112. In this embodiment, it is about tens of mils; please refer to FIG. 2β again, and a plurality of bonding agents 1 2 0 are formed on the zinc pads 11 3 by printing. The bonding agents 120 may be solder paste. Or flux; please refer to FIG. 2C again, and then set a plurality of protruding elements on the active surface 111. In this embodiment, the protruding elements are exemplified by a plurality of passive elements 1 30, and the bonding agents are used. 12 0 connects the passive components 130 and the solder pads 1 13; please refer to FIG. 2D again, a first padding tape 140 is attached to the active surface 111 of the wafer 110, and the first padding tape 140 is There are a plurality of openings 141 to correspondingly avoid the passive elements 130 so that the first cushioning tape 1 40 It may be flat on the wafer 110

第9頁 1231533 五、發明說明(5) 之主動面111 ,而可不與該些被動元件130接觸,在本實·施 例中,該些被動元件130之高度係高於該第一墊高膠帶14() 之南度;請再參閱第2E圖,設置一第二墊高膠帶15〇於該 第一墊高膠帶140上,該第二墊高膠帶丨50係具有複數個開 口151 ,該些開口1 51之尺寸係可不與該些被動元件丨3〇接 觸為佳,較佳地其係可與該些開口 1 4 1為相同之尺寸,以 對應避開該些被動元件130 ;請再參閱第2F圖,貼設一研 磨膠帶1 6 0於該第二墊高膠帶1 5 〇,以密封該些被動元件 130於該第二墊高膠帶150之該些開口 151與該第一墊高膠 帶140之該些開口 141内,在本實施例中並不局限在該第一 塾南藤帶140上需再没置該第二塾高膠帶150,當該些被動 元件1 3 0之高度係低於該第一墊高膠帶1 4 〇之高度時,則該 研磨膠帶160係直接黏貼設置於該第一墊高膠帶14〇 ,以密 封該些被動元件1 3 0於該些開口 1 41内,不需進行設置該第 二塾尚膠帶150之步驟,較佳地,該第一墊高膠帶ho與該 研磨膠帶1 60係可於同一步驟中一體設置形成,若該些被 動元件130之高度仍高於該第二墊高膠帶丨50,則可再設置 第三墊高膠帶,直到該些墊高膠帶之高度高於該些被動元 件130之高度,使得該研磨膠帶160能貼設於最外層之墊高 膠帶而具有一平坦之外表面161,以供研磨載台之吸附固 定(圖未繪出),較佳地,該研磨膠帶160係不接觸該些被 動元件130,以避免移除該研磨膠帶160時,在該些被動元 件1 3 0上留下殘膠;請再參閱第2 G圖,研磨該晶圓11 〇之背 面11 2至所需之晶圓厚度,使得該晶圓11 〇形成有一第二厚Page 9 1231533 5. The active surface 111 of the description of the invention (5) may not contact the passive elements 130. In the present embodiment, the height of the passive elements 130 is higher than the first cushion tape South degree of 14 (); please refer to FIG. 2E again, set a second padding tape 15 on the first padding tape 140, the second padding tape 50 has a plurality of openings 151, these The size of the openings 151 may not be in contact with the passive components 丨 30, preferably it may be the same size as the openings 141 to correspond to avoid the passive components 130; please refer to again In FIG. 2F, an abrasive tape 160 is attached to the second padding tape 150 to seal the passive components 130 to the openings 151 of the second padding tape 150 and the first padding tape. In the openings 141 of 140, in this embodiment, it is not limited to the first 塾 nanto tape 140, and the second high tape 150 is not required. When the height of the passive components 130 is low, At the height of the first padding tape 140, the abrasive tape 160 is directly adhered to the first padding tape 140, The passive components 130 are sealed in the openings 141 without the step of setting the second tape 150. Preferably, the first padding tape ho and the abrasive tape 1 60 can It is integrally formed in the same step. If the height of the passive components 130 is still higher than the second height-adjusting tape, 50, then a third height-adjusting tape may be set until the height of the height-adjusting tapes is higher than the passive heights. The height of the element 130 enables the polishing tape 160 to be attached to the outermost padding tape and has a flat outer surface 161 for the adsorption and fixing of the polishing stage (not shown). Preferably, the polishing tape The adhesive tape 160 does not contact the passive components 130, so as to avoid leaving adhesive residue on the passive components 130 when the abrasive tape 160 is removed; please refer to FIG. 2G again to polish the wafer 11 Back surface 11 2 to the required wafer thickness, so that the wafer 11 is formed to a second thickness

第10頁 1231533Page 10 1231533

度h2 ’該第二厚度h2係小於該第一厚度hi,例如,可小至 6〜15密耳,,此外,該些被動元件丨3〇係容置於該些開口ΐ4ι 而不被該研磨膠帶160黏著接觸,因此在研磨該晶圓11〇之 背面112時,作用於該第一墊高膠帶14〇、該第二墊高膠帶 150與該研磨膠帶160之應力不會造成應力集中於該些被動 元件1 3 0 ’以避免該些被動元件1 3 0損傷與該晶圓11 〇之破 片’在本實施例中,該第一墊高膠帶1 4 〇之該些開口 1 4丄在 位置與數量上係可對應於該些被動元件1 3 〇,使得每一被 動元件130係被容藏於該第一墊高膠帶丨4〇之每一對應開口 141 ’以使得該第一塾高膠帶/或第二墊高膠帶ι5〇與該 L 研磨膠帶160有較佳之黏合支撐面積;請再參閱第2H圖,f 在移除該研磨膠帶160、該第二墊高膠帶150與該第一墊高| 膠帶1 4 0,之後,將該晶圓丨丨〇之背面丨丨2貼設至一切割膠 70 ’再進行切割該晶圓丨丨〇之步驟,以形成複數個具有 被動元件1 3 0之晶片11 4。 IDegree h2 'The second thickness h2 is smaller than the first thickness hi, for example, it can be as small as 6 to 15 mils. In addition, the passive components 30 are accommodated in the openings 44 without being polished. The adhesive tape 160 is in adhesive contact, so when the back surface 112 of the wafer 110 is polished, the stress acting on the first padding tape 140, the second padding tape 150, and the abrasive tape 160 will not cause stress concentration on the The passive components 130 are to prevent the passive components 130 from being damaged and the wafer 11 0 being broken. In this embodiment, the openings 14 of the first padding tape 1 40 are in position. The number and the number can correspond to the passive elements 1 3 0, so that each passive element 130 is contained in each corresponding opening 141 'of the first padding tape 4o, so that the first padding tape / Or the second padding tape 50 has a better bonding support area with the L abrasive tape 160; please refer to FIG. 2H again, f after removing the abrasive tape 160, the second padding tape 150 and the first pad High | Adhesive tape 1 4 0, after that, the back of the wafer 丨 丨 〇 丨 2 is attached to a dicing adhesive 70 Further step of cutting the wafer Shushu square, the wafer to form a plurality of 114,130 with a passive element. I

因此,本發明係利用貼合具有該些開口丨41之第一墊 高膠帶140於該晶圓11〇之主動面in,該第一墊高膠帶丨4〇 之該些開口 1 41係對應避開該些設置於該主動面111之被動 元件1 3 0,使得該第一墊高膠帶丨4〇可平貼於該晶圓11 〇之 主動面111,並利用設置該研磨膠帶160於該第一墊高膠帶 140上’且該研磨膠帶16〇係具有該平坦之外表面16][,以 避免在研磨該晶圓11 〇之背面丨i 2時,造成研磨應力集中於 該些被動元件13 〇而使該該晶圓產生破片,此外,該研<磨 膠帶1 6 0係密封該些被動元件丨3 〇於該些開口 1 41内,以避Therefore, in the present invention, the first padding tape 140 with the openings 41 is attached to the active surface of the wafer 110, and the openings 41 of the first padding tape 40 are correspondingly avoided. The passive components 130 disposed on the active surface 111 are opened, so that the first padding tape 4o can be flatly attached to the active surface 111 of the wafer 110, and the abrasive tape 160 is disposed on the first A pad of adhesive tape 140 'and the abrasive tape 160 has the flat outer surface 16] [, so as to avoid grinding stress concentrated on the passive components 13 when the back surface of the wafer 110 is polished i 2 〇The wafer is broken. In addition, the grinding tape 160 is used to seal the passive components 丨 3 〇 in the openings 141 to avoid

第11頁 1231533Page 11 1231533

免在研磨該晶圓110之背面112時,研磨漿(圖未繪出)、. 或其他 >可染物進入該些開口 i 4 i内污染該晶圓丨丨0之主動 111 〇 田 依本發明之第—具體實施例,一種突起元件在晶圓 動面之晶背研磨方法係可運用於具有其它突起元件之,When grinding the back surface 112 of the wafer 110, the polishing slurry (not shown), or other > dyeable materials enter the openings i 4 i to contaminate the wafer 丨 0 0 In the first embodiment of the present invention, a method for polishing a backside of a protruding element on a moving surface of a wafer is applicable to those having other protruding elements.

先,請參閱第3 A圖,提供一晶圓2丨〇,該晶圓2丨〇係具有_ 主動面211及一背面212,該主動面211係設置有複數個突 起το件21 3,即該晶圓21 〇係為在其主動面設有各式元件而 呈主動面不平坦的晶圓,該些突起元件213係為凸塊與銲 球或其它元件之其中之一;請再參閱第3B圖,貼合一第一 墊高膠帶2 20於該晶圓210之主動面211,該第一墊高膠帶 220係具有複數個開口 22 1,以避開該些突起元件21 3,在 本實施例中,該些突起元件2 1 3之高度係低於該第一墊高 膠帶220之高度;請再參閱第3C圖,設置一研磨膠帶230於 該第一墊高膠帶220上,以密封該些突起元件21 3於該第一 墊高膠帶220之該些開口 221内,使得該研磨膠帶230貼合 於該第一墊高膠帶220之後係具有一平坦之外表面231,較 佳地,該研磨膠帶230係不接觸至該些突起元件213,當該 些突起元件213之高度係高於該第一墊高膠帶220之高度’ 則可設置一第二墊高膠帶於該第一墊高膠帶220上(圖未繪〇 出),直到該些突起元件21 3之高度係低於該些塾高膠帶之 高度’再將該研磨勝帶2 3 〇黏貼於該第二塾南膠帶而设置 於該第一墊高膠帶220上,以密封該些突起元件21,3於該第 一墊高膠帶2 20之該些開口221内;請再參閱第3D圖’研磨First, referring to FIG. 3A, a wafer 2 丨 〇 is provided. The wafer 2 丨 has an active surface 211 and a back surface 212. The active surface 211 is provided with a plurality of protrusions το 21 3, that is, The wafer 21 0 is a wafer having various active elements on the active surface and the active surface is uneven. The protruding elements 213 are one of bumps and solder balls or other elements; please refer to 3B, a first padding tape 2 20 is attached to the active surface 211 of the wafer 210. The first padding tape 220 has a plurality of openings 22 1 to avoid the protruding elements 21 3. In the embodiment, the heights of the protruding elements 2 1 3 are lower than the height of the first padding tape 220; please refer to FIG. 3C again, and set an abrasive tape 230 on the first padding tape 220 to seal The protruding elements 21 3 are in the openings 221 of the first cushioning tape 220 so that the abrasive tape 230 adheres to the first cushioning tape 220 and has a flat outer surface 231. Preferably, The abrasive tape 230 is not in contact with the protruding elements 213. When the height of the protruding elements 213 is higher than the The height of the height-adhesive tape 220 'can be provided with a second height-adhesive tape 220 on the first height-adhesive tape 220 (not shown), until the height of the protruding elements 21 3 is lower than the height-adhesive tapes. Height ', and then the abrasive tape 2 3 0 is adhered to the second Taonan tape and set on the first padding tape 220 to seal the protruding elements 21, 3 on the first padding tape 2 20 The openings 221; please refer to FIG. 3D again

第12頁 1231533 五、發明說明(8) 該晶圓2 1 0之背面2 1 2至所需之晶圓厚度,由於該些突起元 件2 1 3係避開於該些開口 221中,因此在研磨該晶圓21 0之 該背面212時,作用於該第一墊高膠帶2 20與該研磨膠帶 230之應力不會造成應力集中於該些突起元件213,以避免 該些突起元件213損傷與該晶圓210之破片。 為準本Ξ::Γ Ϊ範圍當視後附之申請專利範圍所界定者 為準,任何熟知此項技蓺 义有 圍内所作之任何變化與^ =脫離本务明之精神和範 ' ,句屬於本發明之保護範圍。Page 121231533 V. Description of the invention (8) The back side 2 1 2 of the wafer 2 1 0 to the required wafer thickness, since the protruding elements 2 1 3 are avoided in the openings 221, When the back surface 212 of the wafer 21 0 is ground, the stress acting on the first padding tape 2 20 and the grinding tape 230 will not cause stress to be concentrated on the protruding elements 213 to avoid damage and The wafer 210 is broken. The scope of this Ξ :: Γ 当 is subject to the definition of the scope of the attached patent application. Any changes made within the scope of this technology should be understood and ^ = deviate from the spirit and scope of this book. The protection scope of the present invention.

1231533 圖式簡單說明 【圖式簡單說明】 第1 圖:習知之研磨膠帶貼合於一設有複數個被動-元 件之一晶圓之截面示意圖; 第2 A至2 Η圖:依據本發明之第一具體實施例,一種突起元 件在晶圓主動面之a曰老研磨方法,一晶圓於製造過程中之 截面示意圖;及 第3A至3D圖:依據本發明之第二具體實施例,一種突起元 件在晶圓主動面之晶背研磨方法,一晶圓於製造過程中之 截面示意圖。1231533 Brief description of the drawings [Simplified description of the drawings] Figure 1: A cross-sectional schematic diagram of a conventional abrasive tape attached to a wafer provided with a plurality of passive elements; Figures 2 A to 2 Figures: According to the present invention The first specific embodiment is an old grinding method of a protruding element on the active surface of a wafer, a schematic cross-sectional view of a wafer during manufacturing; and FIGS. 3A to 3D: According to a second specific embodiment of the present invention, a A wafer back grinding method of a protruding element on the active surface of a wafer, a schematic cross-sectional view of a wafer during manufacturing.

元件符號簡單說明: 10 晶圓 11 13 被動元件 20 研磨膠帶 11 0晶圓 i i i 113銲塾 114 1 2 0接合劑 1 3 0突起元件 140第一墊高膠帶141 150第二墊高膠帶151 160研磨膠帶 ι61 170切割膠帶 hi第一厚度 h2 21 0晶圓 211Simple explanation of component symbols: 10 wafers 11 13 passive components 20 abrasive tapes 11 0 wafers iii 113 soldering pads 114 1 2 0 bonding agent 1 3 0 protruding elements 140 first padding tape 141 150 second padding tape 151 160 polishing Tape ι61 170 cutting tape hi first thickness h2 21 0 wafer 211

主動面 12 背面 主動面 112 背面 晶片 開口 開口 外表面 第二厚度 主動面 212 背面Active surface 12 Back Active surface 112 Back Wafer Opening Opening Outer surface Second thickness Active surface 212 Back

第14頁 1231533 圖式簡單說明 2 1 3 突起元件 220第一墊高膠帶221 開口 230研磨膠帶 231 外表面 ❿Page 14 1231533 Brief description of the drawing 2 1 3 Protruding element 220 First cushioning tape 221 Opening 230 Abrasive tape 231 Outer surface ❿

第15頁Page 15

Claims (1)

!231533 六、申請專利範圍 【申請專利範圍】 、一種突起元件在晶圓主動面之晶背研磨方法,包含: 提供一晶圓’該晶圓係具有一主動面及一背面,複數 個銲墊係形成於該晶圓之主動面; 形成複數個接合劑於該些銲整; 上 设置複數個被動元件於該主動面,以該些接合劑連接 该些被動元件與該些銲墊; ^貼合一第一墊高膠帶於該晶圓之主動面,該第一墊高 膠帶係具有複數個開口,以避開該些被動元件;! 231533 6. Scope of patent application [Scope of patent application], a method for polishing the backside of a protruding element on the active surface of a wafer, including: providing a wafer; the wafer has an active surface and a back surface, and a plurality of pads; It is formed on the active surface of the wafer; forming a plurality of bonding agents on the welding surfaces; setting a plurality of passive components on the active surface, and connecting the passive components and the bonding pads with the bonding agents; Combine a first padding tape on the active surface of the wafer. The first padding tape has a plurality of openings to avoid the passive components. 設置一研磨膠帶於該第一墊高膠帶上,以密封該些被 動元件於該些開口内;及 研磨該晶圓之該背面。 2、如申請專利範圍第1項所述之突起元件在晶圓主動面 之晶背研磨方法,其中該些被動元件之高度係低於該第一 墊高膠帶之高度。 3、如申請專利範圍第1項所述之突起元件在晶圓主動面 之晶背研磨方法,其中該些被動元件之高度係高於 墊高膠帶之高度。 4、 如申請專利範圍第3項所述之突起元件在晶圓 之晶背研磨方法,其另包含··設置一第二墊高膠帶面 一墊南膠帶上,該第二墊高膠帶係具有複數個開口 1 =第 第一墊高膠帶之開口,以避開該些被動元件。 十應於 5、 如申請專利範圍第丨項所述之突起元件在晶 之晶背研磨方法,其中該研磨膠帶係不接觸至該此面 &铍動亓An abrasive tape is provided on the first padding tape to seal the driven elements in the openings; and the back surface of the wafer is polished. 2. The method of polishing the back of a protruding element on the active surface of a wafer as described in item 1 of the scope of the patent application, wherein the height of the passive elements is lower than the height of the first padding tape. 3. The method of polishing the back of a protruding element on the active surface of a wafer according to item 1 of the scope of the patent application, wherein the height of the passive elements is higher than the height of the cushion tape. 4. The method for polishing a protruding element on a wafer backside as described in item 3 of the scope of the patent application, further comprising: setting a second padding tape surface and a padding tape, the second padding tape has Multiple openings 1 = openings of the first padding tape to avoid the passive components. Ten should be in 5. The method for grinding the protruding element on the crystal back as described in item 丨 of the patent application scope, wherein the abrasive tape does not contact the surface & beryllium 第16頁 1231533 六、申請專利範圍 件。 6、 如申請專 之晶背研磨方 同一步驟中一 7、 如申請專 之晶背研磨方 其中之一,並 8、 一種突起 提供一 曰曰 個突起元件係 利範圍第1 法,其中該 體設置形成 利範圍第1 法,其中該 以印刷方式 元件在晶圓 圓’該晶圓 設置於該主 貼合一第一墊高膠帶 膠帶係 設 起元件 研 9、如 之晶背 墊高膠 10、 如 之晶背 塾南膠 11、 如 面之晶 該第一 具有複 置一研 於該些 磨該晶 申請專 研磨方 帶之高 申請專 研磨方 帶之高 申請專 背研磨 墊高膠 數個開口, 磨膠帶於該 開口内;及 圓之該背面 利範圍第8 法,其中該 度。 利範圍第8 法,其中該 度。 利範圍第1 0 方法,其另 帶上,該第 項所述之突起元件在晶圓主動-面 第一墊高膠帶與該研磨膠帶係在 〇 項所述之突起元件在晶圓主動面 接合劑係選自於銲膏與助銲劑之 形成於該晶圓之該些銲墊上。 主動面之日日奇研磨方法,包含: 係具有一主動面及一背面,複數 動面; 於該晶圓之主動面,該第一墊高 以避開該些突起元件; 第一塾高膠帶上,以密封該些突 項所述之突起元件在晶圓主動面 些突起元件之高度係低於該第一 項所述之突起元件在晶圓主動面 些突起元件之高度係高於該第一 項所述之突起元件在晶圓主動 ^含:設置一第二墊高膠帶設於 二墊高膠帶係具有複數個開口對Page 16 1231533 6. Scope of patent application. 6. If applying for the special back grinding method in the same step -7. For applying one of the back grinding methods, and 8, for a protrusion, provide a protrusion element, which is the first method, in which the body The first method of setting the formation range, wherein the printed component is on the wafer circle, the wafer is set on the main bonding, a first padding tape, and the tape is set up from the component research 9 and the Ruzhijing backing pad 10 , Ruzhijing back glutinous rubber 11, Ruianzhijing, the first has the first set of multiple grinding grinding the crystals for the application of the special high-grinding square belt application high-specific application of the high-grinding square polishing pad application An opening, abrasive tape in the opening; and the eighth method of rounding the back surface, where the degree. The eighth method of profit range, which is the degree. The tenth method of the utility model, which is additionally provided, the protruding element described in the first item on the wafer active-side first padding tape and the abrasive tape is the protruding element described in the zero item on the active surface of the wafer. It is selected from solder paste and flux formed on the pads of the wafer. An active surface polishing method includes: an active surface and a back surface, a plurality of moving surfaces; on the active surface of the wafer, the first pad is raised to avoid the protruding elements; the first tape is high The height of the protruding elements on the active surface of the wafer to seal the protruding elements described above is lower than the height of the protruding elements on the active surface of the wafer of the protruding element described in the first item. One of the protruding elements on the wafer actively includes: a second padding tape is provided on the second padding tape system having a plurality of opening pairs 第17 頁 1231533 六、申請專利範圍 ^ t _ _ .. ^ ^ 义避開該些突起元件。 應於第一墊面膠帶之開口,以 .. 面 19 a由冰*… 1 $斫述之突起元件在晶圓主動 12、如申請專利範圍第8頊所 ☆杜孫、s όt 之晶背研磨方法,其中該些突起70件係選自於凸塊與銲球 1 Q , . ^ <说述之突起元件在晶圓主動面 1 3、如申请專利範圍第8頊所 . .. 之晶背研磨方法,#中該研# ”係不接觸^些突起元 4牛 〇 Η , ^ ^ Μ述之突起元件在晶圓主動面 <» I Μ專利範圍第8頊勢高膠帶與該研磨膠帶係在 之晶背研磨方法,其中該第〆爹 同一步驟中一體設置形成。 ΦPage 17 1231533 VI. Scope of patent application ^ t _ _ .. ^ ^ Avoid these protruding elements. Should be at the opening of the first pad surface, with the surface 19 a made of ice * ... 1 $ The protruding elements described in the wafer are active 12, such as the patent application scope No. 8 ☆ Du Sun, s Grinding method, wherein 70 pieces of these protrusions are selected from bumps and solder balls 1 Q,. ^ ≪ said protruding elements on the active surface of the wafer 1 3, as described in the 8th patent application scope .. Crystal back grinding method, # 中 此 研 # "is not in contact with some of the protruding elements 4 Η0Η, ^ ^ The protruding elements described on the active surface of the wafer <» I Patent No. 8 high potential tape and the The abrasive tape is used in the back-grinding method, in which the first part is integrally formed in the same step. Φ
TW93118579A 2004-06-25 2004-06-25 Method for grinding a backside of a wafer including protruding components on its active surface TWI231533B (en)

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