TWI227534B - Method for inspecting surface of UBM - Google Patents

Method for inspecting surface of UBM Download PDF

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Publication number
TWI227534B
TWI227534B TW92118530A TW92118530A TWI227534B TW I227534 B TWI227534 B TW I227534B TW 92118530 A TW92118530 A TW 92118530A TW 92118530 A TW92118530 A TW 92118530A TW I227534 B TWI227534 B TW I227534B
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Taiwan
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bump
wafer
metal layer
layer under
detection
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TW92118530A
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Chinese (zh)
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TW200503135A (en
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Shin-Hua Chao
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Advanced Semiconductor Eng
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Abstract

A method for inspecting surface of UBM (under bump metallurgy) is performed prior to a bumping step of wafer manufacturing process. An UBM is formed on an active surface of a provided wafer. The UBM includes at least a test pad. A melting solder is wetted onto the test pad by solder dipping. The wetting state of solder on the test pad is inspected to determine the bump bonding property of UBM.

Description

1227534 __ , 五、發明說明(1) ~ ~ 【發明所屬之技術領域】 本發明係有關於一種在製作凸塊之前對積體電路晶圓 之凸塊下金屬層之表面檢測方法,特別係有關於—種檢測 有機材料對晶圓之凸塊下金屬層污染之方法。 【先前技術】 I知在凸塊形成於 積體電路晶圓之前,需製作一凸 塊下金屬層〔UBΜ,Under Bump Metal lurgy〕及一有機保 護層〔organic passivation layer〕於該晶圓之一正 面,該凸塊下金屬層係提供對凸塊之結合與防止凸塊内金 屬成份對晶圓内部線路之擴散,而該有機保護層係可為聚· 亞醯胺〔Polyimide〕或苯環丁烯〔BCB〕,其係設於一晶 圓之晶圓保護層〔wafer passivation layer〕如磷石夕玻 璃〔PS G〕與凸塊下金屬層之上方,以分散凸塊之應力, 由於在製程中該有機保護層可能殘留於該凸塊下金屬層, 而造成在凸塊下金屬層之顯露表面會殘留有有機粒子之污 染物,導致後續形成於該凸塊下金屬層之凸塊無法良好結 合在凸塊下金屬層之顯露表面。 習知一種對凸塊下金屬層之顯露表面之檢測方法係利 用接觸式水滴檢測分析,需要以水滴滴在晶圓之該凸塊下 金屬層上,再觀察水滴在該凸塊下金屬層上所形成的形籲 狀,以檢測凸塊下金屬層在顯露表面之污染情形,但僅由 水滴之形狀’不易由目視觀察出表面污染情形,並且水滴 之濕潤程度無法對照於實際凸塊之接合強度,缺乏具體而 客觀的判斷基準。1227534 __, V. Description of the invention (1) ~ ~ [Technical field to which the invention belongs] The present invention relates to a method for detecting the surface of a metal layer under a bump of an integrated circuit wafer before making a bump, and particularly relates to Regarding a method for detecting the contamination of a metal layer under a bump of a wafer by an organic material. [Previous technology] It is known that before a bump is formed on an integrated circuit wafer, an under bump metal layer (UBM, Under Bump Metal lurgy) and an organic passivation layer are formed on one of the wafers. On the front side, the metal layer under the bumps provides bonding to the bumps and prevents the metal components in the bumps from diffusing to the internal circuits of the wafer. The organic protective layer can be polyimide or phenylcyclobutene. Ene [BCB], which is provided on the wafer passivation layer of a wafer such as phosphate rock glass [PS G] and the metal layer under the bump to disperse the stress of the bump. The organic protective layer may remain on the metal layer under the bump, and contamination of organic particles may remain on the exposed surface of the metal layer under the bump, resulting in the subsequent failure of the bump formed on the metal layer under the bump. Bonded to the exposed surface of the metal layer under the bump. A conventional method for detecting the exposed surface of a metal layer under a bump is to use contact water droplet detection and analysis. Water droplets need to be dripped on the metal layer under the bump on the wafer, and then water droplets are observed on the metal layer under the bump. The formed shape is used to detect the contamination of the metal layer under the bump on the exposed surface, but the shape of the water drop is not easy to visually observe the surface contamination, and the wetness of the water drop cannot be compared with the actual bump bonding. Strength, lack of specific and objective judgments.

第5頁 1227534Page 5 1227534

技μ « 種習知對凸塊下金屬層之顯露表面之产測方法 係利用非接觸式光學分析,需 $檢測方法 ^ C opt ica f faltpe " ^ ^ ^ 凸塊ΐίίΐ在Si能量與強度經頻譜分析,檢測 =對凸,下金屬層之凸塊結合性影響,且該檢測方法 適用於製程中同步檢測控制。 -門車又長不 【發明内容】 本發明之主要目的係在於提供一種凸塊下金屬層之表_ 面檢測方法,利用浸潰方式將熔融銲料沾附於一晶圓之凸 鬼下金屬層〔UBM,Under Bump Metallurgy〕之檢測塾, =4檢測墊被熔融銲料之沾附程度可快速檢測該凸塊下金 層之表面是否殘留有不當污染物,以確保在後續凸塊製 作步驟該凸塊下金屬層之凸塊結合性良好,以達到在凸塊 製程前低成本檢測。 依本發明之凸塊下金屬層之表面檢測方法,其係用以 在晶圓製程中之凸塊製作步驟之前檢測一晶圓上凸塊下金 屬層〔UBM〕之表面,該檢測方法係包含步驟有,提供一 _ 曰曰圓’該晶圓係具有一正面及一對應之背面,該正面係形 成有一凸塊下金屬層,該凸塊下金屬層係包含有至少一顯 露之撿測墊,較佳地,該檢測墊係設於該晶圓正面之周 邊’之後’以銲料浸潰〔solder dipping〕方式提供一熔TECH μ «A conventional method for producing and testing the exposed surface of the metal layer under the bump is to use non-contact optical analysis, which requires a $ detection method ^ C opt ica f faltpe " ^ ^ ^ The energy and intensity of the bumps in Si Through spectrum analysis, detection = influence on the bump bonding of the convex and lower metal layers, and the detection method is suitable for synchronous detection control in the manufacturing process. -The door car is not long [Content of the invention] The main purpose of the present invention is to provide a surface-surface detection method for the metal layer under the bump, using a dipping method to attach molten solder to the metal layer under the bump of a wafer [UBM, Under Bump Metallurgy] Detection 塾, = 4 The degree of adhesion of the detection pad to the molten solder can quickly detect whether the surface of the gold layer under the bump has improper contaminants, so as to ensure that the bump in the subsequent bump manufacturing steps The bump bonding of the metal layer under the block is good, so as to achieve low cost detection before the bump process. The surface inspection method for a metal layer under a bump according to the present invention is used to inspect the surface of a metal layer under a bump (UBM) on a wafer before a bump manufacturing step in a wafer process. The detection method includes The steps include: providing a wafer with a front surface and a corresponding back surface. The front surface is formed with a metal layer under the bump, and the metal layer under the bump includes at least one exposed detection pad. Preferably, the detection pad is provided 'on the periphery' of the front side of the wafer to provide a melt in a solder dipping manner.

1227534 · ~…-. 五、發明說明(3) 融辉料於該凸塊下金屬層之檢測墊,藉由該熔融銲料在該 檢測塾之沾附程度,以檢測該凸塊下金屬層是否因污染物 之殘留影響該凸塊下金屬層之凸塊結合性。 【實施方式】 參閱所附圖式,本發明將列舉以下之實施例說明。 依本發明之凸塊下金屬層之表面檢測方法,其係用以 在製作凸塊之前檢測一晶圓上凸塊下金屬層〔UBM,Under Bump Metal lurgy〕之表面,請參閱第1圖,首先提供有一 晶圓1 0 ’該晶圓1 〇係可為一具有積體電路功能之晶圓或是 一虛晶圓〔dummy wafer〕,該晶圓1 0係具有一正面11及_ 一對應之背面12,該正面11係形成有複數個銲墊13〔|3〇11(1 Pad〕並顯露於一晶圓保護層η〔wafer passivation layer〕,如磷矽玻璃〔psG〕或氮化矽,在該晶圓正面11 上之晶圓保護層1 4表面係以濺鍍方式形成有一凸塊下金屬 層20,如Ti-Ni/V-Cu、A1 -Ni/V-Cu、Ti-Cu、Cr —Cu 或 Cr-Cr/Cu-Cu等複合式金屬層,且該凸塊下金屬層2〇係包 含有複數個顯露之凸塊接合墊2 2與至少一顯露之檢測墊 2 1 ’其中該凸塊下金屬層2 0之形成方法可參照申請人於我 國專利公告第5 2 91 4 3號所揭示之技術製作,該些凸塊接合 塾2 2係電性導接至對應之銲墊1 3,或是以重分配線路〔圖_ 未繪出〕連接,在本實施例中,該檢測墊2丨係設置於該晶 圓正面11之周邊,可為片狀墊層,較佳地,該晶圓丨〇係預 設有一虛晶片〔dummy chip〕,以供該檢測墊21之設置, 在本實施例中,該晶圓1 0係為一晶圓級封裝結構,在該晶1227534 · ~ ...-. V. Description of the invention (3) The detection pad of fused material on the metal layer under the bump, and the degree of adhesion of the molten solder to the test pad to detect whether the metal layer under the bump is Residual contaminants affect the bump bonding of the metal layer under the bump. [Embodiment] With reference to the drawings, the present invention will be described by the following embodiments. According to the surface inspection method of the metal layer under the bump according to the present invention, it is used to detect the surface of the metal layer under the bump (UBM, Under Bump Metal lurgy) on a wafer before making the bump. Please refer to FIG. 1, First, a wafer 10 is provided. The wafer 10 can be a wafer with integrated circuit function or a dummy wafer. The wafer 10 has a front surface 11 and a correspondence. On the back surface 12, the front surface 11 is formed with a plurality of pads 13 [| 3〇11 (1 Pad) and exposed on a wafer passivation layer η, such as phosphorous silicon glass [psG] or silicon nitride The surface of the wafer protective layer 14 on the front surface 11 of the wafer is formed by a sputtering under metal layer 20, such as Ti-Ni / V-Cu, A1-Ni / V-Cu, Ti-Cu Cr—Cu or Cr-Cr / Cu-Cu and other composite metal layers, and the metal layer 20 under the bump includes a plurality of exposed bump bonding pads 2 2 and at least one exposed detection pad 2 1 ′ The method for forming the metal layer 20 under the bumps can be made by referring to the technology disclosed by the applicant in Chinese Patent Publication No. 5 2 91 4 3, and the bumps are bonded. 2 2 is electrically connected to the corresponding solder pad 1 3, or connected by a redistribution circuit [Figure_not shown]. In this embodiment, the detection pad 2 丨 is disposed on the front surface 11 of the wafer. The periphery may be a sheet-like cushion layer. Preferably, the wafer is preset with a dummy chip for setting the detection pad 21. In this embodiment, the wafer 10 is Is a wafer-level package structure.

12275341227534

五、發明說明(4) 圓η面11更覆蓋有—有機保護層3〇〔 anic passivation layer 〕,如取开 δ 丁烯〔BCB〕,且該有機仵1酿胺〔P〇lyimide〕或苯環 32,以分別顯露該檢測』蔓層二係具有複數個開孔31、 孔31係可定義該檢測塾=塊接合墊22,而該開 以ii,請參閱第2及3圖,提供-熔融銲料4〇於該凸塊 2層2〇之檢測墊21,其係利用銲料浸潰方式,將;曰ΐ 姐 糕〔即凸塊下金屬層20之檢測墊21浸潰於一熔融 2料:谷槽5〇 ’該浴槽50儲有熔融銲料40,其中該熔融鲜料 40”溫之um錫錯鐸料為較佳,該浴槽5。係保持二 ,η:銲料40為熔融狀態,之後,拉離並搖晃該 =A : I #以1、過餘之熔融銲料4 〇,藉由該熔融銲料4 0在 以欢凋21之沾附程度,以檢測該凸塊下金屬層20是否因 有不當污染物而影響該凸塊下金屬層之凸塊結合性。 如第3圖所示,可由目視簡單觀測出該檢測墊21是否充份 浸附有熔融銲料40,當該凸塊下金屬層20之該檢測墊21無 殘留有不當污染物時,該熔融銲料4 0在浸潰過程可充份沾 附在檢測墊2 1之全部顯露表面,因此可研判該晶圓1 〇之凸 塊接合墊22具有良好凸塊結合性,既該晶圓丨〇之凸塊下金 屬層2 0具有良好凸塊結合性,在後續凸塊步驟可良好結合 凸塊〈圖未繪出〉,故可再進行該晶圓丨〇或整批次之其它 a曰圓之凸塊製作製程·,當如第&圖所示,該凸塊下金屬層 2 〇之4檢測墊2 1在浸潰過程無法完全沾附該熔融銲料4 〇, 即可研判該晶圓1 〇之凸塊接合墊22殘留有足以影響凸塊結V. Description of the invention (4) The circular η surface 11 is further covered with an organic protective layer 3〇 [anic passivation layer], such as δ butene [BCB], and the organic amine 1 [amine] [benzene] or benzene Ring 32 to reveal the detection respectively. The second layer has a plurality of openings 31, and the hole 31 can define the detection 塾 = block bonding pad 22, and the opening ii, see Figures 2 and 3, provide- The molten solder 40 is applied to the bump 2 layer 20 test pad 21, which is immersed in a molten 2 material by solder dipping method. : Valley trough 50 ′ The bath 50 stores molten solder 40, of which the molten fresh material 40 ”warm um tin tin material is better, the bath 5. Keep the two, η: solder 40 is in a molten state, after , Pull away and shake the = A: I # with 1, excess molten solder 4 〇, with the degree of adhesion of the molten solder 40 to Huanju 21, to detect whether the metal layer 20 under the bump is caused by Improper contaminants affect the bonding of the bumps on the metal layer under the bumps. As shown in Figure 3, it can be easily observed visually whether the detection pad 21 is fully immersed. There is a molten solder 40. When the detection pad 21 of the metal layer 20 under the bump has no improper contaminants remaining, the molten solder 40 can fully adhere to the entire exposed surface of the detection pad 21 during the dipping process. Therefore, it can be judged that the bump bonding pad 22 of the wafer 10 has good bump bonding, that is, the metal layer 20 under the bump of the wafer has good bump bonding, and can be well bonded in subsequent bump steps. The bumps (not shown in the figure), so the wafer can be made again or the entire batch of other a-circle bump manufacturing processes. When the & as shown in the figure, the metal layer 2 under the bump 4 of the test pad 2 1 can not fully adhere to the molten solder 4 d in the dipping process, and it can be judged that the bump bonding pad 22 of the wafer 1 0 has enough to affect the bump junction.

第8頁 1227534 五、發明說明(5) 合性之光阻劑或有機粒子等污染物6 〇,使得該凸塊下金屬 層20之凸塊接合墊22具有不佳之凸塊結合性,後續形成在 该凸塊下金屬層20之凸塊可能接合不良或掉落,應重新清 洗或蝕刻該晶圓i 〇或整批次之其它晶圓,方可進行凸塊製 作製程。 因此,本發明係提供一種低成本且可在晶圓封裝製程 即時〔real time in-process〕檢測凸塊下金屬層 丄UBM〕之顯露表面的方法,快速得知凸塊下金屬層之顯 = 染物之殘留導致其凸塊結合性劣化, 更此確過凸塊下金屬層之凸塊結合性,以取代 式水滴檢測或非接觸式光學分析檢測該凸塊下金屬屉( 〔UBM〕,而不需要昂貴的光學分析儀器, 凸塊下金屬層之顯露表面對凸塊 ]正確判斷 :除二測凸塊製作前晶圓之凸塊下=層3露j發 為準,任何熟知此項技藝者 圍内所作之任何變化與修改 〔如銅墊或銘墊等〕之表面污染程度檢相-圓之銲塾 本發明之保護範圍當視後附之申請專利範所 均屬於本發明之保護 “Τ熟知此馆姑“ : 明之精神:4 範圍 1227534_;_ 圖式簡單說明 【圖式簡單說明】 第1圖:依據本發明之凸塊下金屬層之表面檢測方法,所 提供之晶圓局部截面示意圖; 第2 圖 ·· 依 據 本 發 明之 凸塊下 金 屬 層 之 表 面 檢 測 方 法, 該 晶 圓 浸 潰於 一熔融 銲 料 浴 示 意 圖 , 第3 圖 依 據 本 發 明之 凸塊下 金 屬 層 之 表 面 檢 測 方 法, 融 銲 料 沾 潤良 好之晶 圓 局 部 截 面 示 意 圖 及 第4 圖 依 據 本發 明之 凸塊下 金 屬 層 之 表 面 檢 測 方 法, 融 銲 料 沾 潤不 佳之晶 圓 局 部 截 面 示 意 圖 〇 元件 符 號 簡 單 說 明 10 晶 圓 11 正面 12 背 面 13 銲· 墊 14 晶圓保護層 20 凸 塊 下 金 屬 層 21 檢測墊 22 凸 塊 接 合墊 30 有 機 保 護 層 31 開孔 32 開 孔 40 溶 融 鮮 料 50 浴槽 60 污 染 物Page 8 1227534 V. Description of the invention (5) Contaminant photoresist or organic particles and other pollutants 60, making the bump bonding pad 22 of the metal layer 20 under the bump have poor bump bonding, and subsequent formation The bumps of the metal layer 20 under the bumps may be poorly bonded or dropped. The wafer i 0 or other wafers in the entire batch should be cleaned or etched again before the bump manufacturing process can be performed. Therefore, the present invention provides a low-cost and real-time in-process method for detecting the exposed surface of the metal layer under the bump (UBM), so as to quickly learn the appearance of the metal layer under the bump = Residue of dyes leads to the deterioration of the bonding property of the bumps. Furthermore, the bonding property of the metal layer under the bumps is confirmed, and the metal drawer under the bumps ([UBM]) is replaced by the water drop detection or non-contact optical analysis. No expensive optical analysis equipment is needed, the exposed surface of the metal layer under the bumps is against the bumps] Correct judgment: Except for the second measurement of the wafer before the bumps are made = the layer 3 is exposed, whichever is familiar with this technology Any changes and modifications [such as copper pads or Ming pads, etc.] made within the scope of the surface inspection of phase contamination-round welding. The scope of protection of the present invention shall be regarded as the protection of the present invention. Τ is familiar with this museum ": Spirit of Ming: 4 Scope 1227534_; _ Brief Description of the Drawings [Simplified Description of the Drawings] Figure 1: Partial cross-section of the wafer provided by the surface inspection method of the metal layer under the bump according to the present invention Schematic Figure 2 · The surface inspection method of the metal layer under the bump according to the present invention, the wafer is immersed in a molten solder bath. Figure 3 is the surface inspection method of the metal layer under the bump according to the present invention. Schematic diagram of partial cross section of a well-wet wafer and Figure 4 Schematic diagram of partial cross-section of a wafer with poorly wetted solder according to the method for detecting the surface of a metal layer under a bump according to the present invention 〇 Simple explanation of component symbols 10 Wafer 11 Front 12 Back 13 Welding pads 14 Wafer protection layer 20 Under bump metal layer 21 Detection pad 22 Bump bonding pad 30 Organic protective layer 31 Opening hole 32 Opening hole 40 Fresh material 50 Bath 60 Contamination

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Claims (1)

1227534 , ^7'申請專利範圍~" 一~ ' ·— --—^ 【申請專利範圍】 1驟7種凸塊下金屬層之表面檢測方法,其係包含以下步 兮t:7晶圓’該晶圓係具有—正面及-對應之背面, ^面=形成有一凸塊下金屬層〔_〕,該凸塊下金 屬層係包含有至少一顯露之檢測墊;及 提供一熔融銲料於該凸塊下金屬層之檢測墊,藉由該 炼融銲料在該檢測塾之沾附程度,以檢測該凸塊下金屬 層之凸塊結合性。 2、 如申請專利範圍第!項所述之凸塊下金屬.層之表面檢 /則方法,其中在上述提供熔融銲料之步驟中該晶圓之 凸塊下金屬層之檢測墊係被浸潰於一熔融銲料浴槽,龙 於取出該晶圓時,搖晃該晶圓,以排出過餘之熔融銲 料。 3、 如申請專利範圍第1項所述之凸塊下金屬層之表面檢 測方法,其中該晶圓之正面另形成有一有機保護層 〔organic passivation layer〕,以定義該凸塊下金 屬層之檢測塾。 4、 如申請專利範圍第1項所述之凸塊下金屬層之表面檢 測方法,其中該凸塊下金屬層係包含有複數個凸塊接合 塾0 5、 如申請專利範圍第1項所述之凸塊下金屬層之表面檢 測方法,其中該晶圓為一虛晶圓〔dummy wafer〕。 6、 如申請專利範圍第1項所述之凸塊下金屬層之表面檢1227534, ^ 7 'scope of patent application ~ " Ⅰ ~' ·---- ^ [Patent scope of application] 1 step 7 kinds of surface inspection methods of the metal layer under the bump, which includes the following steps: 7 wafers 'The wafer has-a front surface and a corresponding back surface, ^ surface = a metal layer under the bump [_] is formed, the metal layer under the bump includes at least one exposed detection pad; and a molten solder is provided on the The detection pad of the metal layer under the bump uses the adhesion of the melting solder to the detection pad to detect the bump bonding of the metal layer under the bump. 2, such as the scope of patent application! The method for inspecting the surface of the metal under the bump according to the above item, wherein the detection pad of the metal layer under the bump of the wafer in the step of providing molten solder is immersed in a molten solder bath. When the wafer is taken out, the wafer is shaken to discharge excess molten solder. 3. The surface inspection method for the metal layer under the bump as described in item 1 of the scope of the patent application, wherein an additional organic passivation layer is formed on the front side of the wafer to define the detection of the metal layer under the bump. private school. 4. The method for detecting the surface of a metal layer under a bump as described in item 1 of the scope of the patent application, wherein the metal layer under the bump includes a plurality of bump joints. 5. As described in item 1 of the scope of the patent application The surface inspection method of the metal layer under the bump, wherein the wafer is a dummy wafer. 6. Surface inspection of the metal layer under the bump as described in item 1 of the scope of patent application 第11頁 測=法,其中該晶圓係包含—虛晶片〔duln 以供設置該凸塊下金脣層之檢測墊、 lp 7、:種晶圓之表面檢測方法,其係包含以 獒供一晶圓,該晶圓係具有一正面驟丄 該正面係形成有複數個銲墊對j之背面, 提供一熔融銲料於嗜檢、列執=:顯露之檢測墊,·及 ,,沾附程度,以銲銲料在該檢 其二第?所述之晶圓之表面檢測方法, 被浸潰於一炼融銲::之:::出Τ晶圓之檢測塾係 日HI,Μ Φ π Γ枓槽,並於取出該晶圓時,搖晃該 a曰圓f排出過餘之熔融銲料。 9、如申清專利範圍势 其中該晶圓為—虛f7項所述之晶圓之表面檢測方法, ^ 丄冬 施日曰圓〔dummy wafer〕。 0、如吻專利範固第7項所述之晶圓之表面檢測方法, 其中該晶圓係包含〜虛晶片〔dummy chip〕,以供設 置該凸塊下金屬層之檢測整。Test method on page 11, where the wafer contains-dummy wafer [duln for the detection pad for setting the gold lip layer under the bump, lp7: a wafer surface inspection method, which includes A wafer, the wafer has a front surface. The front surface is formed with a plurality of pad pairs j on the back surface, and a molten solder is provided for detection and execution. The extent to which solder is second in the inspection? The method for detecting the surface of a wafer is immersed in a melting and melting bond ::::: The detection of the wafer is based on the HI, M Φ π Γ groove, and when the wafer is taken out, Shake the circle a to f to discharge excess molten solder. 9. As stated in the patent claim, where the wafer is the surface inspection method of the wafer described in item f7, ^ Dong Dong Shi Riyuan [dummy wafer]. 0. The method for surface inspection of a wafer as described in item 7 of the Fan patent, wherein the wafer includes ~ dummy chips for setting the detection layer of the metal layer under the bump.
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