TWI227347B - Liquid crystal display device - Google Patents
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- TWI227347B TWI227347B TW92108284A TW92108284A TWI227347B TW I227347 B TWI227347 B TW I227347B TW 92108284 A TW92108284 A TW 92108284A TW 92108284 A TW92108284 A TW 92108284A TW I227347 B TWI227347 B TW I227347B
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Abstract
Description
1227347 五、發明說明(1) 發明所屬之技術領域 本發明係提供一種液晶顯示裝置(1 i q u i d c r y s t a 1 display device, LCD device),尤指一種可獨立驅動各 驅動積體電路晶片(dr iver I C chip)的液晶顯示裝置。 先前技術 由於液晶顯示裝置具有外型輕薄、耗電量少,以及 無輻射污染等特性,故已被廣泛地應用於筆記型電腦 (notebook)、個人數位助理(PDA)等攜帶式資訊產品中, 乃至於航太及醫療診斷儀器之領域内。 請參考圖一,圖一為習知液晶顯示裝置1 〇的結構示 意圖。如圖一所示,習知的液晶顯示裝置丨〇主要包含有 一液晶顯示面板(L C D p a n e 1 ) 1 2,一閘極驅動電路1 4與一 源極驅動電路1 6,用來驅動液晶顯示面板1 2,以及一訊 號處理電路(signal processing circuit)18,用來輸入 訊號並產生對應的輸出訊號。其中,液晶顯示裝置丨〇另 包含有複數條掃瞄線與複數條資料線(皆未顯示於圖一 中)設於液晶顯示面板丨2的下基板(未顯示於圖一中)上, 閘極驅動電路1 4包含有複數個閘極驅動積體電路晶片, 如14A, 14B, 14C等,分別用來提供一開啟電壓(turn — 〇n vo 11age)至相對應的掃瞄線,源極驅動電路丨6包含有複1227347 V. Description of the invention (1) Technical field to which the invention belongs The present invention provides a liquid crystal display device (1 iquidcrysta 1 display device, LCD device), especially a driver IC chip that can independently drive each driving integrated circuit chip Liquid crystal display device. The prior art has been widely used in portable information products such as notebooks and personal digital assistants (PDAs) due to its characteristics of lightness and thinness, low power consumption, and no radiation pollution. Even in the field of aerospace and medical diagnostic equipment. Please refer to FIG. 1. FIG. 1 is a schematic diagram showing a structure of a conventional liquid crystal display device 10. As shown in FIG. 1, the conventional liquid crystal display device includes a liquid crystal display panel (LCD pane 1) 12, a gate driving circuit 14 and a source driving circuit 16 for driving the liquid crystal display panel. 12 and a signal processing circuit 18 are used to input signals and generate corresponding output signals. The liquid crystal display device includes a plurality of scanning lines and a plurality of data lines (none of which are shown in FIG. 1). The liquid crystal display device is provided on a lower substrate (not shown in FIG. 1) of the liquid crystal display panel. The electrode driving circuit 14 includes a plurality of gate driving integrated circuit chips, such as 14A, 14B, 14C, etc., which are respectively used to provide a turn-on voltage (turn — ON Vo 11age) to the corresponding scanning line, the source electrode. Drive circuit 丨 6 contains complex
第4頁 1227347 五、發明說明(2) 數個源極驅動積體電路晶片’如16A, 16B, 16 C專’分別 用來提供一相對應於一影像訊號之灰階(gray seal e)電 壓至各資料線,而訊號處理電路1 8包含有一時間控制器 (timing controller)20,用來控制閘極驅動積體電路^ 片14A至14C與源極驅動積體電路晶片16A至16C的動作時 序0 為了更清楚了解習知液晶顯示裝置1 0的驅動方式, 故將閘極驅動電路1 4與源極驅動電路1 6的驅動方式分開 說明,以下為源極驅動電路1 6之詳細的驅動方式。仍請 參考圖一,當時間控制器2 0接收到由外界,例如個人電 腦傳來的一水平同步訊號(horizontal synchronizing signal, HSYNC)、一 垂直同步訊號(vertical synchronizing signal, VSYNC),以及一同步時脈訊號 (synchronizing clock,CLOCK)時,訊號處理電路 18會 輸入一由外界傳來的影像資料(i m a g e d a t a ),例如為8位 元(b i t )的三原色(紅綠藍)的數位資料,然後時間控制器 2 0會根據所接收到的這些訊號來輸出一源極初始脈波 (source-driver start pulse,SSP)至源極驅動積體電 路晶片1 6 A,使得源極驅動積體電路晶片1 6 A開始接收由 訊號處理電路18所輸出之紅色影像資料(source —driver image data-red, SDΑΤΑ-R)、綠色影像資料(SDATA-G), 以及藍色影像資料(SD AT A-B),將所接收到的該等影像資 料儲存於源極驅動積體電路晶片1 6 A内。Page 4 1227347 V. Description of the invention (2) Several source-driven integrated circuit chips 'such as 16A, 16B, and 16 C' are used to provide a gray seal e voltage corresponding to an image signal, respectively. To each data line, and the signal processing circuit 18 includes a timing controller 20 for controlling the gate driver integrated circuit ^ chips 14A to 14C and the source driver integrated circuit chip 16A to 16C operation timing 0 In order to understand the driving method of the conventional liquid crystal display device 10 more clearly, the driving methods of the gate driving circuit 14 and the source driving circuit 16 are described separately. The following is a detailed driving method of the source driving circuit 16 . Still refer to FIG. 1. When the time controller 20 receives a horizontal synchronizing signal (HSYNC), a vertical synchronizing signal (VSYNC), and a synchronization from the outside world, such as a personal computer, When the clock signal (synchronizing clock, CLOCK), the signal processing circuit 18 will input image data (imagedata) from the outside, such as 8-bit (bit) three primary colors (red, green and blue) digital data, and then time The controller 20 will output a source-driver start pulse (SSP) to the source driver integrated circuit chip 16 A according to the received signals, so that the source driver integrated circuit chip 1 6 A starts to receive the red image data (source-driver image data-red (SDΑΤΑ-R)), the green image data (SDATA-G), and the blue image data (SD AT AB) output by the signal processing circuit 18. The received image data is stored in the source driver integrated circuit chip 16A.
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五、發明說明(3) :ΐ ί :動積體電路晶片i6A内部的 方式將源極初始脈波SSPH專送至下二=f,則以串聯的 晶片16B,以驅動源極驅動積體電路晶原極二動J =: 極驅動積體電路晶片1 6B繼續抓取影像直至^極' == = = 内Λ的緩衝記憶心後== i砬Μ眚枓耷Λ # 此動作將重覆直到一條水 屮^源極驅動積體電路為止,之後 另i Ϊ料乂別:久t I说至所有之源極驅動積體電路, 衫像貝枓刀別自各驅動積體電路晶片之 至内部的複數個閂鎖5| (丨a tch 緩衝5己憶體轉移 存,接荖爯伊嫱、士况二C t h,未顯不於圖一中)内鎖 2,接者再依據被鎖存之影像資料依 ==内二的一數位類比轉換器= 利1該數位類比轉換器將數位 :最灸 :號,並輸出至液晶顯示面板12,以驅=== 液晶顯示裝置10之閘極驅動電路14的 :述。當時間控制$ 20接收到由外界傳來的 谠、垂直同步訊號,以及同步時脈訊號 ^理 路18會產生-控制訊號並傳送至時間控;器V. Explanation of the invention (3): ΐ ί: The internal method of the dynamic integrated circuit chip i6A sends the source initial pulse SSPH to the next two = f, then the chip 16B in series is used to drive the source to drive the integrated circuit Jingyuan pole second action J =: pole drive integrated circuit chip 1 6B continues to capture images until ^ pole '== = = after the internal memory buffer = = i 砬 Μ 眚 枓 耷 Λ # This action will be repeated Until a water source is driven by the integrated circuit, then I ’ll tell you: I ’ll say that all the source driven circuits are from the source to the inside of each driver integrated circuit chip. Of multiple latches 5 | (丨 a tch buffer 5 has been transferred to the memory, followed by Yi Yi, Shi Cong II C th, not shown in Figure 1) internal lock 2, the receiver is then latched according to The image data according to == a digital analog converter of the inner two = Lee 1 The digital analog converter converts the number: the most moxibustion: number, and outputs it to the liquid crystal display panel 12 to drive === the gate of the liquid crystal display device 10 The drive circuit 14 is described. When the time control $ 20 receives the 谠, vertical synchronization signal, and synchronization clock signal from the outside ^ Management Road 18 will generate a -control signal and send it to the time control;
1227347 五、發明說明(4) 間控制器2 0會根據所接收到的這些訊號來輸出一閘極初 始脈波GSP至閘極驅動積體電路晶片1 4A,使得閘極驅動 積體電路晶片1 4 A開始接收該控制訊號,並閂鎖於内部之 位移暫存器中,在閘極驅動積體電路中, 位移暫存器 之每一個位元對應到一輸出,當相對應之位元内之資料 為1時,則該輸出為高電壓,資料為0時,輸出為低電 壓,高電壓可使液晶面板中的開關元件(TFT)開啟,低電 壓則關閉開關元件,以此來選擇適當的畫素,以寫入正 確之信號。閘極驅動積體電路中之位移暫存器資料會隨 輸入c 1 ock而位移。當此初始脈波移至最後一個位元時, 會將閘極初始脈波GSP1以串聯的方式傳送至下一閘極驅 動積體電路晶片14B,重複上述步驟至所有的閘極驅動積 體電路晶片 由上可知,習知液晶顯示裝置1 0的閘極驅動積體電 路晶片14A至14C與源極驅動積體電路晶片16A至16C皆為 串接的方式相連接,利用串聯方式傳送初始脈波的液晶 顯示裝置,當其中一顆驅動積體電路晶片無法正常動作 時,便會導致初始脈波無法順利地傳送至後續的驅動積 體電路晶片,使得後續的驅動積體電路晶片無法正常運 作,造成液晶顯示面板的顯示異常,這對於一些重視安 全性的應用,例如飛機駕駛艙面板而言是非常危險的。 發明内容1227347 V. Description of the invention (4) The controller 20 will output a gate initial pulse GSP to the gate drive integrated circuit chip 1 4A according to the received signals, so that the gate drive integrated circuit chip 1 4 A begins to receive the control signal and latches in the internal displacement register. In the gate drive integrated circuit, each bit of the displacement register corresponds to an output. When the corresponding bit is in the corresponding bit, When the data is 1, the output is high voltage. When the data is 0, the output is low voltage. The high voltage can turn on the switching element (TFT) in the LCD panel, and the low voltage turns off the switching element. Pixels to write the correct signal. The shift register data in the gate drive integrated circuit will shift with the input c 1 ock. When this initial pulse wave moves to the last bit, the gate initial pulse wave GSP1 is transmitted in series to the next gate drive integrated circuit chip 14B, and the above steps are repeated to all the gate drive integrated circuit chips. The chip can be seen from the above. The gate drive integrated circuit wafers 14A to 14C of the conventional liquid crystal display device 10 and the source drive integrated circuit wafers 16A to 16C are connected in series, and the initial pulse wave is transmitted in series. For a liquid crystal display device, when one of the driving integrated circuit chips fails to operate normally, the initial pulse wave cannot be smoothly transmitted to the subsequent driving integrated circuit chip, so that the subsequent driving integrated circuit chip cannot operate normally. Causes abnormal display of the LCD panel, which is very dangerous for some safety-critical applications, such as aircraft cockpit panels. Summary of the Invention
1227347 五、發明說明(5) 因此本發明的目的在於提供一種液晶顯示裝置,以 解決上述問題。 依據本發明之目的,本發明的較佳實施例係提供一 種液晶顯示裝置,其主要包含有一液晶顯示面板,複數 個驅動積體電路晶片,以及一時序控制器分別電連接於 各該驅動積體電路晶片,用來依照一時序輸出一相對應 的初始脈波至各該驅動積體電路晶片。 由於本發明之液晶顯示面板主要是利用該時間控制 器來分別輸出不同的初始脈波至各該驅動積體電路晶 片,因此可獨立驅動各該驅動積體電路晶片,使得當部 分驅動積體電路晶片失效時,不至於影響到其他驅動積 體電路晶片的運作。 實施方式 請參考圖二與圖三,圖二為本發明第一實施例之液 晶顯不裝置3 0的結構不意圖’圖二為圖一之源極初始脈 波(SSP)的時序圖。如圖二所示,本發明之液晶顯示裝置 3 0主要包含有一液晶顯示面板3 2,一閘極驅動電路3 4與 一源極驅動電路3 6,用來驅動液晶顯示面板3 2,以及一 訊號處理電路3 8,用來輸入訊號並產生對應的輸出訊1227347 V. Description of the invention (5) Therefore, an object of the present invention is to provide a liquid crystal display device to solve the above problems. According to the purpose of the present invention, a preferred embodiment of the present invention is to provide a liquid crystal display device, which mainly includes a liquid crystal display panel, a plurality of driving integrated circuit chips, and a timing controller respectively electrically connected to the driving integrated bodies. The circuit chip is used to output a corresponding initial pulse wave to each of the driving integrated circuit chip according to a timing. Since the liquid crystal display panel of the present invention mainly uses the time controller to output different initial pulse waves to each of the driving integrated circuit chips separately, each of the driving integrated circuit chips can be driven independently, so that when the integrated circuit is partially driven When the chip fails, it will not affect the operation of other driving integrated circuit chips. Embodiments Please refer to FIG. 2 and FIG. 3. FIG. 2 is a schematic diagram of the structure of the liquid crystal display device 30 according to the first embodiment of the present invention. FIG. 2 is a timing diagram of the source initial pulse wave (SSP) of FIG. As shown in FIG. 2, the liquid crystal display device 30 of the present invention mainly includes a liquid crystal display panel 32, a gate driving circuit 34 and a source driving circuit 36 for driving the liquid crystal display panel 32, and a Signal processing circuit 38, used for inputting signals and generating corresponding output signals
第8頁 1227347 五、發明說明(6) 號0 一般而言,大尺寸的液晶顯示面板通常需要利用多 顆閘極驅動積體電路晶片與源極驅動積體電路晶片來驅 動,因此在本發明之最佳實施例中,若以液晶顯示面板 3 2之顯示區域具有7 6 8 X 1 0 2 4個顯示單元為例,則本發明 之液晶顯示裝置3 0另包含有7 6 8條掃瞄線與1 〇 2 4x3條資料 線(皆未顯示於圖二十)設於液晶顯示面板32的下基板(未 顯示於圖二中)上,並以閘極驅動電路3 4包含有4個閘極 驅動積體電路晶片34A, 34B, 34C, 34D,其分別用來輸 出一開關/定址訊號至相對應的掃描線(亦即每一問極驅 動積體電路晶片分別控制1 9 2 ( 7 6 8 / 4 = 1 9 2 )條掃描線),、 源極驅動電路3 6包含有8個源極驅動積體電路晶片3 6人以 36Β, 36C, 36D, 36Ε, 36F, 36G,36Η,其分別用來輪; 一影像資料訊號至相對應訊號線(每一源極驅動積體^ 晶片控制1 2 8 X 3 = 3 8 4條資料線)為例來說明本發明的精路 神。值得注意的是,本發明之訊號處理電路3 8另包^有 一時間控制器4 0分別電連接於各閘極驅動積體電路I 34Α至3 4D與各源極驅動積體電路晶片36Α至36Η,用&仿 照一時序輸出一相對應的閘極初始脈波至各閘極驅動^ 體電路晶片3 4 A至3 4 D ’並依序輸出一相對應的源極初私 脈波至各源極驅動積體電路晶片3 6 A至3 6 Η。 σ 此外’在本發明之最佳實施例中,閘極驅動積體電Page 8 1227347 V. Description of the invention (6) No. 0 Generally speaking, large-size liquid crystal display panels usually need to be driven by multiple gate-drive integrated circuit chips and source-drive integrated circuit chips. In a preferred embodiment, if the display area of the liquid crystal display panel 32 is provided with 7 6 8 X 10 2 display units as an example, the liquid crystal display device 30 of the present invention further includes 7 6 8 scans. Line and 10 2 4x3 data lines (all not shown in FIG. 20) are provided on the lower substrate (not shown in FIG. 2) of the liquid crystal display panel 32, and the gate driving circuit 34 includes 4 gates The electrode drive integrated circuit chips 34A, 34B, 34C, 34D are used to output a switch / addressing signal to the corresponding scanning line (that is, each of the electrode drive integrated circuit chips controls 1 9 2 (7 6 8/4 = 1 9 2) scan lines), and the source driving circuit 36 includes 8 source driving integrated circuit chips 36 people with 36B, 36C, 36D, 36E, 36F, 36G, 36Η, which They are used to round; one image data signal to the corresponding signal line (each source driver product Controlling wafer ^ 1 2 8 X 3 = 3 8 4 of data lines) will be explained as an example of the present invention LuShen fine. It is worth noting that the signal processing circuit 38 of the present invention also includes a time controller 40 which is electrically connected to each gate driving integrated circuit I 34A to 3 4D and each source driving integrated circuit chip 36A to 36Η. , Use & to output a corresponding gate initial pulse wave to each gate driver according to a timing sequence ^ body circuit chip 3 4 A to 3 4 D 'and output a corresponding source initial private pulse wave to each The source driver integrated circuit wafers 3 6 A to 3 6 Η. σ In addition, in the preferred embodiment of the present invention, the gate
1227347 五、發明說明(7) 路晶片34A至34D與源極驅動積體電路晶片36A至36Η可設 於一捲帶式封裝體(tape carrier package, TCP,未顯 示於圖二中)上,且該捲帶式封裝體同時電連接於一印刷 電路板(未顯示於圖二中),使得閘極驅動積體電路晶片 34A至34D與源極驅動積體電路晶片36A至36H可利用該捲 帶式封裝體分別電連接於液晶顯示面板3 2上相對應的掃 描線與資料線,因此來自該印刷電路板的控制訊號可以 經由捲帶式封裝體分別傳送至各驅動積體電路晶片後, 再將經過處理的訊號輸入液晶顯示面板。然本發明並不 侷限於此,本發明之閘極驅動積體電路晶片34A至34D與 源極驅動積體電路晶片36A至36H亦可以利用覆晶薄膜 (chip on film,COF)、覆晶玻璃(chip 〇n glass, COG),或是WOA(wiring on array)的封裝方式,以異方 性導電膜(anisotropic conductive fiim,ACF)將問極 驅動積體電路晶片34A至34D與源極驅動積體電路晶片36A 至36Η黏著於軟性印刷電路(flexible printed circuit, F P C )板或液晶顯示面板的下基板(皆未顯示於圖二中) 上,以降低製作成本並增加產品可靠度。 接著如圖二與圖三所示,當本發明之液晶顯示裝置 3 0的時間控制器4 0接收到一水平同步訊號、一垂直同步 訊號,以及一同步時脈訊號時,訊號處理電路3 8會輸入 一影像資料’例如為8位元的RGB三原色的數位資料,然 後時間控制器40會分別輸出8個不同的源極初始脈波SSP11227347 V. Description of the invention (7) The wafers 34A to 34D and the source driver integrated circuit wafers 36A to 36Η can be set on a tape carrier package (TCP, not shown in Figure 2), and The tape and reel package is electrically connected to a printed circuit board (not shown in FIG. 2) at the same time, so that the gate drive integrated circuit wafers 34A to 34D and the source drive integrated circuit wafers 36A to 36H can utilize the tape The package is electrically connected to the corresponding scanning lines and data lines on the liquid crystal display panel 32, so the control signals from the printed circuit board can be transmitted to the driving integrated circuit chips through the tape and reel package, respectively. Input the processed signal to the LCD panel. However, the present invention is not limited to this. The gate driving integrated circuit wafers 34A to 34D and the source driving integrated circuit wafers 36A to 36H of the present invention can also use chip on film (COF) and crystal on glass. (Chip on glass, COG), or WOA (wiring on array) packaging, anisotropic conductive film (anisotropic conductive fiim (ACF)) The body circuit wafers 36A to 36Η are adhered to a flexible printed circuit (FPC) board or a lower substrate of a liquid crystal display panel (none of which is shown in FIG. 2) to reduce manufacturing costs and increase product reliability. Then, as shown in FIGS. 2 and 3, when the time controller 40 of the liquid crystal display device 30 of the present invention receives a horizontal synchronization signal, a vertical synchronization signal, and a synchronous clock signal, the signal processing circuit 38 Will input an image data ', for example, 8-bit RGB digital data of three primary colors, and then the time controller 40 will output 8 different source initial pulse waves SSP1, respectively.
第10頁 1227347Page 10 1227347
至SSP8至相對雁&、広Λ 得各源極驅動積體電路晶片36Α至36Η,使 路38所輸出之景彡像=1 至36Η開始接收由訊號處理電 (其中如圖三所^干的貝=SDATA_R’ SDATA~G,SDATA-B’ 取影像資料,Η矣表不源極驅動積體電路晶片36雔讀 像資料,、以此_ ^不源極驅動積體電路晶片36^讀取影 SDATA ρ s τ、推),並將所接收到的影像資料SDATA-R, 顯示於圖’二中),各自儲存於其内部的緩衝記憶體中(未 "''^7 ,之後時間控制器將輸入一信號至所有的From SSP8 to relative geese & 広 Λ, each source drives integrated circuit chips 36A to 36Η, so that the scene image output from Road 38 = 1 to 36Η begins to receive signal processing electricity (which is shown in Figure 3). Be = SDATA_R 'SDATA ~ G, SDATA-B' take image data, which means that the source drive integrated circuit chip 36 reads the image data, so _ ^ source does not drive the integrated circuit chip 36 ^ read Take the image SDATA ρ s τ, push), and the received image data SDATA-R, shown in Figure '2), each stored in its internal buffer memory (not "' '^ 7, after that The time controller will input a signal to all
ίΛ Λ 電路晶片^至36H内部的複數個問鎖器 /、々不;田一中)内鎖存,再依據被鎖存之影像資料輸 各一源極驅動積體電路晶片36Α至36Η内部一 D/A轉換器 ft不^於&圖一中)中,最後利用該D/A轉換器將數位影像 貝料轉換為類比電壓訊號,並輸出至液晶顯示面板32, 以分別驅動相對應的資料線。 此外,σ在時間控制器40輸出源極初始脈波的同時, 時間控制器40也會根據所接收到的這些訊號分別輸出_ 不同的閘極初始脈波GSP1至GSP4至相對應的閘極驅動積 體電路晶片34A至34D,以分別驅動閘極驅動積體電路晶 片34A至34D’使得閘極驅動積體電路晶片34a至34D會開 始接收由訊號處理電路3 8所輸出的控制訊號,然後再將 這些控制訊號分別輸出至液晶顯示面板3 2,以依序開啟 與關閉相對應掃瞄線上的閘極電極(未顯示於圖二中)。ίΛ Λ Circuit latches ^ to 36H are internally latched by a plurality of interlocks, and not; Tian Yizhong) are latched, and each source driver integrated circuit chip 36Α to 36Η is internally D / according to the latched image data. A converter ft is not used in & Figure 1). Finally, the D / A converter is used to convert digital image materials into analog voltage signals and output them to the liquid crystal display panel 32 to drive the corresponding data lines. . In addition, while the time controller 40 outputs the source initial pulse, the time controller 40 will also output the different initial gate pulses GSP1 to GSP4 to the corresponding gate drivers according to the received signals. Integrated circuit chips 34A to 34D to drive the gate drive integrated circuit chips 34A to 34D ', respectively, so that the gate drive integrated circuit chips 34a to 34D will start to receive the control signals output by the signal processing circuit 38, and then These control signals are respectively output to the liquid crystal display panel 32 to sequentially turn on and off the gate electrodes on the corresponding scanning lines (not shown in FIG. 2).
1227347 接著请參考圖四與圖五,圖四為本發明第二實施例 之液晶顯不裝置5 〇的結構示意圖,圖五為圖四之源極初 始脈波(SSP)的時序圖。為了要減少液晶顯示裝置之電路 之複雜度’並達到降低製程成本的目的,如圖四所示, 本發明之液晶顯示裝置5 0同樣包含有一液晶顯示面板 50’ 4個閘極驅動積體電路晶片54A, 54B, 54C, 54D,8 個源極驅動積體電路晶片56A, 56B, 56C, 56D, 56E, 56F,56G,56H,以及一訊號處理電路58,且訊號處理電 路5 8另包含有一時間控制器6 0分別電連接於閘極驅動積 體電路晶片54A與54C,並同時電連接於各源極驅動積體 電路晶片56A, 56C, 56E, 56G,而閘極驅動積體電路晶 片54A與54C則另分別串接於閘極驅動積體電路晶片54B與 54D,源極驅動積體電路晶片56A, 56C, 56E, 56G另分別 串接於源極驅動積體電路晶片56B, 56D, 56F, 56H。 因此當時間控制器6 0接收到一水平同步訊號、一垂 直同步訊號,以及一同步時脈訊號時,時間控制器6 0會 分別輸出2個不同的閘極初始脈波GSP1與GSP2至相對應的 閘極驅動積體電路晶片54 A與5 4 C ’並分別輸出4個不同 的源極初始脈波SSP1至SSP4至相對應的源極驅動積體電 路晶片56A, 56C, 56E, 56G,然後閘極驅動積體電路晶 片54A與54C會再輸出不同的閘極初始脈波GSP3與GSP4至 相對應的閘極驅動積體電路晶片54B與54D,而源極驅動1227347 Please refer to FIG. 4 and FIG. 5. FIG. 4 is a schematic structural diagram of a liquid crystal display device 50 according to the second embodiment of the present invention. FIG. 5 is a timing diagram of the source initial pulse wave (SSP) of FIG. In order to reduce the complexity of the circuit of the liquid crystal display device and achieve the purpose of reducing the manufacturing cost, as shown in FIG. 4, the liquid crystal display device 50 of the present invention also includes a liquid crystal display panel 50 'and four gate driving integrated circuits. Chips 54A, 54B, 54C, 54D, 8 source driver integrated circuit chips 56A, 56B, 56C, 56D, 56E, 56F, 56G, 56H, and a signal processing circuit 58, and the signal processing circuit 5 8 also includes a The time controller 60 is electrically connected to the gate driver integrated circuit chips 54A and 54C, respectively, and is also electrically connected to each of the source driver integrated circuit chips 56A, 56C, 56E, 56G, and the gate driver integrated circuit chip 54A. And 54C are connected in series to the gate drive integrated circuit chips 54B and 54D, respectively, and the source drive integrated circuit chips 56A, 56C, 56E, 56G are respectively connected in series to the source drive integrated circuit chips 56B, 56D, 56F , 56H. Therefore, when the time controller 60 receives a horizontal synchronization signal, a vertical synchronization signal, and a synchronization clock signal, the time controller 60 will output two different gate initial pulses GSP1 and GSP2 respectively. Gate driver IC chip 54 A and 5 4 C 'and output 4 different source initial pulse waves SSP1 to SSP4 to the corresponding source driver IC chip 56A, 56C, 56E, 56G, and then The gate driving integrated circuit chips 54A and 54C will output different gate initial pulses GSP3 and GSP4 to the corresponding gate driving integrated circuit chips 54B and 54D, and the source driving
第12頁 1227347 五、發明說明(ίο) 積體電路晶片56A, 56C, 56E, 56G會再輸出不同的源極 初始脈波SSP5至SSP8至相對應的源極驅動積體電路晶片 56B, 56D, 56F, 56H,如圖五所示(其中Γ表示源極驅動 積體電路晶片56 A在讀取影像貧料’ I I表不源極驅動積 體電路晶片5 6B在讀取影像資料,以此類推)。 簡言之,本發明之液晶顯示裝置主要是利用時間控 制器來分別輸出不同的閘極初始脈波至各閘極驅動積體 電路晶片,並同時輸出不同的源極初始脈波至各源極驅 動體電路晶片,使得本發明之各閘極與源極驅動積體電 路晶片為獨立驅動,因此當部分閘極或源極驅動積體電 路晶片失效時,並不會影響到其他驅動積體電路晶片的 運作。 以上所述僅為本發明之較佳實施例,凡依本發明申 請專利範圍所做之均等變化與修飾,皆應屬本發明專利 之涵蓋範圍。Page 121227347 V. Description of the Invention (Integrated Circuit Chips 56A, 56C, 56E, 56G will output different source initial pulses SSP5 to SSP8 to the corresponding source-driven integrated circuit chips 56B, 56D, 56F, 56H, as shown in Figure 5 (where Γ indicates that the source driver integrated circuit chip 56 A is reading the image lean material 'II indicates that the source driver integrated circuit chip 5 6B is reading the image data, and so on ). In short, the liquid crystal display device of the present invention mainly uses a time controller to output different gate initial pulse waves to each gate driving integrated circuit chip, and simultaneously output different source initial pulse waves to each source. The driver circuit chip makes each gate and source driver integrated circuit chip of the present invention be independently driven, so when some gate or source driver integrated circuit chips fail, it will not affect other driver integrated circuits. The operation of the chip. The above description is only a preferred embodiment of the present invention, and any equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the patent of the present invention.
第13頁 1227347 圖式簡單說明 圖式之簡單說明 圖一為習知液晶顯示裝置的結構示意圖。 圖二為本發明第一實施例之液晶顯示裝置的結構示 意圖。 圖三為圖二之源極初始脈波的時序圖。 圖四為本發明第二實施例之液晶顯示裝置的結構示 意圖。 圖五為圖四之源極初始脈波的時序圖。 圖式之符號說明 10 液晶顯示裝置 12 液晶顯示面板 14 閘極驅動電路 16 源極驅動電路 14A, 14B, 14C 閘極驅動積體電路晶片 1 6 A, 1 6 B, 1 6 C 源極驅動積體電路晶片Page 13 1227347 Brief description of the drawings Brief description of the drawings Figure 1 is a schematic diagram of a conventional liquid crystal display device. FIG. 2 is a schematic structural view of a liquid crystal display device according to a first embodiment of the present invention. FIG. 3 is a timing diagram of the initial pulse wave of the source in FIG. 2. FIG. 4 is a schematic structural view of a liquid crystal display device according to a second embodiment of the present invention. FIG. 5 is a timing diagram of the initial pulse wave of the source in FIG. 4. Description of Symbols 10 Liquid crystal display device 12 Liquid crystal display panel 14 Gate drive circuit 16 Source drive circuit 14A, 14B, 14C Gate drive integrated circuit chip 1 6 A, 1 6 B, 1 6 C Source drive product Body Circuit Chip
第14頁 18 訊號處 理電路 20 時 間 控 制 器 30 液晶顯 示裝置 32 液 晶 顯 示 面 板 34 閘極驅 動電路 36 源 極 驅 動 電 路 34A, 34B, 34C, 34D 閘極驅 動 積 體 電 路 晶 片 36A, 36B, 36C, 36D, 源極驅 動 積 體 電 路 晶 片 34E, 36F, 36G, 36H 38 訊號處 理電路 40 時 間 控 制 器 50 液晶顯 示裝置 52 液 晶 顯 示 面 板 1227347Page 14 18 Signal processing circuit 20 Time controller 30 Liquid crystal display device 32 Liquid crystal display panel 34 Gate driving circuit 36 Source driving circuit 34A, 34B, 34C, 34D Gate driving integrated circuit chip 36A, 36B, 36C, 36D , Source drive integrated circuit chip 34E, 36F, 36G, 36H 38 Signal processing circuit 40 Time controller 50 Liquid crystal display device 52 Liquid crystal display panel 1227347
第15頁Page 15
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