TWI226531B - Computer debugging device and method - Google Patents

Abstract

The present invention provides a computer debugging device and method. The method is performed via a device. The device is configured with a first computer. The first computer is provided with a BIOS ROM. The system includes a loader. The first computer can be serially connected to a second computer via a connection port. When the first computer is crushed, the system of the first computer automatically executes the loader to generate a message of connecting to the second computer. When the connection is successful, the second computer transmits an access program code to the DRAM of the first computer so that the first computer is able to connect to the second computer to perform debugging with the debugging program in the second computer. Accordingly, it is able to achieve the purpose of debugging while maintaining the crushing environment status without replacing the BIOS ROM and disassembling the computer.

Description

1226531 V. Description of the invention (1) The technical field to which the invention belongs: The present invention is a computer debugging device and method, which is mainly a message that will automatically generate a connection when it crashes, so that the crash system can communicate with the outside world. The system is connected and debugged by the debugging system of the external system. Prior technology: Press, generally known as the computer system debugging system, including the following: 1. Plug in the central processing unit of the standby system motherboard On the socket of a storage-type control unit.彳 Shell wrong course 2. Insert the socket of the control unit on the socket of the system motherboard. Controller 3. Start the control unit to debug the system's motherboard. However, the above method can only be used for water heaters below a certain speed. At present, the speed of central processor development has been changing and processing central processing. If the speed of the controller is changed, the above method cannot be applied. However, because the number of jacks on the socket of the control unit is fixed. Even if the middle seat cannot be used, not to mention, because the processor must be plugged in, it is necessary to remove the boot to achieve the purpose of debugging. There is no other way of debugging in operation, which is mainly provided by a first computer on a divider system. The first computer contains a processor, and the memory system is used to store a target program. Memory and an instruction service program, and the processor is used to execute the memory and interrupt program; page 1226531, invention description (2) and a key interrupt instruction; the first computer is electrically connected to the The second computer has a debugging program in its memory for debugging the first computer; when the processor of the first computer is in the running state, the switch on the first computer is electrically connected to the processor for generating a The pre-determined level will result in the execution of a designated designation. The interruption of the pre-determined interruption after the switch is touched and the touch-control switch cannot be guaranteed. Stay here to interrupt the instructions to make the service brain debug game for debugging. Although avoidance, the cone will generate / the target program and thus enter a crash button switch is triggered, the button is turned on, so that the first power On the processor start type, and the interrupt instruction service program is connected by force, so that the debug program can avoid the process of disassembly, but it must start the debug action by pressing, and the interrupt instruction determined by the key, The possibility of losing data due to a crashed execution program. SUMMARY OF THE INVENTION In view of the above-mentioned defects in the traditional Dento recording, the present method and method. The invention provides a computer debugging service. It is an object of the present invention to provide a device for debugging an electronic device. The device includes a first device. The first device contains a basic input / output system (BIOS ROM). The system includes a DAU and a loader (L0ader), and the first-timer contains a memory, a central processing unit, and the first factory-timer, and is connected to the second electricality through a port, so that First computer

1226531

V. Description of the invention (3) When the machine is in a crash state, the system of the first computer will automatically execute the loader (Loader) to generate a message connected to the second computer, so that the second computer is connected to the first computer 'Furthermore, a second computer can be connected and debugged in cooperation with a debugging program in the second computer. In this way, the operation of debugging can be performed without disassembling the machine and without triggering by pressing a button. Another object of the present invention is to provide a computer debugging method. When the first computer enters the down state, the first computer will automatically load a loader included in the basic input / output system. ) Is executed to generate a message connecting with the second computer, and when the connection is successful, the second computer will send an access code to the memory (Dram) of the first computer, so that the first computer can Debugging is performed by the debugging program in the second computer. In this way, not only does the machine need to be disassembled, but the state of the downtime environment can be maintained, and the basic input / output system (BIOS ROM) does not need to be replaced. Object Another object of the present invention is to provide a method for debugging a computer. When the first computer system generates a connection message, the first computer system checks whether the communication port of the first computer is connected to the second computer. The communication ports are connected. If the connection has not been successful, the system will restart after a period of time. Another object of the present invention is to provide a method for debugging a computer. When the communication port of the first computer and the communication port of the second computer are successfully connected, the first computer system will further check whether the second computer is normal. Operation, if the first computer is always off, then after a period of time, the system will perform a reset (Restart) action.

Page 7 1226531 V. Description of the invention (4) A second object of the present invention is to provide a method for debugging a computer. When the first computer, the brain and the second computer are connected, in addition to debugging, In addition, the second computer may issue a designated interrupt service routine to cause the second computer system to transmit an access code and place it in a memory (DRAM) in the first computer, thereby automatically updating the first computer. This action enables the second computer to complete the task of updating the program in addition to completing the debugging work. Implementation:

The present invention is a computer debugging device. Please refer to FIG. 1. The device includes a first computer 10, which is called a target system in this embodiment. The first computer 10 contains a basic input / output system. (BIOS ROM) 100. The basic input / output system (BIOS ROM) 100 includes a loader 110. The loader is a program, and the program is stored in the basic input in advance. / Output system (BIOS ROM) 1 00. The first computer 10 is electrically connected to a second computer 20 (referred to as an external system in this embodiment) through a port 11 (a serial or parallel port in this embodiment). In this embodiment, the second computer 20 is connected to the first computer 10 through a connection cable 21, and a debugging program is stored in the second computer 20. In addition, the first computer 10 further includes a hard disk 120, a memory (DRAM) 130, and a central processing unit 140.

In order to make the first computer enter a crash state, the basic input / roll-out system (BIOS ROM) 100 of the first computer will automatically load the loader 110 into the memory 130 and pass the central processing unit 140 executes it to generate a message connected to the second computer 20, and when the second computer 20 and the first computer 20

Page 8 1226531 V. Description of the invention (5) When the brain 10 is connected successfully, the second computer 20 will send a code (code) to the memory (DRAM) 130 of the first computer 10, so that the first computer 10 The system of one computer 10 can be connected to the system of the second computer 20, so that the second computer can be connected and debugged with the debugging program in the second computer. In this way, not only does the machine need to be disassembled, but also does not need to be passive. Mode, you can automatically perform the debugging action. Please refer to FIG. 1 and FIG. 2. After passing through the aforementioned device, the present invention can operate according to the following steps:

When the basic input / output system (BIOS ROM) 100 or the application operating system (AP) of the first computer 10 enters the down state and an error message is generated, the basic input / output system of the first computer 10 ( BIOs ROM) 100 will automatically load the loader contained in it into the memory (DRAM) 1 30 and execute it, so that the basic input / output system (BIOS ROM) 100 generates a A message connected to the second computer 20; when the basic input / output system (BIOS ROM) 100 generates a message connected to the second computer 20, the first computer 10 system will detect the first computer 10 Whether the communication port of the second computer 20 is connected to the communication port of the second computer 20. If the connection is not successful, the system of the first computer 10 will reset after a period of time; such as the communication port of the first computer The connection to the communication port of the second computer is successful. The first computer 10 system will further check whether the second computer 20 is operating normally. If the second computer 20 is directly in the shutdown state, the system will Perform the reset operation. When the connection is successful and the second computer 20 is also in a normal operating state, the second computer 20 sends an access code (in this embodiment, it is a binary)

1226531 V. Description of the invention (6) Access binary code) into the memory (DRAM) 130 of the first computer 10, so that the first computer can be connected to the second computer and cooperate with the second computer 20 The debugging program in this chapter is used for debugging. In this way, not only does the machine need to be disassembled, but the machine can be kept in a down state, and the basic input / output system (BIOS ROM) does not need to be replaced to achieve the purpose of debugging. Please refer to Figures 1 and 3, when the first computer 10 and the second computer 20 are connected, in addition to the automatic debugging, the second computer 20 can also issue a designated interrupt service. Program (in this embodiment, IRQ, SMI, or NMI instructions), which causes the second computer 20 system to transmit an access code (in this embodiment, an access binary code) to the first computer 10 In the memory (DRAM) 130, the first computer 10 can execute the access code and automatically update the program on the first computer 10, so that the second computer can complete the update program in addition to completing the debugging work. Work. In summary, the computer debugging device and method of the present invention can not only improve the various shortcomings of conventional technology, but also improve the efficiency in use. It is practical and fully meets the requirements of the invention patent. It is an ideal The applicant filed in accordance with the provisions of the Patent Law. The Xiao Xiao Bureau proposed and requested that the patent in this case be granted as soon as possible. Profit-seeking Application Page 10 1226531 Brief Description of Drawings Figure 1 ... This is a schematic diagram of the device of the present invention. Fig. 2: Schematic diagram of the process when debugging according to the present invention. Figure 3: Schematic diagram of the process of updating the program according to the present invention. Description of drawing numbers of main components:

Page 11 First Computer 10 Second Computer 20 Basic Input / Output System (BIOS) 100 Loader 110 Hard Disk 120 Memory 130 Central Processing Unit 140

Claims (1)

1226531 VI. Scope of patent application I A computer debugging device, which includes a first computer 'which includes: a BIOS ROM (Basic Rotation / Output System), which uses a memory to store pending execution The program, "processor" is used to execute the light type in the memory boat; and = = connected to the first computer, its memory has a debug program to debug the first computer, and "make the first computer When entering the crash state, the first electric γ = α a) is executed to generate a connection with the second electric teng :: = = the first computer is connected, and the second electric tenth is used. The wrong method, the method includes the following steps: When the first computer enters the down state, the first computer will automatically load the loader (L0ader) included in the basic input / output system into the system, and It is executed to generate a message connecting with the second computer; when the connection is successful, the second computer will send an access code to the memory of the first computer, so that the first computer can pass the access program Code to connect to the second computer and cooperate with the second computer The debugging program in the brain performs debugging 0 3 · As described in the method of patent application No. 2 a method of computer debugging, when the first computer system generates a connection message, the first computer system will check the first Whether the communication port of one computer is connected to the communication port of the second computer. If the connection has not been successful, the system will Page 12 1226531 VI. Scope of patent application for reset 4. If applied, please first computer to check the shutdown operation in one step. 5. If applying for exclusive access program 6. If applying for exclusive binary code 7. If applying for exclusive first computer, the second electrical body, and further 8. If applying for exclusive interruption of service 9. If applying for exclusive interruption of service action. A method of computer debugging described in item 2 of the profit scope. When the connection with the second computer is successful, the first computer system will check whether the second computer is operating normally. After a period of time, the system will reset a computer debugging method code described in item 2 of the profit range, which can be a binary code. A computer debugging method described in item 5 of the profit scope is access binary code. A computer debugging method described in item 2 of the profit scope is connected to the second computer, except that the second debugging can be performed. The computer can issue a designated interrupt service program, so that the brain system sends an access code to the memory in the first computer to automatically update the program on the first computer. Β Scope of computer debugging described in item 7 Method, whose program can be IRQ, SMI. A method of computer debugging described in item 7 of the scope of interest, whose program can be NMI. '' Its p. 13