TWI226530B - Method of reducing power consumption in processing unit - Google Patents
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1226530 五、發明說明(1) 發明所屬之技術領域 本發明是有關於一種減少電腦系統耗用能源的方法, 且特別是有關於一種減少電腦系統中處理器耗用能源的技 術。 先前技術 近年來隨著積體電路(Integrated Circuit,IC)晶片 之内部線路的積集度(I n t e g r a t i ο η )不斷地增高,電腦系 統中所包含之中央處理器(Central Processing Unit, CPU)、北橋晶片及繪圖晶片等積體電路(Integrated Circuit,1C)晶片的運作速度也隨之向上攀升。如此一 來,導致電腦系統内部之發熱功率不斷升高,為了預防電H 腦系統内部之積體電路晶片過熱,使積體電路晶片產生暫_ 時性甚或是永久性的失效,因此在電腦系統中提供足夠的 散熱功能變得非常重要。以擁有電腦系統中主腦(B r a i η ) 美名之中央處理器為例,中央處理器在高速運作之下,當 中央處理器本身的溫度超出其正常的工作溫度範圍時,中 央處理器極有可能會發生運算錯誤,或是暫時性地失效, 如此將導致電腦系統故障(Crash )。此外甚至極有可能損 壞中央處理器晶片之内部的電晶體,因而導致中央處理器 產生物理性地永久失效,而不得不更換中央處理器,才能 恢復電腦系統正常作業。 為了有效地降低積體電路晶片於運作時產生大量熱能φ 所造成之損害,除了在電腦系統之主機機殼内部加裝散熱 風扇,用以提供熱對流形式的散熱作用以外,更可直接在1226530 V. Description of the invention (1) Technical field to which the invention belongs The present invention relates to a method for reducing energy consumption of a computer system, and in particular to a technology for reducing energy consumption of a processor in a computer system. In recent years, with the integration of integrated circuits (Integrated Circuit, IC) chip internal circuits (Integrati ο η) has been increasing, the central processing unit (CPU), The speed of integrated circuit (1C) chips such as Northbridge and graphics chips has also increased. In this way, the heating power inside the computer system is constantly rising. In order to prevent the integrated circuit chip in the computer brain system from overheating, the integrated circuit chip may temporarily or permanently fail, so in the computer system It becomes very important to provide adequate heat dissipation. Taking the central processing unit (Brai η) in the computer system as an example, the central processing unit operates at high speed. When the temperature of the central processing unit exceeds its normal operating temperature range, the central processing unit is extremely useful. Operation errors may occur or temporarily fail, which will cause the computer system to crash (Crash). In addition, it is very likely that the transistors inside the CPU chip will be damaged, which will cause the CPU to physically and permanently fail, and the CPU must be replaced to restore normal computer system operation. In order to effectively reduce the damage caused by the large amount of thermal energy φ generated by the integrated circuit chip during operation, in addition to installing a cooling fan inside the mainframe of the computer system, it can provide heat dissipation in the form of thermal convection.
1 1597t.wf.ptd 第6頁 1226530 五、發明說明(2) 電腦系統之電源供應器、中央處理器及繪圖處理單元 (Graphics Processing Unit, GPU),甚至是晶片組等溫 度容易升高之積體電路晶片上加裝散熱器(Heat Sink)等 裝置,直接接觸積體電路晶片之表面,用以提供較大的散 熱面積,藉以迅速移除積體電路晶片於高速運作時所產生 的熱能,因而降低積體電路晶片之本身溫度,如此將使得 電腦系統之運作能夠更為順暢。 在電腦系統中,積體電路晶片運作時所產生之熱能, 可說是電腦處理運算時最大耗用能源的因子,其中又以中 央處理器為最。中央處理器的規格通常可以用時鐘脈衝頻 率(Clock Frequency)幾MHz來表示,這是表示中央處理器 在1秒鐘進行多少次基本動作,一般而言,時鐘脈衝頻率 越高則是表示處理速度越快。此外,也有用3 2位元及6 4位 元等數字來表示中央處理器的規格,這是指一次運算所能 處理的資料量大小。時鐘脈衝頻率越快,或是位元數越 大,並不一定就越好,應該依使用不同目的而選用不同規 格的中央處理器。但就算是選用到適當的中央處理器,在 使用時段内,中央處理器被使用的比率亦有高峰與低峰的 差異,但現有之技術僅能將處理器使用比率固定在某一定 值。 在習知技術中有一種中央處理器節流功能(C P U Throttling F u n c t i ο η )可達到降低耗能的目的,請參照第4 1圖其繪示習知技術之處理器使用率與溫度之關係示意 圖,如圖所示,於一般狀況下,中央處理器節流功能是處1 1597t.wf.ptd Page 6 1226530 V. Description of the invention (2) Power supply of computer system, central processing unit, graphics processing unit (GPU), and even temperature rise products such as chipsets A device such as a heat sink is installed on the body circuit chip to directly contact the surface of the body circuit chip to provide a large heat dissipation area, so as to quickly remove the heat energy generated by the body circuit chip at high speed operation. Therefore, the temperature of the integrated circuit chip itself is reduced, which will make the operation of the computer system smoother. In computer systems, the thermal energy generated during the operation of integrated circuit chips can be said to be the factor that consumes the most energy during computer processing operations. Among them, the central processor is the most. The specifications of the CPU can usually be expressed in a few MHz of the Clock Frequency. This is to indicate how many basic actions the CPU performs in 1 second. Generally speaking, the higher the clock frequency, the higher the processing speed. Faster. In addition, 32-bit and 64-bit numbers are also used to indicate the specifications of the central processing unit. This refers to the amount of data that can be processed in one operation. The faster the clock pulse frequency, or the larger the number of bits, is not necessarily better, and different specifications of CPUs should be used depending on the purpose. However, even if an appropriate central processing unit is selected, during the period of use, there is a difference between the peak and low peak usage rates of the central processing unit. However, the existing technology can only fix the processor utilization ratio to a certain value. In the conventional technology, there is a central processor throttling function (CPU Throttling Func ο η) to achieve the purpose of reducing energy consumption. Please refer to FIG. 41 which shows the relationship between the processor usage rate and temperature of the conventional technology Schematic diagram, as shown in the general situation, the CPU throttling function is
1 1597t.wf.ptd 第7頁 1226530 五、發明說明(3) 於禁能狀態,此時中央處理器的使用率設定為1 0 0 %,當 系統溫度高過於某一個額定溫度時,將中央處理器節流功 能致能,調低中央處理器的使用率,用以降低系統溫度, 保護中央處理器不會因過熱而損壞。由於此節流功能只具 有兩個階層,一為致能,一為禁能,並無法準確地達到降 低耗能的目的。簡單而言,由於習知技術無法動態地變更 中央處理器的工作週期(Duty Cycle),無法符合實際使用 電腦系統的情況,因此無法精確地降低耗能。 發明内容 因此本發明的目的就是在提供一種可符合實際使用狀 況,減少處理器耗用能源之方法,藉由降低耗能,進而達 到延長筆記型電腦系統於電池模式下的使用時間,降低桌 上型電腦於閒置狀態下的溫度,進而延長内部積體電路晶 片的使用壽命等優點。 本發明是以將處理器的節流程度分為複數個階層的狀 況下為前提,首先,處理器開始運作時,將此處理器的節 流程度設定在這些階層中除了處理器使用率最大之階層外 的任一階層。接下來,則是偵測在此階層下處理器的溫 度。最後,再根據偵測到的處理器溫度對應調整處理器的 節流程度。其中,當偵測到的處理器溫度介於某一個預定 數值範圍時,就把處理器的節流程度固定在與此預定數值 範圍相對應之預定階層。 從另一個觀點來看,本發明也可以是首先,處理器開 始運作時,將此處理器的節流程度設定在這些階層中除了1 1597t.wf.ptd Page 7 1226530 V. Description of the invention (3) In the disabled state, the CPU usage rate is set to 100%. When the system temperature is higher than a certain rated temperature, the central The processor throttling function is enabled to reduce the usage rate of the central processing unit to reduce the system temperature and protect the central processing unit from being damaged by overheating. Because this throttling function has only two levels, one is enabled and the other is disabled, and it cannot accurately achieve the purpose of reducing energy consumption. In short, because the conventional technology cannot dynamically change the duty cycle of the central processing unit and cannot meet the actual situation of using a computer system, it is impossible to accurately reduce energy consumption. SUMMARY OF THE INVENTION Therefore, the object of the present invention is to provide a method that can reduce the energy consumption of a processor in accordance with the actual use conditions. By reducing the energy consumption, thereby extending the use time of the notebook computer system in the battery mode and reducing the desktop The temperature of the computer in the idle state extends the service life of the internal integrated circuit chip. The present invention is based on the premise that the throttling degree of the processor is divided into a plurality of layers. First, when the processor starts to operate, the throttling degree of the processor is set in these layers in addition to the highest processor utilization rate. Any stratum outside the stratum. The next step is to detect the processor temperature at this level. Finally, the throttling degree of the processor is adjusted correspondingly according to the detected processor temperature. Among them, when the detected processor temperature falls within a certain predetermined value range, the throttling degree of the processor is fixed at a predetermined level corresponding to the predetermined value range. From another point of view, the present invention can also be first of all, when the processor starts to operate, the throttling degree of this processor is set in these levels except
1 1597t.wf.ptd 第8頁 1226530 五、發明說明(4) 處理器使用率最大之階層外的任一階層。接下來,偵測處 理器的溫度以及處理器所處之系統環境的溫度(簡稱之為 系統溫度)。最後根據偵測到的處理器溫度與系統溫度之 間的溫度差,對應調整處理器的節流程度。其中,當處理 器溫度與系統溫度的溫度差介於某一個預定數值範圍時, 就把處理器的節流程度固定在與此預定數值範圍相對應之 預定階層。 本發明依照所偵測之處理器溫度來調整節流程度,或 者是依照所偵測之處理器溫度與處理器所處之環境溫度之 間的溫度差變化來變更處理器的節流程度,以多選擇的節 流程度來達成在不妨害實際使用狀況下,有效地減少處理 器的非必要耗能。 ^ 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 實施方式: 請參照第2圖,其繪示依照本發明第一實施例之流程 示意圖。此實施例適用在將處理器的節流程度區分為複數 個階層的狀況下,首先,在電腦系統開啟後,處理器開始 進行運算處理之時,同時設定處理器之節流程度於最高階 層(係指處理器使用率最大的階層)以外的任一階層(如步 驟S 2 0 3、S 2 0 6 )。接下來,則偵測在此階層下,處理器運 作時的溫度(如步驟S 2 0 9 )。最後則是依照偵測所得之處 理器溫度,對應地調整處理器的節流程度(如步驟S 2 1 21 1597t.wf.ptd Page 8 1226530 V. Description of the invention (4) Any level other than the level with the highest processor utilization. Next, detect the temperature of the processor and the temperature of the system environment where the processor is located (referred to as the system temperature). Finally, according to the detected temperature difference between the processor temperature and the system temperature, the throttling degree of the processor is adjusted accordingly. Wherein, when the temperature difference between the processor temperature and the system temperature falls within a predetermined value range, the throttle degree of the processor is fixed at a predetermined level corresponding to the predetermined value range. The invention adjusts the throttling degree according to the detected processor temperature, or changes the throttling degree of the processor according to the temperature difference between the detected processor temperature and the ambient temperature where the processor is located, so as to Multiple choices of throttling levels are used to effectively reduce unnecessary energy consumption of the processor without compromising actual use. ^ In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Implementation: Please refer to FIG. 2 It shows a schematic flow chart according to the first embodiment of the present invention. This embodiment is applicable to a case where the throttling degree of the processor is divided into a plurality of levels. First, when the processor starts the arithmetic processing after the computer system is turned on, the throttling degree of the processor is set to the highest level ( Refers to any level other than the level with the highest processor utilization (eg, steps S 2 0, S 2 0 6). Next, the temperature at which the processor is operating under this level is detected (step S209). The last step is to adjust the throttling degree of the processor accordingly according to the detected processor temperature (eg step S 2 1 2
1 1597t.wf. ptd 第9頁 1226530 五、發明說明(5) )。其中,於步驟S 2 1 2之前,需先設定調整好處理器之節 流程度所需之節流程度階層與處理器溫度間的對應關係 (圖中未繪示),而其調整方式為:當偵測所得之處理器 的溫度介於某一個預定數值範圍時,就把處理器的節流程 度固定在與此預定數值範圍相對應之預定階層。 接著,請參照第3圖,其繪示依照本發明第二實施例 之流程示意圖。此實施例是用在將處理器的節流程度區分 為複數個階層的狀況下,首先,在電腦系統開啟後,處理 器開始進行運算處理之時,同時設定處理器之節流程度於 最高階層(係指處理器使用率最大的階層)以外的任一階層 (如步驟S 3 0 3、S 3 0 6 )。接下來,則偵測此時處理器運作 時之溫度(如步驟S 3 0 9 )。接著下來則是偵測此時處理器 所處之系統環境中的溫度(如步驟S 3 1 2 )。最後,依照偵 測所得之處理器溫度與系統溫度之間的溫度差,相對應地 調整處理器的節流程度(如步驟S31 5 )。其中於步驟S3 1 5 之前,需先設定調整好處理器之節流程度所需之節流程度 階層與處理器溫度及系統溫度之溫度差間的對應關係(圖 中未繪示),而其調整方式可以為:當偵測所得之處理器 溫度與系統溫度之間的溫度差介於某一個預定數值範圍 時,就把處理器的節流程度固定在與此預定數值範圍相對 應之預定階層。 請參照第4圖其繪示在理想狀況下,處理器使用率與 溫度之關係示意圖。由圖可知,在一特定之額定溫度内, 處理器使用率與溫度是成正比關係。這是因為當處理器運1 1597t.wf. Ptd page 9 1226530 V. Description of the invention (5)). Wherein, before step S 2 1 2, it is necessary to first set the corresponding relationship between the throttling degree hierarchy and the processor temperature required to adjust the throttling degree of the processor (not shown in the figure), and the adjustment method is: When the detected temperature of the processor is within a certain predetermined value range, the throttling degree of the processor is fixed at a predetermined level corresponding to the predetermined value range. Next, please refer to FIG. 3, which illustrates a schematic flow chart according to the second embodiment of the present invention. This embodiment is used in a situation where the throttling degree of the processor is divided into a plurality of levels. First, after the computer system is turned on, when the processor starts arithmetic processing, the throttling degree of the processor is set to the highest level. (Refers to the stratum with the highest processor utilization) (for example, steps S303, S306). Next, the temperature at which the processor is operating at this time is detected (step S309). The next step is to detect the temperature in the system environment where the processor is located at this time (step S 3 1 2). Finally, according to the detected temperature difference between the processor temperature and the system temperature, the throttling degree of the processor is adjusted correspondingly (step S31 5). Before step S3 1 5, the corresponding relationship between the level of throttling required to adjust the throttling degree of the processor and the temperature difference between the processor temperature and the system temperature (not shown in the figure) must be set. The adjustment method can be: when the detected temperature difference between the processor temperature and the system temperature is within a predetermined value range, the throttle degree of the processor is fixed at a predetermined level corresponding to the predetermined value range . Please refer to Figure 4 which shows the relationship between processor utilization and temperature under ideal conditions. As can be seen from the figure, within a specific rated temperature, the processor utilization is directly proportional to the temperature. This is because when the processor is running
11597t.wf.ptd 第10頁 1226530 五、發明說明(6) 轉速度較快時,處理器本身的溫度會隨著升高,處理器的 使用率也隨之增加,這是因為處理器的工作時脈增高。但 是一旦超過處理器的工作溫度,此工作溫度通常為處理器 可維持正常作業之最高容許溫度,便將處理器的節流功能 致能,藉此降低處理器使用率以保護處理器不會因過熱而 損壞。但在實際應用上,如要達到如此理想的關係其可能 性極小。接著,請參照第5圖其繪示依照本發明的一實施 例之處理器使用率與溫度之關係示意圖。在此實施例中, 雖然是將處理器使用率以1 2. 5 %為間隔值,分成1 2. 5 %、 25%、37·5%、50%、62,5%、75%、87.5%、100% 等 8 個階層,但於實際應用上並無須以此為限。 雖然本發明僅揭露上述實施例,然其並非用以限定本 發明,任何熟習此技藝者,在不脫離本發明之精神和範圍 内,當可作些許之更動與潤飾,因此本發明之保護範圍當 視後附之申請專利範圍所界定者為準。11597t.wf.ptd Page 10 1226530 V. Explanation of the invention (6) When the speed is fast, the temperature of the processor itself will increase with the increase of the processor usage rate. This is because the processor works Clocks increase. However, once the operating temperature of the processor is exceeded, this operating temperature is usually the highest allowable temperature at which the processor can maintain normal operation. The throttling function of the processor is enabled to reduce the processor utilization rate and protect the processor from Overheated and damaged. However, in practical applications, it is extremely unlikely to achieve such an ideal relationship. Next, please refer to FIG. 5 which is a schematic diagram showing the relationship between the processor usage rate and the temperature according to an embodiment of the present invention. In this embodiment, although the processor usage rate is divided into 12.5%, it is divided into 12.5%, 25%, 37 · 5%, 50%, 62,5%, 75%, 87.5 %, 100%, etc., but there is no need to limit it in practical applications. Although the present invention only discloses the above embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention It shall be subject to the definition in the appended patent application scope.
11597twf.ptd 第11頁 1226530 圖式簡單說明 第1圖是繪示習知技術之處理器使用率與溫度之關係 示意圖。 第2圖是繪示依照本發明第一實施例之流程示意圖。 第3圖是繪示依照本發明第二實施例之流程示意圖。 第4圖是繪示在理想狀況下,處理器使用率與溫度之 關係示意圖。 第5圖是繪示依照本發明一實施例之處理器使用率與 溫度之關係示意圖。 圖式標記說明: S203〜S212 :各實施步驟 S 3 0 3〜S 3 1 5 ••各實施步驟11597twf.ptd Page 11 1226530 Brief description of the diagrams Figure 1 is a schematic diagram showing the relationship between processor utilization and temperature of the conventional technology. FIG. 2 is a schematic flowchart illustrating a first embodiment according to the present invention. FIG. 3 is a schematic flowchart illustrating a second embodiment according to the present invention. Figure 4 shows the relationship between processor utilization and temperature under ideal conditions. FIG. 5 is a schematic diagram showing the relationship between processor utilization and temperature according to an embodiment of the present invention. Symbol description: S203 ~ S212: Implementation steps S3 0 3 ~ S 3 1 5 •• Implementation steps
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