TWI226445B - Integrated circuit testing system - Google Patents

Integrated circuit testing system Download PDF

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Publication number
TWI226445B
TWI226445B TW92129219A TW92129219A TWI226445B TW I226445 B TWI226445 B TW I226445B TW 92129219 A TW92129219 A TW 92129219A TW 92129219 A TW92129219 A TW 92129219A TW I226445 B TWI226445 B TW I226445B
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Taiwan
Prior art keywords
test
circuit
heating
integrated circuit
dimensional matrix
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TW92129219A
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Chinese (zh)
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TW200514990A (en
Inventor
Yi-Min Lin
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Progenic Technologies Co Ltd
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Publication of TW200514990A publication Critical patent/TW200514990A/en

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

A kind of integrated circuit testing system is used to test the changes of the integrated circuits generated under different temperatures. The integrated circuit testing system comprises: at least a set of 2-dimensional matrix type testing module which is installed with a testing section for inserting the to-be-tested integrated circuits in a matrix manner and a heating section for heating integrated circuits individually; a computer main frame which is connected to the 2-dimensional matrix type testing module to control the whole operation of the testing system; and a database. According to the above-mentioned structure, the computer main frame is connected to the database and the 2-dimensional matrix type testing module for transmitting the temperature control information, providing the adequate temperature generated by each heater on the heating section to heat up the integrated circuits, and storing the testing information.

Description

1226445 玖、發明說明: 【發明所屬之技術領域】 本發明係有關-種積體電路測試系统 組二維矩陣式測試模組内不同位置的待測積體=一種可針對至少-度的加熱,使該不同位置的待測積體 乂 "刀別施予不同溫 達到針對個別積體電路加熱,且加熱:可=定測試Μ,而 總測試成本之目的。 了、、、倍紐總測試時程,節省 【先前技術】 按,積體電路由於所操作的環境多 體電路在此高溫的環境中,其特性是 ;鄉為了解積 ^透過積體電路測試系統來使積體電路達到特 習用的積體電路測試系統,多半僅蔣 i不同’分類放在不同的機箱中,以熱風加熱至==欲Γίί: 個別積體電路的不同測試溫度需求作加熱、。。t 口,、、、’“、、法針對 2·在機柏内用熱風加熱的方式皆 口的遠近,而產生加熱不^;會;^體電職触置距離送風 3.每-機箱每次僅能施作單—㈣二重t ;;則3精確性與品質。 其測試時程將增加。 、M/皿度,右要測試多個不同的溫度, 積累餅讀f用的測試系統於實際施用時的缺失,且 ,累事相關產業開發實務上多年之經驗,精u 出一種積體電路測試系統。 所九、、X於研毛 【發明内容】 册ίί藉ΪΓ之主要目的’旨在提供—種積體電路測試系統,可 針對個別積體電路不同的匆試溫度需求而施予加埶’且加孰=3 達到縮短總測試時程,提高測試的精確性與品質,並節省總測言^本 1226445 為達上述之目的,本發明包含: 至少-組二維矩陣式測試模組 設複數待測試之積^ L + 邓忒邛,叮供陣列插 複數㈣器,可與上述測試部對應之加熱部,陣列設有 …W 」刀別對積體電路加熱,· 統之整機以:於連繫上述二維矩陣式測試模組而姆^ 以儲制達i述二維矩陣式測試模組,用 古Mi' ί卞上述一、准矩陣式測試模組之各加熱器係彼此獨立,且里中 輸至積體電路的測試溫度,可透過上述電腦主機^傳 測試執行’又’可將各積體電路的 ' 、 ^ Μ龟月®主機,再儲存於該資料庫中者。 【實施方式】 ' 徵有查委M能更進—步對本發明之構造、使用及其特 詳tr⑽詳實的認識與瞭解,發明人舉岐佳之實施例, 首先睛參嶋-圖、第二圖所示,本發明係包含·· 陳矩陣式測試模組1所形成的三維矩陣,且該六組二維矩 2式測趣組1可裂設於—機箱4内,該二維矩陣式測試模組!係包 導㈣ΓΪΓΓ該測試部2係由—半導體測試板2 2上接設有一半 辜體測试電路21,並於該半導體測試板22上_設有8x 8個插 接座2 3 ’ 分舰插設默職之㈣電路9,雌魏插接座2 3分別連接該半導體測試電路21; 上述’Up2對應之加熱部3,該加熱部3係由一基板3 2上 接設有-控機路3 !,並於該基板3 2上對應上述複數插接座2 3 陣列設有8x 8個加熱H3 3,可分麟積麟路9加熱,且該複數 加熱Is 3 3分別連接該控制電路3 1 ; 1226445 其中,該控制電路3 ].可將每個待測積體電路9所欲 度資訊分別傳輸至對應之加熱器3 3執行,並將 二:二溫 經由該半導體測試電路2]傳遞出。 。 」冽忒為訊 上述加熱器3 3 ’如第二圖、第三圖所示,係包括: _一頂座331,該頂座331上設有-插接單元33 早兀3 3 2係可供插設入該加熱部3之基板上 二吾接 -=上述頂座331下方之加熱柱3 3 3.,該;^ 端係凸設有一抵頂頭3 3 4 ; ? d d 3底 一連結單元3 3 5,輯結單元3 3 5係為魏支插桿,— f fff座3 3 ^與該加熱柱3 3 3 .,並在該頂座3 3 === 柱3 3 3之間的插桿上係套設有一抗壓彈簧3 3 6 ; 一 …、 一麼f計3 3 7,係裝設於該頂座3 31與該加熱柱3 ^ 間,供測里该加熱柱3 3 3接觸受測積體電路9後所受壓力變化;之 -加熱電路3 3 8,係穿設於人上述加熱柱3 3 3 ^ 柱3 3 3加溫,· 使該加熱 一感溫電路3 3 9,係穿設於入上述加熱柱3 3 Ί肉,糾#、 加熱柱3 3 3底端抵頂頭3 3 4的溫度; ,、感測該 藉由:上述抵頂頭3 34接觸受測積體電路9,將 測溫度,又,當該抵頂頭3 3 4溫度超過該受測積體電心 路3 St:可由該感溫電路3 3 9感應到訊號,使該加熱電 冷《置5,依第-圖所示,係連接上述機箱4,提供 溫。二維矩陣式測試模組丄中之積體電路9於測試完畢後“ j降 電腦主機6,依第-圖所示,用於連繫上述二維矩 1而控制翔試纽之整職作,聽含: 一^序控制單元61,係可傳輸測試資料,並控制測試進行; 溫度控制單元6 2,係可將各不同位置上待測積體雷踗㈤ 又工制資料分別輸人至該各個二維矩陣式測試模組丄中各個特定位= 1226445 執行; 一電訊號輸出單元6 3,係可逯接兮夂一^ 半導體測試電路2 1,檢測各個二維矩ΐ式;試模組1之 的壓力係數,並將測試資訊傳輸至上述程序元且γ積體電路9 測試; 特定溫度下的酬化測試資=^ 矩陣依第一圖所示,可藉上述電腦主機6接達上述-维 :賴,透過上述程ίΐ&元 6 1項取该貧料庫7中的溫度控制資料 控制早το 熱器3 3產生適當之溫度,對待測積體電路9加:士每—加 積體電路9之測試資訊輸入至該資料庫7二=將所接收各個 7所儲存之測試資訊可透過—p L 八:、‘ σί1 ’且该貧料庫 回至該資料庫γ。 〜 、、、、为析,再將該分析資料送 ^11 3 3 2 3 度,可透過上述電腦主機二^各個積體電路9的測試溫 加熱器3 3執行,又,可將“ 二維矩陣式測試模組1之各 機6,再齡_軸7巾纖物崎秦人該她 如上述構造實施時,依箆一 一 試溫度之積體電路9分別放Ϊ於^達到不同測 7中,並啟以:t=二9的溫度控制資料儲存於資料庫 3==電:9:,資料依陣列位置輸入各加= 電路9達到測量溫度二;旦亚,積體電路9溫度,待各積體 傳輸至資料庫7 始^;Λ啸各積體電路9的测量資料 料,再將__歸料庫讀各積體電則_量資 1226445 當測試完畢,可利用冷卻裝置々 組!中之積體電路9於測試完畢内各二維矩陣式測試模 藉由上述實施之呈現,可知,本創作具有以下之優點. 1 ·可同時針對每一積體電路g所欲 - 的加熱,而可縮短總測試時程、節省總測試成^二而同日樣予不同 2·係利用加熱器3 3接觸積體電路9,作一、, 情形。 a生谷積體電路9加熱不均或過熱的 淮=上所述者,僅為本發明之較佳實施例而已,當不能以此限 本^明實狀·,即纽依本發3种請補 4由上對本發明之技術結麟_述,本發明 ,短,試時程,提高測試的精確性與品f,並節省總=== 的且未見於業界相關產品當中,應符合新型專利之要件,申請人 利法之規^,肖釣局提起新型專利之中請,並懇請早日賜准本 案專利,實感德惠。 【圖式簡單說明】 第一圖,係本創作之示意圖。 。 fu本創作三維矩陣式職模組之局部示意圖。 第二圖,係本創作加熱頭之立體圖。 第四圖,係本創作加熱頭之剖視圖。 第五圖,係本創作測試之流程圖。 【圖式中之符號說明】 2 —測試部 2 2—半導體測試板 3 —加熱部 3 2 —基板 1一二維矩陣式測試模組 21—半導體測試電路 2 3 —插接座 31 —控制電路 1226445 3 3 —加熱器 3 3 2 —插接單元 3 3 4 —抵頂頭 3 3 6 —抗壓彈簧 3 3 8 —加熱電路 4—機箱 6—電腦主機 6 2—溫度控制單元 6 4—測量單元 3 31—頂座 3 3 3 —加熱柱 3 3 5 —連結單元 3 3 7—壓力計 3 3 9 —感溫電路 5—冷卻裝置 61—程序控制單元 6 3—電訊號輸出單元 7 —資料庫 9 一積體電路 8 — P LR模組1226445 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to-a kind of integrated circuit test system group of two-dimensional matrix test module in different positions of the tested product = a kind of heating for at least -degrees, Make the test object at different positions to apply different temperatures to the individual test circuit to achieve heating, and heating: can be set to test M, and the total test cost. In order to save the time of the test, save the previous technology. [Previous technology] Press, the integrated circuit due to the operating environment of the multi-body circuit in this high-temperature environment, its characteristics are; System to make the integrated circuit reach the special integrated circuit test system, most of which are only in different categories, and are placed in different cases, and heated by hot air to == 欲 Γί: the different test temperature requirements of individual integrated circuits are used for heating . . T mouth ,,,, '",, and method 2 · The hot air heating method inside the machine is all about the mouth's far and near, and the heating is not generated ^; Yes; ^ Physical electrical contact distance from the air supply 3. Each-chassis each time Can only be used as a single-㈣ double t ;; 3 accuracy and quality. Its test time will increase., M / dish degree, right to test a number of different temperatures, the test system used to accumulate cake reading f The lack of practical application, and years of experience in the development of related industries, has resulted in an integrated circuit test system. Therefore, the main purpose of the book is the purpose In providing—a kind of integrated circuit test system, it can be applied to the different temperature requirements of individual integrated circuits, and 孰 = 3 to shorten the total test time, improve the accuracy and quality of the test, and save General testimonial ^ Ben 1226445 In order to achieve the above-mentioned object, the present invention includes: at least-two-dimensional matrix test module with a complex product to be tested ^ L + Deng Ding, an array inserting complex counter, can be used with the above The heating part corresponding to the test part, the array is equipped with ... " Circuit heating: The whole machine is connected to the two-dimensional matrix test module described above, and the two-dimensional matrix test module described above is stored in the storage system. The heaters of the test module are independent of each other, and the test temperature of the integrated circuit is input to the integrated circuit. The test can be performed through the above-mentioned computer host, and the integrated circuit of the integrated circuit can be used. , And then stored in that database. [Embodiment] 'If you have an inquiry committee, you can go further-a step by step knowledge and understanding of the structure, use, and special details of the present invention. The inventor's example of Qijia is as follows. First, see Figure-Figure 2. As shown, the present invention includes a three-dimensional matrix formed by the Chen matrix test module 1, and the six groups of two-dimensional moment two-type test interest groups 1 can be split in the case 4, the two-dimensional matrix test. Module! System guide ㈣Γ 由 ΓΓ The test unit 2 is provided by a semi-body test circuit 21 connected to the semiconductor test board 22, and 8x 8 sockets 2 3 'on the semiconductor test board 22 A silent circuit 9 is set up, and the female and female plug sockets 2 and 3 are respectively connected to the semiconductor test circuit 21; the heating portion 3 corresponding to the above 'Up2, and the heating portion 3 is provided by a substrate 32 connected to a control circuit. 3 !, and on the substrate 32 corresponding to the above-mentioned plural plug sockets 2 3 array is provided with 8 × 8 heating H3 3, which can be divided into Lin Jilin Road 9 heating, and the plural heating Is 3 3 are respectively connected to the control circuit 3 1; 1226445 Among them, the control circuit 3]. It can transmit the desired information of each of the integrated circuit 9 to be tested to the corresponding heater 3 3 for execution, and pass two: two temperatures through the semiconductor test circuit 2] Out. . The above-mentioned heater 3 3 ′ is shown in the second and third figures, and includes: _ A top seat 331, which is provided with a plug-in unit 33. Early stage 3 3 2 can For inserting into the base plate of the heating part 3-= heating column 3 3 3 under the above-mentioned top seat 331, the ^ end is convexly provided with an abutment head 3 3 4;? Dd 3 bottom a connection unit 3 3 5, the compiling unit 3 3 5 is a Wei stick, — f fff seat 3 3 ^ and the heating column 3 3 3., And between the top seat 3 3 === column 3 3 3 A compressive spring 3 3 6 is set on the plunger rod; a ..., a f meter 3 3 7 is installed between the top seat 3 31 and the heating column 3 ^ for the heating column 3 3 3 The pressure change after contacting the circuit under test 9;-heating circuit 3 3 8 is placed on the heating column 3 3 3 ^ the column 3 3 3 warms up, and makes the heating a temperature sensing circuit 3 39. It is worn through the above-mentioned heating column 3 3 meat, correcting the temperature of the heating column 3 3 3 bottom end against the head 3 3 4; The integrated circuit 9 will measure the temperature, and when the temperature of the header 3 3 4 exceeds the measured integrated circuit 3 St: by the temperature sensing circuit 339 senses the signal, so that the electric heating cold "means 5, according to the first - FIG, 4 lines connecting the chassis to provide temperature. After the test, the integrated circuit 9 in the two-dimensional matrix test module "J drops the host computer 6, as shown in Figure-. It is used to connect the two-dimensional moment 1 above to control the test button. Listening includes: a sequence control unit 61, which can transmit test data and control the test; the temperature control unit 62, which can input the product to be tested at different positions, and the industrial data, respectively. Each specific bit in each of the two-dimensional matrix test modules = 1226445 is executed; a telecommunication signal output unit 63 is connected to the semiconductor test circuit 21 to detect each two-dimensional moment formula; test mode The pressure coefficient of group 1 and the test information is transmitted to the above program element and the γ integrated circuit 9 is tested; the remuneration test data at a specific temperature = ^ The matrix is shown in the first figure and can be accessed by the above computer host 6 Above-dimensional: Lai, take the temperature control data in the lean storage 7 to control the early το through the above-mentioned Cheng Liao & Yuan 6 1 item. The heater 3 3 generates an appropriate temperature. The test information of integrated circuit 9 is input into the database 7 2 = each of the 7 received The stored test information can be passed through -p L VIII :, 'σί1' and the lean material library returns to the database γ. ~ ,,,, for analysis, and then send the analysis data ^ 11 3 3 2 3 degrees, can Through the above-mentioned host computer 2 ^ test temperature heater 3 3 of each integrated circuit 9 is performed, and each machine 6 of the "two-dimensional matrix test module 1" can be re-aged_axis 7 When she implements the structure as described above, the integrated circuit 9 that tests the temperature one by one is placed in ^ to reach different tests 7, and the temperature control data of t = 2-9 is stored in the database 3 == electricity: 9: The data is input according to the array position = circuit 9 reaches the measurement temperature II; once the temperature of the integrated circuit 9 is reached, each of the integrated circuits is transmitted to the database 7; ^ Xiao measurement data of each integrated circuit 9 , And then read the __ materials into the library to read the integrated electrical code _ amount 1226445 When the test is completed, you can use the cooling device to group! After the integrated circuit 9 in the test is completed, the two-dimensional matrix test mode is presented by the above implementation. It can be seen that this creation has the following advantages. 1 · It can simultaneously heat for each integrated circuit g as desired, The total test time can be shortened, the total test time can be saved, and the same sample can be used on the same day. 2. Use the heater 3 3 to contact the integrated circuit 9 for the same situation. a Raw valley product circuit 9 Uneven heating or overheating Huai = The above is only the preferred embodiment of the present invention. When it is not possible to limit this to the actual situation, that is, three types of Niuyibenfa Please fill in 4 from the above description of the technical aspects of the present invention. The present invention has a short test time, improves the accuracy and quality of the test, and saves total === and is not found in related products in the industry. It should comply with the new type. The requirements of the patent, the rules of the applicant's law ^, Xiao Diao Bureau filed a new patent, and urges that the patent in this case be granted as soon as possible, which is a real benefit. [Schematic description] The first picture is a schematic diagram of this creation. . fu This is a partial diagram of the 3D matrix job module. The second picture is a perspective view of the heating head of this creation. The fourth figure is a sectional view of the heating head of this creation. The fifth figure is the flowchart of this creative test. [Description of symbols in the figure] 2 —Testing section 2 2—Semiconductor test board 3 —Heating section 3 2 —Substrate 1 2D matrix test module 21—Semiconductor test circuit 2 3—Socket 31—Control circuit 1226445 3 3 —Heater 3 3 2 —Plug unit 3 3 4 —Abutment head 3 3 6 —Compression spring 3 3 8 —Heating circuit 4—Case 6—Computer host 6 2—Temperature control unit 6 4—Measurement unit 3 31—Top base 3 3 3—Heating column 3 3 5—Connecting unit 3 3 7—Pressure gauge 3 3 9—Temperature sensing circuit 5—Cooling device 61—Program control unit 6 3—Telecommunication signal output unit 7—Database 9 one integrated circuit 8 — P LR module

Claims (1)

1226445 拾、申請專利範圍: 1·-種積體電路測試系統,係 變化,該賴電_試系她含^⑽體魏於刊溫訂所產生的 主·少-砠二維矩陣式測試模叙,内設有: ‘、 數待測試之積體電路,—血」、 “ ⑷,可供陣列插設複 熱器,可分別對積體電路加熱;“ ^ ^之加熱部’陣列設有複數加 體:2及用於連繫上述二維矩陣式測試模組而控制本測試系統之整 存模組,用以儲 測積體電路加溫,並儲存測試資訊,—纟‘之溫度’對待 獨立,且其中有之各加熱器係彼此 體電路的測試資訊傳輪組===行’又,可將各積 2.如申請專利範圍第!項所球 雷^ 料庫中者。 式測試模組係包括:〜種'“測试系統’其中該二維矩陣 ~測試部,該測試部係由—丰導,# _ 路,並於該半導體測試板上陣‘二二广s又有—半導體測試電 試之積體電路,且該複數插二:;丨=_座,可分別供插設預定測 —與上述_嘱之辭^嗔電路; 電路涔姑其虹,二 域加熱邵係由一基板上接設有一控制 丄'八队·丄教上對應上越複數插接库陣列設有複 數加熱器分別連接該控制電路;一-又有碰加熱怒,且該複 船f ^ ^路可如每调待 別傳輪至對應之加熱器執行mr..t r m皿度貝。fU 電路傳遞出。 领於砭緣測試貧訊經由該半導體測試 3 ·如申請專利範圍第2項 包含: —〜種稽逾電路測試系統,其中該電腦主機 •序&制單7L料頃取㈣科厚中的溫度控制資料,並將所接收 1226445 各個積體電路之測試資訊輸入至該資料庫; Z度控鮮元,係可將各不_置上待測積體電路的 刀別輸入至該各個二維矩陣式測試模組中各個特定位又控制貝'抖 :電訊錄出單元,係可連接該各二__ ,路’檢測各個二維矩陣式顧模組峰體電路的動係 貝詋傳輸至上述程序控制單元; ’、、將測忒 ㈣可各"維轉式峨触之半導_試電路, =^過私巾各個二維矩陣式測試模組内各個積體電路在不 下的特性變化測試資訊經傳輸至上述程序控制單元。 、/皿又 4 咖第1項所述—種積體電路測試系統,其中該二維矩陣 式測試模組可為複數組,形成三維矩陣。 、、、 5 .一^!申清專利範圍第1項所述一種積體電路測試系統,其中該至少一組 一維矩陣式測試模組可裝設於一機箱内。 、、’ 6 ·、如申請專利範圍第5項所述一種積體電路測試系統,其 連接-冷部裝置’提供該二維矩陣式之;::二 畢後能快速降溫者。 Μ賴於測试完 7六申清專利範圍第1項所述一種積體電路測試系統,其中該資料庫所 試資訊可透過-P LR模組分析’再將該分析㈣送回斗= ^一種加熱器結構,係可供插設於二維矩陣式測試模组中加 上,對測試部上受測積體電路加溫,係包括: ’、’、A 一頂座,該頂座上設有一插接單元; - 述頂座下方之加熱柱,該加熱柱底端係、凸設有-抵頂頭; 連…早元,係供連結上述頂座與上述加埶柱; =熱電路,财設於人上述加熱_,使該加熱柱加溫; 的=溫電路,係穿設於入上述加熱柱内,供感測該加熱柱底端抵頂頭 产藉Γ ΐϊΓ頭接觸受測積體電路,將積體電路加溫至預定受測溫 又,虽該抵頂頭溫度超過該受測積體電路之預定受測溫度時,可由 12 1226445 該感溫電路感應到訊號,使該加熱電路停止加熱者。 9 ·如申請專利翻第8項所述-種加熱n結構,其中該連結單元係為複 數支插桿,兩端分別連結該頂座與該加熱柱。 1 0 ·如申#專利糊第9項所述—種加熱器結構,其中該頂座與該加熱 柱之間的插桿上係套設有彈性單元。 mm細第1 g項所述—種加熱11結構,其_座與該加 受壓力i化广有—壓力計,供測量該加熱柱接觸受測積體電路後所 m糊川娜_姆陶,㈣爾元得 1 3 ·如申請專利範圍第8項所述一種加熱器結構,其 供插設入該加熱部之基板上,使加熱器定位者。/、 中該插接單元係可1226445 Scope of patent application: 1 · -A kind of integrated circuit test system, which is a change. The Lai Dian_test system contains the main · slow- 刊 two-dimensional matrix test model produced by Wei Weiwei. There are: ", the integrated circuit to be tested-blood", "⑷", which can be installed in the array with a reheater, which can heat the integrated circuit separately; "^^^ The heating section 'array is equipped with Plural addition: 2 and the entire storage module for controlling the test system in connection with the two-dimensional matrix test module described above, used to store the temperature of the test circuit and store test information, 纟 'temperature' Treat independent, and each of the heaters is the test information transmission group of each other's body circuit === OK ', each product can be 2. If the scope of patent application is the first! Xiangshou Ball Thunder ^ Those in the database. The test module system includes: ~ kinds of "" test systems "in which the two-dimensional matrix ~ the test section, the test section consists of-Fengdao, # _ Road, and on the semiconductor test board is arrayed Yes—Integrated circuit for semiconductor test and electric test, and the plural number is inserted into two:; 丨 = _, which can be used to set up a predetermined test—and the above-mentioned _complaint ^ 嗔 circuit; circuit 涔 Qihong, two domain heating The Shao system is provided with a control unit connected to a substrate on the base board. The eight arrays are equipped with a plurality of heaters corresponding to the Joetsu plural plug-in library array and are respectively connected to the control circuit; ^ Luke can transfer mr..trm to the corresponding heater to execute the mr..trm per degree. The fU circuit is passed out. Leading the margin test and the poor news via the semiconductor test 3 · If the second item of the scope of patent application includes: — ~ Kind of circuit test system, in which the computer host • order & production order 7L material is taken from the temperature control data in the company, and the test information of each 1226445 integrated circuit is input to the database; Z-degree control fresh element, which can be placed on the test volume The knife type of the road is input to each specific bit in each of the two-dimensional matrix test modules and controls the 'jitter: telecommunication recording unit, which can be connected to each two __, road' to detect each two-dimensional matrix Gu module. The dynamic system of the peak body circuit is transmitted to the above-mentioned program control unit; ',, and the measurement can be measured " dimensional rotating Etouch semiconducting _ test circuit, each of the two-dimensional matrix test mode The invariable characteristic change test information of each integrated circuit in the group is transmitted to the above-mentioned program control unit. As described in item 1 of the above-mentioned four kinds of integrated circuit, a two-dimensional matrix test module can be used. It is a complex array to form a three-dimensional matrix. An integrated circuit test system as described in item 1 of the patent application scope, wherein the at least one one-dimensional matrix test module can be installed in a chassis. ", 6", an integrated circuit test system as described in item 5 of the scope of the patent application, its connection-cold part device "provides the two-dimensional matrix formula; ::: who can quickly cool down after the second. Μ Depends on the completion of the first 7 of the six claims An integrated circuit test system, in which the information tested in the database can be analyzed through the -P LR module, and then the analysis can be sent back to the bucket = ^ a heater structure, which can be inserted in a two-dimensional matrix test mode Add in the group to warm the circuit of the product under test on the test part, which includes: ',', A a base, which is equipped with a plug-in unit;-said heating column under the top, which heating The bottom end of the column is provided with a convex-abutting head; connected with ... early element for connecting the above-mentioned top seat with the above-mentioned heating column; = thermal circuit, which is set up by the person to heat the heating column to heat the heating column; = The temperature circuit is installed in the heating column for sensing that the bottom end of the heating column touches the header to contact the integrated circuit under test. The integrated circuit is heated to the predetermined temperature to be measured. When the head temperature exceeds the predetermined measured temperature of the circuit under test, a signal can be sensed by the temperature sensing circuit 12 1226445, so that the heating circuit stops heating. 9-The heating n structure described in item 8 of the patent application, wherein the connection unit is a plurality of pins, and the two ends are respectively connected to the top seat and the heating column. 1 0. As described in item 9 of the patent # Patent paste-a heater structure, in which an elastic unit is sleeved on the plunger between the top seat and the heating column. As described in item 1g of mm, a kind of heating 11 structure, its seat and the pressure are widely used-a pressure gauge for measuring the heating column after the heating column contacts the circuit under test. , ㈣ 尔 元 得 1 3 · A heater structure as described in item 8 of the scope of application for a patent, which is inserted into the substrate of the heating section to position the heater. / 、 The plug-in unit is 1313
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104297655A (en) * 2013-11-28 2015-01-21 中国航空工业集团公司洛阳电光设备研究所 Circuit board low-temperature fault locating method and heating device thereof
CN104360260A (en) * 2014-11-18 2015-02-18 中国航空工业集团公司洛阳电光设备研究所 Method for rapidly positioning low-temperature fault chip of circuit board and refrigerating device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104297655A (en) * 2013-11-28 2015-01-21 中国航空工业集团公司洛阳电光设备研究所 Circuit board low-temperature fault locating method and heating device thereof
CN104360260A (en) * 2014-11-18 2015-02-18 中国航空工业集团公司洛阳电光设备研究所 Method for rapidly positioning low-temperature fault chip of circuit board and refrigerating device

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