TW595030B - OLED display panel and its manufacturing method - Google Patents

Abstract

The present invention is related to a kind of OLED display panel and its manufacturing method. Data line and scan line are formed on the substrate and are stacked at an interlacing region. Thin film transistors are formed on the substrate and are provided with a source/drain. Storage capacitors are formed on the substrate and are located between the thin film transistor and the interlacing region; a display region is provided between the storage capacitor and thin film transistor. The passivation layer is formed on the substrate to cover the thin film transistor, the storage capacitor, the data line, the scan line and the interlacing region, and is provided with a contact hole. The anode is formed on the passivation layer inside the display region, and is electrically connected with the source/drain via the contact hole. The spacer can be formed on the passivation layer outside the display region.

Description

595030 V. Description of the invention (l) [Technical field to which the invention belongs] The present invention relates to an organic light emitting diode (OLED) display panel and a manufacturing method thereof, and more particularly, to a method having a spacer ( spacer) or an organic light emitting diode display panel with a spacer protective layer and a manufacturing method therefor. [Such as technology] 0LED display panel can emit light by means of current driving or voltage driving. It does not need to be the same as liquid crystal display panel (LCD pane 1). A backlight must be added at the rear. Therefore, 〇LED display panel has the advantages of self-emission, wide viewing angle and full color. Among them, the 0LED display panel can be applied to portable electronic devices such as mobile phones and personal digital assistants (PDAs), becoming a display panel with great potential today. Please refer to FIG. 1A, which is a cross-sectional view of a conventional 0LED display. In FIG. 1A, the 0LED display 100 includes an 0LED display panel 104, a glass cover 102, and a sealant 106. The 0LED display panel 104 has a substrate 108 and a semiconductor structure 110. The semiconductor structure 110 is formed on the substrate. Above 108. Generally, a π Π ”-shaped glass cover 102 or a metal cover is used to cover the semiconductor structure 110, and the two ends of the glass cover 102 and the upper surface of the substrate 108 are bonded with a frame adhesive 106, so that the 0LED display panel 104 It is packaged into a 0LED display 100. Generally, the semiconductor structure 110 includes at least several scan lines and data lines.

IH8 Guan 25F (Youda) .ptd Page 5 595030 V. Description of the invention (2)), the scanning line and data line define several celestial elements (pi xe 1 s), because the structures in each celestial element are the same ' Therefore, a more detailed cross-sectional structure of the 0 LED display panel 104 is described here by taking a single day element as an example. Please refer to FIG. 1B, which is a structural cross-sectional view of a single daylight element of the 0LED display panel in FIG. 1A. In FIG. 1B, the 0LED display panel 104 includes at least a scan line 122, a data line 124, a thin film transistor (TFT) 126, a storage capacitor (Cs) 128, and a peripheral circuit pad ( pad) 130, anode 132 and passivation layer 133. The scanning line 122 and the lean material line 124 cross each other in a staggered region (χ —) i44. A thin film transistor 12 6 is formed on the substrate 108 and has a source / drain 126a. . The storage capacitor 128 is formed on the substrate 108 and is located between the diaphragm transistor 126 and the staggered region 144. The storage capacitor 128 and the thin film transistor 1 2 6 have a display area 1 46. The peripheral circuit connector 130 is formed on the substrate 108 and is located between the storage capacitor 128 and the interleaved region 144. The compliance layer 1 3 3 is formed on the substrate 1 08 and covers the thin film transistor 1 2 6, the storage capacitor 1 2 8, the peripheral circuit connection 1 3 0, the data line 124, the scan line 122, and the staggered area 144. . The protection layer 133 has a contact hole for exposing a part of the source / drain electrode 2ga in the manufacturing process. The anode 32 is formed on the protective layer 133 in the display area 146, and is electrically connected to the source / drain 126a through the above-mentioned contact hole. A hole injection layer, a hole transport layer, and an organic light emitting layer (〇rganic emissi〇n) may be sequentially formed on the anode 132 and the protective layer 133.

T ^ 1125F (友 达) .ptd page 6 595030 5. Description of the invention (3) layer), an electron transport layer and a cathode. When a voltage is applied to the anode 132 and the cathode, the hole transport layer and the electron transport layer will provide holes and electrons to the organic light emitting layer, respectively. When holes and electrons are combined in the organic light emitting layer, the organic light emitting layer located on the display region 146 can emit light to the outside.

At present, the 0LED display panel 104 is packaged with a frame adhesive 106 and a glass cover 102 or a metal cover, and the frame adhesive 106 only supports the edge of the glass cover 102, and the central area of the glass cover 102 and the semiconductor structure 11 There is a gap between them. Under the trend of 0LED display panels pursuing large size, the above-mentioned packaging method will cause the central area of the large-sized glass cover on the 0LED display panel to sag, which will crush the 0LED display panel below. Therefore, Akira Ebisawa, Kouji Yasukawa, Hiroyuki Endo, et al. Disclosed a 0LED display panel packaging technology in US Patent No. 6, 2, 59, 304 bi, as shown in FIG. 2. In the second figure, the 0LED display 200 includes an 0LED display panel 204, a sealing sheet 202, and a spacer 206 °. The LED display panel 204 packs

It includes a substrate 208 and a semiconductor structure 21o, and the semiconductor structure 21o is formed on the substrate 208. 〇1 ^ 0 display panel 204 is packaged into a 10 LED display 2 0 0 by a spacer (邛 & (^ 1 ·) 2-6 and a sealing sheet 2 02. The spacer 2 〇6 is arranged on the side of the substrate 208 outside the semiconductor structure 21 in a scattered manner. In the 0LED display 200, the height of the spacer 206 is larger than the height of the semiconductor structure 21 〇 However, the spacer 2 〇 6 It is possible that f will fall in the display area of the LED display panel 204 during the distribution process.

595030 V. Description of the invention (4) The Japanese guards crushed 〇LED display panel 204, which caused 〇LED display panel 204 to have a short-circuit phenomenon, which affects the operating performance of LED display panel 204. In addition, the packaging method disclosed in this patent will also cause the central region of the large-sized package board 202 on the 0LED display panel 204 to sag, which may cause damage to the OLED display panel 204 below. [Summary of the Invention] In view of this, 'the purpose of the present invention is to provide an organic light emitting diode (OLED) display panel and a manufacturing method' whose design of forming a spacer or a spacer protective layer can increase 0LED The pressure resistance of the structure of the display panel prevents the structure from being crushed by the upper packaging plate, glass cover or metal cover, so as to maintain the good operation of the LED display panel. According to the purpose of the present invention, a method for manufacturing an organic light emitting diode display panel is proposed. First, a substrate is provided. Next, a thin film transistor, a storage capacitor, a data line and a scan line are formed on the substrate. The data line and the scanning line overlap in a staggered area. The storage capacitor is located between the thin film transistor and the staggered area. There is a display region between the thin film transistor and the storage capacitor. The thin film has a source / drain. Then, a protective layer 1 is formed to cover the thin film transistor, storage, capacitor, data line, and scan error area. The protective layer has at least one contact hole. Then, open) to form an anode on the protective layer in the display area, and the anode is connected to the source / electrode lightning via a contact hole. Then, a spacer is formed on the protective layer outside the display area.

595030 5. Description of the invention (5) " ~~ '" 一 "' '" _ According to still another object of the present invention, a method for manufacturing an organic light emitting diode display panel is proposed. First, a substrate is provided. Next, a thin film transistor, a storage capacitor, a data line and a scan line are formed on the substrate. The data line and scan line overlap in a staggered area. The storage capacitor is located between the thin film transistor and the staggered area. There is a display area between the thin film transistor and the storage capacitor. The thin film transistor has a source / sink. pole. Then, the shape of a spacer is formed on the substrate to cover the thin film transistor, the storage battery, the trace line and the parent region, and the spacer protection layer has a contact to form an anode on the display. On the spacer protective layer in the area, the anode system is electrically connected to the source / drain electrode through the contact hole. One: According to another object of the present invention, an organic light emitting diode display f: storage capacitor to κϊ, data line, scanning line, thin film transistor, a substrate: and parallel; stacked and scanning line system On the board, a -source / non-electrode // system is formed on the substrate and is located on the thin film transistor and the interlaced region valley is formed on the substrate with a -display region therebetween. Valley and thin-film transistors Thin-film transistors, storage capacitors, and capacitors are formed on the substrate and cover the anode: the compliance layer formed in the display area has a contact hole. Electrode / Drain Connection. On the 3 layers, and through the contact hole and the source protection layer. ^ Objects can be formed outside the display area. According to another aspect of the present invention, the panel does not include at least a substrate and a substrate. OLED display __ Data lines and scan lines are formed in

mV1125F (友 达) .ptd Page 9 Storage capacitor, spacer protective layer and anode = ,,, shell wire, thin film transistor, 595030 5. Description of the invention (6) On the substrate, the data line and scanning system are formed on the substrate And is located on the substrate and is located on a board between the thin-film thin-film transistors and covers the thin-film electrical and parent regions, and is connected on the spacer-protective layer in the spacer-protective layer region. In order to make the above description of the present invention, a preferred embodiment is given below: 2: 2: Abundant to one parent error zone. The thin film transistor storage capacitor is formed between the electric solar element and the parent region, the storage capacitor and the t region. The spacer protective layer is formed on the substrate, the storage battery, the data line, and the scanning line have a contact hole. The anode system is formed on the display, and the purpose, characteristics, and advantages of the electrical properties of the contact holes and the source / drain electrodes can be more clearly understood, and in accordance with the accompanying drawings, detailed descriptions are as in [Embodiment Mode] Design an organic light-emitting diode (0 ring t; ng dlod ;; 0LED), fa1 =, = design of Guang Ge spacer cover can be added I) Display 2; its structure is not covered by the upper packaging board, glass Cover or metal cover to maintain the good operation of the 0LED display panel. Example 1; 5A: 3A to 3C, which are shown in accordance with the embodiment of the present invention -r 2] The first method of manufacturing an organic light emitting diode display panel. First, a circuit element of an organic light emitting diode display panel is formed. In the figure 3A, a substrate 3 () 8 is provided, and the substrate is shapeable.

595030 V. Description of invention (7)

Into a thin film transistor (TFT) 326, a storage capacitor (Cs) 328, a peripheral line pad (pad) 330, a data line (data line) 324, and a scan line (scan 1 ine ) 3 22. Among them, the data line 324 and the scanning line 322 are overlapped in an X-over 344, the storage capacitor 328 is located between the thin film transistor 326 and the staggered area 344, and the peripheral circuit pad 330 is located between the storage capacitor 328 and Between the staggered areas 344. In addition, a thin film transistor 326 and a storage capacitor 328 have a display area 346 therebetween, and the thin film transistor 326 has a source / drain 326a. Then a passivation layer 333 is formed on the substrate 308. The passivation layer 333 covers the thin film transistor 326, the storage capacitor 328, the peripheral circuit pad 33, the scan line 322, the data line 324, and the staggered area. 3 44. The protection layer 333 has at least one contact hole, which is used for exposing a part of the source / drain 326 in the process. Next, an anode 332 is formed on the protective layer 333 in the display area 346, and is electrically connected to the source / drain 32 6a through a contact hole. Forming a spacer for an organic light emitting diode display panel includes the following steps

: Can if: In the figure, a positive photoresistive layer 352 or a negative photoresistive layer is formed on top of the substrate. The positive photoresistive layer 352 or the negative photoresistive layer covers the anode d d Z. Then, _ ^ η Γ Λ ^ is used to cover and expose the pattern of the 354 positive photoresist layer 352, as shown in Fig. 3B. (10 ,,, ρ ^) or another photomask to define the negative photoresist layer. The pattern is combined with an apricot, to remove the positive photoresist layer 352 or part of the developer ^ ^ ^ ^ ^ 346 ^ ^ ^ For example, the spacer 352a is formed on the thin film transistor 326 595030. 5. Description of the invention (8) As shown in Figure 3C. Of course, the present invention can also form a spacer on the storage capacitor 328, the scan line 322, the data line 324, or the staggered area 344. A hole injection layer, a hole transport layer, and an organic emission layer may be sequentially formed on the spacer 3 5 2 a and the protective layer 3 3 3 in this order. ), An electron transport layer (electron transport layer) and a cathode (cathode). Embodiment 2 Please refer to FIGS. 4A to 4D, which are flow cross-sectional views showing a method for manufacturing a 0LED display panel with a spacer according to Embodiment 2 of the present invention. Figure 4A of this embodiment is different from Figure 3A of the first embodiment in that this embodiment uses the evaporation method, the base ore method, the chemical vapor deposition (CVD) method, or the rotation A spin coating method is used to form a spacer material layer 452 on the protective layer 333. The spacer material layer 452 is overlying the anode 332. The other structures in FIG. 4A are the same as those shown in FIG. 3A of the first embodiment, and the manufacturing process is also the same, and will not be described again here. Next, a patterned photoresist layer 4 5 4 is formed on the spacer material layer 4 5 2, which is completed by the above photoresist, exposure and development methods, as shown in Fig. 4b. Then, the exposed part of the spacer material layer 4 5 2 is removed by a dry-remnant method or a wet-surname method to form a spacer 4 5 2 a protective layer 3 3 3 out of the display area 3 4 6 For example, the spacer 4 5 2 a is formed on the thin film transistor 3 2 6, as shown in FIG. 4C. Of course, the present invention can also form the interval W503.

The Hi capacitor 328, the scan line 322, the data line 324, or the interlaced region 344 are used to remove the patterned layer 454 with a photoresist stripper, as shown in FIG. 4D. In addition, there is a hole injection layer, a wheel layer and a cathode. On the spacer 452a and the protection layer 333, a hole transporting layer, an organic light emitting layer, and an electron transmission can be sequentially formed. Please refer to FIGS. 5A to 5D, which are shown in accordance with the third embodiment of the present invention. Process flow chart of a method for manufacturing an OLED display panel with a physical protection layer. In FIG. 5A, first, a substrate 508 is provided. Next, a gate 5 62 is formed on the substrate 508. Then, a gate insulating layer 564, an amorphous silicon (α-Si) channel layer 568, and a heavily doped N-type (N +) ohmic contact layer 570 are formed on the substrate 508. Among them, the gate insulating layer 564 covers the free electrode 5 6 2, and the amorphous silicon channel layer 5 6 8 is formed on the gate insulating layer 5 6 4. The N + ohmic contact layer 570 is formed on the amorphous stone channel layer 568, and the amorphous stone channel layer 568 and the N + ohmic contact layer 570 are located above the gate electrode 562. Next, an anode 5 3 2 is formed on the gate insulation sound 5 64 outside one side of the N + ohmic contact layer 5 7 0. Then, a drain electrode 526a and a source electrode 526b are formed on the gate insulating layer 564. The non-electrode 526a and the source electrode 526b cover the N + ohmic contact layer 5 70. The drain electrode 526a is electrically connected to the anode 532. Among them, the gate electrode 562, the gate insulating layer 564, the amorphous silicon channel layer 568, the N + ohmic contact layer 570, the drain electrode 526a, and the source electrode 526b form a thin film transistor 526. It should be noted that the scanning lines, data lines, and storage capacitors are formed on the substrate 508.

595030 The description of the five inventions (ίο) The above is just that the drawing of this embodiment is not shown, and it will be explained a little here. Next, a spacer material layer 5 5 2 is formed over the gate insulating layer 5 6 4 to cover the thin film transistor 526 and the anode 532, and a patterned photoresist layer 554 is formed corresponding to the portion of the thin film transistor 526. 5 52 on the spacer material layer, as shown in FIG. 5B. Then, the exposed spacer material layer 552 is removed to form a spacer protective layer 552a over the gate insulating layer 564 outside the anode 532, and cover the thin film transistor 526, as shown in FIG. 5C. Next, the patterned photoresist layer 554 is removed with a photoresist stripper, as shown in FIG. 5D. In addition, a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode may be sequentially formed on the spacer protective layer 55 2a and the anode 532 in this order. However, those skilled in the art can also understand that the technology of the present invention is not limited to this. For example, after the steps of forming a thin film transistor 326, a storage capacitor 328, a data line 324, and a scanning line 3 2 2 on the substrate 308 in the first and second embodiments of the present invention, A spacer protective layer 652 is directly formed on the substrate 308, and the spacer protective layer 652 covers the thin film electrical body 326, the storage capacitor 328, the data line 324, the scan line 322, and the staggered area 3 44 'as shown in FIG. 6 . The spacer protective layer 652 has a contact hole. Then, the "anode 3 3 2" is formed on the spacer protective layer 652 in the display area 3 4 6 ", and is electrically connected to the source / drain 3 2 6 a of the thin film transistor 326 through the contact hole. Example 4

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Page 14

Tim25F (友 达) .ptd 595030 5. Description of the invention (11) Please refer to FIG. 7 ′, which shows a partial cross-sectional view of a 0 L E D display panel with a thin spacer layer according to Example 4 of the present invention. In Figure 7, 01 ^ 1) display panel 704 belongs to low-temperature polycrystalline stone (10

temperature poly si 1 icon, LTPS) 0LED display panel, 0LED display panel 704 includes a substrate 708, a thin film transistor 726, an anode 732 and a spacer protective layer 752. A thin film transistor 726 is formed on the substrate 708, and a spacer protective layer 752 is formed on the substrate 708 and covers the thin film transistor 726. The spacer protective layer 752 has a contact hole for exposing one end of the thin film transistor 726 during the manufacturing process of the OLED display panel 704. The anode 732 is formed on a part of the spacer protective layer 7 52 and covers a part of the thin film transistor 726 ′. The anode 732 is electrically connected to one end of the thin film transistor 72β through the contact hole. Of course, the present invention can also form at least one spacer above the substrate 708 outside the display region where the anode 732 is located. In addition, a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode may be sequentially formed on the spacer protective layer 752 and the anode 732 in this order. Embodiment 5 Please refer to FIG. 8, which shows a partial cross-sectional view of a 0LED display panel with a spacer cover according to Embodiment 5 of the present invention. In FIG. 8, the 0LED display panel 804 also belongs to the LTPS 0LED display panel. The 0LED display panel 804 includes a substrate 8 08, a thin film transistor 826, an anode 832, and a spacer cover 8 5 2. The thin film transistor 8 2 6 is formed on the substrate 8 08, the anode 832 is formed on the substrate 808, and the anode 832 is

TW1125F (AUO) .ptd Page 15 595030 V. Description of the invention (12) One end of the crystal 826 is electrically connected. In addition, the position of the anode 832 with respect to the thin film transistor 826 is lower than the position of the anode 732 with respect to the thin film transistor 726 in FIG. 7. The spacer protective layer 8 5 2 is formed on the substrate 8 0 8 and covers both ends of the thin film transistor 826 and the anode 832 to expose a part of the anode 8 3 2. Of course, the present invention may also form at least one spacer above the substrate 8 0 8 outside the display area where the anode § 32 is located. In addition, a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode may be sequentially formed on the spacer protective layer 852 and the anode 832.

Example Six

Please refer to FIG. 9, which shows a partial cross-sectional view of a 0LED display panel with a spacer cover according to Embodiment 6 of the present invention. In FIG. 9, the '0LED display panel 904 also belongs to the LTPS 0LED display panel. The OLED display panel 904 includes a substrate 908, a thin film transistor 926, an anode 9 32, and a spacer cover 952. The thin film transistor 92 and the anode 932 are formed on the substrate 908. The anode 932 is electrically connected to one end of the thin film transistor 926. In addition, the position of the anode 932 with respect to the thin film transistor 926 is lower than the position of the anode 832 with respect to the thin film transistor 826 in FIG. 8. The spacer protective layer 952 is formed on the substrate 908 and covers both ends of the thin film transistor 926 and the anode 932 to expose a part of the anode 9 32. Of course, in the present invention, a spacer may be formed on the substrate 908 outside the display area where the anode 932 is located. In addition, a hole injection layer, a hole transport layer, an organic light emitting layer, an electric 'transport layer, and a cathode may be sequentially formed on the spacer protective layer 952 and the anode 932.

TW1125F (友 达) .ptd Page 16 595030 5. Explanation of the invention (13) Embodiment 7 Please refer to FIG. 10, which shows a part of the 0LED display panel with a spacer protective layer according to Embodiment 7 of the present invention Sectional view. In FIG. 10, the 0LED display panel 984 belongs to the LTPS 0LED display panel. The QLED display panel 984 includes a substrate 986, a thin film transistor 988, a protective layer 990, a planarization layer 992, an anode 994, and a spacer.物 护 层 996。 Physical protection layer 996. A thin film transistor 988 is formed on the substrate 986, and a protective layer 990 is formed on the substrate 986 and covers a portion of the thin film transistor 988. The planarization layer 992 is formed on the protection layer 990, and the planarization layer 992 and the protection layer 990 have a contact hole penetrating therethrough. This contact hole is used to expose the thin film transistor 988 during the manufacturing process. One end. The anode 994 is formed on a part of the planarization layer 992, and is electrically connected to one end of the thin film transistor 988 through the contact hole. A spacer protective layer 996 is formed on the planarization layer 992 and covers both ends of the anode 994 'to expose portions of the anode 9 94. Of course, the present invention can also form a spacer above the substrate 986 outside the display area where the anode 9 94 is located. In addition, a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode may be sequentially formed on the spacer protective layer 996 and the anode 994 in this order. The 0LED display panel and manufacturing method disclosed by the above embodiments of the present invention have the following advantages: 1. The design of forming a spacer can increase the compressive resistance of the LED display panel, avoiding packaging with a glass cover or a metal cover The internal structure is crushed by the glass cover or metal cover to maintain the good operation of the 0LED display panel.

595030 V. Description of the invention (14) 2. The design of forming the protective layer of the spacer can be integrated into the τρτ system as a protective layer, and the traditional protective layer system can be omitted ^ In summary, although this The invention has been taken in a preferred embodiment: It is not intended to limit the present invention. 'Any person skilled in the art can protect the scope of the invention when the video is moved and moisturized by the bite. Therefore, this book is more relevant to the field. The attached patent application scope is TW1125F (AUO) .ptd Page 18 595030

595030 Brief description of the drawings Partial sectional view of the layer 0LED display panel. Reference numerals 100 and 200: Organic light-emitting diode (0LED) display 102: Glass cover 104, 204, 304, 404, 504, 704, 804, 904, 984: OLED display panel I 0 6: frame adhesive 108, 208, 308, 508, 708, 808, 908, 986: substrate II 0, 2 1 0: semiconductor structure 122, 322: scan line 124, 324: data line 126, 326, 5 26, 726, 826, 9 26, 988: thin film transistor (TFT) 1 2 6 a, 3 2 6 a: source / impulse 128, 328: storage capacitor 1 3 0, 3 3 0: peripheral circuit pads 132, 332, 532, 732, 832 , 9 32, 994: Anodes 133, 333, 990Protective layers 144, 344: Staggered areas 146, 346: Display area 2 02: Package board 2 0 6: Spacer 3 5 2: Positive photoresist layer

TW1125F (Youda) .ptd Page 20 595030 Brief description of the diagrams 352a, 452a: spacers 354: masks 452, 552: spacer material layers 454, 554: patterned photoresist layers 52 6a: drain 5 2 6 b : Source 55 2a, 652, 752, 8 52, 952, 9 96: Spacer cover 5 6 2: Gate 5 6 4: Gate insulating layer 5 6 8: Amorphous silicon channel layer 570: N + Ohm Contact layer 9 9 2: planarization layer

W1125F (友 达) .ptd Page 21

Claims (1)

595030 6. Scope of patent application • 1 · A method for manufacturing an organic light-emitting diode (OLED) display panel includes at least: providing a substrate; forming a thin film transistor, a storage capacitor, A data line and a scan line are on the substrate, wherein the data line and the scan line overlap in an interlaced area (X-over), and the storage capacitor is located between the thin film transistor and the interlaced area. There is a display area between the thin film transistor and the storage capacitor, and the thin film transistor has a source / inverter; a passivating layer is formed to cover the thin film transistor, the storage capacitor should be careful Photovoltaic valleys are green, the scan lines, and the staggered area. The protective layer has at least one contact hole; a positive electrode is formed in the display area. &Amp; n On the β protective layer, the anode is electrically connected to the source / drain electrode through the contact hole; and a spacer is formed to protect the &-π p ^% region Above the shield. Wherein the above-mentioned method of forming a spacer according to item 1 of the scope of the patent application further comprises: / forming a spacer on the thin film transistor. Wherein the above-mentioned method of forming a spacer according to item 1 of the scope of the patent application further comprises: / forming a spacer on the storage capacitor. The above-mentioned formation 4 · The method as described in item 1 of the scope of patent application-The step of a spacer further includes: / forming a spacer on the interlaced region. surface TW1125F (友 达) .ptd Page 22 595030 6. Application for Patent Scope 5 · The method described in item 1 of Shen Qing's Patent Scope, wherein the above step of forming a spacer further includes: forming a spacer on the data line or Above the scan line. 6. The method according to item 1 of the scope of patent application, wherein the step of forming a spacer further comprises: a shape f = a photoresist layer on the protective layer to cover the anode; a photomask is used to define the photoresist Patterning and exposing the layers; and ^ a developer removing portion of the photoresist layer and forming a spacer on the protective layer outside the far-off area. The method described in item 1 of the scope of patent application, wherein the step of forming a spacer further includes: using a vapor deposition method, a sputtering method, a chemical vapor deposition ('cvd) method, or a spin coating ( spin c〇ating) method-shaped material layer on the protective layer, the spacer material layer is overlaid to form a patterned photoresist layer on the spacer material layer; rough thickness = dry-cut method or clear-cut method The exposed part of the spacer is removed, "a spacer is formed on the protective layer outside the display area, and a photoresist stripper is used to remove the patterned photoresist layer. Η The method described in item 1 of the patent scope of the spacer 0, wherein after the above-mentioned step of forming a spacer, the method further comprises: a sound protection layer (h ° le injeGti ° n Uyer) covering the spacer in the cover. And the anode; T1V1125F (Youda). Ptd Page 23 595030 Sixth, the scope of the patent application forms a hole transport layer on the hole injection layer; an organic emission layer is formed on the hole transmission layer Forming an electron transport layer on the organic light emitting layer; and forming a cathode on the electron transport layer. 9. A method for manufacturing an organic light emitting diode display panel, at least comprising: providing a substrate; forming a thin film transistor, a storage capacitor data line, and a scan line on the substrate, the storage film thin film transistor and The crystal has a source to form a chamber, wherein the capacitor is located on the storage electrode / drain; the spacer protective layer body, the storage capacitor, and the sweep spacer protective layer have a contact hole to form an anode on the significant electrode. The contact hole and the 10th step of forming an anode as described in the patent application form a hole injection layer to form a hole transmission layer. The data line and the scanning line overlap in a staggered thin film transistor and the staggered area. There is a display area between the capacitors, and the thin film is on the substrate to cover the thin film transistor traces, the data lines and the staggered area, and the space; and the spacer protective layer in the display area. , The anode source / drain is electrically connected. The method according to item 9, wherein the above forms include: on the spacer protective layer and the anode; on the hole injection layer; TW1125F (Youda) .ptd Page 24 595030 6. Application scope: forming an organic light-emitting layer on the hole-transporting layer; forming an electron-transporting layer on the organic-light-emitting layer; and forming a cathode on the electron-transporting layer . 11. An organic light-emitting diode display panel, at least comprising: a substrate; a data line and a scanning line are formed on the substrate, and the data and the known drawing line are overlapped in a staggered area; and a line drain electrode A thin-film transistor is formed on the substrate and has a source / two storage capacitor. The thin-film transistor is formed on the substrate and is located between the thin-film transistor and the staggered region. The storage capacitor and the thin-film transistor are formed on the substrate. Between the crystals is a display area; ~ Another protective layer is formed on the substrate and covers the thin film transistor-, the storage capacitor, and the staggered area. The protective layer has a contact hole. The anode is formed on the protective layer in the display area and is electrically connected to the source / drain electrode through the contact hole; and the previous spacer is formed on the protective layer outside the display area. The organic light-emitting diode as described in item 丨 丨 of the application, wherein the spacer is formed on the thin film transistor. The organic light emitting diode display as described in item 11 of Shenqing's patent scope, wherein the spacer is formed on the storage capacitor. The organic light emitting diode display according to item 11 of the scope of the patent application, wherein the spacer is formed on the staggered region. Page 25 TW1125F (AUO) .Ptd 595030 6. Scope of patent application 15. The organic light-emitting diode display panel according to item 11 of the scope of patent application, wherein the material of the spacer is photo-dandelion. 16. The organic light emitting diode display panel according to item 11 of the scope of patent application, wherein the material of the spacer is a spacer material. 17. The organic light emitting diode display panel according to item 11 of the scope of patent application, wherein the organic light emitting diode display panel further includes: a hole injection layer formed on the protective layer and covering An electric hole transport layer is formed on the hole injection layer; an organic light emitting layer is formed on the hole transfer layer; an electron transport layer is formed on the organic light emitting layer; and The cathode is formed on the electron transport layer. 18. A type of organic light emitting diode display panel including at least: a substrate; a data line and a scanning line are formed on the substrate, and the data and the scanning line are overlapped in a staggered area; y ' A thin film transistor is formed on the substrate and has a source / a storage capacitor, a display area between the body and the staggered region; it is formed on the substrate and is located on the thin film transistor. A spacer protective layer is formed between the storage capacitor and the thin film transistor, which is formed on the substrate and covers the thin film crystal, the storage capacitor, the data line, the scan line and the staggered area, and a spacer. The protective layer has a contact hole; an anode with a scope of 5,905,030 patent applications is formed on the spacer protective layer in the display area, and is electrically connected to the source / drain electrode through the contact hole. 19. The organic light-emitting diode display panel according to item 18 of the scope of patent application, wherein the organic light-emitting diode display panel further comprises: a hole injection layer formed on the spacer protective layer and the anode. A previous hole transport layer, an organic light emitting layer, and an electron transport layer are formed on the hole injection layer; they are formed on the hole transport layer; they are formed on the organic light emitting layer; and a cathode is formed on the hole injection layer. Electron transport layer TW1125F (AUO) .ptd Page 27