TW591841B - A method for detection and protection of short circuit - Google Patents

A method for detection and protection of short circuit Download PDF

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TW591841B
TW591841B TW92116835A TW92116835A TW591841B TW 591841 B TW591841 B TW 591841B TW 92116835 A TW92116835 A TW 92116835A TW 92116835 A TW92116835 A TW 92116835A TW 591841 B TW591841 B TW 591841B
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circuit
input
detection
transistor
detection circuit
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TW92116835A
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Chinese (zh)
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Jy-Der David Tai
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Tai 1 Microelectronics Corp
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Abstract

Disclosed a method for detection and protection of short circuit under abnormal conditions of high current driver short circuit in the integrated circuit, and the operation is not influenced by variation of sensing circuit.

Description

591841591841

【發明所屬之技術領 本發明係有關一 適用於高電流驅動源 者0 域】 種短路偵測及保護電路,尤指一種可 之積體電路中的短路偵測及保護電路 【先前技術】 按一般積體電路(integrated Circuit)發生過載 overload)的原因,其無非包括線路本身發生短路;或以 過低的阻抗承受大電流’諸如:將兩個以上的驅動源接腳 端互接或將驅動源接腳直接接至於電源(p〇wer source) Φ ,當互接的兩端電壓不相等時,將導致驅動源之電流值瞬 間超過額定安全範圍,而對積體電路產生損害,由於功率 驅動源之内阻極低,更會導致瞬間大電流的異常現象,而 對整個積體電路造成破壞或導致其它線路短路。 因此針對上述之弊端目前現有常見的解決方案大致如 下,其中: (1 )如美國專利U S 5,9 7 3,5 6 9號(如附件一)係揭 露一種由預設之阻抗(known resistance)擷取其電壓而 與一能帶隙電路(bandgap reference circuit )所形成 如 之參考電壓,透過比較電路(comparator circuit)比對 ,以檢測是否有異常電流; 惟,其彳貞測電壓(請參閱附件一)係經由電流鏡( circuit Mirror)產生,但Q303、Q305之閘極電壓(gate Voltage)為一由脈波寬度調變PWM (Pulse Width[Technical field to which the invention belongs The present invention relates to a field 0 suitable for high-current drive sources] A type of short-circuit detection and protection circuit, especially a short-circuit detection and protection circuit in an integrated circuit [previous technology] The reason for the overload of the integrated circuit is that it includes the short circuit of the line itself; or it can withstand the large current with too low impedance, such as: connecting two or more driving source pins to each other or driving The source pin is directly connected to the power source (p〇wer source) Φ. When the voltage at the two ends of the interconnection is not equal, the current value of the drive source will instantly exceed the rated safety range, which will cause damage to the integrated circuit. The internal resistance of the source is extremely low, and it will cause an abnormal phenomenon of instantaneous large current, which will damage the entire integrated circuit or cause other circuits to short circuit. Therefore, the current common solutions to the above-mentioned disadvantages are roughly as follows, among which: (1) For example, US Patent No. 5,9 7 3,5 6 9 (such as Annex I) discloses a known resistance Capture its voltage and compare it with a reference voltage formed by a bandgap reference circuit, and compare it with a comparator circuit to detect whether there is an abnormal current; however, its voltage is measured (see Attachment 1) is generated through a current mirror (circuit Mirror), but the gate voltage of Q303 and Q305 is a pulse width modulation (Pulse Width)

第4頁 591841 五、發明說明(2)Page 4 591841 V. Description of the invention (2)

Modulation )所產生之開關電壓,實無電流鏡效果,故無 ^ ^到電〃,L鏡之追縱(t r a c k丨n g )偵測之目的’且其參考 電疋之月bf隙電路(band gap reference circuit)較為 複雜而相對提高生產成本。 (2 )另如美國專利US6, 1〇8, ι82號(如附件二)係 揭疼種可自行調整(s e 1 f a d j u s t i n g )過電流感測信號 之電路’其主要係由兩電阻器(resjst〇rs η and 12) 分別轉換高電壓後,再由雙極性電晶體(b i po 1 ar transistors 13 and 14)配合以MOSFET所組成之電流鏡 (current mirror 15 and 16)擷取兩比較電流 II、12, 其中俾當I2>I1時,方使A點輸出高電位,並與某一電壓 源3· 5V比較而偵測此過電流現象,並觸發保護電路,而達 到短路保護之目的。 惟此保濩電路需配合雙極性電晶體(B丨叩1 ^ transistor),利用穩疋的基極與射極電壓差(〜 m才能達到檢測的目的,且需一參考電源(3. 5V ) 成本高,並且此電路結構無法運用於金氧半(M0S) 【發明内容】The switching voltage generated by Modulation) does not have the effect of a current mirror, so there is no ^ ^ to the purpose of the detection of the L mirror track (track 丨 ng), and its reference to the electric circuit of the month bf gap circuit (band gap Reference circuit) is relatively complicated and relatively increases production costs. (2) Another example is U.S. Patent No. 6,108, ι82 (such as Annex II), which is a circuit capable of self-adjusting (se 1 fadjusting) overcurrent sensing signals, which is mainly composed of two resistors (resjst. rs η and 12) After converting the high voltage, the bipolar transistors (bi po 1 ar transistors 13 and 14) and the current mirror (current mirror 15 and 16) composed of MOSFETs are used to capture the two comparison currents II, 12 Wherein, when I2 > I1, make the point A output a high potential and compare it with a certain voltage source 3.5V to detect this overcurrent phenomenon and trigger the protection circuit to achieve the purpose of short circuit protection. However, the protection circuit needs to cooperate with a bipolar transistor (B 丨 叩 1 ^ transistor), using a stable base-emitter voltage difference (~ m to achieve the purpose of detection, and a reference power supply (3.5V) High cost, and this circuit structure cannot be applied to metal oxide half (M0S) [Summary of the invention]

本發明之主要目的即在於 路,其主要目的係為了偵測及 S IC)免於受到過載或異 位不受阻抗值影響者。 提供一種短路偵測及保護電 蔓金氧半積體電路(M〇 系狀態之損害,且其參考電The main purpose of the present invention is the circuit, the main purpose of which is to detect and prevent the IC from being affected by overload or ectopic resistance. Provide a short-circuit detection and protection circuit.

第5頁 591841 五、發明說明(3) 為了達到上述之目的,本發明係包括: 開關電晶體,係分別擷取第一輸入訊號與第二輸入訊 號; 觸發控制電晶體,係定義輸入訊號之觸發檢測時段; 比較器’其一輸入端連接至開關電晶體的輸出端,另 一端連接至分壓電阻器; 且分壓電阻器之另一端連接於觸發控制電晶體的輸出 端, 負載電阻器一端連接於開關電晶體之輸出端,另一端 接地;及 檢測電阻器’連接於該比較器之兩輸入端之間,藉使 ,,發控制電晶體導通時,若發生過電流(〇vercirrent )或短路(sh〇rt cirrent)時,使檢測電阻之電壓大於 ί ^ ^ ^内疋電壓,使比較器輸出一控制訊號,而將輸入 知斷訊以保護相關之電路。 【實施方式】 於吝t Ϊ :月ί提供一種短路偵測及保護電路,《係可適用 閱第-及第三圖所示之本發明實檢測電路中(請參 二:時序圖),其中該短路偵測電路 1 、一觸發控制電晶體2、一 要係由一開關電日日 ^ 1、-檢測電阻器R 2及-負冑‘ f 3、一分壓電阻器 中: 員載電阻器R L所組成;其Page 5 591841 V. Description of the invention (3) In order to achieve the above purpose, the present invention includes: a switching transistor, which respectively captures a first input signal and a second input signal; a trigger control transistor, which defines the input signal Trigger detection period; one input of the comparator 'is connected to the output of the switching transistor, and the other is connected to the voltage-dividing resistor; and the other end of the voltage-dividing resistor is connected to the output of the triggering control transistor, the load resistor One end is connected to the output terminal of the switching transistor, and the other end is grounded; and a detection resistor is connected between the two input terminals of the comparator. Therefore, if an overcurrent occurs when the control transistor is turned on (0vercirrent) When the circuit is short-circuited, the voltage of the detection resistor is greater than the internal voltage of ^^^^, so that the comparator outputs a control signal, and the input is interrupted to protect the related circuits. [Embodiment] Yu Ϊ Ϊ: Yue provides a short-circuit detection and protection circuit, "is applicable to the actual detection circuit of the present invention shown in Figures-and Figure 3 (refer to the timing diagram), where The short-circuit detection circuit 1, a trigger control transistor 2, a switching electric day ^ 1,-detection resistor R 2 and-negative 胄 'f 3, in a voltage divider resistor:器 RL; Its

591841 五 、發明說明(4) 广開關電曰曰體1係可由互補式金屬氧化物半導體 s ) P M 0 S a N M 0 S m "le riCrdUCt〇r,C M 0 係連接至該N M 〇 S的、、及朽、":m P M 〇 S的汲極 至電源(Vcc) 極’且WM〇S之源極係連接591841 V. Description of the invention (4) The wide switching electrical system can be composed of complementary metal oxide semiconductors) PM 0 S a NM 0 S m " le CrCrUCUCtor, CM 0 is connected to the NM 〇S ,, and decay, ": m PM 〇S drain to power (Vcc) electrode 'and the source of WM〇S is connected

Ground),並分別透過門〇 S之源極則連接至地電位( 輸入訊·, Μ極擷取第—輸人訊號V 1及第二 該觸發控制電晶濟〇 源極及閘極係分別連接^、、〇s (低準位觸發),其 Ρ Μ〇S的閘極,而今:源(Vcc )與開關電晶體1之 較器3之非反相輸入經分器…接至比 接至比較器3之反相於A山, 檢測電阻器R 2分別連Ground), and connected to the ground potential through the source of the gate 0S (input signal, the M pole captures the first-input signal V 1 and the second trigger control electric crystal source and gate respectively Connect ^ ,, 0s (low level trigger), the gate of its P MOS, and now: the source (Vcc) and the non-inverting input of the comparator 3 of the switching transistor 1 via the divider ... The inversion to comparator 3 is at A, and the detection resistors R 2 are connected respectively.

,俾於比較器3之非^相=(—)與非反相輪入端(+ ) V B,而於該比較写^ +輸入端(+ )形成輪入端點電壓 電壓V A,且該比較反2輸入端(-)形成輸入端點 ,一負載電阻器R L 1 ^ =輸出端形成輸出端點電壓V C -),另-端則連接至:電:1比較器:3之反相輸入端( 反相輸入端(—)介、*拉 C Gr〇und ),另比較器3之 較器3之輸出電壓ν' ^開,電晶體1之輪出端,由比 或短路等不正常狀況。。位鬲低即可得知是否產生過流 晴參照第三固% - ^ 作時序圖,其係二序=:^ =為第一圖電路實施架構之動 二”與比較器輪入;‘:電壓::訊=1、第二輸入訊 壓V C的位準,其中· A ’ V B以及輸出端點電, Non-phase = (-) and non-inverting wheel-in terminal (+) VB in comparator 3, and the comparison input ^ + input terminal (+) forms the wheel-in terminal voltage voltage VA, and the comparison The inverting 2 input terminal (-) forms the input terminal, a load resistor RL 1 ^ = the output terminal forms the output terminal voltage VC-), and the other-terminal is connected to: the inverting input terminal of the electric: 1 comparator: 3 (Inverting input terminal (-), * pull C GrOund), and the output voltage ν 'of comparator 3 and comparator 3 is on, and the output terminal of transistor 1 is abnormal, such as ratio or short circuit. . If the position is low, you can know whether the overcurrent is clear. Refer to the third solid%-^ to make a timing diagram, which is the second sequence =: ^ = the second implementation of the circuit implementation structure of the first picture "and the comparator turns; ': Voltage :: Signal = 1, the level of the second input signal voltage VC, where · A 'VB and the output terminal voltage

第7頁 591841 五 發明說明(5) 當第一輸入訊號Vl 榮 (High)時(T0〜T Y 1及第二輸入訊號V 2皆為高電位 觸發控制電晶體2皆為术:開關電晶體1 & P M〇s以及 阻器R 1及檢測雷RB為導通狀態,故無電流流經分壓電 ^及檢測電阻器R 2 ’因此 = 較113之兩輸人端電•“零 口;輸;端點vc為低電位Π-)狀態。“ T』)訊!uV 2轉為低電位(L-)狀態時(P.7 591841 Fifth invention description (5) When the first input signal Vl is High (T0 ~ TY 1 and the second input signal V 2 are both high potential triggering control transistors 2 are both surgery: switching transistor 1 & PM0s, the resistor R1 and the detection thunder RB are in the on state, so no current flows through the voltage divider ^ and the detection resistor R2 ', so = than the two input terminals of 113 • "Zero port; output ; Terminal vc is low potential Π-) state. "T") signal! When uV 2 turns to low potential (L-) state (

,^ t車父态3之輸入端點電壓v A、v B 由觸發控制電晶體2押制, ΰ仍錯 VA、VB盎電壓^:; f此電晶體仍在關閉狀態,使 若當第一輸入訊號V i亦轉為 即^晶體!之PM0S及觸發控制二)皆= 第輸广汛號v 1與第二輸入訊號v 2同時為低電位 二:t(QT2 —T3 )時’電流即由電源(Vcc )流經觸發 ::電晶體2之源極與汲極’再經分壓電阻器r丄、檢二 :J益R 2及負載電阻器R L到地電位(Gr_d ),此心 :*載電阻R L太小或由開關電晶體1輸出端直接連接至 位(G—)戶斤產生的短路狀況,流經分壓電阻器r 檢測電阻器R 2所產生之超額電壓亦將ί 流在 既定電壓Vth(T>T3),使該比較\將二於二…之 v c輸出高電位(High ),藉以達到3 =出?電壓 之目的。 ^ j偵測過載或短路狀況 591841 五、發明說明(6) ' '~' ---- 由於觸發控制電晶體2為高導通電晶體,1 抗值極低,。使得電源UcO全都降在分壓電阻器R] 檢測電阻态R 2及負載電阻器R L ,因此檢 與!壓電阻器"形成-比例分壓,使檢測動作與= 阻為阻抗之絕對值無關,如此即使每 另請再參閱第〔、四圖所示,係為本發明實位 發之架構與動作時序圖,其中: “於-丰位觸, ^ t The input terminal voltages v A and v B of the car parent state 3 are controlled by the trigger control transistor 2; ΰ is still wrong with the voltages of VA and VB ^ :; f This transistor is still off, so that if the first As soon as the input signal V i is turned into a crystal! PM0S and trigger control 2) Both = The first input Guangshun number v 1 and the second input signal v 2 are both low potential two: at t (QT2-T3), the current is triggered by the power source (Vcc): The source and drain of the crystal 2 pass through the voltage dividing resistor r 丄, check 2: J benefit R 2 and the load resistor RL to the ground potential (Gr_d), this heart: * the load resistance RL is too small or is switched by the switch The output terminal of the crystal 1 is directly connected to the short-circuit condition generated by the (G—) household kilogram. The excess voltage generated by flowing through the voltage-dividing resistor r detection resistor R 2 will also flow at a predetermined voltage Vth (T > T3), Make the comparison \ output two to two vc output high potential (High), so as to reach 3 = out? The purpose of voltage. ^ j Detecting overload or short-circuit conditions 591841 V. Description of the invention (6) '' ~ '---- Because the trigger control transistor 2 is a high-conduction current-carrying transistor, the impedance of 1 is extremely low. Make the power supply UcO all drop to the voltage dividing resistor R] to detect the resistance state R 2 and the load resistor R L, so check! The voltage resistor " forms-proportional voltage division, so that the detection action has nothing to do with the resistance being the absolute value of the impedance, so even if please refer to Figures [4 and 4] again, it is the structure and action of the real position of the present invention. Timing chart, where: "Yu-feng touch

Μ。ί ?關電晶體1係可由互補式金屬氧化物半導體(C = UM〇S及ΝΜ〇Μ組成,其“二 的及極係連接至該N M〇s 係連接至電源(VCC),Q WPM0 S之源極 位(Ground ),並八別透" 之源極則連接至地電 及第二輸入訊號以透過問極擷取第-輸入訊號”, 、該觸發控制電晶體2為N Μ〇S (高準位網|、Μ. The? 1 transistor can be composed of complementary metal oxide semiconductors (C = UM0S and NMOM, whose "two and pole systems are connected to the NMOS system is connected to a power source (VCC), Q WPM0S The source is ground, and the source is connected to the ground power and the second input signal to capture the -input signal through the interrogator ", and the trigger control transistor 2 is N Μ〇 S (High level network |,

雷日舻1 M U係刀別連接至地電位(Ground :) i n M R ^ Λ Λ? S " ^ - ^ i t :: 文土比苹乂态3之非反相給 A^VB^ ! 3 器rl’至電源、(Vcc),且比較器/之^又—負”阻 )連接至開關電晶體1之輸出端。 剧入端(+ 如此即當第—輸入訊號V1,及第二輸入訊號V2,皆雷 日 舻 1 MU series knife is connected to the ground potential (Ground :) in MR ^ Λ Λ? S " ^-^ it :: A non-inverting to the A3, VB ^! 3 device rl 'to the power supply, (Vcc), and the comparator / (negative-negative "resistance) is connected to the output terminal of the switching transistor 1. The drama input terminal (+ so that when the first-the input signal V1, and the second input signal V2, both

麵 第9頁 591841 五、發明說明(7) 為低電位(Low ) , (τ〇〜τ 高電位(High),伸第一乂),或第一輸入訊號V 1,為 CT1 -T2 )時,觸發控制電匕 電流流經分壓電阻哭R ] , _ ”、、 、狀悲,故無 電阻器R2,兩端之壓1差2,,使該檢測 端之間的電壓差為突,# 2零,亦即比較器3之兩輸入 輸出低電綠w)零狀能使比佐較器3之輸出端點電壓vc’ 晶體kNM 0S及觸發控制(H f )狀。^ 由電源(Vcc )依序流經查日日體2皆導通,電流即 2 ’ 、分壓電阻器R i,、後、’、阻器尺L ’ 、檢測電阻器 極與汲極連接至地電位(Gr〇und)。釗電阳體2之源 此時若負載電阻R丨,士 ,> 接連接至電源(Vcc)而產生短ς =電3^輸出端直 R 1,或檢測電阻器R 2,之電流將超過正分壓電阻器 3内之既定電壓vth,:T產4之、超額電壓亦將高於比較器 (High) 短路狀況之目的。 糟以達到偵測過載或 由於觸發控制電晶體2,為高導 < 阻抗值極低,使得電源(Vcc)全都曰^其導通時 、檢測電阻器R 2,及分壓電阻器R 、载電阻器R L, R 2,與分壓電阻器R 1,形成一比例分壓I檢測電阻器 伯測電阻器阻抗之絕對值無關 =測動作與 |使偵,則動作更為確 第10頁 五、發明說明(8) 實。 如第五圖所- 〆 第—圖之低準Ϊ為本發明之進一步實施例,其係將 加以結合之 發貫施例與第二圖之高準位觸發實施例 該開關電曰曰^ 電路,其中·· 控制電晶轉r:-之p M〇s的閘極係與同極性之觸發 之閑V/M〇S) 2 (triransis-發控制電/辦\互連接,並連接至輸入訊號V 3 ,且該觸 第 日日_ ( P M〇s ) 2之汲極透過分壓電阻R i盥 弟一比較器3 1之非反相輸入端(+ )連接,ί 入端點電壓,其源極則連接至電源(Vcc)。 輸· 。亥開關電晶體1之N M Q ς n B丨 π ς ^ ^ is ^ w υ s的閘極則與同極性(Ν Μ 〇s )之觸發控制電晶體(N〇MS ) 2, control transistor)之閘極相互連接,並 號V 4,且該觸發控制電晶體2 ’之汲極透過分壓電1器° 第二比較器32之反相輪入端(―)$接 之輸入端點電壓,其源極則連接至地電位(Ground 該第-比較器3 1之非反相輪入端( 器3 2之反相輸入端(一),係分刖^ 弟一比竿乂 ^ ^ 1 r P 9 ^ ^ 1係刀別透過一第一檢測電阻· 口口 4 1 ( R 2 )及弟一檢測電阻器4 2 ( R 2 ,)連接 形成-中端點’該中端點則連接至開關電晶體丄中之p Μ OS與NMOS之汲極,並同時連接第一比較器3ι之反 591841 五、發明說明(9) 點同時連接至負載電阻R L ,該負載電阻R L之另一端則 連接至一電壓VR,並該第一比較器3 1與第二比較器3 2之輸出端點V C及V C,分別連接於一或閘5 (OR Gate )之輸入端。 藉由上述之電路架構,無論輸入訊號V 3及V 4同時 處於低準位或高準位,此電路皆可檢測過電流或短路狀態 ,及讦透過第一檢測電阻器4 1 ( R 2 )或第二檢測電阻 ⑻4 2 ( R 2 ’)產生大於第一比較器3 1或第二比較器 ^ 2内:既定電壓V th ( V th,)後,再由輸出端點電壓 ▽ ’輸出高電位(High),並在VD輸出一高電 象之目的 H i gh )’藉以達到於高準位或低準位皆可偵測過載或 雉路现 、、 另於上述第五圖之實施例中,該開關電晶體1與第一 輸八訊號=1及第二輸入訊號v 2間各設有過電流控制電 胳6 (:J Γ丨所示),俾由該或閘5之輸出端分別接設 你森喊過®、、☆ + 控制‘,於發生過電流或短路時 及 以避免大電 ,而ί二訊f# V =制電路6同時切斷第一輸人訊號V 第巧輸出:u而 '查,並將開關電晶體1關閉 流嫩!:上=保護整體電路之目的者。 曰曰 R 1組成第一檢測 二形ii;亦可…l (β— L〇a 、2,與第一比較器 圖不,特將上述觸發控制電r 器4 1、4 2及分V"電阻1琴〜第二比較器3 2,檢測電 絡7及第二檢測電路7,(如第八圖所示),該第一檢 雜2 電591841 on page 9 V. Description of the invention (7) When low potential (Low), (τ0 ~ τ High potential, first extension), or when the first input signal V 1 is CT1 -T2) Trigger the control electric current to flow through the voltage-dividing resistor R], _ ",,,, and so on, so there is no resistor R2, and the voltage difference between the two ends is 2, so that the voltage difference between the detection ends is sudden. # 2 Zero, that is, the two inputs and outputs of comparator 3 are low-power green) The zero shape enables the output terminal voltage vc 'of comparator 3 to be in the form of crystal kNM 0S and trigger control (H f). ^ Power supply (Vcc ) Flow through the Japanese body 2 in sequence, and the current is 2 ′, the voltage-dividing resistor R i,, the back, and the resistor scale L ′. The detection resistor and drain are connected to the ground potential (Gr. und). If the source of the Zhaoyang body 2 is at this time, if the load resistance R 丨, ±, is connected to the power supply (Vcc), a short signal is generated: the output terminal is straight R1, or the detection resistor R2, The current will exceed the predetermined voltage vth in the positive voltage-dividing resistor 3: the output voltage of T produced 4 will also be higher than the comparator (High) short-circuit condition. It is worse to detect overload or trigger control Crystal 2 is a high-conductance < extremely low impedance value, so that when the power supply (Vcc) is all turned on, its detection resistor R 2 and voltage-dividing resistor R, load resistor RL, R 2 and voltage-dividing resistor Device R 1, forming a proportional voltage divider I detection resistor Primary measurement resistor The absolute value of the resistance of the resistor has nothing to do with the measurement action and | make the detection more accurate. Page 10 V. Description of the invention (8) Real. The diagram-〆 第-图 的 低 准 Ϊ is a further embodiment of the present invention, which is a combination of the hairpin embodiment and the high-level triggering embodiment of the second figure. The switch circuit is a circuit, where · · The gate of the control transistor to r :-p M〇s is the same as the trigger voltage V / M0S of the same polarity. 2 (triransis- sends the control power / office / interconnect and connects to the input signal V 3 And the drain of the first day _ (PM〇s) 2 is connected through the non-inverting input terminal (+) of the comparator 3 1 through the voltage dividing resistor R i, and the terminal voltage is input to the source It is connected to the power supply (Vcc). Input. .The NMQ of NM switching transistor 1 ς n B 丨 π ς ^ ^ is ^ w υ s's gate is the same polarity (N Μ 〇s) trigger control transistor The gates of (NOMS) 2, control transistor) are connected to each other, and are numbered V4, and the drain of the trigger control transistor 2 'passes through the sub-piezo 1 device, and the inverting wheel input end of the second comparator 32 (―) The input terminal voltage is connected to $, and its source is connected to the ground potential (Ground, the non-inverting wheel-in terminal of the first comparator 31 1 (the inverting input terminal (a) of the device 32, which is divided into刖 ^ 一一 一 乂 乂 ^ ^ 1 r P 9 ^ ^ 1 series knife is formed by connecting a first detection resistor · port 4 1 (R 2) and a first detection resistor 4 2 (R 2,)- The middle terminal point is connected to the p M OS of the switching transistor and the drain of the NMOS, and is also connected to the inverse of the first comparator 3ι 591841. 5. Description of the invention (9) The point is connected to the load resistor at the same time RL, the other end of the load resistor RL is connected to a voltage VR, and the output terminals VC and VC of the first comparator 31 and the second comparator 32 are respectively connected to an OR gate 5 (OR Gate) Input. With the above-mentioned circuit architecture, this circuit can detect an overcurrent or short-circuit condition regardless of whether the input signals V 3 and V 4 are at a low level or a high level at the same time, and through the first detection resistor 4 1 (R 2) Or the second detection resistor ⑻4 2 (R 2 ′) is greater than the first comparator 31 or the second comparator ^ 2: After the predetermined voltage V th (V th,), the output terminal voltage ▽ 'outputs high Potential (High) and outputting a high electric image at VD (H i gh) 'so as to reach the high level or low level can detect overload or loopholes, and the embodiment shown in the fifth figure above In the switch transistor 1 and the first input eight signal = 1 and the second input signal v 2 are respectively provided with an overcurrent control circuit 6 (shown by J Γ 丨), and the output terminal of the OR gate 5 Separately set your Sen shouted ® ,, ☆ + control 'to avoid large electricity in the event of overcurrent or short circuit, and the second signal f # V = control circuit 6 simultaneously cut off the first input signal V No. Q output : U and 'check, and turn the switching transistor 1 off to flow tender! : Up = the purpose of protecting the overall circuit. Said that R 1 constitutes the first detection type II; also ... l (β- L0a, 2, which is different from that of the first comparator, and the above-mentioned trigger control motors 4 1, 4 2 and V " Resistor 1 ~ the second comparator 32, the detection circuit 7 and the second detection circuit 7, (as shown in the eighth figure), the first detection circuit 2

591841 五、發明說明(10) 測電路7與第二檢測電路7’之間則接設一平衡負 如第七圖所示),俾藉由檢測平衡負載8所通過的\ 否過量,以得知是否有過載或短路情形產生,盆 L = V 2同相,V 1’與V 2,同相,但v丄與乂丄/、 1相、 ,V 2與V 2 ’立為反相。 ”、、相 當V102為低電壓(V1,與V2,為高電 ,開關電晶體1之PM〇S導通(以下請同時配合參^ 七、八圖所示)(其Μ Μ〇S關閉),開關電晶體丄, Ν Μ〇S亦導通(其Ρ Μ〇S關閉),電流即由開關電曰 體1之電源(Vcc )依序流經開關電晶體丄之p M〇s 、曰曰 平衡負載8及開關電晶體1 ’之Ν Μ〇s到地電位(、 Ground ),且由於第一檢測電路7之觸發控制電晶體2已 導通,電流由電源(Vcc )流經觸發控制電晶體2 ,分壓 電阻器R ]_ ,檢測電阻器R 2 ,平衡負載8及開關電晶體 1 ’之Ν Μ〇S到地電位(Ground )。此時若平衡負載8 之電阻太低,此電流即增加。若B點短路至地電位( Ground )時,電流由上述路徑經電源(Vcc )流經分壓電 阻器R 1及檢測電阻器R 2到地電位(Ground ),電流增 加更多。以上之兩狀態將使第一檢測電路7之檢測電阻器 R 2之電壓降(voltage drop)高於第一檢測電路7之第 一比較器3 1内的既定電壓V th,使第一比較器3 1輸出 高電壓(high)並透過或閘5 (OR Gate5)於VD輸出 高電位(High)。 若B ’端短路至電源(Vcc )時,由於第二檢測電路7591841 V. Description of the invention (10) A balance negative is connected between the test circuit 7 and the second detection circuit 7 '(as shown in the seventh figure). Know if there is an overload or short circuit situation, basin L = V 2 is in phase, V 1 'is in phase with V 2, but v 丄 is in phase with 乂 丄 /, 1 phase, and V 2 and V 2' are in opposite phases. ", Corresponding to V102 is a low voltage (V1, and V2 are high power, the PMMOS of the switching transistor 1 is turned on (please refer to Figures 7 and 8 at the same time) (the MMOS is turned off), The switching transistor 丄 is also turned on (its P MOS is turned off), and the current is sequentially flowed through the switching transistor 丄 p MOS by the power source (Vcc) of the switching transistor 1 (Vcc). The load 8 and the switching transistor 1 'N MOS to ground potential (, Ground), and because the trigger control transistor 2 of the first detection circuit 7 has been turned on, a current flows from the power source (Vcc) through the trigger control transistor 2 , Voltage-dividing resistor R] _, detection resistor R 2, balanced load 8 and switching transistor 1 ′ N MOS to ground (Ground). At this time, if the resistance of balanced load 8 is too low, this current is Increase. If point B is short-circuited to the ground potential (Ground), the current flows from the above path through the power supply (Vcc) through the voltage dividing resistor R 1 and the detection resistor R 2 to the ground potential (Ground), and the current increases more. Above These two states will cause the voltage drop of the detection resistor R 2 of the first detection circuit 7 to be higher than that of the first detection circuit. The predetermined voltage V th in the first comparator 31 of the circuit 7 causes the first comparator 31 to output a high voltage (High) and output a high potential (V) to VD through the OR gate 5 (OR Gate 5). If B ' When the terminal is short-circuited to the power supply (Vcc), due to the second detection circuit 7

第13頁 591841 五、發明說明(ll) ,之觸發控制電晶體2 , I Vcc) 阻器R 1 ,至觸發控制電曰 々、、态R 2,及分壓電Page 13 591841 V. Description of the Invention (ll), the trigger control transistor 2, I Vcc) resistor R 1, to the trigger control transistor 々, the state R 2, and the divided voltage

Ground ),流經其檢測電曰曰阻 沒極及源極到地電位( 電流亦將超過正當信 L 2及分壓電阻器R 1,之 產生之超額電遷亦將:二J額電流在檢測電阻器R 2,所 32内的既定電於第;;檢測電路7’之第二比較器 塵(high)並透過或閘 弟一比f器3 2之輸出高電 位(High ),藉以遠 ate 5 )於V D輸出高電 反之,若當或短路狀況之目的。 電壓)時,開關電晶體^㈡以1“與Μ’” 配合參閱第七、八m ^ M〇S冷通(以下請同時 晶體1之N Μ 〇 s ^ (其N M 0 S關閉),開關電 開關電晶體1,之電/ j (其P M〇S關閉),電流即由 p μ 〇 s、平衡負/β ( cc )依序流經開關電晶體1 ’之 位(Ground)且開關電晶體1之心〇 S到地電 體2已導通,# 土於弟一檢測電路7,之觸發控制電晶 ,分壓電阻号Γτ由電源(Vcc)流經觸發控制電晶體2 雷曰# 1 tlNJ Λ/Γ 1 ,檢測電阻器R 2 ,平衡負載8及開關 曰曰- S到地電位(Ground )。此時若平衡負 之“阻;^低’此電流即增加。若B,點短路至地電位 GrC^nd)日守’電流由上述路徑經電源(Vcc)流經分壓 =阻器,1及檢测電阻器R 2到地電位(Ground),電流 增=更多。以上之兩狀態將使第二檢測電路7,之檢測電 阻為R 2之電壓降(v〇itage drop)高於第二檢測電路7Ground), the current flowing through its detection electrode and the source to ground potential (the current will also exceed the legitimate letter L 2 and the voltage divider resistor R 1, the resulting excess electrical migration will also: The detection resistor R 2 is set to be the first in the 32; the second comparator of the detection circuit 7 ′ is dusty (high) and passes through the gate or the output of the comparator 3 2 to a higher potential (High), thereby far ate 5) For VD output high voltage, otherwise, if the purpose of short circuit or short circuit conditions. Voltage), the switching transistor ^ ㈡ with 1 "with Μ '" See the seventh and eighth m ^ M0S cold pass (hereinafter please also the N Μ 〇s of the crystal 1 (its NM 0 S is off), switch The electric switch transistor 1, the electricity / j (its PM0S is off), the current flows from p μ s, the balance negative / β (cc) sequentially through the switch transistor 1 '(Ground) and the switch circuit The heart of the crystal 1 has been turned on to the ground electric body 2. # 土 于 弟 一 Detect circuit 7, the trigger control transistor, the voltage-dividing resistance number Γτ flows through the trigger control transistor 2 from the power source (Vcc). tlNJ Λ / Γ 1, detection resistor R 2, balanced load 8 and switch said-S to ground (Ground). At this time, if the balance is negative "resistance; ^ low," this current will increase. If B, point short circuit To the ground potential GrC ^ nd) the current from the above path through the power supply (Vcc) through the voltage divider = resistor, 1 and the detection resistor R 2 to the ground potential (Ground), the current increases = more. The two states will make the voltage drop of the second detection circuit 7 with a detection resistance of R 2 higher than that of the second detection circuit 7

591841 五、發明說明(12) 1之^第m β比較杰3 1内的既定電壓V th,,使第一比較器 n二山:電壓(hlgh)並透過或閘5 (OR Gate· 5)於V D輸出尚電位(High )。 >總ί i ^短路至電源(Vcc )時,由於第一檢測電路7 )流經第= Λ導;",電流"(相等於Vcc 』蛋路7之檢測電阻器R 2 ’及分壓電阻器 R 1至觸發控制電晶體2,之汲極及源極到地電位( μ如流經其檢測電阻器R 2 ’及分壓電阻器R 1,之 產Γ ^^過正常值,此超額電流在檢測電阻器R 2,所 2内壓亦將高於第-檢測電路7之第二比較器3591841 V. Description of the invention (12) The ^ th m β of 1 compares the predetermined voltage V th in Jie 3 1 to make the first comparator n Ershan: voltage (hlgh) and pass through OR gate 5 (OR Gate · 5) The VD outputs a high potential (High). > When the total I ^ is short-circuited to the power source (Vcc), because the first detection circuit 7) flows through the first = Λ conduct; ", the current " (equivalent to Vcc '' egg circuit 7 detection resistor R 2 'and The potential of the voltage-dividing resistor R 1 to the trigger control transistor 2 and the drain and source to ground (μ as flowing through its detection resistor R 2 ′ and the voltage-dividing resistor R 1) ^^^ are over normal values , This excess current is in the detection resistor R 2, so the internal pressure of 2 will also be higher than the second comparator 3 of the-detection circuit 7

Uii2Vth,*第二比較器3 2之輸出高電壓( =ί = 5)…輸出高電位( 達到彳貞測過載或短路狀況之g的。 第二檢測電!^不^任^異常狀況皆由第一檢測電路7或 此結果將由产刺士某—比較器輸出高電位(High ), 第七=電路7或7’内之或間5 (〇"❿5)及 所有輸人柝輪出一高電位(High),此輸出訊號經由 V2/V1,/ 丄L、CTL ,將輸入訊號VI/ 斷此昱當2斷切’使所有開關電晶體1斷路而截 -I、吊電流,以達到保護此電路之目的。 【特點及功效】 本發明所;^ 術相互比妒士 /、之紐路偵測及保護電路,與其他習用技 父守更具有下列之優點:Uii2Vth, * The output of the second comparator 3 2 is high voltage (= ί = 5) ... the output is high potential (up to g of the overload or short-circuit condition of the 彳 测 measurement. The second detection power! ^ 不 ^ 任 ^ Any abnormal conditions are caused by The first detection circuit 7 or this result will be produced by a certain assassin—the comparator will output a high potential (High), seventh = circuit 7 or 7 ', or 5 (〇 " ❿5) and all inputs will be rounded out. High potential (High), this output signal passes V2 / V1, / 丄 L, CTL, will cut the input signal VI / break this Yu when 2 cut off 'make all switching transistors 1 open circuit and cut off -I, hanging current to achieve The purpose of protecting this circuit. [Characteristics and Effects] Compared with other technology detection and protection circuits, the technology of the present invention has the following advantages:

第15頁 591841 五、發明說明(13) 由偵測電阻器歲八 動作與偵測電阻:堡電阻器…比例分壓’使檢測 2 無須設計昂= 對值無關。^ <參考電位電路,而可有效節省製程成 ° 3 ,測電:器之兩端電壓直接與比較器之既定電壓做比 較,而無須參照於電源(Vcc)或地電位(gr〇und) Ο 明,ί C Ϊ二,明係針對本發明之一可行實施例之具體說 二二:列並非用以限制本發明之專利範圍(諸如) 凡脫 ^明技藝精神所為之等效實施或變更,均應《 包含於本案之專利範圍中。 、^上所述’本案不但在技術思想上確屬創新,並能較 習用物品增進上述多項功效,應已充分符合新穎性及進步 性之法定發明專利要件,爰依法提出申請,懇請貴局核 准本件發明專利申請案,以勵發明,至感德便。Page 15 591841 V. Description of the invention (13) The detection resistor is 8 years old. Action and detection resistor: Fort resistor ... Proportional voltage divider 'makes detection 2 unnecessary. Design = irrelevant to the value. ^ < Reference potential circuit, which can effectively save the process into ° 3, electricity measurement: the voltage across the device is directly compared with the predetermined voltage of the comparator, without reference to the power supply (Vcc) or ground potential (grund) 〇 Ming, ί C, 22. Ming refers to a specific example of a possible embodiment of the present invention: the column is not intended to limit the scope of the patent of the present invention (such as) equivalent to the implementation or modification of the spirit of Ming technology Shall be included in the scope of patents in this case. The above mentioned case is not only innovative in terms of technical ideas, but also enhances the above-mentioned multiple effects over conventional items. It should have fully met the requirements for statutory invention patents that are novel and progressive, and applied in accordance with the law. This invention patent application is designed to encourage inventions, to the utmost convenience.

第16頁 591841 圖式簡單說明 【圖式簡 第一圖係 第二圖係 第三圖係 第四圖係 第五圖係 電路的實 第六圖係 電路搭配 第七圖係 測電路的 第八圖係 之電路架 單說明】 ^ ^發明於高準位觸發時之偵測電路實施 為弟一圖中之電路實施架構的動作時序圖’。、冓。 為本發明於低準位觸發時之偵測電路實施架構。 為第二圖中之電路實施架構的動作時序圖。° 為本發明進一步可同時於低準位及高準 施架構。 < 彳貝测 為本發明進一步可同時於低準位及高準位之偵測 控制電路的實施架。.· 為本發明由觸發控制電晶體與比較器所組成之偵 實施架構。 為本發明以B T L (Balance-Tied Load )實施 構。 主要部分代表符號】 、1 ,......開關電晶體Page 16 591841 Brief description of the drawings [Schematic diagram The first diagram is the second diagram is the third diagram is the fourth diagram is the fifth diagram of the circuit. The sixth diagram is the eighth circuit with the seventh diagram. Description of the circuit frame of the diagram] ^ ^ The detection circuit invented when the high-level trigger is implemented is the operation timing diagram of the circuit implementation architecture in the first figure '. ,ten billions. The implementation structure of the detection circuit of the present invention when the low-level trigger is triggered. A timing diagram of the implementation of the architecture for the circuit in the second figure. ° The invention can further implement the architecture at a low level and a high level at the same time. < 彳 Testing is an implementation of the present invention which can further detect and control circuits at low and high levels simultaneously. . · This is the detection implementation structure composed of the trigger control transistor and the comparator. The present invention is implemented in B T L (Balance-Tied Load). The main part of the symbol], 1, ... Switching transistor

2 ......觸發控制電晶 3 ·.....比較器 42 ...... Trigger control transistor 3 · ..... Comparator 4

55

第一比較器 第二比較器 第一檢測電阻器 第二檢測電阻器 或閘 (R 2 ) (R 2’) • · ·過電流控制電路First comparator Second comparator First detection resistor Second detection resistor OR gate (R 2) (R 2 ’) • · · Overcurrent control circuit

第17頁Page 17

591841 圖式簡單說明 7 ......第一檢測電路 7 ’......第二檢測電路 R 1 、R 1 ’......分壓電阻器 R 2、R 2 ’......檢測電阻器 RL 、RL’......負載電阻器591841 Brief description of the diagram 7 ... First detection circuit 7 '... Second detection circuit R1, R1' ... Voltage-dividing resistors R2, R2 ' ... detection resistors RL, RL '... load resistors

Claims (1)

591841 六、申請專利範圍 1、一 開關電 觸發控 比較器 分壓電 另一端連接 負載電 檢測電 於觸發控制 器内之既定 2、 如 中所述之開 〇S及N Μ 3、 如 中戶斤述之觸 4、 如 中户斤述之觸 >極性 第 > 輸入 >極性 開關電晶體 訊號之觸 >分壓 與 A 種短路 晶體, 制電晶 ,其一 阻器, 於比較 阻器, 阻器, 電晶體 電壓, 申請專 關電晶 〇 s所 申請專 發控制 申請專 發控制 種短路 互補之 訊號; 互補之 匹配串 發檢測 電阻器 偵測電 用以擷 體,係 路,至 取輸入 定義輸 輪入端連接至 端連接於觸 器之另 連接於 連接於 導通時 使比車交 利範園 體係可 組成。 利範圍 電晶體 利範圍 電晶體 偵測電 開關電 觸發控 接,以 時段; 一輸入 開關電 該比較 ,令檢 器輸出 第1項 由互補 少包括: 訊號; 士 π · 入訊號之觸發檢測日1又’ 開關電晶體的輸出端: 發控制電晶體的輸出端’ 端; 晶體之輸出端;及 器之兩輸入端之間,藉使 測電阻之電壓大於該比較 控制訊號者。 所述之短路偵測電路,其 式金屬氧化物半導體ΡΜ 第1項戶斤述之短路偵測電路,其 係可為高準位觸發。 第1項戶斤述之短路偵測電路,其 係可為低準位觸發。 路,其係包括: 晶體,係分別擷取第一輸入訊號 制電晶體,分別與前述同極性之 同時定義第一輸入訊號與第二輸591841 VI. Application for patent scope 1. A switch electric trigger control comparator divides the piezoelectricity and the other end is connected to the load electric detection electric in the trigger controller. 2. It is opened as described above. 0S and N Μ 3. The touch of jinshu 4, such as the touch of zhonghu jinshi >> polarity> input> touch of polar switch transistor signal> partial voltage and type A short-circuit crystal, transistor, one of the resistors, for comparison Resistors, resistors, transistor voltages, apply for special control of transistor 0s, apply for special control, apply for special control of short-circuit complementary signals; complementary matching series detection resistors detect electricity to pick up the body, the system , To take input defines the input end of the input wheel is connected to the contactor and the other is connected to the conduction, so that the car can be composed. Lee range transistor Lee range transistor detection Electric switch electrically triggers the control connection to the time period; an input switch should be compared to make the detector output the first item from the complementary less include: signal; π π · detection date of the incoming signal 1'The output terminal of the switching transistor: the output terminal of the control transistor; the output terminal of the crystal; and between the two input terminals of the device, if the voltage of the resistance measurement is greater than the comparison control signal. The short-circuit detection circuit is the short-circuit detection circuit described in item 1 of the metal oxide semiconductor PM, which can be triggered at a high level. The short circuit detection circuit described in the first item can be triggered at a low level. Circuit, which includes: a crystal, which respectively captures a first input signal to make a transistor, and respectively defines the first input signal and the second output with the same polarity as the foregoing. 第19頁· 591841 六、申請專利範圍 一第一比較器,其 於其一觸發控制電晶體 一第二比較器,其 器之另一輸入端及開關 過另一分壓電阻器連接 一第一檢測電阻器 ;及 一第二檢測電阻器 ’藉使於觸發控制電晶 器或第二比較器内之既 較器輸出控制訊號者。 6、 如申請專利範 中所述之開關電晶體及 氧化物半導體PM〇s 7、 如申請專利範 中所述之觸發控制電晶 一輸入端透過其一分壓電阻器連接 的輸出端; 一輸入端連接相異極性的第一比較 電日日體之輸出端’另一輸入端則透 另一觸發控制電晶體的輸出端; ’連接於第一比較器之兩輸入端間 ’連接於第二比較器之兩輸入端間 體導通時,產生一大於該第一比較 定電壓,令該第一比較器或第二比| 圍第5項所述之短路偵測電路,其 觸發控制電晶體係可由互補式金屬 及N Μ〇S所組成。 圍第5項所述之短路^貞測電路,盆 體係包括局準位觸發及低準位觸發 8、如申請專利範圍第5項所述之短路偵測電路,其 中更包括: 〃 過電流控制電路,其連接於輸入訊號與開關電曰體門 ,其控制端則接設於或閘之輸出端,以接收前述之=制二 號後,將輸入端斷訊以保護相關電路。 工 ° > 9、如申請專利範圍第8項所述之短路偵測電路,其 中该過電流控制電路之控制訊號係玎透過_或閘(Gat 第20頁 591841 六、申請專利範圍 e )擷取。 1 0、一種短路偵測電路,其係包括: 第一檢測電路,具有兩輸入端分別擷取第一輸入訊號 與第二輸入訊號; 第二檢測電路,具有兩輸入端分別擷取另第一輸入訊 號與第二輸訊號;及 平衡負載,搞接於第一檢測電路與第二檢測電路之檢 測端間。 1 1、如申請專利範圍第1 0項所述之短路偵測電路, 其中該第一檢測電路之第一輸入訊號與第二輪入訊號為同· 相,第二檢測電路之另第一輸入訊號與第二輸入訊號為同 相。 1 2、如申請專利範圍第1 0項所述之短路偵測電路, 其中該第一檢測電路之第一輸入訊號或第二輸入訊號及第 二檢測電路之另一第一輸入訊號或另一第二輸入訊號為異 相。 1 3、如申請專利範圍第1 0項所述之短路偵測電路, 其中該第一檢測電路之第一輸入訊號於低電位(Low )轉 態至高電位(H i gh )時,較第二輸入訊號之時序先行之,φ 其由高電位(H i gh )轉態至低電位(Low )時,則較第二 輸入訊號之時序後行之。 1 4、如申請專利範圍第1 0項所述之短路偵測電路, 其中該第二檢測電路之另一第一輸入訊號於低電位(L ow )轉態至高電位(H i gh )時,較另一第二輸入訊號之時序Page 19 · 591841 VI. Patent application scope-a first comparator, which triggers a control transistor-a second comparator, the other input of the device and the switch are connected to a first through another voltage dividing resistor A detection resistor; and a second detection resistor, which is used to trigger a control transistor or a comparator to output a control signal in the second comparator. 6. The switching transistor and the oxide semiconductor PM0s as described in the patent application. 7. The trigger control transistor as described in the patent application. An input terminal of the trigger control transistor is connected to the output terminal through a voltage dividing resistor. The input terminal is connected to the output terminal of the first comparative electric solar object with a different polarity. The other input terminal is connected to the output terminal of another trigger control transistor. The terminal is connected between the two input terminals of the first comparator. When the two input terminals of the two comparators are turned on, a constant voltage greater than the first comparison is generated, so that the first comparator or the second ratio | the short-circuit detection circuit described in item 5 triggers the control transistor The system can be composed of complementary metals and N MOS. The short circuit test circuit described in item 5 includes a local level trigger and a low level trigger. 8. The short circuit detection circuit described in item 5 of the patent application scope, which further includes: 〃 Overcurrent control The circuit is connected to the input signal and the electric door, and the control terminal is connected to the output terminal of the OR gate to receive the aforementioned = system No. 2 and the input terminal is disconnected to protect the related circuit. ° > 9. The short-circuit detection circuit as described in item 8 of the scope of patent application, wherein the control signal of the overcurrent control circuit is through the OR gate (Gat page 20, 591841 VI, scope of patent application e) take. 10. A short-circuit detection circuit, comprising: a first detection circuit having two input terminals to respectively capture a first input signal and a second input signal; a second detection circuit having two input terminals to respectively capture another first signal The input signal and the second input signal; and a balanced load connected between the detection terminals of the first detection circuit and the second detection circuit. 11. The short-circuit detection circuit as described in item 10 of the scope of patent application, wherein the first input signal of the first detection circuit and the second round of input signals are in phase, and the other first input of the second detection circuit The signal is in phase with the second input signal. 12. The short-circuit detection circuit as described in item 10 of the scope of patent application, wherein the first input signal or the second input signal of the first detection circuit and another first input signal or the other of the second detection circuit The second input signal is out of phase. 1 3. The short-circuit detection circuit as described in item 10 of the scope of patent application, wherein when the first input signal of the first detection circuit transitions from a low potential (Low) to a high potential (High), it is The timing of the input signal precedes, and when it transitions from a high potential (High) to a low potential (Low), it is later than the timing of the second input signal. 14. The short-circuit detection circuit as described in item 10 of the scope of patent application, wherein when the other first input signal of the second detection circuit transitions from a low potential (L ow) to a high potential (H i gh), Timing compared to another second input signal 第21頁 六、申請專利範圍 先行之,其由 較另一第二輸 1 5、如申 其中該第一檢 極性互 與第 開關電 入訊號 於其_ 器之另 過另一 ;及 ,藉使 器或第 較器輸16 其中所 屬半導 輸入訊 極性互 晶體匹 之觸發 分壓電 第一比 觸發控 第二比 一輸入 分壓電 第一檢 高電位 入訊號 請專利 測電路 補之開 號; 補之觸 配串接 檢測時 阻器; 較器, 制電晶 較器, 端及開 阻器連 測電阻 (High )轉 之時序後行 範圍第1 0 與第二檢測 關電晶體, 發控制電晶 ,以同時定 段; 其一輸入端 體的輪出端 其一輸入端 關電晶體之 接另一觸發 器’連接於 態至低電位(L 〇 w )時, 之。 項所述之短路偵測電路, 電路皆至少包括: 係分別擷取第一輸入訊號 體,分別與前述同極性之 義第一輸入訊號與第二輸 第二檢 於觸發 二比較 出控制 、如申 述之開 體氧化 測電阻器,連接於 控制電晶體導通時 器内之既定電壓, 訊號者。 凊專利範圍第1 〇 關電晶體及觸發控 物 透過其一分壓電阻器連接 連接相異極性的第一比較 輸出端,另一輸入端則透 控制電晶體的輸出端’ 第一比較器之兩輸入端間 第二比較器之兩輸入端間 ,產生一大於該第一比較 令該第一比較器或第二比 項所述之短路偵測電路’ 制電晶體係可由互補式金 〇S所組成。Page 21 6. The scope of the patent application is first, which is lower than that of the second one. If the application is different, the first detection polarity and the second switch electrical signal are passed to the other device; and, The actuator or the first comparator input 16 of which the semiconducting input signal polarity of the inter-crystalline transistor is triggered by the first divided by the second ratio of the trigger and controlled by the second ratio of the first divided by the first divided voltage. Please check the patent for the high-voltage input signal. No .; the complement is connected with the resistor when testing in series; the comparator, the transistor comparator, the terminal and the resistor are connected to measure the resistance (High) after the timing of the turn, the first 10 and the second detection turn off the transistor, The control transistor is sent to determine segments at the same time; when the wheel output of one input terminal body is turned off, one of the input terminals is connected to another trigger of the transistor when it is connected to a low potential (L 0w). The short-circuit detection circuits described in the item all include at least: the first input signal body is respectively captured, and the first input signal and the second input second detection of the same polarity as the above-mentioned second detection are compared with the trigger two to control, such as The stated open-body oxidation test resistor is connected to a predetermined voltage and signal in the control transistor when it is turned on.凊 The scope of the patent No. 10: The transistor and the trigger control object are connected to a first comparison output terminal of different polarity through a voltage dividing resistor, and the other input terminal is through the output terminal of the control transistor. Between the two input terminals of the second comparator, a short-circuit detection circuit greater than that of the first comparison or the first comparator or the second ratio is generated. The crystal system can be made of complementary gold. Composed of. 第22頁 591841 六、申請專利範圍 1 7、如申請專利範圍第1 5項所述之短路偵測電路, 其中更包括: 過電流控制電路,其觸發端則接設於第一檢測電路及 第二檢測電路之輸出端,藉以當於異常狀態產生控制訊號 時,將輸入訊號斷訊以保護相關電路者。 1 8、如申請專利範圍第1 7項所述之短路偵測電路, 其中該過電流控制電路之控制訊號係可透過一或閘(0 R Gate )擷取。Page 22 591841 VI. Patent application scope 1 7. The short-circuit detection circuit described in item 15 of the patent application scope further includes: an overcurrent control circuit, the trigger terminal of which is connected to the first detection circuit and the first The output terminal of the second detection circuit is used to protect the related circuit by breaking the input signal when a control signal is generated in an abnormal state. 18. The short-circuit detection circuit as described in item 17 of the scope of patent application, wherein the control signal of the over-current control circuit can be captured through an OR gate. 第23頁Page 23
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI465739B (en) * 2013-03-18 2014-12-21 Himax Tech Ltd Short-circuit detection circuit
US9250284B1 (en) 2014-08-19 2016-02-02 Au Optronics Corp. Level shift circuit with short-circuit detection mechanism and short-circuit detection method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI465739B (en) * 2013-03-18 2014-12-21 Himax Tech Ltd Short-circuit detection circuit
US9250284B1 (en) 2014-08-19 2016-02-02 Au Optronics Corp. Level shift circuit with short-circuit detection mechanism and short-circuit detection method thereof

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