TW591448B - Method for determining parasitic inductance by using new metal oxide semiconductor FET transmission line equivalence circuit model - Google Patents

Abstract

A method for determining a parasitic inductance by using a new metal oxide semiconductor FET transmission line equivalence circuit model, in which the metal oxide semiconductor FET includes a source, a drain, a gate, and a base, comprises: using a special numerical analysis procedure to obtain a linear relationship among the gate parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET, the drain parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET, versus the imaginary Z parameters, thereby extracting the gate parasitic inductance, the drain parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET.

Description

591448 A7 B7 『A020_ TWP H7 V. Description of the invention ([Technical field to which the invention belongs] The present invention relates to a kind of new metal oxide cast field effect transistor transmission line #Effective 1 road view disparate materials, In particular, it refers to 8 5 — a kind of zero-biasing method 'with an equivalent circuit model of a decentralized capacitive transmission line. ^ Capacitive effect of the empty region under the oxide of a metal oxide semiconductor field effect transistor, and extracting the metal oxide with a Z-parameter frequency response. Semiconductor: A method of crystal parasitic inductance. Electricity 10 [Previous technology] The method used to determine the parasitic inductance of an equivalent circuit model is to use a 隹 group circuit model, where the cluster circuit model can only be used in narrow bandwidth = 'Not suitable for wideband microwave range, if you want to fully describe the capacitive effect of a metalized semiconductor transistor when it is at zero bias, and it is not easy to measure the parasitic inductance effect of the component. It can be seen from this, = conventional items There are still many shortcomings, it is not a good designer, but ^ to improve. Seek the method of the inventor of this case to determine the parasitic electricity in view of the above-mentioned conventional circuit model The various shortcomings that have been derived are to improve and innovate, and after 20 years of careful research, finally successfully developed and completed this new oxide semiconductor field-effect transistor transmission material-effect circuit, which determines its inductance. The purpose of the invention Purpose of the paper scale towels Jia Jiaxian i Λ! —. 1------ -----— (Please read the notes on the back before filling out this page) Printed by the employee consumer cooperative 591448 A7 ——P ^ QppfiOfi Τ \ Λ / Ρ ·. ^ V. Description of the invention (-70 W 2) "The equivalent circuit model of the special line of the special car determines its parasitic inductance. 4 metal oxide semiconductor The structure of a field-effect transistor can be-stranded, dysprosium _ but the heart, _ and state 5: msulatol ', SGI) f shaped metal oxide and field-effect transistor junction semiconducting ΐ :: = — purpose It is to provide a kind of new metal oxide + conductor W transistor to transmit material effect electricity _ type to determine its parasitic inductance to establish the metal oxide semiconductor field effect transistor equivalent ~ 4 metal oxide semiconductor field effect transistor including „ Γ generation: =,-between pole and a base, with distributed capacitor transmission line In zero-bias metal-oxide-semiconductor field-effect power, the capacitance effect of the empty region under the emulsion, and by-specific mathematics, the closed-source source of the oxide semiconductor field-effect transistor: Ray 4 = inductance, no The parasitic inductance plus the source parasitic inductance, the input and the inductance of the imaginary part of the two parameters of the linear relationship of the two parameters, and then extracted to the emulsion semiconductor field effect transistor _ ^ inductance and source parasitic inductance effect value. 4 / and The system that can generate semiconducting is to provide an equivalent circuit model of a new metal oxide cut field-effect solar-electron transmission line ㈣ its parasitic = method 'where the metal oxide semi-field-effect transistor base _ Is an n-type or p-type metal oxide semiconductor field effect transistor. ^ Hair-like shape—meme 'in • supply—manufactured metal oxygen labor and electricity, said Yuege and ## The circuit model of the effect circuit determines its parasitic inductance L —_ one by one-4 * 10 15 20 i. —----- 1 ----- (Please read the notes on the back before filling in this page) Hua-fi I, 591448 Printed by the Consumer Cooperative of the Economic and New Intellectual Property Bureau A7 I. ~ ^ £ Α〇 · 20βΓ) 8 Τ \ Λ / Ρ _ w V. Method for explaining the invention 'wherein the measurement frequency may be radio frequency, microwave, millimeter wave frequency band. 1. Another object of the present invention is to provide a method for determining the parasitic inductance of a new metal oxide semiconductor field effect transistor transmission line equivalent circuit model. The closed-pole of the metal oxide semiconductor field effect transistor can be two. Meters, sub_micron, deep_sub mi_, nanometer. 1. Another object of the present invention is to provide a method for determining the parasitic inductance of a new metal-oxide-semiconductor field-effect transistor transmission line equivalent circuit model. 'The structure of the metal-oxide semiconductor field-effect transistor includes A 10 source, a drain, a gate and a base. [Summary of the Invention] The method for determining the parasitic inductance of a new metal-oxide semiconductor field-effect transistor transmission line equivalent circuit model to achieve the above-mentioned object of the invention is to use the 3-parameter characteristics of the transistor at zero bias, and The decentralized capacitance transmission line model conforming to the physical structure of the device is used to describe the capacitive effect of the empty region under the oxide of the metal oxide semiconductor field effect transistor, and the parasitic inductance effect of the device is extracted. The so-called zero-bias method refers to the fact that the pole bias between the metal-oxide semiconductor field and the effective transistor is zero, and that the potential between the drain and source of the transistor is grounded. [Implementation method] The present invention provides a method for extracting parasitic inductance of a metal oxide semiconductor field effect transistor, wherein the metal oxide semiconductor field effect crystal includes! II LI!! F I ί 0Μ ---- I!- -^ -------- (Please read the notes on the back before filling out this page) -5 ~ 591448 V. Description of the invention (ψ〇Α7 Β7 10 Record ... Gate and — Base. This method includes Steps: Connect / to the pole plus 1 bias, Lin «polar plate = no-formation-zero · metal oxide semiconductor field effect transistor; Step 2: · 8 parameters measured at zero bias ; Belongs to the township III .: With a distributed capacitance transmission line model, which represents the zero-bias gold. Emulsion semiconductor field effect transistor, the empty capacitor effect under the transistor oxide, through a specific mathematical analysis processing program to ：:: Gate parasitic inductance of field effect transistor “10 丨 plus… generating inductance LS1G3, drain parasitic inductance Ldl () 2 plus source parasitic inductance, source parasitic inductance Ls103 and imaginary part z-parameter linear relationship formula to extract the parasitic parasite of the metal oxide semiconductor field effect transistor Inductance, > and parasitic inductance Ldl02 and source parasitic inductance Ls103. The value is 0 "-1 · n §1 lye ^ ί β Βα — printed by the Consumers’ Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs in accordance with the present invention, Among them, the processing procedure of the third step of the _determined mathematical analysis 15 includes: "Procedure 1 · The S parameter is measured by the S parameter, and the S parameter is converted into a z-number to conform to the specific Z parameter formula. In the case of an open drain terminal, calculate the ratio of the gate extreme voltage to the current. From the specific 2 reference 9 = formula, the gate parasitic 20 inductance Lgl01 of the metal oxide semiconductor field effect transistor plus the source parasitic inductance, The linear relationship between the drain parasitic inductance Ldl〇2 plus the source parasitic inductance Ls103, the source parasitic inductance Lsl03, and the z-parameter of the imaginary part; and the second program: calculate the linear relationship, and the metal oxide can be obtained. Gate field parasitic inductance LglOl, drain parasitic of semiconductor field effect transistor # 装 · · ί ----- Order · ----- i! W & w. (Please read the precautions on the back before filling this page ) -6

Description of the invention (: 7/17 Inductance ㈣2 and source parasitic inductance U1G3 effect value. According to the idea of the case, where the specific 2 parameter formula is ~ zn-(R. ^ Rs) ^ jc〇 {L ^ + x H ( Z ^) + __ takes the imaginary part of the Z parameter, where the three specific z-parameter formulas are where / is the length of the capacitive transmission line, and τ is the transmission constant of the capacitive transmission line.

(Please read the precautions on the back before filling this page) to get the specific Z parameter formula, in which the structure of the metal oxide semiconducting 10-body field effect transistor can be a general, shallow doped drain (lighK). Ped diain (LDD) and Shi Xi are effective metal oxide semiconductor field-effect transistor structures such as insulators (siHcONn insuiatr, soi). J Of course, the present invention can also provide a method for establishing an equivalent circuit of a metal oxide semiconductor field effect transistor, wherein the metal oxide semiconductor field effect 15 electric sun body includes a source, a drain, a gate and A pedestal, the method includes the following steps: 济% 1 Step 1 · Add a zero bias to the gate, and ground the source and drain II to form a zero bias metal oxide semiconductor Field-effect transistor;} 1 step · 2: measure the S parameter under zero bias; | j 20 Step 3: use the distributed capacitor transmission line model, which represents the zero-bias gold #! Beneath the crystal, under the oxide of the transistor | Printed I -7- This paper size applies to Chinese national standards --- • Order— ϋ ni

n n I s, 591448 V. Description of the invention (

Α7 Β7 __PAQ20fi0fi TWP-ft /-] ^ The capacitive effect produced by the printed products of the cooperative of employees of the Intellectual Property Bureau of the Ministry of Economic Affairs, through a specific mathematical analysis process, to obtain the gate parasitic inductance of a metal oxide semiconductor field effect transistor Add the source-generating inductance Lsl03, the drain parasitic inductance plus the source parasitic inductance Ls103, the source parasitic inductance Ls103 and the z-parameter of the imaginary part, and then extract the metal oxide semiconductor field-effect current. The gate parasitic inductance LglOl of the crystal, the parasitic inductance of the drain parasitic inductance Ldl02 and the source parasitic inductance; and step four: using the extracted gate parasitic inductance Lglm of the metal oxide semiconductor field effect transistor, Drain parasitic inductance U1_source parasitic inductance LS103 effect value to establish the metal oxide semiconductor field effect transistor net effect circuit model. Please refer to FIG. 1, which is a small-signal equivalent circuit model of a metal-oxide-semiconductor% efficiency transistor of the present invention. The circuit model includes an extrSlc and an intrinsic part. Among them, the 15 effective elements such as the external part include: gate parasitic inductance Lgl0l, drain parasitic inductance, source parasitic inductance Ls103, gate parasitic resistance Rgl〇6, drain parasitic resistance Rdl07, and source Extremely parasitic resistance. The essential equivalent components include: gate-to-source capacitance Cgslll, gate-to-drain capacitance CgdU2, drain-to-source capacitance Cdsll3, drain-to-source conductance gdsU5, and transduction 20 gm With transmission time τ. The method in this case is to measure the metal oxidation using a network analyzer when the gate parasitic inductance L.gl〇1, the parasitic inductance Ld102 and the parasitic inductance Ls103 of the source of the metal oxide semiconductor field effect transistor are started to be extracted. The s-parameters of an object semiconductor field effect transistor at zero bias. Please read the second picture, which is a metal oxide semiconductor field effect transistor. This paper applies Chinese national standards (please read the precautions on the back before filling this page)

B7 B7 PAOPOfiOfi Τ \ Α / Ρ, ______

V. Description of the invention The small signal equivalent profile model of C in the case of zero bias. In this equivalent circuit, because the structure and bias of the gate-to-drain and inter-pole-to-source components are symmetrical, the distributed capacitor transmission line model can be used to represent the transistor oxidation under the condition of zero bias. Capacitive effects (including distributed series capacitor Cs20 and distributed parallel capacitor CP202) in the empty area below the object. This equivalent circuit fully describes the metal oxide semiconductor field effect transistor under zero bias. Capacitive and parasitic effects in the empty region under the oxide. Then, the effect of parasitic inductance can be extracted by switching between the S parameter and the z parameter. 10 15, please refer to Figure 3, when the metal oxide semiconductor field effect transistor is in the $ bias c n condition, the equivalent circuit model of the 仏 仏 equivalent circuit model can be expressed by the following Z parameter expression. siiih (y /) ^ cos ^^ l) sinh (y /) 2 = Z0 C, s. ', middle / is the length of the valley transmission line, r is the transmission line transmission parameter and Z〇 is the transmission line impedance parameter r: The formula of the ζ parameter can be obtained to obtain the parasitic inductance Lgl01 of the metal oxide half field-effect transistor plus the parasitic inductance of the source = 3. And parasitic inductance U1G2 plus source parasitic inductance ㈣, source s103 and the imaginary part B parameter, Zn is 297 mm at the extreme wave end) Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 591448 A7 B7 V. In the case of (¾) circuit, 'Calculate the ratio of the gate extreme voltage to the current, we can get ⑺Im (Zn) + z — 丄' Vw ς, please refer to Figure 4, by using the metal oxide semiconductor field effect Transistor: gate parasitic inductance ㈣1 plus source parasitic inductance Ls〗 03, drain parasitic inductance U102 plus source parasitic inductance Ls103, source parasitic inductance l · and the linear relationship between the open-hearted wheat number, so it can be Mingli seeks ㈣ the gate parasitic inductance of the metal oxide semiconductor field effect transistor, the drain parasitic inductance Ldl02 and the source parasitic inductance lsiq3. Finally, the small-parameter equivalent of the metal-oxide-semiconductor field-effect transistor is extracted by extracting the gate-parasitic electrical red of the metal-oxide-semiconductor field-effect transistor and the parasitic red of the I-pole and the source parasitic inductance Ls103. Circuit model. 5 [Features and effects] The method provided by the present invention for determining the parasitic inductance of a new metal oxide semiconductor field effect transistor transmission line equivalent circuit model has the following advantages: 1. The present invention uses a distributed capacitor transmission line The model can more completely describe the capacitive effect produced by the empty region under the metal oxide semiconductor field effect transistor under zero bias. By measuring the imaginary part of the z parameter, we can find out The linear relationship between the imaginary part of the Z parameter and the frequency is consistent with the derived Z parameter formula. From the linear relationship, the gate and drain can be obtained. -10- 1Γ Paper scale Gu hat family ί III 1 1 Γ III * I — III II ^ ---- ----- {Please read the note on the back first Please fill in this page again for the matters} 591448 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 20 A7 V. Description of the invention) and the value of the source parasitic inductance effect. 2. As the size of semiconductor elements is greatly reduced, the method for measuring and extracting parasitic inductance of metal oxide semiconductor field effect transistors of the present invention is also applicable to the 3 requirements of micron, submicron, deep submicron elements, millimeter elements or smaller components. And 旎 provides more accurate and reliable parasitic capacitance effect values. 2. The method for extracting parasitic inductance of a metal oxide semiconductor field effect transistor according to the present invention is applicable to general, shallowly doped drain (Ught_d〇ped-silicon on insufator, soI) and other effective metal oxides Half-conductor field-effect transistor structure.-Fourth, the method for extracting the parasitic inductance of the metal-oxide semiconductor field-effect transistor of the present invention is suitable for the base material of the transistor may be silicon. V. The metal-oxide semiconductor field of the present invention Parasitic inductance extraction of effect transistor. Method: The gate material of transistor can be metal or polycrystalline stone, and the metal oxide semiconductor field effect transistor parasitic electric extraction method of Ben Maoming is suitable for the gate dielectric of transistor. The electric layer can be an effective dielectric material such as broken silicon nitride nitride and silicon oxynitride. 7. The method for parasitic electric extraction of the metal oxide semiconductor field effect transistor of the present invention is applicable to 11-type and p-type metal oxyfluoride semiconductors. Field effect transistor 8. The method for parasitic electric extraction of the metal oxide semiconductor field effect transistor of the present invention is suitable for measuring frequencies in the radio frequency, microwave, and millimeter wave frequency bands. The detailed description is directed to the present invention—a feasible embodiment, but this embodiment is not intended to limit the scope of the patent of the present invention ^ Wei-11-297 mm) »el n —8 n« -ϋ _n a— .nnn MB · mt a ··· 9M ·· ^ ** r ° J «nnnn ui I ϋ I {Please read the precautions on the back before filling out this page} 591448 Printed by the Consumer Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs

15 10 A7 V. Description of the invention (P) Equivalent implementations or changes that deviate from the technical spirit of the present invention shall be included in the patent scope of this case. ^ "" Τ, as mentioned above, this case is not only technically innovative, but also enhances the above-mentioned multiple effects compared with conventional articles. It should have fully met the requirements of the statutory invention patent for novelty and progress, and applied in accordance with the law. I sincerely ask your office to approve this invention patent application, in order to stimulate the invention, to the sense of 'L scheme's simple description] Please refer to the following detailed description of the present invention-preferred embodiment and the accompanying drawings' will learn more about this The technical content of the invention and its effects The drawings related to this embodiment are as follows: Figure-is an equivalent circuit model diagram showing the field effect m signal of a metal oxide semiconductor of the present invention; θ, Figure 1 is the metal oxide of the present invention Small-signal equivalent cross-section model of a semiconductor field-effect transistor at zero dielectric pressure h; Figure 3 is a small-signal equivalent circuit model of a metal oxide cast field-effect transistor at high voltage; Figure 4 This is a linear relationship diagram of the present invention. 20 [Representative symbols of main parts] 101 Gate parasitic inductance Lg 102> and pole parasitic inductance L d 103 Source parasitic inductance Ls 106 Gate parasitic resistance Rg Standard (CNS) A4 Regulations ----- ^ ---------------! ^ 9 (Please read the precautions on the back before filling this page) -12 591448 A7 B7 ΡΑΠ9Π (ΛΠΡί Τ \ Λ / Ρ „1 V. Description of the invention (

107 Drain parasitic resistance Rd 108 Source parasitic resistance Rs 111 Gate-to-source capacitance Cgs 112 Gate-to-drain capacitance Cgd 113 No-to-source capacitance Cds 115 Drain-to-source conductance gds 2 Oxidation Equivalent impedance in the physical and empty area 201 distributed series capacitor Cs 202 distributed parallel capacitor CP {Please read the precautions on the back before filling this page) Order i i. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

3 IX This paper size applies to China National Standard (CNS) A4 (210 x 297 mm)

Claims (1)

591448 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs' Consumer Cooperatives 20 2 · • A method of reading the equivalent circuit of a metal oxide semiconductor field-effect power transmission line and its parasitic inductance, where the metal oxide semiconductor field = transistor includes -Source, m-pole, and-base, the method includes the following steps: Step-· Add -zero to the gate, and ground the source and drain to form a -zero bias metal oxide Semiconductor field-effect transistor; Step 2 · Measure the S-parameters at zero bias; / Step 1 · Using a distributed capacitance transmission line model, which represents the transistor oxidation under zero-offset metal = compound semiconductor field-effect transistor The capacitive effect generated by the ^ depleted region under the material oxide, and a specific mathematical analysis processing program is used to obtain the gate parasitic inductance of the metal oxide semiconductor field effect transistor plus the parasitic inductance of the original pole, The source parasitic inductance, the linear relationship between the source parasitic inductance and the imaginary part Z parameter, and then the closed-source parasitic inductance and non-polar parasitic inductance of the metal oxide semiconductor field effect transistor are extracted The value of the induced inductance effect; and /, step four: the measured value of the parasitic inductance, the drain parasitic inductance, and the source parasitic inductance between the metal oxide semiconductor field effect transistor is used to establish the metal oxide semiconductor field effect Transistor equivalent circuit model. As described in item i of the scope of the patent application, the method of determining the parasitic inductance of the new metal oxide semiconductor field effect transistor transmission line equivalent circuit model, the specific mathematical analysis processing procedure of the third step includes: ', private Preface-: The measured S-parameters are converted into s-parameters to match the specific Z-parameter formula. From this specific 2-parameter formula, the appropriate scale can be obtained; CNS) A4 specification ( 2i〇X297 Please read the item on the back and write on this page 5) 12 (Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs = gate parasitic inductance plus source inductance, and parasitic inductance plus source parasitic inductance, which is an oxide semiconductor field effect transistor, linear with the imaginary Z parameter Relational expressions; and • Find this linear relational expression iH, then you can get the metal oxidation ... the gate parasitics of the conductor field effect transistor, the values of the parasitic inductances of the drain and source, and the parasitic inductance of the source. The method of determining the parasitic inductance of the new metal-oxide semiconductor field-effect transistor transmission line equivalent circuit model described in the second item, wherein the derivation method of the 4 specific ζ parameter formula includes the steps:… 为 当 _oxide semiconductor field effect Under the bias condition of the zero-bias metal-oxide-semiconductor field-effect transistor, the small-signal equivalent circuit model effect circuit is represented by the following Z-parameter formula:,, Z * 1 = (^ g + K) + jco { Lg +4) + (2 〇? + Z, .ν) + —L_ plus C: take the imaginary part of the Z parameter, where the three specific z parameter formula is Wm (Z11) = y (Z + Z) _ ^ 2S — 丄 where '' is the length of the capacitor transmission line, r is the capacitor transmission line Constant. Query ^^ Γ ^ \ ΐτ to obtain the formula for this particular Z parameter. Zli is the calculation of the ratio of the gate extreme voltage to the current when the drain terminal is open; from the gate of the metal oxide semiconductor field effect transistor Parasitic inductance plus original (please read the precautions on the back before filling this page) 591448 £ Δ22〇β〇6ΤννΡ-16/17 10 5. 6. 15 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 20 8. 9 = Inductance: Drain parasitic inductance plus source parasitic inductance, source parasitic inductance, imaginary part The linear relationship of the number of Z-signs can be eight, the closed-circuit parasitic electric reduction effect of the field-effect transistor, the value of the semiconductor induction effect of the emulsion. The more parasitic «and source parasitic electricity as described in item 1 of the scope of the patent application, the new metal oxide half field-effect transistor transmission line equivalent circuit model determines its parasitic inductance = present = metal subtractive semiconductor field-effect electricity The structure of the crystal can be an effective metal-oxide semiconductor field-effect transistor such as a hght-doped drain (LDD) and silicon at the edge (Solo): such as the first item in the scope of patent application The equivalent circuit model of the effect transistor transmission line determines the method of determining the parasitic inductance of the β-emulsifier semiconductor field, and the parasitic inductance of the dust, such as the oxide semiconductor field-effect transistor in the bean-such as the scope of patent application ^ As mentioned in the item, the Mental oxide semiconductor field that Shi Xixiao Lei ’s θ 舻 pounds ^ said Japanese body «line money circuit model determines its parasitics = the base material of the oxide semiconductor field effect transistor can be heart-shaped or The ρ-type cup is an oxide semiconductor field-effect transistor. As described in item 1 of the scope of the patent application, am μ ^ ', in the monoxide oxide semiconductor field: = circuit model determines its parasitic inductance, where the measurement Frequency can be RF, microwave, millimeter wave = = The method for determining the parasitic inductance of a new metal oxide semiconductor field transmission line equivalent circuit model described in item 1 of the material range, which = the metal gate semiconductor field effect transistor gate size can be micron, sub-test No, frozen sub-micron or nanometer. For new metal oxide semiconductor field as described in the scope of patent application, please read the note of Λ and f on this page% 4 591448 ABCD Application Request 17/1 PWI 06 06 2i PAO ίο 15 11 The method of determining the parasitic inductance of the equivalent f-channel model of the a-body transmission line, ^ S-parameter of zero-bias metal oxide semiconductor field effect transistor in ^ The measuring jig can be any type of network analyzer. 1 〇 · As described in item 4 of the scope of patent 4, the method of determining the parasitic inductance of a new metal oxide semiconductor continuous-effect transistor transmission line equivalent circuit model is as follows: The structure of the field-effect transistor of the semiconductor Including-ohmic contact a emulsified layer, a transport layer, a buried layer and a base. As described in item i of the patent application, a new metal oxide semi-conducting transistor transmission line equivalent circuit model shirt has a parasitic inductance of the = metal oxide semiconductor field-effect transistor gate material can be polycrystalline; 12. As described in item i of the scope of the patent application, the equivalent circuit model of the new effect transistor transmission line is used to determine the thunder of the metal oxide semiconductor field effect transistor in its parasitic conductor field = /, oxide oxide, nitrogen oxide The effective dielectric ^ layer can be two Ί ，,! · Equipment -----— 1Τ ~ --ί I (Please read the notes on the back before filling out this page) 4 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs