TW577187B - Interposer and method thereof for use in electronic packages - Google Patents

Interposer and method thereof for use in electronic packages Download PDF

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Publication number
TW577187B
TW577187B TW91109090A TW91109090A TW577187B TW 577187 B TW577187 B TW 577187B TW 91109090 A TW91109090 A TW 91109090A TW 91109090 A TW91109090 A TW 91109090A TW 577187 B TW577187 B TW 577187B
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Taiwan
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patent application
scope
item
layer
substrate
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TW91109090A
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Chinese (zh)
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Zhineng Fan
Ai D Le
Che-Yu Li
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High Connector Density Inc
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Priority claimed from US09/866,434 external-priority patent/US6723927B1/en
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Publication of TW577187B publication Critical patent/TW577187B/en

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Abstract

The present invention features an interposer that provides a high reliability interface between an LGA connector and a motherboard. The novel interposer overcomes the limitations of prior art interposers by including a stepped spacer for each solder interconnection which prevents the relaxation of mechanical contact force while ensuring the integrity of each solder interposer provides noble metal plated contact pads on a first surface to receive the contact members of an LGA connector, and contact pads for BGA solder connections for attachment to a motherboard. A description of the processes to manufacture the interposer is also disclosed.

Description

577187 五、發明說明(l) -- 【相關專利申請案j 本發明係與美國共同申請中之專利申請案有關,如 1999年12月9日申請之美國專利申請案號〇9/457776及 2000年8月24日申請之美國專利申請案號〇9/645,86〇,以 上各專利申請案指定為本發明之參考文獻。 【發明範,疇】 本發明係與電子封裝結構有關,例如印刷電路板、電 ,模=或類似者,尤有進者,冑是用於電氣接觸需要特 殊鍍金處理例如鍍黃金之結構。 【發明背景】 e ^ i在設計連接器上,利用高速電氣系統的趨勢, 中重要部㈣多元化電路裝置t間提供高密 度及南可罪度的連接。這個系統裝置可以是-種電腦、一 種電信電路網路裝置、-種手持之個人數位助理j(PDA, ργ^γ assistant)、醫㈣備、或其他的電 對這類的連接是必要的,因為潛在的終 為確保系統中各種成致命的不連結。此外, u列如,連接器、卡片的Λ政的修復、升級、及/或置換 滿意的是這類的連接在最曰f模組...等)。另人 的。此外,在製造期間 ί品内,疋可分離及重新連接 是令人滿意的。 1,这類產品方便容易測試的能力也 從歷史角度上,f 導體裝置場地-隔離互連以機板上之連接器被用來允許丰 連’例如微處理器及記憶體模組,577187 V. Description of the invention (l)-[Related patent applications j This invention is related to patent applications in joint US applications, such as US patent application numbers 09/457776 and 2000 filed on December 9, 1999 U.S. Patent Application No. 09 / 645,86, filed on August 24, 2014, the above patent applications are designated as references for the present invention. [Invention domain] The present invention is related to electronic packaging structures, such as printed circuit boards, electronics, molds, or the like, especially those who are advanced. It is a structure that requires special gold plating such as gold plating for electrical contact. [Background of the Invention] In the design of connectors, e ^ i uses the trend of high-speed electrical systems to provide high-density and high-susceptibility connections between multiple important circuit components t and multiple circuit devices t. This system device can be a computer, a telecommunication circuit network device, a handheld personal digital assistant j (PDA, ργ ^ γ assistant), medical equipment, or other electrical connections necessary for this type of connection. Because the potential end is to ensure that all kinds of deadly disconnections in the system. In addition, u column, such as the repair, upgrade, and / or replacement of connectors, cards, and / or replacements is satisfied that this type of connection is in the f module ... etc.). Another. In addition, it is satisfactory that the plutonium can be separated and reconnected during the manufacturing process. 1. The ability of this type of product to be convenient and easy to test is also historically, the f-conductor device field-isolated interconnects are used to allow connectors on the board to allow for full connectivity, such as microprocessors and memory modules.

577187577187

入邊緣連接器(spring loaded edge connector)技術。此 種連接器技術允許場地升級或替換故障的裝置。 但是當系統之密度、輸入/輸出陣列大小及執行效能 ,劇性地增加時,因此對於互連之規格具有迫切性。特別 疋當與場地-隔離(field-separability)耦合時,這些高 要求的需求’導致可能連接器解決方法很大的變化。大多 數連接器在主機板上之組合墊需要被鍍上一層珍貴的金屬 以確保可靠度及可重複地電氣接觸。此種額外之需求會增 加主機板之成本以至於此種常規並沒有被大量採用。曰 ··承座格距陣列(LGA)為這種連接的一個範例,這種連, 接讓兩個主要相連電路元件被連接。每一個構件具有複數 個接觸點或導電墊,以線性的或二次元陣列排列連接。一 種互連構件之陣列,被稱為插入*(interp〇ser),被放置 在兩個陣列之間且提供該等接觸點或導電墊之間的電氣連 接。而習知技術中所描述之承座格距陣列插入物是以許多 ,不同之方式實施,大部分有興趣的實施方式請參考共同 申請中之美國專利之應用。 主機板上之該等導電墊一般由銅所組成且具有一鍍鎳 〇障礙^層(banker layer)緊跟在一層薄(例如,〇 〇〇1英 槐的只、金之後。如此之電鍍組合對於球格距陣列(A )之 、錫互連可以工作良好。但是對於承座格距陣列連接器則 ^ ί良好工作,在那裡需要一個較厚的黃金層以確保一可 、互連。因為一個較厚的黃金層是比較薄的黃金層成本Into the edge connector (spring loaded edge connector) technology. This connector technology allows the site to upgrade or replace a failed device. However, when the density of the system, the size of the input / output array, and the execution performance increase dramatically, there is urgency for the specifications of the interconnection. In particular, when coupled with field-separability, these demanding requirements' lead to large changes in possible connector solutions. Most connector pads on motherboards need to be plated with a precious metal to ensure reliability and repeatable electrical contact. This additional demand will increase the cost of the motherboard so that this routine is not widely adopted. An example of such a connection is a socket grid array (LGA), which allows two main connected circuit elements to be connected. Each component has a plurality of contact points or conductive pads connected in a linear or quadratic array arrangement. An array of interconnect members, called interposers, is placed between two arrays and provides the electrical connection between these contact points or conductive pads. The conventional grid array inserts described in the conventional technology are implemented in many different ways. For most interesting implementations, please refer to the application of the US patent in the common application. The conductive pads on the motherboard are generally composed of copper and have a nickel-plated 0 banker layer immediately following a thin layer (for example, 001 yinghuai gold and gold. Such plating combination For ball grid array (A), tin interconnection can work well. But for socket grid array connector, it works well, where a thicker layer of gold is needed to ensure a reliable interconnect. A thicker gold layer is a thinner gold layer cost

577187 五、發明說明(3) 要高’主機板製造商對於如此改變之實施是不情願的。 於1994年2月所出版之IBM公司之技術揭露告示板第37 冊第2A號第277及278頁中推薦一種解決方法。該方法描述 一種插入物,不幸的是該插入物較今日系統所需要的插入 物為短。該插入物被推薦以提供在第一表面上一陣列之電 氣導電墊連接至一承座格距陣列連接器,且在第二表面上 用以球格距陣列(BGA)之焊錫附著至一主機板。然而,此 焊錫互連之服務是緩慢地行進(creep),因此單獨接觸構 件上至接觸點鬆懈的接觸力將使承座格距陣列連接器喪失 電氣接觸。 隔雛二種!點之解決方法是提供-個足夠高度之 接觸力是維持在-個相對高度以確 2:==不ΐ太高以預防對所有接觸點之良好球格 擔心是由於該等相配表面之不平挺 使付-些烊錫互連將無法得到良- 一個高可靠度的插入物是可降似主=f運 相信的’而解決如上所述之焊 4機板之成本是可以 之問題’構成本技術中一重大的進展,服務是緩慢地行進 因此,本發明之一目的係加強 本發明之次一目的係提供::連接益技術。 互連以降低主機板之成本。 ’以提供尚可靠度 列連=【二目插入物以確保承座格距陣 罪度尤其疋在向溫的情況下。 577187 五、發明說明(4) ---- 【發明概論】 本發明係提供一種插入物作為一承座格距陣列連接器 ,一主機板間一高可靠度的介面。該新穎的插入物藉由為 ^個焊錫互連包括一成梯狀的隔離物以預防機構接觸點 秦懈的接觸力而確保每一個焊錫互連之整體性來克服習知 技術之插入物的限制。該插入物在第一表面上提供貴重的 =屬電鍍導電墊以接收一承座格距陣列連接器之該等接 構件,及球格距陣列(BGA)互連之該等導電墊被附著至一 主機板。描述生產插入物之程序也將會被揭露。 【圖式之簡單說明】 為使貴審查委員能進一步瞭解本發明之結構、特徵 及其目的,茲附以圖式及較佳具體實施例之詳細說明如玉 后 : 圖1為依據習知技術的插入物之部分透視圖; 圖2疋如圖1所示係擴大習知技術的插入物之部分側視 及斷面圖’該插入物被放置以附著至一電路構件且與一連 接器及其他電路構件排成直線以提供之間最後的互連; 1 圖3a及圖3b是如圖1所示係擴大習知技術的插入物之 4分側視圖’且,分別地,該焊錫連接之緩慢地行進·, 圖4是一依據本發明一較佳實施例之電氣連接器之 分透視圖; 1 圖5是一部分側視圖,擴大圖4中之連接器;以及 圖6a及6b是擴大圖4中連接器之側視圖,且,分別 地’該焊錫連接之緩慢地行進。577187 V. Description of the invention (3) To be high 'Motherboard manufacturers are reluctant to implement such changes. A solution is recommended in IBM Technology Disclosure Bulletin Board, Volume 37, No. 2A, pages 277 and 278, published in February 1994. This method describes an insert that, unfortunately, is shorter than the inserts required by today's systems. The insert is recommended to provide an array of electrically conductive pads on a first surface connected to a socket grid array connector, and a ball grid array (BGA) solder attached to a host on a second surface board. However, the service of this solder interconnect is creep, so the loose contact force from the individual contact structure to the contact point will cause the contact grid array connector to lose electrical contact. Every two kinds of chicks! The solution for the point is to provide a sufficient contact force to maintain a relative height to ensure that 2: == not too high to prevent a good ball grid worry for all contact points due to the unevenness of the matching surfaces Make some-some tin-tin interconnection will not get good-a high-reliability insert can be reduced as the master = f believe that 'and solve the problem of the cost of welding 4 machine boards as described above' constitutes A major advancement in technology, services are moving slowly. Therefore, one object of the present invention is to strengthen the second object of the present invention to provide: Connected technology. Interconnect to reduce the cost of the motherboard. ’In order to provide reliability, Lien = [Binocular inserts to ensure that the distance between the grid and the matrix is particularly high in the case of warming. 577187 V. Description of the invention (4) ---- [Overview of the invention] The present invention provides an insert as a socket grid array connector, a high-reliability interface between motherboards. The novel insert overcomes the conventional technology of inserts by including a ladder-like spacer for each solder interconnect to prevent the contact force of the mechanism contact point and ensuring the integrity of each solder interconnect. limit. The insert provides valuable = conductive plating on the first surface to receive the connection members of a socket grid array connector, and the conductive pads of the ball grid array (BGA) interconnect are attached to A motherboard. Procedures describing the production of inserts will also be revealed. [Brief description of the drawings] In order to allow your reviewers to further understand the structure, characteristics and purpose of the present invention, a detailed description of the drawings and preferred embodiments is attached as follows: Figure 1 is based on the conventional technology Partial perspective view of the insert of FIG. 2; FIG. 2 is a partial side view and a sectional view of the insert of the conventional technique as shown in FIG. The other circuit components are lined up to provide the final interconnection between them; 1 FIG. 3a and FIG. 3b are four-point side views of the insert of the conventional technique as shown in FIG. 1, and, separately, the solder connection Moving slowly, Fig. 4 is a perspective view of an electrical connector according to a preferred embodiment of the present invention; Fig. 5 is a partial side view of the connector in Fig. 4; and Figs. 6a and 6b are enlarged views. The side view of the connector in 4 and, 'The solder connection progresses slowly, respectively.

第8頁 577187 五、發明說明(5) 【較佳實施例之詳細說明】 % # t 2而5,本發明係提供一種插入物以提供一承座格 器及一主機板間一高可靠度的介面。該新穎的 防機2!:為每一個焊錫互連包括-成梯狀的隔離物以預 性爽券ίΐ點鬆懈的接觸力而確保每一個焊錫互連之整體 上提供主:知技術之插入物的限制。該插入物在第一表面 器之^ i ΐ $的金屬電鑛導電墊以接收一承座格距陣列連接 塾被:著至;:板及;:距陣列(BGA)互連之該等導電 及可靠度。 機板。藉由本發明亦可達到改善生產力以 物4。用以提:1 電及氣圖電2路二示出習知技術中,-插入 導電墊46。該等雷$道冓牛4 一可重複實施的複數個電氣 例如是黃金。當鱼:J 佳是被鍍上-貴重的金屬 物40互連之ί =件24及34之路徑被提供。適合經由插入 模組等。所路構件之範例包括:印刷電路板、電路 層電路結構包扭印刷電路板」代表包括但不侷限於一多 接地)在其中。或多個導電層(例如,信號,電源及/或 業界係眾所周知、電路板,亦被稱為印刷佈線板,在 「電路模紐」^此並不需更詳細之說明。而該所謂的 (例如,半導體曰^匕括#一基板或是有不同電子零件之構件 形成其中之部八曰曰、導電性電路、導電性較為等等),可 此進-步贅述:此模組’’亦為業界所熟知者,/亦無須在 577187 五、發明說明(6) 插入物40包括一電介質層42具有複數個内部孔洞 (apertures)或開口44,每一個開口對應至一個電氣導電 墊46且被排成直線。在一個範例中,該電介質層42是由例 如是Kapton (美國杜邦公司之註冊商標)或UpUex(日本 Ube公司之註冊商標)之材料所組成且其厚度是〇〇1〇英 吋。該等·開口之外觀典型是圓柱形且係藉由Kapt〇n—蝕刻 程序$形成。電氣導電墊46係由銅所組成且由一電鍍層48 所覆蓋,在本範例中係由2〇〇微—英吋厚之鎳所組成且由一 5 0微-英吋厚之黃金層所覆蓋。Page 8 577187 V. Description of the invention (5) [Detailed description of the preferred embodiment]% # t 2 and 5, the present invention provides an insert to provide a socket holder and a high reliability between the motherboard Interface. This novel anti-machine 2 !: for each solder interconnect including-ladder-like spacers with a pre-pressed loose contact force to ensure that each solder interconnect as a whole provides master: know-how insertion Restrictions. The insert is connected to the conductive pad of the first surface of the first metal device to receive a socket grid array connection. The quilt is: to; the board; and the conductive of the BGA interconnect. And reliability. Board. Improved productivity can also be achieved with the present invention. It is used to mention: 1 electric and gas diagram electric, 2 electric circuits and 2 electric circuits. In the conventional technique,-the conductive pad 46 is inserted. The mine $ 道 冓 牛 4 a repeatable multiple electrical example is gold. When the fish: J Jia is plated-the precious metal 40 interconnects the path of pieces 24 and 34 provided. Suitable for inserting modules, etc. Examples of such components include: printed circuit boards, circuit-layer circuit structures, twisted printed circuit boards, etc. (including, but not limited to, multiple grounds). Or multiple conductive layers (for example, signal, power, and / or industry-known, circuit boards, also known as printed wiring boards), which need not be described in more detail in "circuit modules". The so-called ( For example, a semiconductor substrate, a substrate or a component with different electronic parts forming a part of it, conductive circuit, more conductive, etc.), can be further-more detailed: this module '' also It is well known in the industry, and does not need to be in 577187. V. Description of the invention (6) The insert 40 includes a dielectric layer 42 with a plurality of internal apertures or openings 44. Each opening corresponds to an electrical conductive pad 46 and is Lined up. In one example, the dielectric layer 42 is composed of a material such as Kapton (registered trademark of DuPont, USA) or UpUex (registered trademark of Ube, Japan) and has a thickness of 001 inches The appearance of these openings is typically cylindrical and is formed by a KaptOn-etching process. The electrical conductive pad 46 is composed of copper and is covered by a plating layer 48. In this example, it is 2 °. 〇Micro-inch thickness It is composed of nickel and is covered by a 50 micro-inch thick layer of gold.

藉由本技藝中所廣為人知之方法排成直線後(例如, 腳位及孔洞、光學排成直線,等等),插入物4〇藉由適當 ^程序以特定的構成該導電性構件50可以被電氣附著至放 於電氣電路構件34之上表面上之平坦的導電墊38(例 ^ ’銅製終端)。例如,如果該導電性構件5〇是焊錫,紅 線或熱空氣流回(ref l〇w)可以被使用以附著該插入物4〇 至該等導電墊38。 凊參照圖3a及圖3b,其個別繪示擴大習知技術的插入 ,部分側視圖,且,分別地,該焊錫連接之緩慢地行After being lined up by a method well known in the art (for example, feet and holes, optically aligned, etc.), the insert 40 can be electrically formed by a specific configuration with appropriate procedures. Attached to a flat conductive pad 38 (eg, a copper terminal) placed on the upper surface of the electrical circuit member 34. For example, if the conductive member 50 is solder, red wire or hot air flow (ref 10w) may be used to attach the insert 40 to the conductive pads 38.凊 Referring to FIG. 3a and FIG. 3b, they individually illustrate the insertion of the expansion of the conventional technology, a partial side view, and, respectively, the solder connection is performed slowly.

對;t ^,,性構件5〇(圖3以(例如,焊錫連接)被放置於相 〜之忒等開口 44且與相對應之電氣導電墊46電氣接觸。 陣列Ϊ f ^述,因為今日較熱之執行半導體沿著承座格距 扑)由接严之夾住力之組合增加溫度,導電性構件52(圖 觸所♦於^慢地行進可以變的平坦,藉以鬆懈維持電氣接 吊之该接觸力且使承座格距陣列連接器產生故障。Yes, t ^, the sexual member 50 (Fig. 3 (for example, solder connection) is placed in the opening 44 of the phase ~ and is in electrical contact with the corresponding electrical conductive pad 46. The array Ϊ f ^ described, because today The hotter semiconductors are fluttered along the bearing grid. The temperature is increased by the combination of tight clamping force. The conductive member 52 (shown in the figure) can be flattened by slowly moving to maintain electrical connection. This contact force causes the socket grid array connector to malfunction.

第10頁 577187 五、發明說明(7) 曰由本技藝中所廣為人知之方法排成直線後(例如, 腳=及孔洞、《學排成直線’等等),插入物藉由適當 =程序=特疋的構成該導電性構件5〇可以被電氣附著至放 於電氣電路構件34之上表面上之平坦的導電墊38 (例 々:銅製終端)。例如,如果該導電性構件5〇是焊錫,紅 外線或熱空氣流回(ref low)可以被使用以附著該插入物4〇 至該等導電墊38。 研參照圖4及圆5,其個別繪示較佳實施例之插入物6〇 之部分透視圖,以提供電氣電路構件34 一可重複實施的複 數個電氣導電墊66。該㈣氣導電侧較佳是被鍍上一層 貴重的,屬例如是黃金。當與_連接器丨〇 一起使用時,一 用以電氣互連一對電氣電路構件24及34之路徑被提供。適 a、座由插入物6 〇互連之電氣電路構件之範例包括:印刷電 路板、電路模組等。 插入物60包括一電介質層62具有複數個内部成梯狀的 (stepped)孔洞或開口64,每一個開口對應至一個電氣導 電墊且被排成直線。該等成梯狀的開口 提供所需隔離 物之高度(梯狀的高度)以確保維持該連接器之接觸所需要 之力。在一個範例中,該電介質層62是由例如是Kapt〇n (美國杜邦公司之註冊商標)或Upilex(日本Ube公司之註冊 商標)之材料所組成且其厚度是〇〇1〇英吋。其他電介質層 62適合的材料之範例是液態石英聚合物(Hquid crystal polymer (LCP))及環氧基-玻璃-基之材料 (epoxy-glass-based materials (例如是FR4))。該最外Page 10 577187 V. Description of the invention (7) After the line is aligned by the method well known in the art (for example, feet = and holes, "learning to line up ', etc.), the insert is replaced by appropriate = program = special The conductive member 50 may be electrically attached to a flat conductive pad 38 (eg, a copper terminal) placed on the upper surface of the electrical circuit member 34. For example, if the conductive member 50 is solder, infrared rays or ref low may be used to attach the insert 40 to the conductive pads 38. 4 and circle 5, a partial perspective view of the insert 60 of the preferred embodiment is shown individually to provide the electrical circuit component 34 a plurality of electrically conductive pads 66 that can be repeatedly implemented. The radon conductive side is preferably plated with a precious layer, such as gold. When used with the _connector, a path for electrically interconnecting a pair of electrical circuit members 24 and 34 is provided. Suitable a. Examples of electrical circuit components interconnected by inserts 60 include printed circuit boards, circuit modules, and the like. The insert 60 includes a dielectric layer 62 having a plurality of stepped holes or openings 64 inside, each opening corresponding to an electrical conductive pad and aligned in a straight line. These stepped openings provide the height of the required spacer (height of the ladder) to ensure the force required to maintain contact with the connector. In one example, the dielectric layer 62 is made of a material such as Kapton (registered trademark of DuPont, USA) or Upilex (registered trademark of Ube, Japan) and has a thickness of 100,000 inches. Examples of other suitable materials for the dielectric layer 62 are liquid crystal polymer (LCP) and epoxy-glass-based materials (eg, FR4). The most outer

第11頁 /187Page 11 of 187

五、發明說明(8) 邊的材料具有一熱擴展係數(CTE)以實質地匹配周圍結構 =熱擴展係數。該電介質層62也可以由更多層之材料所杈 成以允許其他製造方法之實施。 、 導電構件70(例如是焊錫連接)是故意的對應於該等成 狀的開口 64放置且電氣連接至相對應的導電墊66。在一 個f例中.,該導電構件70的根部直徑是〇〇26英吋且其高 f疋〇· 0 30英吋以附著至主機板之前。導電墊66係由銅所 組成且由一電鍍層68所覆蓋,在本範例中係由2〇〇微-英吋 f之鎳所組成且由一50微-英吋厚之黃金層所覆蓋以提供 良好之電氣接觸。5. Description of the invention (8) The material on the side has a thermal expansion coefficient (CTE) to substantially match the surrounding structure = thermal expansion coefficient. The dielectric layer 62 may also be formed of more layers of material to allow other manufacturing methods to be implemented. The conductive member 70 (for example, a solder connection) is deliberately placed corresponding to the shaped openings 64 and is electrically connected to the corresponding conductive pad 66. In an example f, the diameter of the root of the conductive member 70 is 026 inches and the height of the conductive member 70 is 30 inches to attach to the motherboard. The conductive pad 66 is composed of copper and is covered by a plating layer 68. In this example, it is composed of 2000 micro-inches of nickel and is covered by a 50 micro-inch thick gold layer. Provide good electrical contact.

在個範例中,該導電墊6 6中央至中央之距離是〇 · 〇 5 〇英 时,但如果需要的話可以降低至〇· 040英吋或更小。、In one example, the distance from the center to the center of the conductive pad 66 is 0.050 inches, but can be reduced to 0.040 inches or less if necessary. ,

叫參照圖6 a及圖6 b ’其個別繪示擴大圖4中插入物6 〇 之側視圖,且,分別地,該焊錫連接之緩慢地行進。再次 地該等貴重的成梯形開口 64之外觀典型上是圓柱形。在一 個範,中,該等開口64之較高部分72是鄰接該導電墊66且 其直!疋與習知技術中之開口 4 4相同(圖2 ),而較低部分 74疋直控較大且當作一個貯存器(reserv〇i『)以較佳的容 納每一個導電構件(圖6b)之體積。該增加的隔離物高度可 以確保連接器之接觸力被維持但因為電氣電路構件24、34 及插入物60表面之不平坦並不能過高以破壞焊錫連接之整 體性。在一個範例中,該等開口 64之較高部分72的直徑是 〇·026英吋且其高度是〇·〇1〇英吋。而較低部分74的直徑是 〇 · 〇 3 5英吋且隔離物之高度是〇 · 〇丨〇英叶。Refer to FIG. 6 a and FIG. 6 b ′, which individually show enlarged side views of the insert 60 in FIG. 4, and respectively, the solder connection progresses slowly. Again, the appearance of such valuable trapezoidal openings 64 is typically cylindrical. In one example, the higher portions 72 of the openings 64 are adjacent to the conductive pad 66 and are straight!相同 is the same as the opening 4 4 in the conventional technology (Figure 2), while the lower part 74 is directly controlled and used as a reservoir (reserv) to better accommodate each conductive member (Figure 6b) ) 'S volume. This increased spacer height can ensure that the contact force of the connector is maintained but the unevenness of the surface of the electrical circuit members 24, 34 and the insert 60 cannot be too high to destroy the integrity of the solder connection. In one example, the diameter of the higher portion 72 of the openings 64 is 0.026 inches and its height is 0.0010 inches. And the diameter of the lower portion 74 is 0.5 inches and the height of the spacer is 0.5 inches.

第12頁 577187 五、發明說明(9) 當為了揭露之目的而選擇了 一個成梯形開口 6 4,顯而 易知的是本發明所教示之原則可以被應用至使用各種不同 形狀及大小之開口以符合特定設計之需求。 此外,導電構件7 0及7 6之主要材料為了揭露之目的選 擇了 ¥錫’顯而易知的是本發明所教示之原則可以被應用 至其他材料包括導電性膠黏劑(adhesives)。 〜 藉由本技藝中所廣為人知之方法排成直線後(例如, 腳位及孔洞、光學排成直線,等等),插入物6〇藉由適當 的程序以特定的構成該導電性構件7〇可以被 置於電氣電路構件34之上表面上之平坦的導 如,鋼製終端)。例如,如果該導電性構件7〇是焊錫,紅 外線或熱空氣流回也是可能的選擇。在流回過程中可以施 $ —壓力以至於該導電性構件76之外觀將被顯示在圖“ 一些導電性構件/墊組合因為其他電氣互連的原因(例 如,械或熱的好處)被使用也是可能的,這些皆在本發明 2疇中。進_步的該導電性構件70之特定外觀並不需要 2正的圓柱形在本技術中是顯.而易見的,且其他許多種 紅♦,包括但不限於圓柱狀物,根據效能之需求可以提供 好處,且裝配設備及程序也是有效的。 ’、 ♦的清楚的看到插入物60,—旦該導電性構件70被適 田的,者至電氣電路構件34之該等導電墊38,經由連接器 ^每一個接觸構件16之相對端20及18以提供一電氣路徑 連該電氣電路構件34之電路至導電墊28。該等導電墊^Page 12 577187 V. Description of the invention (9) When a trapezoidal opening 6 4 is selected for the purpose of disclosure, it is obvious that the principles taught by the present invention can be applied to the use of openings of various shapes and sizes. To meet the needs of a specific design. In addition, the main materials of the conductive members 70 and 76 have been selected for the purpose of disclosure. It is obvious that the principles taught by the present invention can be applied to other materials including conductive adhesives. ~ After aligning with a well-known method in the art (for example, feet and holes, optical alignment, etc.), the insert 60 can be formed with a specific structure by appropriate procedures. 70 (A flat guide placed on the upper surface of the electrical circuit member 34, such as a steel terminal). For example, if the conductive member 70 is solder, infrared rays or hot air may flow back. Pressure can be applied during the flow-back so that the appearance of the conductive member 76 will be shown in the figure "Some conductive member / pad combinations are used for other electrical interconnection reasons (eg, mechanical or thermal benefits) It is also possible that these are in the second domain of the present invention. Further, the specific appearance of the conductive member 70 does not require the 2 positive cylindrical shape to be obvious in the technology. It is easy to see, and many other kinds of red ♦, including but not limited to cylindrical objects, can provide benefits according to performance requirements, and assembly equipment and procedures are also effective. ', ♦ clearly see the insert 60, once the conductive member 70 is being used by Shida To the conductive pads 38 of the electrical circuit member 34, each of the contact ends 16 and 18 of the contact member 16 is provided through a connector to provide an electrical path connecting the circuit of the electrical circuit member 34 to the conductive pad 28. The conductive Pad ^

577187 五、發明說明(10) 係被放置在底部,電氣電路構件24之外表面m , 電氣電路構件24之路徑,其可 一 =9’ ®此,成至 半導體構件、 土板26具有複數個 i面。該等導電墊28及38可以了解的是可 求而^ 4 源或接地’根據個別的電路構件的操作需 壓縮一個有彈力的接觸構件16是以此方式被 ΐ Π ί =法包括箝板裝置以及 卉夕在本技藝中廣為人知之其他方法所完成。 器10器10可能是習知技藝中所顯示之型式,連接 ;4 &疋0歹1為本發明之參考的共同申請中之美國專利 甲#案中所教示之結構。 排成直線之電氣電路構件24及34相對於連接器i 0可能 ’、使用一對突出腳位3〇 ,該對突出腳位3〇係由該等電氣 路構件(例如,模組2 4)之一所延伸出來。這些腳位被排 株直線且放置於載台丨2之相對應開口 22及其他電氣電路構 3 4之開口 3 6 (以虛線表示)中。必須了解的是其他排成直 、’、之襄置也是可能的,包括提供由載台12之相反表面所延 伸出之腳位以倒置相對應電氣電路構件中之相對應開口。 ,例來說,將調整放寬,連接器丨〇之一個開口 22,可能算 疋一拉長的構造,而形成的一插槽。 插入物60可以用許多種方法構成。例如該電介質層係 由兩層材料所組成,例如聚亞錄(ρ ο 1 y i m i d e )或F R 4,一個 車父佳的方法是由第一電介質層開始且創造其中所需之開577187 V. Description of the invention (10) is placed on the bottom, the outer surface m of the electrical circuit member 24, the path of the electrical circuit member 24, which can be equal to 9 '. Thus, the semiconductor device and the soil plate 26 have a plurality of i 面。 I surface. It can be understood that the conductive pads 28 and 38 can be obtained. 4 The source or ground is based on the operation of the individual circuit components. A resilient contact member 16 is compressed in this way. As well as other methods known to Hui Xi in this technique. The device 10 may be the type shown in the conventional art, and the connection 4 & 疋 0 歹 1 is the structure taught in the US patent A # in the common application referenced by the present invention. The electrical circuit members 24 and 34 aligned in a straight line may be relative to the connector i 0, and a pair of protruding pins 30 is used, and the pair of protruding pins 30 is formed by these electrical circuit members (for example, module 2 4) One extended. These pins are arranged in a straight line and placed in the corresponding openings 22 of the carrier 2 and the openings 3 6 (shown in dotted lines) of other electrical circuit structures 3 4. It must be understood that other alignments are also possible, including providing feet extending from the opposite surface of the stage 12 to invert the corresponding openings in the corresponding electrical circuit components. For example, it will be adjusted and relaxed. An opening 22 of the connector may be considered as an elongated structure to form a slot. The insert 60 can be constructed in a number of ways. For example, the dielectric layer is composed of two layers of materials, such as Jualu (ρ ο 1 y i m i d e) or F R 4. A car ’s best method is to start with the first dielectric layer and create the required openings.

第14頁 577187Page 14 577187

口、。,第-個電介質層係與一銅層被製成薄板狀。該銅層 被遮蓋以允許貴重的金屬電鍍在所需要之區域,此區 變成該等導電墊及其他功能例如排成直線之基準 < 、 (fiducials)。一旦該遮蓋被移除,藉由適當的蝕刻裝置 該過量的銅羯被蝕刻移除。該等開口在一第二電介質層被 創造。一個膠著層被放置且排成直線在兩個電介質層^間 以將此結構製成薄板狀。在一種情況中,設定溫度為華氏 185度和壓力為20磅每平方英吋(PSI)。如果所有層被適當 的排成直線,該等成梯形狀之開口被形成且被與接觸墊排 成直線。一旦完成這些操作,所有的結構被反轉且導電性 材料例如焊錫被電鍍到適當的開口中。如此之結構被經由 一送至流回爐以形成該等導電性構件。然後該插入物已備 安被黏者至適當的電子封裝接構,例如一印刷電路板。 為了示範其中該電介質層是由單一層材料所組成,例 如聚亞銨、FR4或液態石英聚合物(liquicl crystal polymer),一個較佳的方法是由該電介質層開始且創造其 中所需之開口。該等成梯形狀之開口可以用許多種方法被 形成包括一成梯形狀鑽孔(stepped dr i 11 )、標準的鑽孔 操作(standard drilling operations)、路由 (routing)、蝕刻(etching)或其他廣為人知的方法。該電 介質層係與一銅層被製成薄板狀。該銅層被遮蓋以允許貴 重的金屬電鍛在所需要之Εΐ域’此區域將變成該等導電塾 及其他功能例如排成直線之基準(f i d u c i a 1 s )。一旦該遮 盍被移除’藉由適當的餘刻裝置该過量的銅箱被餘刻移…mouth,. The first dielectric layer and a copper layer are made into a thin plate shape. The copper layer is covered to allow precious metals to be plated in the required area, which becomes the conductive pads and other functions such as fiducials that line up. Once the mask is removed, the excess copper etch is removed by etching with a suitable etching device. The openings are created in a second dielectric layer. An adhesive layer is placed and aligned in a straight line between the two dielectric layers to form the structure into a thin plate shape. In one case, the set temperature is 185 degrees Fahrenheit and the pressure is 20 pounds per square inch (PSI). If all layers are properly aligned, the ladder-shaped openings are formed and aligned with the contact pads. Once this is done, all structures are reversed and conductive materials such as solder are plated into the appropriate openings. Such a structure is sent to the flow-back furnace through one to form the conductive members. The insert is then ready to be attached to a suitable electronic packaging connection, such as a printed circuit board. To demonstrate that the dielectric layer is composed of a single layer of material, such as polyimide, FR4, or liquid crystal polymer, a preferred method is to start with the dielectric layer and create the required openings therein. These stepped openings can be formed in many ways including a stepped dr i 11, standard drilling operations, routing, etching, or other Well-known method. The dielectric layer and a copper layer are formed into a thin plate shape. The copper layer is covered to allow the precious metal to be electroformed in the required EI region. This region will become the basis for these conductive ions and other functions such as alignment (f i d u c i a 1 s). Once the shield is removed ’, the excess copper box is moved by a suitable time device ...

577187 五、發明說明(12) 除。如果所由層被適當地排成直線,該等成梯形狀之開口 被形成且被與接觸墊排成直線。一旦完成這些操作,所有 的結構被反轉且導電性材料例如焊錫被電鍍到適當的開口 中。如此之結構被經由一送至流回爐以形成該等導電性構 件。然後該插入物已備妥被黏著至適當的電子封裝接構, 例如一印刷電路板。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離發 和範圍内,當可作少畔之f私伽、叫μ m 货d之精神 # m f之更動與潤飾,因此本發明夕仅確 棘圍當視後附之申請專利範圍所界定者為準。月之保羞577187 V. Description of invention (12) Except. If the layers are properly aligned, the ladder-shaped openings are formed and aligned with the contact pads. Once these operations are completed, all structures are reversed and conductive materials such as solder are plated into appropriate openings. Such a structure is passed to a reflow furnace to form the conductive members. The insert is then ready to be bonded to a suitable electronic packaging structure, such as a printed circuit board. Although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can be regarded as a private private product, called a μm product, without departing from the scope. The spirit of #mf is changed and retouched. Therefore, the present invention is only assured by the scope of the attached patent application. Moon Shy

第16頁 577187 圖式簡單說明 ' ------- 【圖式之簡單說明】 圖1,依據習知技術的插入物之部分透視圖; 圖2是如圖丨所示係擴大習知技術的插入 ::::他:插入物被放置以附著至-電路構件』 裔圖3a及圖件排成直線以提供之間最後的互連; 圖3 a及圖3 b疋如圖1所示係擴大習知 部分側視®,且,J j 圖4暑 /;南刀別地,该焊錫連接之緩慢地行進; 分透視圖; 不發月車““施例之電氣連接器之部 圖5是一部分側視圖,擴大 圖6 a鳩是擴大圖4中連接器之中2接二,以及 地,該焊錫連接之緩慢地行進,之側視圖,且,分別 【圖式元件標號說明】Page 577187 Simple description of the drawings' ------- [Simplified description of the drawings] Figure 1, a perspective view of a part of an insert according to the conventional technology; Figure 2 is an enlarged conventional view as shown in Figure 丨Insertion of the technology :::: he: The insert is placed to attach to the circuit component. Figure 3a and the drawings are aligned to provide the final interconnection between them; Figure 3a and Figure 3b 疋 as shown in Figure 1 The display system expands the side view of the conventional part, and J J Figure 4 /; the southern part of the knife, the solder connection travels slowly; a perspective view; Fig. 5 is a partial side view, and Fig. 6 is enlarged. Fig. 6 is an enlarged view of 2 to 2 of the connector in Fig. 4 and the ground. The side view of the solder connection is slowly moving.

連接11 10 載A 接觸構件 ,β 12 開口 性端點 18、20 基板 電氣電路構件 24 突出腳位 ! !電塾 28 電氣電路構件 q/1 半導體構件 32 導電塾 38 Γ 36 電介質層 42 ^入物 40 46電鑛層 44 導電性構件 ^ 48 插入物 導電性構件 60 電介質層 62 577187 圖式簡單說明 開口 64 電氣導電墊 66 電鍍層 68 導電構件 70 較高部分 72 較低部分 74 導電構件 76 iran 第18頁Connection 11 10-load A contact member, β 12 open end 18, 20 substrate electrical circuit member 24 protruded pin!! Electron 28 Electrical circuit member q / 1 Semiconductor member 32 Conductive 塾 38 Γ 36 Dielectric layer 42 40 46 Electrical ore layer 44 Conductive member ^ 48 Insert conductive member 60 Dielectric layer 62 577187 Simple illustration of opening 64 Electrical conductive pad 66 Electroplated layer 68 Conductive member 70 Higher part 72 Lower part 74 Conductive member 76 iran No. 18 pages

Claims (1)

577187 六、申請專利範圍 a) 形成〆第一基板包括至少一電介質材料層,至少一 金屬層,及奚少一第一開口鄰接該至少一金屬層; b) 形成一第二基板包括至少一第二電介質材料層及至 少一第二開口; c) 提供/黏著層介於該第一基板及該第二基板之間; 以及· d )將該第一基板、該第二基板及該黏著層排成直線且 製成薄板,該等第一開口中至少之一與該等第二開口中至 少之一被排成直線’使該至少一金屬層之一部分曝光於 外。 1 9·如申請專利範圍第1 8項所述之方法,其中該步驟 a)形成一第一基板中包含下列次步驟: i) 提供該至少一第一電介質材料層包括第一及第二 邊; ii) 形成該至少一第一電介質材料層中之該至少一第 一開口; 1 i i )提供一黏著層以聯結該至少一第一電介質材料層 至該至少一金屬層; iv)將4黏著層及該至少一金屬層至該至少一第一電 介質材料層之一邊製成薄板;以及 v )依需要遮蓋、曝光及蝕刻該至少一金屬層以創造預 先決定之含金屬的功能。 2 0 ·如申請專利範圍第丨9項所述之方法,其中該步驟 b )形成一第二基板中包含下列次步驟:577187 VI. Scope of patent application a) forming a first substrate including at least one dielectric material layer, at least one metal layer, and at least one first opening adjacent to the at least one metal layer; b) forming a second substrate including at least one first Two dielectric material layers and at least one second opening; c) a providing / adhesive layer is interposed between the first substrate and the second substrate; and d) the first substrate, the second substrate and the adhesive layer are arranged Straight and made into a thin plate, at least one of the first openings and at least one of the second openings are aligned so as to expose a portion of the at least one metal layer to the outside. 19. The method according to item 18 of the scope of patent application, wherein the step a) forming a first substrate includes the following sub-steps: i) providing the at least one first dielectric material layer including first and second edges Ii) forming the at least one first opening in the at least one first dielectric material layer; 1 ii) providing an adhesive layer to connect the at least one first dielectric material layer to the at least one metal layer; iv) adhering 4 Layer and the at least one metal layer to one of the at least one first dielectric material layer to make a thin plate; and v) covering, exposing, and etching the at least one metal layer as needed to create a predetermined metal-containing function. 2 0. The method according to item 9 of the scope of patent application, wherein the step b) forming a second substrate includes the following sub-steps: II 第21頁 577187Page 21 577187 i)提供該至少一第二電介質材料層;以及 H)形成該至少一第二電介質材料層中之該至少一 二開口。 μ 矛 21 ·如申請專利範圍第丨8項所述之方法 下列步驟: $ 7匕枯 、e)引進導電性材料至該等排成直線之開口中且與該至 少一金屬層之曝光部份電性接觸。 其中該導電 22·如申請專利範圍第21項所述之方法, 性材料係為糊狀焊錫。 23·如申請專利範圍第22項所述之方法,其中進一步 包括流回該糊狀焊錫之步驟。 、 一 24·如申請專利範圍第1 8項所述之方法,其中該至少 一第二開口之直徑係等於或大於該至少一第一、之直 徑。 厂用 25·如申請專利範圍第19項所述之方法,其中該等該 至少一第一電介質材料層包括一絕緣材料。、 26·如申請專利範圍第25項所述之方法,其中該絕緣 材料係為環氧基-玻璃—基。 、 2 7·如申請專利範圍第26項所述之方法,其中該絕緣 杖料包括F R 4。 - 2 8 ·如申請專利範圍第2 〇項所述之方法,其中該等該 至少一第二電介質材料層包括/絕緣材料。 2 9 ·如申請專利範圍第2 8項所述之方法,其中該絕緣 材料係為環氧基〜玻蹲—基。 577187 六、申請專利範圍 3 0 ·如申請專利範圍第2 9項所述之方法,其中該絕緣 材料包括FR4。 31·如申請專利範圍第18項所述之方法,其中該第一 基板及該第二基板上所提供之該等開口係由融化、蝕刻、 路由、鑽孔和打洞的過程中挑選出的。 32·如申請專利範圍第19項所述之方法,其·中該至少 一金屬層包括銅。 3 3 ·如申請專利範圍第1 9項所述之插入方法,其中該 至少一該預先決定金屬的功能包括一導電墊。 34·如申請專利範圍第1 8項所述之方法,其中該薄板 狀發生在溫度華氏185度和壓力為磅每平方英吋(PSI)。i) providing the at least one second dielectric material layer; and H) forming the at least one or two openings in the at least one second dielectric material layer. μ spear 21 · The following steps of the method described in item 8 of the scope of patent application: $ 7 dagger, e) introducing conductive materials into the openings aligned with the at least one metal layer Electrical contact. The conductive material 22 is the method described in item 21 of the scope of patent application, and the material is paste solder. 23. The method of claim 22, further comprising the step of flowing back the paste-like solder. 24. The method as described in item 18 of the scope of patent application, wherein the diameter of the at least one second opening is equal to or greater than the diameter of the at least one first opening. Factory 25. The method as described in item 19 of the scope of patent application, wherein the at least one first dielectric material layer includes an insulating material. 26. The method according to item 25 of the scope of patent application, wherein the insulating material is epoxy-glass-based. 2. The method as described in item 26 of the scope of patent application, wherein the insulating rod material comprises F R 4. -28. The method as described in claim 20, wherein the at least one second dielectric material layer includes / insulating material. 29. The method according to item 28 of the scope of patent application, wherein the insulating material is epoxy-based. 577187 VI. Patent Application Range 30 · The method described in item 29 of the patent application scope, wherein the insulating material includes FR4. 31. The method as described in claim 18, wherein the openings provided on the first substrate and the second substrate are selected during melting, etching, routing, drilling, and drilling. . 32. The method as described in claim 19, wherein the at least one metal layer includes copper. 3 3 · The insertion method according to item 19 of the scope of patent application, wherein the function of the at least one predetermined metal includes a conductive pad. 34. The method of claim 18, wherein the thin plate shape occurs at a temperature of 185 degrees Fahrenheit and a pressure of pounds per square inch (PSI). 第23頁Page 23
TW91109090A 2001-05-29 2002-05-01 Interposer and method thereof for use in electronic packages TW577187B (en)

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