TW563299B - Automatically recovering method and apparatus for micro-controller/microprocessor under electromagnetic interference - Google Patents

Abstract

The present invention is related to a kind of device, which combines hardware with firmware, and the design method capable of make integrated circuit have automatically recovering function under normal operation or after the electrostatic discharge bombardment when performing electromagnetic compatible (EMC) test without the need of adopting the reset method of restarting power. The integrated circuit of the invented device is combined on the same chip. The invented device includes an electrostatic discharge sensor, a flag, and a firmware for executing recovering and reset procedures. The electrostatic discharge sensor is located between VDD and VSS in the integrated circuit, and the integrated circuit contains microprocessor, or micro-controller, or both of them. One of the practical executed examples of the present invention is the keyboard micro-controller of personal computer.

Description

563299

Description of the invention: = = = Kind: Integrated circuit with microprocessor or microcontroller is under automatic hanging operation or under electromagnetic compatibility test, due to the automatic recovery of transient surge voltage in the static circuit Methods: = (ESD) types of interference to electronic systems are: 放电 local area discharge near the station; (2) high voltage: dual purpose electrical breakage between objects and objects with lower voltage or uncharged objects '(3) Electromagnetic radiation generated from charged objects.

^ In order to enable the microprocessor / microcontroller to have the correct action at the beginning, a microprocessor-on-reset circuit is usually added to the microprocessor / microcontroller to generate A reset signal resets the microprocessor / microcontroller to a set state, so that the microprocessor / microcontroller can perform the next work normally. If the integrated circuit cannot be reset to a known state when the power is turned on, the subsequent actions of the integrated circuit will be unpredictable, which will cause the electronic system to crash. This unpredictable phenomenon is particularly undesirable for products using microprocessors / microcontrollers, such as personal computer keyboards. Regarding the design of integrated circuit power-on reset circuits, there are the following circuit designs in 8 US patents. [1] SR Norsworthy, " CMOS power-up reset circuit for gate arrays and standard cells, " US Patent # 4633107, Dec. 1986.

Page 4 563299 V. Description of the invention (2) [2] C. C. Hanke, C. D. Obregon, and T. W. Sutton, " CMOS power-on reset circuit, 丨 US Patent # 4970408, Nov. 1990.

[3] R. C. Steele, M Power-up reset circuit, US Patent # 4983867, Jan. 1991.

[4] KL Wong and JD Schutz, " Power-up reset circuit, 1 'US Patent # 5111067, May 1992 · [5] A. Yukawa, M Power-on-reset circuit, 丨, US Patent # 5136181, Aug . 1992.

[6] S. Tanimoto, n Power on reset circuit with accurate detection at low voltages, 丨, US Patent # 5485111, Jan. 1996.

[7] G. L. Geannopou1 os, nPower up reset circuit with threshold voltage shift protection, 1 ’US Patent # 5654656, Aug. 1997.

[8] McClintock and N · Ngo, 丨, Power-on reset circuit with well-defined reassertion voltage, 丨, US Patent # 5821787, Oct. 1998 · The above-mentioned conventional power-on automatic reset circuit (p〇wer -on reset circuits) can generate a reset signal to initialize the reset action of the microprocessor / microcontroller. Its main design principle is to use the time delay concept to generate a reset pulse signal when the power of the integrated circuit is turned on. There are some designs designed to have a low-voltage state detection function. The power-on automatic reset circuit can detect the voltage level of the power supply and then generate another reset pulse.

563299

Wave ’s microprocessing | § / Microcontrol ^. However, such conventional power-on automatic reset circuit designs can only detect speed and voltage level changes in the milliseconds (ms) range. Therefore, as long as the voltage level change speed of the power supply is in the leap second (mi 丨 丨 isecnds, ms) level, such a conventional power-on automatic reset circuit can change the voltage level of the power supply. Provides the necessary reset signal for the microprocessor / microcontroller. However, if the voltage level of the power supply is changing as fast as one billionth of a second (nanoseconds, ns), such conventional power-on automatic reset circuits cannot detect whether the voltage level of the power supply has changed. , It can not provide the necessary reset signal for the microprocessor / microcontroller. It is important to verify the electromagnetic compatibility of electronic products, such as system-level electrostatic discharge (ESD) testing (so-called zapping), monitor's arcing test, and rapid power fluctuation testing ( Electrical fast transition test, EFT test), often produces pulse waves with a change time of one billionth of a second (nanoseconds, ns). The international electromagnetic compatibility test standard for system-level electrostatic discharge (ESD) testing is, IEC 801-2, Electromagnetic compatibility

for industrial-process measurement and control equipment, Part 2: Electrostatic discharge requirements, 2nd Edition, 1991〃; and the power supply changes rapidly

The international electromagnetic compatibility test standard for the test is `` IEC 1 000-4-4, " Electromagnetic Compatibility (EMC), Part 4, Testing and Measurement Techniques Sect ion 4, Electrical Fast Transient / Burst Immunity Test, M

Page 6 563299 V. Description of the Invention (4) 1st Edition, 1 95. Such a fast-changing pulse wave (also commonly referred to as a 'fast-changing transient voltage') will be introduced into the microprocessor / microcontroller's internal circuit through inductive or capacitive coupling, thereby destroying the temporarily stored microprocessor / microcontroller. The register, flip-flop, or random access memory (RAM) refers to the time when the logic state of the register is changed by the coupled fast pulse. 'The information stored in the register becomes incomprehensible, and at the same time, the parity value will not match each other. If the destroyed logic state is a very important instruction in the microprocessor / microcontroller, the microprocessor / microcontroller will likely enter the lock commonly known in the industry (L. ck up), freeze (bubble π), hung (hang), or enter a continuous or infinite loop (conji㈣〇uS loop) and other crash states. Another possible situation is that the microprocessor is / is destroyed in the microcontroller The logic state will not be discovered for a while, and the microprocessor / microcontroller will not occur until the data is used ^ so the microprocessor / microcontroller becomes very unreliable. So, there is ΐ Ξ ί 有 # Only when the user restarts the power supply completely can he reset all the functions of the microprocessor / microcontroller completely. ^ W

Second, the electronic products sold to Europe and the United States have been required to do various types of electromagnetic compatibility testing; ,,,, and '04. Some electromagnetic compatibility testing may treat the production test J method foreseeing the stomach. In fact, although every electrical in the equipment :: long-term compatibility test (EMC) test process or after there is no change in long-term parameters and performance, electromagnetic compatibility (EMC) test also =

563299 V. Description of the invention (5) Can cause damage to equipment functions. A common situation is that the microprocessor / microcontroller crashes after completing the electromagnetic compatibility (EMC) test, and then the entire electronic system is stopped; the east junction (f r 〇 z en) lives. Normally, this type of microprocessor / microcontroller can resume normal operation after the power is turned back on, and the previous instructions and steps in progress will also be reset. However, for most important industrial applications of automatic control systems, turning the power back on to solve the crash caused by transient voltage is a difficult method to accept. Therefore, a good microprocessor / microcontroller must automatically resume normal operation after experiencing a series of electromagnetic interference in electromagnetic compatibility (EMC) tests without restarting its power supply. Even if an 8-bit microprocessor / microcontroller can withstand component-level electrostatic discharge tests (component-levei eSD stress) greater than 5kV, it is installed in a keyboard system, and its keyboard is in contact-mode ) Discharge test method After adding a 2kV System-level ESD stress, the phenomenon of crashes and errors will still occur. Because the component-level electrostatic discharge test and the system-level electrostatic discharge test are different test methods and test standards. In order to comply with the standard ESD standard, the conventional method, as shown in the figure below, is to add some individual components to the keyboard circuit board, such as magnetic cores (magnetic core ferrite beads) and RC low-pass Filter nitrer), etc., to absorb the generated transient surge voltage A to avoid interference with the microprocessor / microcontroller. Shown as a conventional system, its integrated-string hardware circuit elements are connected to the microprocessor / microcontroller ^, and the transient surge voltage generated is absorbed

563299 5. Description of the invention (6) Or bypass the stomach. As shown in the figure, the ferrite beads 2 are connected to the microprocessor / microcontroller's VDD 3 * vss 4 and can be added to an RC network. Capacitor 5 can be connected to a line containing ferrite beads 2 to provide a high-frequency short-circuit path to vss 4; capacitor h can be connected to a line containing a resistor 2a to provide a high-frequency short-circuit path to vss 4 b can be connected to the line containing resistor 2b to provide a high-frequency short-circuit path to VSS 4, so that high-frequency transient voltages can be bypassed without entering the microprocessor / microcontrol cry 彳, not the μ key 1 Λ represents the low-frequency voltage of digital information. The keyboard cable 6 contains a bundle of current 7 wires, which is wound on a magnet coil 7 and then connected to a surge absorber, = ds) 2 and a resistor 2a. In this way, the high-frequency transient voltage coil absorbs, In order to protect the microprocessor / microcontroller 1 from high-frequency transient bursts transmitted through the key: cable 6, the disadvantage is that it requires high cost and volume: two bla ^ (—core) (ferrite The known method is disclosed by the aforementioned US patent [3], the basin side = the circuit is not counted as the output as logic, all the registers in the factory microcontroller are non-inductive: the micro-processing is often used in this Such circuits will be designed to produce a delay weight of m, the source voltage and the operating voltage of all circuits5, to ensure that electricity is usually longer than the rise time of the power supply voltage, and the delay time is actually, The aforementioned 8 U.S. patents ^ ^ ^ ^ ^ ^ (Power-on reset π, automatic reset of electric uits when the power is turned on) can not respond to the rapidly changing voltage

563299 V. Description of the invention (7) The surge responds, even if the microprocessor / microcontroller itself contains Power on reset circuits on its chip and cymbal, doing electromagnetic compatibility During the test, crashes or freezes still occur. In some conventional system-level designs, additional external circuits are usually used as reference circuits to verify the correct execution of instructions, or when abnormality is detected. When the phenomenon occurs, return the microprocessor / microcontroller to its normal state. "In order to prevent the keyboard from crashing or freezing after completing the system-level electrostatic discharge bombardment (ES d zapping) test, the microprocessor / microcontroller should integrate the automatic detection function into the chip, so that the microprocessor / microcontroller The heart can automatically reset or return to a known and stable state, and the firmware must have a regular status check function to detect the occurrence of abnormal phenomena. An effective way to help the firmware to do a status check The method is to use an external timer, as shown in Figure 2 can be re-triggered monostable multi-order oscillation (retriggerable monostable multivibrator Figure 2 shows a conventional power-on automatic reset circuit (p〇wer -〇n reset circuits) by `` Noise Reduction Techniques in

Electronic Systems, ^ H.W. Ott, 2nd Edition, John Wiley & Sons, 1 988. When the level of the stable pulse on VCC 10 and the signal line changes, the serial flip-flop 8 will provide a reset pulse to the microprocessor / microcontroller (not out) Signal line 9. However, this method still requires additional circuit components (such as 74LS1 23 multi-order oscillator) and other components to be used on the circuit board to help microprocessing

Page 10 563299 V. Description of the invention (8) '~ ^ A device / microcontroller's response action, which usually also increases the cost. Other conventional designs, such as adding a circuit called "Watchdog Timer" to the microprocessor / microcontroller, which, in combination with the cooperation of the physical body, can be used to check the execution status of instructions. And return to normal status. As long as an application process or component is working normally, the watchdog timer will maintain a counting state. The firmware will periodically send a reset command to the watchdog timer.

Timer). When an application process or execution enters the so-called "lock up" or freeze (b), the time delay of the watchdog timer will not be received. Periodically reset the pulse. At this time, the time delay part will be issued and the time is up; order to open or close a gate and let the reset command be sent to the component to reset 1. Watchdog Timer The logic state is also ξ si ΐ Cunyi or flip-flop, these data will also be subject to rapid changes, can be destroyed and changed, the same will cause the microprocessor / microcontroller standby machine. So if the rapid changes When the voltage surge has a larger glitch level, a watchdog timer

Twei *) microprocessors / microcontrollers still experience frozen crashes. 〇 In addition, the fast changing transient pulse of S has a high level of voltage occurrence =: timers, registers, memory, or state, logic state in the device / microcontroller will be completely destroyed. The vertical / timer U is now compensated. The existence of gTime " in the keyboard beforehand =

563299 V. Description of the invention (9) Instruction action sequence Reset action caused by keyboard crash. The language Con f or in i manual heavy plate still needs to use more complicated circuits. The specification of the keyboard is more expensive. Individual components. Some electrostatic discharges. Unfortunately, today's inch has adopted smaller sensitivity. At this time, and the surge absorber board to suppress interference, and such a quotient and other related to its stable immunity due to the system report on the circuit board with the purpose of the present invention) sensor, using a processor or microprocessor interrupt The system operation will still be locked in an endless loop and cannot be jumped out. 'At this time, to restore the normal operation of the keyboard, only manual work is required. However, for keyboard products that have to pass the certification mark The setting action is not allowed. So, a keyboard circuit goes to individual components as shown in Figure 1 or Figure 2, and the board layout is designed to absorb and bypass the transient voltage. If more system-level electrostatic discharge bombardment is required, they must be used, and the keyboard cannot be completely spared during the test. The microprocessor / microcontroller is manufactured in a CMOS process that reduces the size of the chip, and its magnetic coils (magneticrites) (ferrite beads) that are extra or larger for transient voltage surges must be The use of transient voltage surges on the keyboard / microcontroller's circuits to the microprocessor / microcontroller greatly increases the cost of the keyboard. Therefore, keyboard manufacturers are eager to have a microprocessor or microcontroller. The high-frequency transient voltage surge generated by level electrostatic discharge can have the force of a month, and it has an automatic recovery circuit on the chip without the need for expensive individual devices. element.提供 Provide an efficient electrostatic discharge on the chip (to measure system-level transient voltage surges and prompt the micro-controller to return to normal operating conditions without the need to use the traditional method of completely restarting the power reset.

Page 12 563299 V. Description of the Invention (ίο) Provide a component with the function of automatically recovering the integrated circuit after electrostatic discharge. The main object of the present invention. The device of the present invention is integrated on the same chip as the integrated circuit to be restored. Automatic reply component package of the present invention

Contains an electrostatic discharge sensing mechanism, which is connected between the VDD and vss lines. It is used to detect whether an electrostatic discharge occurs between VDD and VSS, and then sends an output signal to notify the occurrence of electrostatic discharge. It also contains an electrostatic discharge flag. Mechanism, it will send a flag signal after receiving the electrostatic discharge indication signal from the electrostatic discharge sensing mechanism; it also contains a control mechanism, which provides two reset procedures, the first is in the integrated circuit A reset procedure is provided when the power is turned on. The second is when the integrated circuit is subjected to electrostatic discharge. This control mechanism provides a recovery procedure after receiving the electrostatic discharge flag signal from the electrostatic discharge flag mechanism to restore the integrated circuit. The original circuit action, so the integrated circuit can have two reset procedures. The second type of reply procedure can be a subroutine of the first type of reset procedure, or some of the steps are the same as those in the first type of reset procedure. In keyboard applications, when the keyboard crashes due to system-level electrostatic discharge bombardment, the original instructions in the keyboard can be downloaded and replied from the pc system. The electrostatic discharge sensing mechanism may include a plurality of electrostatic discharge sensors' separately placed in a plurality of places in the integrated circuit; in addition, a logic mechanism may be added to the electrostatic discharge sensing mechanism to logically judge the electrostatic discharge from a plurality of electrostatic discharges. The signal from the sensor then outputs a logical signal to the electrostatic discharge flag mechanism uniformly. The logic mechanism can be a handsome gate, ^ is a NAND gate; the electrostatic discharge flag mechanism can be a 1) type positive and negative, (D flip-flop); and the electrostatic discharge sensor contains two types of sensors, NM0S width / length (W / L) ratio of the first sensor is wider than pM〇s

Page 13 563299

Production length (UW: the value comes bigger, the second sensor's pm0s width / two-to-one ratio is greater than the NM0S width / length (W / L) ratio. / Micro-Hardware and ㈣m can make the microprocessor / Micro-control ◎ Automatically return to normal state during electromagnetic compatibility test. Lee] Ξ: Another m discharge sensor mechanism and electrostatic discharge flag mechanism are integrated with micro-processor or microcontroller on the same chip. No matter whether it is a rapid change caused by a system-level electrostatic discharge bombardment test or a fast transient voltage test on a wafer. The embodiment of the present invention is an automatic recovery architecture on a wafer, which is applied in a

Integrated circuit containing a microprocessor / microcontroller. This architecture includes an electrostatic discharge sensor composed of a plurality of latch logic gates. It also includes an electrostatic discharge flag whose input is connected to the output of the electrostatic discharge sensor. Another embodiment of the present invention is that the electrostatic discharge sensor is composed of two latch logic gates' for detecting a change in system level transient voltage. The output of the two latch logic gates is connected to the input of an OR gate (or a NAND gate), and the output of the OR gate is connected to the input of the electrostatic discharge flag.

The number and placement of flash logic gates are not limited to the input / output area of the microprocessor / microcontroller. The number can be increased and placed in various areas, which can effectively increase the electrostatic discharge protection effect. As the number of latched logic gates increases, the number of OR gate inputs also increases. Another embodiment of the present invention is that the NMOS width / length (W / L) ratio of the first flash logic gate is larger than the width / length (w / l) ratio of PMOS,

Page 14 563299

V. Explanation of the invention (12) This makes the latch logic gate easier to lock in the state of logic 、, 〃; on the contrary, the second latch logic gate & PM0S width / length (" L) ratio is more than The NMOS width / length (w / l) ratio is large, so that the latch logic gate can be easily locked in the logic state. The firmware of the microprocessor / microcontroller's read-only memory (βOM) will automatically check the status of the electrostatic discharge flag (composed of a D-type flip-flop) to monitor the system's operation at any time. Is there any abnormality? In this way, when the microprocessor / microcontroller crashes or freezes due to system-level electrostatic discharge transient voltage or EFT, it can quickly return to a known and stable state automatically. The present invention has been actually applied to an 8-bit microcontroller manufactured in a 0.45 micron CMOS process, and its system-level contact (air) electrostatic discharge = acceptance can be improved from the original 2kV (4kV) to 8kV ( 15kv). ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The method has a procedure of self-funding the integrated circuit after an electrostatic discharge event is another main object of the invention. The method of the present invention includes the following steps: I & Start with a power supply " program to start the integrated circuit of the integrated circuit: The source on reset procedure includes setting the electrostatic discharge flag to the $ ^ solid logic ^ state ; The second is the electrostatic discharge voltage between the VDD line and the Vss line

When Lei measured the electrostatic discharge voltage between the VDD line and the vss line, the discharge flag was set to the second logic state, and the static circuit was restored to the original setting. Logical state. The previous steps ^ no ^ reset procedure: the first is to provide a reset method when the power source is turned on.

563299 V. Description of the invention (13) 电 Electricity == At the time of the event ‘on receiving an electrostatic program, or a sub-step of a kind of reset procedure, it is the same as the reset procedure of another option ^ of the aforementioned method. Place it in a micro-processor or an electrostatic discharge sensor and place them in parallel. Then place the electrostatic discharge flag on the output terminal of an electrostatic discharge flag at the different position of the body circuit and then connect the electrostatic discharge flag. In addition, multiple electrostatic discharge flags can be selected by one device, and multiple electrostatic discharge sensors = two, for example, d-type positive and negative or NAND gates are connected together. Such as ^ 者 —〗 = The terminal can be changed from logic to logic state discharge electrostatic discharge sensor through logic gate, for example, and its flip-flop, such as the signal will be transmitted to static electricity at D ', "Status '_ closed or closed ^ Logic 1 is set when the logic is activated and stored in the microprocessor or micro-control output will also integrate the above description, the present invention is in the recovery procedure of =. Software and design methods' to automatically restore the product Body ::: Body ': Under the body, after being subjected to an electrostatic discharge event, it must be tested for electromagnetic compatibility. The components of the present invention are integrated with the integrated circuit, which consists of an electrostatic discharge sensor and an electrostatic discharge flag. ： = ， 疋 成 ， The firmware is used to perform recovery and reset the initial body. The group is placed on the VDD line fish vss in the integrated circuit. The electrostatic discharge sensor 〃 between the W lines and in the integrated circuit Page 16 563299 V. Description of the invention (14) ^ Must include a microprocessor or microcontroller. 中 In the power-on reset procedure, the two inductors: the output of the device and the state of the electrostatic discharge flag are set to logic, Electrostatic discharge sensing when wide and transient voltages occur ”,“ Logic 1 ”, and the logic 1 output of the electrostatic discharge sensor will change the state of the electrostatic discharge flag to logic M " Here, the electrostatic discharge said, Realized by the flip-flop. When the power-on reset process starts, or when the output of the electrostatic discharge sensor is set to logic τ due to the DD_V transient voltage, the moving body will start a heavy = _ sequence, this procedure is (1) check the state of the electrostatic discharge flag (2) If the state of the electrostatic discharge flag is logic γ, ㈣ start the recovery program to restore the integrated circuit to the set state, and reset the = state to logic of the electrostatic discharge flag; (3) If the electrostatic discharge flag is When the state is logic 0, the general reset procedure will be started; (4) Set the output of the electrostatic discharge sensor to logic, 0β. This architecture and method can make the microprocessor / microcontroller withstand higher-level electrostatic discharge tests without causing the crash of the file or destroying its data. A practical embodiment of the present invention is a keyboard microcontroller of a personal computer. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, preferred embodiments are described below in detail with the accompanying drawings as follows: Brief description of the drawings: FIG. 1 is a drawing A conventional electrostatic discharge protection architecture applied to a circuit board containing a microprocessor / microcontroller uses additional external components to bypass or absorb transient voltage surges; Figure 2 shows a Individual components used to remove the computer keyboard from the system

Page 17 563299

Level ESD event returns to the normal state; Figure 3 shows a chip with a microprocessor / microcontroller integrated with the electrostatic discharge sensor of the present invention, this electrostatic discharge sensor ^ ^ Detects transient voltage surges due to electrical discharge between VDD and vss power lines of the microprocessor / microcontroller; Figure 4 shows the electrostatic discharge sensor and static electricity of the present invention. Circuit architecture; Figures 5 (a) and 5 (b) of the Bank of China are the flowcharts of the firmware of the present invention. The electrostatic discharge sensor in Nongyi microprocessor / microcontroller detects The reset subroutine for the transient voltage caused by the first-level electrostatic discharge; Figure 6 shows a flowchart of the present invention, which shows a reset step, and the reset procedure is The microprocessor / microcontroller is activated when it is found that the electrostatic discharge flag is set to logic 1, 1; Figure 7 shows when an electrostatic discharge is set to a positive electrostatic voltage of 〇〇〇〇__ When the keyboard is placed on the table, the waveforms of VDD and VSS are controlled from the keyboard. The eighth figure from Zori Li to j shows when the electrostatic discharge grabs a negative two of 3Q () () _ v, the ^ figure silk measured from the microcontroller in the keyboard shows when When the electrostatic voltage of positive win v hits the back of the personal computer case of the keyboard, the waveforms of VDD and VSS measured from the micro of the keyboard. : 1 〇 The picture shows the microcontroller from the keyboard when an electrostatic discharge grabs a negative electrostatic voltage of 2000.

563299

The VDD and VSS waveforms measured above. (11th U) The figure shows the system and system-level electrostatic discharge measurement. The winter electric discharge gun is measured with a positive electrostatic voltage of 1,000-V from a microcontroller in the keyboard. To voltage waveform. Figure 11 (b) shows the system-level electrostatic discharge test. ♦ —The electric discharge gun hits a static table with a negative electrostatic voltage of 1,000-V on a table where the keyboard is placed. The voltage waveform of _D_t0, s measured on the controller. j 州 野 第 12 (a 十 Α. "/ u namely ,, day —, each of the two electrostatic discharge test of the electric power gun with a positive electrostatic voltage of 3000-V when a static discharge button w static, from VDD_t〇 voltage waveform measured on the microcontroller in the keyboard. Phantom Yingzi No. 12 (b) The picture shows the system-level electrostatic discharge test, an electric discharge gun with a negative 3000-V The static voltage hits the voltage waveform measured from a microcontroller in the keyboard when it is "quiet" when placed on a keyboard. Π Relative to Figure 13 (a), when the system-level electrostatic discharge test is performed, Equipment — The relative voltage waveform of VDD-to_VSS measured from the microcontroller in the keyboard when the electric discharge gun hits the back of the brain case with a positive electrostatic voltage of 500-V. 1 3 (b) The diagram shows that when the system-level electrostatic discharge test is performed, the all-in-one electric discharge gun is hit by a negative electrostatic voltage of 500-V on the back of a brain case connected to the keyboard from the microcontroller in the keyboard. Measured electricity

Page 19 563299 V. Description of the invention (17) Relative voltage waveform of VDD-to-VSS. = il) The diagram shows that when doing electrostatic discharge test at the system level, when the -ESD is struck with a positive electrostatic charge of 20004 on the back of the brain case, the micro-control emperor from the keyboard The relative voltage waveform of the electrical VDD-to-VSS measured on the device. Ϊ́ 2iV is a system-level electrostatic discharge test. When -ESD grabs a negative electrostatic voltage of 2000-V and hits the rear of a Yintianjing machine, the amount measured on the microcontroller in the keyboard. Relative voltage waveform of VDD-to-VSS. Figure 15 (a) is a diagram showing the relationship between the positive peak voltage and the voltage value of the relative voltage waveform of VDD-to-VSS during the system-level electrostatic discharge measurement. … The terminal value and the electrostatic discharge bombardment Figure 15 (b) is a graph showing the relationship between the negative tip value of the relative voltage waveform of VDD_t0_vss and the voltage value when doing system-level electrostatic discharge. 1: Figure 16 shows the simulation results of HSPICE. Its description is static, the output Q of $ changes its state to logic: the conversion occurs when VDD drops to uv and the surge occurs. Maintain a relative bias at 0V. At this time, the VSS-dimensional image 17 shows the simulation results of η S PIC E. The output terminals q of the beans p, +, and the circuit change their states to logic, and the second is that it occurs when vSS rises to positive 6. The process when the surge occurs == the relative bias is maintained at 5V. At this time, the VDD 疋 brother 18 figure shows a device having an 8-bit microcontroller including the implementation of the present invention.

Page 20 563299 V. Description of the invention (18) Actual full-chip layout. Symbol description of the figure: 1 microprocessor / microcontroller 2 ferrite beads 2a, 2b resistor 3VDD line 4VSS line 5, 5a, 5b capacitor 6 keyboard cable 7 magnet coil 8 flip-flop 9 connection Reset signal line to microprocessor / microcontroller 10VCC line 11 Input signal line 12 Read-only memory (ROM) 13 Random access memory (RAM) 14 Programmable logic array (PLA) 1 5 Logic gate included ESD sensor 1 6 ESD sensor 1 7 ESD sensor 18N0R Gate 1 9 signal line 2 0 signal line 2 1 signal line

Page 21 563299 V. Description of the invention (19) 2 2 inverter 2 3 signal line 2 4 inverter 2 5 inverter 2 6 signal line 2 7 signal 5 tiger line 28 NAND gate 2 9 signal line 30 NAND m 3 1 Inverter 3 2 Inverter 3 3 Signal Line 3 4 Signal Line 3 5 Signal Line 3 6 Inverter 39 Electrostatic Discharge Flags Preferred Embodiments Currently, an 8-bit compatible with Intel 805 1 microprocessor Microcontrollers have been widely used as microprocessor microcontrollers for keyboard products in general personal computer applications. FIG. 3 is a schematic diagram of the microprocessor / microcontroller 1 using the present invention, which includes ROM 12, RAM 1 3, PLA 14, and logic gate 15, and the layout of the logic gate 15 on the chip A plurality of electrostatic discharge sensors are randomly placed in the middle. The integration degree of the microprocessor / microcontroller 1 can be very

Page 22 563299 V. Description of the invention (20) High because it does not require additional individual components, such as magnetic cores, ferrite beads, and RC low-pass filters (RC low -pass filter), etc., for electrostatic discharge protection. For example, the present invention can use only a few capacitors and resistors on a keyboard circuit board, and it can withstand system-level electrostatic discharge bombardment withstand voltage. The contact discharge test method can reach 8ky or more, and The air discharge test method can reach more than 15 kv. For an 8-bit keyboard microprocessor / microcontroller integrated circuit, it must be able to overcome the problems caused by component-level and system-level electrostatic discharge. In order to protect a integrated circuit containing a microprocessor / microcontroller from component-level electrostatic discharge, τ is used to place some electrostatic discharge protection circuits in the integrated circuit. For example, a two-pound native _-blt keyboard microcontroller with a 45-cm-cms process uses a full-chip electrostatic protection technology. This technology uses an effective application of the two-bodied model, HBM. ) The electrostatic discharge tolerance is up to… by ^ ^ ”" protection technology has been disclosed in US Patent No. 842. er. This 8-bit keyboard microcontroller with high electrostatic discharge tolerance in In the actual production and assembly process of the keyboard, the electrostatic discharge problem was returned. Not because of the customer, in addition to the aforementioned component-level electrostatic discharge problem, the one-key, 8-bit keyboard microcontroller itself must be tested. I have worked with another kind of system-level static electricity test to verify its system-level electromagnetic compatibility.

There are two specifications in the test standard of 80B. There are two kinds of electrostatic energy release methods in the 1EC target. One is

Page 23 563299 V. Description of the invention (21), air discharge method, the other is', contact discharge method. A keyboard used in a personal computer system must be able to withstand the electrostatic energy of 4kV contact discharge and the electrostatic energy of 8kV air discharge without operation errors and crashes. In the present invention, a combination of hardware and firmware can solve the system-level electrostatic discharge problem of keyboard products without using additional individual components on the circuit board. FIG. 4 shows a preferred embodiment of a circuit using the first electrostatic discharge sensor 6 and the second electrostatic discharge inductor 17. Electrostatic discharge sensors 16 and 17 are composed of two latch-type logic gates, which are used to detect the occurrence of system-level transient voltage surges. The electrostatic discharge flag 39 in the figure may be composed of a typical D-type flip-flop. The sensor 16 includes a NOR gate 18. The NOR gate 18 receives a reset pulse on line 19 during a normal power-on reset operation or an electrostatic discharge recovery operation, and this pulse is transmitted by the reset-N line 23 through the inverter 22. The output line 21 of the NOR gate 18 is connected to two places at the same time, one is connected to the other input line 20 of the N 0 R gate 18 through the inverter 24, and the other is to connect the sensor 16 to the inverter. The phaser 25, and the output of the inverter 25 is connected to the input line 26 of the NAND gate 28. The sensor 17 is different from the sensor 16, and the sensor 17 includes a NAND gate 30. The NAND gate 30 receives a reset pulse on the line 3 3 during a general power-on reset operation or an electrostatic discharge recovery operation. This pulse is transmitted by the reset J line 2 3 through the inverter 31 and then through the inversion Device 32 is transmitted over. The output line 35 of the NAND gate 30 is connected to two places at the same time, one is connected to the other input line 3 4 of the N A N D gate 3 0 through the inverter 36, and the other is to sense.

Page 563299

V. Description of the invention (22) Another input line 27 from the device 17 to the NAND gate 28. When the sensor 16 or the sensor 17 detects a transient voltage surge, the indication signal through the lines 26 and 27 will be transmitted to the NAND gate 28, and the ^ NAND gate 28 will pass through its output terminal line. 2 9 Set the electrostatic discharge flag 39 to logic. In order to increase the sensor's ability to detect negative and positive fast transient voltage surge changes, the size ratio of the NMOS of the inverter in the sensor 1 7 ( The component channel width / channel length) are designed to be larger than the size ratio of the PMOS, so that the flash can be easily locked in a logic 1 逻辑 state; on the contrary, the size ratio of the PMOS of the inverter in the sensor 丨 6 ( The component channel width / channel length) are designed to be larger than the size ratio of NMOS, so that the gate can be easily locked in a logic, j " state. In addition, the voltage levels that the sensors 16 and 17 can detect can also be adjusted by changing the size ratio of NMOS and PMOS. The sensitivity of the electrostatic discharge sensor on the chip can also be increased by adding a capacitor (not shown in the figure) between the flash lock terminal and the VDD line or VSS line. This design can make the electrostatic discharge susceptibility on the chip The detector can detect system-level transient voltage surges. Figure 5 (a) shows the automatic recovery flow chart of the present invention, which shows that the electrostatic discharge sensor in a microprocessor / microcontroller detects a transient voltage surge due to system-level electrostatic discharge. Wave reset procedure. Figure 5 (b) is a flowchart showing Figure 5 (a) in another form. In step 510 in Fig. 5 (a), the microprocessor / microcontroller is activated through the power-on reset operation. This normal power-on reset procedure will set the electrostatic discharge sensor (Q) to a logic state (step 520 (a)

563299 V. Description of the invention (23)), and the electrostatic discharge flag (F) is set to the state of the logic M〃 (step 520 (b)). When an electrostatic discharge voltage surge is detected by the electrostatic discharge sensor (Q), the 4 'electrostatic discharge sensor (Q) will be set to a logic, 1 ,, / state (step 530). This state change occurs when conducting electrostatic discharge verification tests or when subjected to actual electrostatic discharge bombardment. At step 54, the electrostatic discharge sensor (Q) will output a logic, 1 〃 signal to the input terminal of the electrostatic discharge flag (F), and then start the microprocessor / microcontroller recovery program. At this time, the electrostatic discharge flag (F) is locked in logic and M 〃.

The recovery action (step 550) occurs after checking the state of the electrostatic discharge flag (F), and the recovery process (step 56) will immediately restore all the functions of the microprocessor / microcontroller, and it will usually be troublesome without going through Reset action when the user's power is turned back on. If the status of the electrostatic discharge flag is a logic M //, this indicates that an electrostatic discharge event caused the state of one of the electrostatic discharge sensors to change. J Figure 6 shows a flowchart of the reply procedure at step 56 in Figure 5. At step 610, the electrostatic discharge sensor (Q) is reset to the state of logic ,, 0 ,,; at step 620, the electrostatic discharge flag (F) is reset to logic ,,

, The time taken to complete these two reply procedures will not exceed 2 seconds. In step 630, the proper job and industry can meet the requirements of 4 ^ # 、 目 ， 丨 抑 ^^ The work condition of the crane is broken and the electrostatic discharge f ί The electrostatic discharge flag (F) is under quasi detection-one Static 彳 x 生 = sadness. For a plurality of electrostatic discharge sensors. 歹 The wheel outlets of all electrostatic discharge sensors can be closed through 〇R & and these electrostatic discharge sensors are

Page 26 563299 V. State of Invention (24) Series 0. In order to test the system-level electrostatic discharge from the keyboard, what happens to the transient electricity, a test with a sampling rate of s / s: This is used to record a microcontroller integrated circuit. The voltage waveform of VDD pin and pin, and the system-level electrostatic discharge pulse is used. Take #

MiniZap ESD simulat〇r produced by Instrument Corp. In order to test the system-level electrostatic discharge tolerance of the keyboard, the keyboard was connected to the personal computer during the test, in order to verify whether the keyboard had any movement errors or crashed. For such a system under test, there are two test points that must be bombarded by electrostatic discharge. One is the metal pad on the personal computer and the keyboard; the other is the metal machine on the personal computer and the keyboard. On the shell. Figures 7 to 10 show the transient voltage waveforms recorded on the VDD and vss pins of the microcontroller in the keyboard. Figures 7 and 8 show the transient voltage waveforms recorded on the VDD and VSS pins when the electrostatic discharge gun is bombarded by contact and hit with a positive 1000V or negative 3000v electrostatic discharge voltage on the metal plate. Figures 9 and 10 show the VDD and VSS pins on the metal case of the side of the personal computer next to the keyboard when the electrostatic discharge is struck by contact bombardment and the electrostatic discharge voltage is positive 500V or negative 2000V. Recorded transient voltage waveform. Figures 11 to 15 show the transient relative voltage waveforms of VDD-to-VSS recorded in the above electrostatic discharge test. Figures ll (a) and 11 (b) show the micro-controllers in the keyboard when the electrostatic discharge gun is hit with a positive 1000V and negative 1000V electrostatic discharge voltage respectively on the metal pad.]) 1) And VSS pin

563299 V. Description of invention (25) Voltage difference. Figures 12 (a) and 12 (b) show the VDD and VSS pins of the microcontroller in the keyboard when the electrostatic discharge is applied to the metal pad with a positive 3000V and negative 3000V electrostatic discharge voltage, respectively. Voltage difference between. Figures 13 (a) and 13 (b) show the VDD and VSS pins of the microcontroller in the keyboard when the electrostatic discharge is applied to the PC case with a positive 500V and negative 500V electrostatic discharge voltage, respectively. Voltage difference between bits. Figures 14 (a) and 14 (b) show the VDD and VSS pins of the microcontroller in the keyboard when the electrostatic discharge is hit on the PC case with a positive 2000V and negative 2000V electrostatic discharge voltage, respectively. Voltage difference between bits. Figures 15 (a) and 15 (b) show the relationship between the tip of the voltage difference between the VDD and VSS pins and the electrostatic discharge voltage value of contact bombardment. The larger the electrostatic discharge bombardment voltage value, the larger the tip voltage value will be. Figures 16 and 17 show the simulation results of HSPICE. In the simulation results in Figure 16, vss is relatively stable at ov, and the voltage of VDD was originally maintained at 5V. However, when there is a system-level transient voltage coupled to vdd ", VDD will fall downward. Normal value transients (so-called undershooting glitches) f Ua () glitch ίΓ: Thunder and its rise and fall times are equivalent to lns series: the output of the c-th discharge sensor 仍 is still maintained at logic 0, three ( The fourth) glitch ’s electricity and its rise and fall times are all equivalent to L2V, let Lei Xian: cry, Tian Yu 1 ns (10ns), and at this moment electrostatic electricity, m⑷ rotation will change from logic to logic In the simulation results in Figure 17, it is relatively stable at 5V.

Page 28 563299 V. Description of the invention (26) The electric value of ~~-= was originally maintained, but when there is a system-level transient voltage when it is closed to VSS, VSS will have a transient state that deviates from the normal value. (The so-called overshooting glitches) ^ U @ (^ 2 ^) gHtch's ^ value will rise, and its rise and fall times are equivalent to h (10ns). At this moment, the discharge of the electrostatic discharge sensor (Q) Occurred at gutch ^ maintained at logic t; the electrical value of the third (u @) gHtch will rise to 6.5: 'and its rise and fall times are equivalent to-(i〇ns and at this moment the electrostatic discharge sensing The output of Q) will change from logical sequence to “Ϊ.” Strictly make the electrostatic discharge sensor (Q) change the output state and rise the temporary negative voltage tip value, which can be changed by changing the electrostatic discharge sensing: the logic in the question Between the component size ratio or the capacitance of the face-to-face capacitor, and the positive value is positive. And Figure 16 and Figure 17 show the HspiCE simulation method to measure the component size ratio in the device, so that the electrostatic discharge sensor can静电 ^ Ξ Different falling or rising transients caused by the preceding transient voltages distribute multiple electrostatic discharge sensors == in the layout of the microcontroller, and then use an 〇 gate to get the output of all electrostatic discharge sensors Λ ', and then store the result in a D-type flip-flop ί: ΐ ί flag If this is done, the detection result of the electrostatic discharge sensor can be stored as "for inspection of the body. When the logic", "it back: the process: the controller will restart the design in the microcontroller at the same time. * People, Renxue 'to avoid keyboard malfunction or crash. Disclosure of the invention's combination of the Wei blade body and the electrostatic structure shown in Figure 4 and the hardware structure of the state and electrostatic discharge flag can make micro Processor 563299 V. Description of the invention (27) / Microcontroller quickly executes the back finger and the good finger, ® W sets the order of the spear king from the female sore ΛΑ 丄 to make the keyboard return all the functions that should be in the personal telematics system However, the ancient and local ^ ^ Shizheng instead of using the reset method to turn on the power again. In addition, the fine ship k 忐 忐 发明 μμ λ iT-^ 's keyboard recovery procedure is in a few milliseconds内 rf 风 d 士 田 # 片 丄 电 ^ 's movement is fast, so it can make people Method ^ After the reset or recovery procedure, the & state of the ESD sensor and the ESD flagpole will be reset to logic, 0 ,, and ESD. Event. Of course, the original state of each logic: it is not necessary to set n, or it can be, as long as the logic state can change the original logic state due to the voltage surge detected by the electrostatic discharge sensor. Actual application results According to the present invention, the overall chip layout of an 8-bit microcontroller combining an electrostatic discharge sensor and an electrostatic discharge flag is shown in FIG. 18. This microcontroller is produced by a process with three metal layers of 0.45um CM. Its chip size is only 180Oum X 1 800um, and it is used on the keyboard. It is not necessary to use any individual components such as Magnetic cores, ferrite beads, or RC low-pass filters. By applying the hardware and firmware synchronization design method of the present invention to this microcontroller, a personal computer keyboard using the microcontroller can be tested for system-level electrostatic discharge using a contact discharge (air discharge) test method. In the endurance, whether the electrostatic discharge is bombarded on the metal pad or the computer case, the endurance is improved from the original 2 kV (4kV) to more than 8kV (15kV).

Page 30 563299 V. Description of the invention (28) In summary of the foregoing description, the present invention provides a design method combining hardware and moving bodies, which enables an 8-bit microprocessor / microcontroller to automatically reply to solve the problem. System-level electrostatic discharge problems encountered by general keyboard products. In the present invention, the rapidly changing transient voltages occurring on the VDD and vss pins of the microcontroller in the keyboard can be painfully detected by the electrostatic discharge sensor in the chip, and the electrostatic discharge flag incorporated in the chip After receiving the detection result of the transient voltage, the firmware will start the keyboard recovery procedure. ^ Without adding any additional individual components on the keyboard circuit board, this keyboard is used in the keyboard to measure contact discharge (air discharge) test method. Electrostatic discharge bombards the gold pad or the computer case, and its tolerance can be higher than the original (4 = good to 8kV (15kV)); and in the rapid power fluctuation test (EFT), the voltage level that the keyboard can withstand can also be changed by The original 500v is improved to crying. Two methods. The method of the present invention can also be applied to other embedded products. Microelectronics π or microcontroller electronic products have been disclosed in a preferred embodiment such as i. However, it is not intended to be used by any person skilled in the art within a limited scope. Without departing from the spirit of the present invention, § can do all kinds of changes and modifications. For example, the electrostatic discharge flag reverse I type of flip-flop For example, the RS type flip-flop, D type Π: Ι, 7 ^ ί register, etc .; for example, the logic output design of electrostatic discharge sensor 17 in Figure 4 can also use other types of logic gates. Realization application = disk product. Therefore, the invention When the protective scope of the appended view Patent Τ out girth and their equivalents.

Page 31 563299 V. Description of the Invention (29)

Page 563299 Illustration

Page 33

Claims (1)

563299 will tell you six. Patent application scope 1 kind of microcontroller / microprocessor auto-recovery device under electromagnetic interference 'is used to automatically restore an integrated circuit to its normal function after encountering an electrostatic discharge event. The integrated circuit must contain at least a microprocessor or a microcontroller, and must contain at least a VDD line and a vss line. The mentioned device is combined with the mentioned integrated circuit in the same static = discharge The sensor has the function of detecting the electrostatic discharge voltage. This electrostatic discharge sensor is connected between the VDD line and the vss line mentioned. When it is detected, this electrostatic discharge sensor has an indication. The power of the signal is crying; the discharge flag 'has the function to respond according to the mentioned electrostatic discharge sensing' has a turn-out-flag signal function: ί The mentioned electrostatic discharge sensor detected: This controller has the function of resetting the power supply of the integrated circuit mentioned above, and the function of when the electrostatic discharge number indicates that the electrostatic discharge voltage has been mentioned: The body circuit returns to the device described in item 1 of the scope of the patent application, where the Qin Department # 成 ^ has a first set of procedures, and the aforementioned first group provides reset procedures when the two are turned on. In addition, the return circuit, The power is turned on ... One, and the private sequence is that when the integrated circuit is subjected to an electrostatic discharge event, l ^ pll J_ Page 34 563299 VI. Scope of patent application —— — The first set of procedures is different when the reply procedure provided by the electrostatic discharge flag signal is received. One set of programs and 3. The device described in item 2 of the scope of patent application, where is a subroutine of the first set of programs. 1. A group of procedures 4. The device described in item 2 of the scope of patent application, wherein some steps in are the same as those in the first group of procedures. A set of procedures 5. The device described in item 1 of the scope of patent application, in which a plurality of electrostatic discharge sensors are placed in the above mentioned body ^ including the same location, the device mentioned in # includes a logic The non-computing signals in the f-path are outputted by the plurality of electrostatic discharge sensors and 5 f is responsible for giving the mentioned electrostatic discharge flag as its input signal. 111 Collection 6. The device described in item 5 of the scope of patent application, in which the element is composed of an OR gate. The 碡% transport difference list includes a logical operation list, an electrostatic discharge flag, and a plurality of static charges. 7. The device described in item 5 of the scope of patent application is composed of a N A N D gate. 8. The device described in item 丨 of the scope of patent application is composed of a D-type flip-flop. 9. According to the application, the device described in item 5 of the patent scope, wherein the plurality of static electricity, the inductance sensor includes the first electrostatic discharge sensor, and the ratio of the channel width / channel length size ratio of NM0s is pM. The channel width / channel length size ratio of 〇s is large; and the second type of electrostatic discharge sensor is included, whose channel width / channel length size ratio of PM0s is larger than the channel width / channel length size of NM〇s The ratio is large. 10 A microcontroller / microprocessor auto-recovery method under electromagnetic interference Page 563 299 Method, which is used to integrate the integrated circuit after the electrostatic discharge event. The integrated circuit mentioned must contain at least one actuator or ^ microcontroller, and it must contain at least one VDD line and one The execution steps of the mentioned method include the following steps: (1), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (2), (3), (3), (3), (3), (3), (2), (3), (3) In the first logic state, and the electric silver & electric discharge voltage; and the electric voltage, will static electricity (b) detect the static on the VDD line and VSS line mentioned (c) When the electrostatic discharge and discharge flags on the VDD line and VSS line are detected, set to the second logic state; and (d) When static, the ^ electricity flag is set in the mentioned step (c) In the second logic state, a recovery program is executed to reply to the set actions of the integrated circuit mentioned; and (e) after performing step (d), reset the mentioned electrostatic discharge flag. In the first logic state. 1 1. The method as described in the scope of patent application, wherein step (b) is performed by an electrostatic discharge sensor, and the power-on reset procedure of step (a) also includes The output state of the mentioned electrostatic discharge sensor is set to a first logic state. 1 2. The method as described in item 丨 丨 of the scope of patent application, wherein step (c) includes when the rotation state of the mentioned electrostatic discharge sensor is set to the second logic state, referring to The flag state of the ESD flag is changed to the second logic state. 1 3. The method described in item 丨 2 of the scope of patent application, wherein the steps Page 36 563299 VI. Scope of Patent Application _ je) includes including the mentioned electrostatic discharge 5 in the first logical state mentioned. The output status of the robber is reasserted. The state of the series described in item 13 of the monthly patent scope is logic, '', the second family avoidance mentioned: the first logic 1 mentioned. # 軏 Status is logic 1 5. As described in item J 3 of the scope of the patent application, the state 'Logic Λ is logic', and the second logic condition mentioned in "" = first logic = bracket ΐ ^ please patent scope 10 The reset procedure in the method 1 described in the above item = brother-group procedure. The aforementioned group procedure is to provide a reset procedure when the power of the integrated circuit is exhausted. In addition, the reply procedure includes a private sequence. The second set of procedures is the response procedure provided by the integrated circuit to an electrostatic discharge event. The response to the electrostatic discharge flag signal is received. The date can be different from the first set of procedures. ^ Group procedure n, such as applying for a patent The method described in item 16 of the scope, wherein the first method is a subroutine of a group of procedures of the order of the spear king Xuyi. 1 8. The method described in item 16 of the scope of patent application, in which ~ 4 The part of the sequence of the expanded sequence is the same as that of the first group of procedures. Page 37